1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0+ or MIT)
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Pin controller and GPIO driver for Amlogic Meson G12A SoC.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6*4882a593Smuzhiyun * Author: Xingyu Chen <xingyu.chen@amlogic.com>
7*4882a593Smuzhiyun * Author: Yixun Lan <yixun.lan@amlogic.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <dt-bindings/gpio/meson-g12a-gpio.h>
11*4882a593Smuzhiyun #include "pinctrl-meson.h"
12*4882a593Smuzhiyun #include "pinctrl-meson-axg-pmx.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun static const struct pinctrl_pin_desc meson_g12a_periphs_pins[] = {
15*4882a593Smuzhiyun MESON_PIN(GPIOZ_0),
16*4882a593Smuzhiyun MESON_PIN(GPIOZ_1),
17*4882a593Smuzhiyun MESON_PIN(GPIOZ_2),
18*4882a593Smuzhiyun MESON_PIN(GPIOZ_3),
19*4882a593Smuzhiyun MESON_PIN(GPIOZ_4),
20*4882a593Smuzhiyun MESON_PIN(GPIOZ_5),
21*4882a593Smuzhiyun MESON_PIN(GPIOZ_6),
22*4882a593Smuzhiyun MESON_PIN(GPIOZ_7),
23*4882a593Smuzhiyun MESON_PIN(GPIOZ_8),
24*4882a593Smuzhiyun MESON_PIN(GPIOZ_9),
25*4882a593Smuzhiyun MESON_PIN(GPIOZ_10),
26*4882a593Smuzhiyun MESON_PIN(GPIOZ_11),
27*4882a593Smuzhiyun MESON_PIN(GPIOZ_12),
28*4882a593Smuzhiyun MESON_PIN(GPIOZ_13),
29*4882a593Smuzhiyun MESON_PIN(GPIOZ_14),
30*4882a593Smuzhiyun MESON_PIN(GPIOZ_15),
31*4882a593Smuzhiyun MESON_PIN(GPIOH_0),
32*4882a593Smuzhiyun MESON_PIN(GPIOH_1),
33*4882a593Smuzhiyun MESON_PIN(GPIOH_2),
34*4882a593Smuzhiyun MESON_PIN(GPIOH_3),
35*4882a593Smuzhiyun MESON_PIN(GPIOH_4),
36*4882a593Smuzhiyun MESON_PIN(GPIOH_5),
37*4882a593Smuzhiyun MESON_PIN(GPIOH_6),
38*4882a593Smuzhiyun MESON_PIN(GPIOH_7),
39*4882a593Smuzhiyun MESON_PIN(GPIOH_8),
40*4882a593Smuzhiyun MESON_PIN(BOOT_0),
41*4882a593Smuzhiyun MESON_PIN(BOOT_1),
42*4882a593Smuzhiyun MESON_PIN(BOOT_2),
43*4882a593Smuzhiyun MESON_PIN(BOOT_3),
44*4882a593Smuzhiyun MESON_PIN(BOOT_4),
45*4882a593Smuzhiyun MESON_PIN(BOOT_5),
46*4882a593Smuzhiyun MESON_PIN(BOOT_6),
47*4882a593Smuzhiyun MESON_PIN(BOOT_7),
48*4882a593Smuzhiyun MESON_PIN(BOOT_8),
49*4882a593Smuzhiyun MESON_PIN(BOOT_9),
50*4882a593Smuzhiyun MESON_PIN(BOOT_10),
51*4882a593Smuzhiyun MESON_PIN(BOOT_11),
52*4882a593Smuzhiyun MESON_PIN(BOOT_12),
53*4882a593Smuzhiyun MESON_PIN(BOOT_13),
54*4882a593Smuzhiyun MESON_PIN(BOOT_14),
55*4882a593Smuzhiyun MESON_PIN(BOOT_15),
56*4882a593Smuzhiyun MESON_PIN(GPIOC_0),
57*4882a593Smuzhiyun MESON_PIN(GPIOC_1),
58*4882a593Smuzhiyun MESON_PIN(GPIOC_2),
59*4882a593Smuzhiyun MESON_PIN(GPIOC_3),
60*4882a593Smuzhiyun MESON_PIN(GPIOC_4),
61*4882a593Smuzhiyun MESON_PIN(GPIOC_5),
62*4882a593Smuzhiyun MESON_PIN(GPIOC_6),
63*4882a593Smuzhiyun MESON_PIN(GPIOC_7),
64*4882a593Smuzhiyun MESON_PIN(GPIOA_0),
65*4882a593Smuzhiyun MESON_PIN(GPIOA_1),
66*4882a593Smuzhiyun MESON_PIN(GPIOA_2),
67*4882a593Smuzhiyun MESON_PIN(GPIOA_3),
68*4882a593Smuzhiyun MESON_PIN(GPIOA_4),
69*4882a593Smuzhiyun MESON_PIN(GPIOA_5),
70*4882a593Smuzhiyun MESON_PIN(GPIOA_6),
71*4882a593Smuzhiyun MESON_PIN(GPIOA_7),
72*4882a593Smuzhiyun MESON_PIN(GPIOA_8),
73*4882a593Smuzhiyun MESON_PIN(GPIOA_9),
74*4882a593Smuzhiyun MESON_PIN(GPIOA_10),
75*4882a593Smuzhiyun MESON_PIN(GPIOA_11),
76*4882a593Smuzhiyun MESON_PIN(GPIOA_12),
77*4882a593Smuzhiyun MESON_PIN(GPIOA_13),
78*4882a593Smuzhiyun MESON_PIN(GPIOA_14),
79*4882a593Smuzhiyun MESON_PIN(GPIOA_15),
80*4882a593Smuzhiyun MESON_PIN(GPIOX_0),
81*4882a593Smuzhiyun MESON_PIN(GPIOX_1),
82*4882a593Smuzhiyun MESON_PIN(GPIOX_2),
83*4882a593Smuzhiyun MESON_PIN(GPIOX_3),
84*4882a593Smuzhiyun MESON_PIN(GPIOX_4),
85*4882a593Smuzhiyun MESON_PIN(GPIOX_5),
86*4882a593Smuzhiyun MESON_PIN(GPIOX_6),
87*4882a593Smuzhiyun MESON_PIN(GPIOX_7),
88*4882a593Smuzhiyun MESON_PIN(GPIOX_8),
89*4882a593Smuzhiyun MESON_PIN(GPIOX_9),
90*4882a593Smuzhiyun MESON_PIN(GPIOX_10),
91*4882a593Smuzhiyun MESON_PIN(GPIOX_11),
92*4882a593Smuzhiyun MESON_PIN(GPIOX_12),
93*4882a593Smuzhiyun MESON_PIN(GPIOX_13),
94*4882a593Smuzhiyun MESON_PIN(GPIOX_14),
95*4882a593Smuzhiyun MESON_PIN(GPIOX_15),
96*4882a593Smuzhiyun MESON_PIN(GPIOX_16),
97*4882a593Smuzhiyun MESON_PIN(GPIOX_17),
98*4882a593Smuzhiyun MESON_PIN(GPIOX_18),
99*4882a593Smuzhiyun MESON_PIN(GPIOX_19),
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static const struct pinctrl_pin_desc meson_g12a_aobus_pins[] = {
103*4882a593Smuzhiyun MESON_PIN(GPIOAO_0),
104*4882a593Smuzhiyun MESON_PIN(GPIOAO_1),
105*4882a593Smuzhiyun MESON_PIN(GPIOAO_2),
106*4882a593Smuzhiyun MESON_PIN(GPIOAO_3),
107*4882a593Smuzhiyun MESON_PIN(GPIOAO_4),
108*4882a593Smuzhiyun MESON_PIN(GPIOAO_5),
109*4882a593Smuzhiyun MESON_PIN(GPIOAO_6),
110*4882a593Smuzhiyun MESON_PIN(GPIOAO_7),
111*4882a593Smuzhiyun MESON_PIN(GPIOAO_8),
112*4882a593Smuzhiyun MESON_PIN(GPIOAO_9),
113*4882a593Smuzhiyun MESON_PIN(GPIOAO_10),
114*4882a593Smuzhiyun MESON_PIN(GPIOAO_11),
115*4882a593Smuzhiyun MESON_PIN(GPIOE_0),
116*4882a593Smuzhiyun MESON_PIN(GPIOE_1),
117*4882a593Smuzhiyun MESON_PIN(GPIOE_2),
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* emmc */
121*4882a593Smuzhiyun static const unsigned int emmc_nand_d0_pins[] = { BOOT_0 };
122*4882a593Smuzhiyun static const unsigned int emmc_nand_d1_pins[] = { BOOT_1 };
123*4882a593Smuzhiyun static const unsigned int emmc_nand_d2_pins[] = { BOOT_2 };
124*4882a593Smuzhiyun static const unsigned int emmc_nand_d3_pins[] = { BOOT_3 };
125*4882a593Smuzhiyun static const unsigned int emmc_nand_d4_pins[] = { BOOT_4 };
126*4882a593Smuzhiyun static const unsigned int emmc_nand_d5_pins[] = { BOOT_5 };
127*4882a593Smuzhiyun static const unsigned int emmc_nand_d6_pins[] = { BOOT_6 };
128*4882a593Smuzhiyun static const unsigned int emmc_nand_d7_pins[] = { BOOT_7 };
129*4882a593Smuzhiyun static const unsigned int emmc_clk_pins[] = { BOOT_8 };
130*4882a593Smuzhiyun static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
131*4882a593Smuzhiyun static const unsigned int emmc_nand_ds_pins[] = { BOOT_13 };
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* nand */
134*4882a593Smuzhiyun static const unsigned int nand_wen_clk_pins[] = { BOOT_8 };
135*4882a593Smuzhiyun static const unsigned int nand_ale_pins[] = { BOOT_9 };
136*4882a593Smuzhiyun static const unsigned int nand_cle_pins[] = { BOOT_10 };
137*4882a593Smuzhiyun static const unsigned int nand_ce0_pins[] = { BOOT_11 };
138*4882a593Smuzhiyun static const unsigned int nand_ren_wr_pins[] = { BOOT_12 };
139*4882a593Smuzhiyun static const unsigned int nand_rb0_pins[] = { BOOT_14 };
140*4882a593Smuzhiyun static const unsigned int nand_ce1_pins[] = { BOOT_15 };
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* nor */
143*4882a593Smuzhiyun static const unsigned int nor_hold_pins[] = { BOOT_3 };
144*4882a593Smuzhiyun static const unsigned int nor_d_pins[] = { BOOT_4 };
145*4882a593Smuzhiyun static const unsigned int nor_q_pins[] = { BOOT_5 };
146*4882a593Smuzhiyun static const unsigned int nor_c_pins[] = { BOOT_6 };
147*4882a593Smuzhiyun static const unsigned int nor_wp_pins[] = { BOOT_7 };
148*4882a593Smuzhiyun static const unsigned int nor_cs_pins[] = { BOOT_14 };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* sdio */
151*4882a593Smuzhiyun static const unsigned int sdio_d0_pins[] = { GPIOX_0 };
152*4882a593Smuzhiyun static const unsigned int sdio_d1_pins[] = { GPIOX_1 };
153*4882a593Smuzhiyun static const unsigned int sdio_d2_pins[] = { GPIOX_2 };
154*4882a593Smuzhiyun static const unsigned int sdio_d3_pins[] = { GPIOX_3 };
155*4882a593Smuzhiyun static const unsigned int sdio_clk_pins[] = { GPIOX_4 };
156*4882a593Smuzhiyun static const unsigned int sdio_cmd_pins[] = { GPIOX_5 };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun /* sdcard */
159*4882a593Smuzhiyun static const unsigned int sdcard_d0_c_pins[] = { GPIOC_0 };
160*4882a593Smuzhiyun static const unsigned int sdcard_d1_c_pins[] = { GPIOC_1 };
161*4882a593Smuzhiyun static const unsigned int sdcard_d2_c_pins[] = { GPIOC_2 };
162*4882a593Smuzhiyun static const unsigned int sdcard_d3_c_pins[] = { GPIOC_3 };
163*4882a593Smuzhiyun static const unsigned int sdcard_clk_c_pins[] = { GPIOC_4 };
164*4882a593Smuzhiyun static const unsigned int sdcard_cmd_c_pins[] = { GPIOC_5 };
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun static const unsigned int sdcard_d0_z_pins[] = { GPIOZ_2 };
167*4882a593Smuzhiyun static const unsigned int sdcard_d1_z_pins[] = { GPIOZ_3 };
168*4882a593Smuzhiyun static const unsigned int sdcard_d2_z_pins[] = { GPIOZ_4 };
169*4882a593Smuzhiyun static const unsigned int sdcard_d3_z_pins[] = { GPIOZ_5 };
170*4882a593Smuzhiyun static const unsigned int sdcard_clk_z_pins[] = { GPIOZ_6 };
171*4882a593Smuzhiyun static const unsigned int sdcard_cmd_z_pins[] = { GPIOZ_7 };
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* spi0 */
174*4882a593Smuzhiyun static const unsigned int spi0_mosi_c_pins[] = { GPIOC_0 };
175*4882a593Smuzhiyun static const unsigned int spi0_miso_c_pins[] = { GPIOC_1 };
176*4882a593Smuzhiyun static const unsigned int spi0_ss0_c_pins[] = { GPIOC_2 };
177*4882a593Smuzhiyun static const unsigned int spi0_clk_c_pins[] = { GPIOC_3 };
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun static const unsigned int spi0_mosi_x_pins[] = { GPIOX_8 };
180*4882a593Smuzhiyun static const unsigned int spi0_miso_x_pins[] = { GPIOX_9 };
181*4882a593Smuzhiyun static const unsigned int spi0_ss0_x_pins[] = { GPIOX_10 };
182*4882a593Smuzhiyun static const unsigned int spi0_clk_x_pins[] = { GPIOX_11 };
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun /* spi1 */
185*4882a593Smuzhiyun static const unsigned int spi1_mosi_pins[] = { GPIOH_4 };
186*4882a593Smuzhiyun static const unsigned int spi1_miso_pins[] = { GPIOH_5 };
187*4882a593Smuzhiyun static const unsigned int spi1_ss0_pins[] = { GPIOH_6 };
188*4882a593Smuzhiyun static const unsigned int spi1_clk_pins[] = { GPIOH_7 };
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* i2c0 */
191*4882a593Smuzhiyun static const unsigned int i2c0_sda_c_pins[] = { GPIOC_5 };
192*4882a593Smuzhiyun static const unsigned int i2c0_sck_c_pins[] = { GPIOC_6 };
193*4882a593Smuzhiyun static const unsigned int i2c0_sda_z0_pins[] = { GPIOZ_0 };
194*4882a593Smuzhiyun static const unsigned int i2c0_sck_z1_pins[] = { GPIOZ_1 };
195*4882a593Smuzhiyun static const unsigned int i2c0_sda_z7_pins[] = { GPIOZ_7 };
196*4882a593Smuzhiyun static const unsigned int i2c0_sck_z8_pins[] = { GPIOZ_8 };
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /* i2c1 */
199*4882a593Smuzhiyun static const unsigned int i2c1_sda_x_pins[] = { GPIOX_10 };
200*4882a593Smuzhiyun static const unsigned int i2c1_sck_x_pins[] = { GPIOX_11 };
201*4882a593Smuzhiyun static const unsigned int i2c1_sda_h2_pins[] = { GPIOH_2 };
202*4882a593Smuzhiyun static const unsigned int i2c1_sck_h3_pins[] = { GPIOH_3 };
203*4882a593Smuzhiyun static const unsigned int i2c1_sda_h6_pins[] = { GPIOH_6 };
204*4882a593Smuzhiyun static const unsigned int i2c1_sck_h7_pins[] = { GPIOH_7 };
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* i2c2 */
207*4882a593Smuzhiyun static const unsigned int i2c2_sda_x_pins[] = { GPIOX_17 };
208*4882a593Smuzhiyun static const unsigned int i2c2_sck_x_pins[] = { GPIOX_18 };
209*4882a593Smuzhiyun static const unsigned int i2c2_sda_z_pins[] = { GPIOZ_14 };
210*4882a593Smuzhiyun static const unsigned int i2c2_sck_z_pins[] = { GPIOZ_15 };
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* i2c3 */
213*4882a593Smuzhiyun static const unsigned int i2c3_sda_h_pins[] = { GPIOH_0 };
214*4882a593Smuzhiyun static const unsigned int i2c3_sck_h_pins[] = { GPIOH_1 };
215*4882a593Smuzhiyun static const unsigned int i2c3_sda_a_pins[] = { GPIOA_14 };
216*4882a593Smuzhiyun static const unsigned int i2c3_sck_a_pins[] = { GPIOA_15 };
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /* uart_a */
219*4882a593Smuzhiyun static const unsigned int uart_a_tx_pins[] = { GPIOX_12 };
220*4882a593Smuzhiyun static const unsigned int uart_a_rx_pins[] = { GPIOX_13 };
221*4882a593Smuzhiyun static const unsigned int uart_a_cts_pins[] = { GPIOX_14 };
222*4882a593Smuzhiyun static const unsigned int uart_a_rts_pins[] = { GPIOX_15 };
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /* uart_b */
225*4882a593Smuzhiyun static const unsigned int uart_b_tx_pins[] = { GPIOX_6 };
226*4882a593Smuzhiyun static const unsigned int uart_b_rx_pins[] = { GPIOX_7 };
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* uart_c */
229*4882a593Smuzhiyun static const unsigned int uart_c_rts_pins[] = { GPIOH_4 };
230*4882a593Smuzhiyun static const unsigned int uart_c_cts_pins[] = { GPIOH_5 };
231*4882a593Smuzhiyun static const unsigned int uart_c_rx_pins[] = { GPIOH_6 };
232*4882a593Smuzhiyun static const unsigned int uart_c_tx_pins[] = { GPIOH_7 };
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /* uart_ao_a_c */
235*4882a593Smuzhiyun static const unsigned int uart_ao_a_rx_c_pins[] = { GPIOC_2 };
236*4882a593Smuzhiyun static const unsigned int uart_ao_a_tx_c_pins[] = { GPIOC_3 };
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* iso7816 */
239*4882a593Smuzhiyun static const unsigned int iso7816_clk_c_pins[] = { GPIOC_5 };
240*4882a593Smuzhiyun static const unsigned int iso7816_data_c_pins[] = { GPIOC_6 };
241*4882a593Smuzhiyun static const unsigned int iso7816_clk_x_pins[] = { GPIOX_8 };
242*4882a593Smuzhiyun static const unsigned int iso7816_data_x_pins[] = { GPIOX_9 };
243*4882a593Smuzhiyun static const unsigned int iso7816_clk_h_pins[] = { GPIOH_6 };
244*4882a593Smuzhiyun static const unsigned int iso7816_data_h_pins[] = { GPIOH_7 };
245*4882a593Smuzhiyun static const unsigned int iso7816_clk_z_pins[] = { GPIOZ_0 };
246*4882a593Smuzhiyun static const unsigned int iso7816_data_z_pins[] = { GPIOZ_1 };
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun /* eth */
249*4882a593Smuzhiyun static const unsigned int eth_mdio_pins[] = { GPIOZ_0 };
250*4882a593Smuzhiyun static const unsigned int eth_mdc_pins[] = { GPIOZ_1 };
251*4882a593Smuzhiyun static const unsigned int eth_rgmii_rx_clk_pins[] = { GPIOZ_2 };
252*4882a593Smuzhiyun static const unsigned int eth_rx_dv_pins[] = { GPIOZ_3 };
253*4882a593Smuzhiyun static const unsigned int eth_rxd0_pins[] = { GPIOZ_4 };
254*4882a593Smuzhiyun static const unsigned int eth_rxd1_pins[] = { GPIOZ_5 };
255*4882a593Smuzhiyun static const unsigned int eth_rxd2_rgmii_pins[] = { GPIOZ_6 };
256*4882a593Smuzhiyun static const unsigned int eth_rxd3_rgmii_pins[] = { GPIOZ_7 };
257*4882a593Smuzhiyun static const unsigned int eth_rgmii_tx_clk_pins[] = { GPIOZ_8 };
258*4882a593Smuzhiyun static const unsigned int eth_txen_pins[] = { GPIOZ_9 };
259*4882a593Smuzhiyun static const unsigned int eth_txd0_pins[] = { GPIOZ_10 };
260*4882a593Smuzhiyun static const unsigned int eth_txd1_pins[] = { GPIOZ_11 };
261*4882a593Smuzhiyun static const unsigned int eth_txd2_rgmii_pins[] = { GPIOZ_12 };
262*4882a593Smuzhiyun static const unsigned int eth_txd3_rgmii_pins[] = { GPIOZ_13 };
263*4882a593Smuzhiyun static const unsigned int eth_link_led_pins[] = { GPIOZ_14 };
264*4882a593Smuzhiyun static const unsigned int eth_act_led_pins[] = { GPIOZ_15 };
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun /* pwm_a */
267*4882a593Smuzhiyun static const unsigned int pwm_a_pins[] = { GPIOX_6 };
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* pwm_b */
270*4882a593Smuzhiyun static const unsigned int pwm_b_x7_pins[] = { GPIOX_7 };
271*4882a593Smuzhiyun static const unsigned int pwm_b_x19_pins[] = { GPIOX_19 };
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /* pwm_c */
274*4882a593Smuzhiyun static const unsigned int pwm_c_c_pins[] = { GPIOC_4 };
275*4882a593Smuzhiyun static const unsigned int pwm_c_x5_pins[] = { GPIOX_5 };
276*4882a593Smuzhiyun static const unsigned int pwm_c_x8_pins[] = { GPIOX_8 };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* pwm_d */
279*4882a593Smuzhiyun static const unsigned int pwm_d_x3_pins[] = { GPIOX_3 };
280*4882a593Smuzhiyun static const unsigned int pwm_d_x6_pins[] = { GPIOX_6 };
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* pwm_e */
283*4882a593Smuzhiyun static const unsigned int pwm_e_pins[] = { GPIOX_16 };
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /* pwm_f */
286*4882a593Smuzhiyun static const unsigned int pwm_f_x_pins[] = { GPIOX_7 };
287*4882a593Smuzhiyun static const unsigned int pwm_f_h_pins[] = { GPIOH_5 };
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun /* cec_ao */
290*4882a593Smuzhiyun static const unsigned int cec_ao_a_h_pins[] = { GPIOH_3 };
291*4882a593Smuzhiyun static const unsigned int cec_ao_b_h_pins[] = { GPIOH_3 };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /* jtag_b */
294*4882a593Smuzhiyun static const unsigned int jtag_b_tdo_pins[] = { GPIOC_0 };
295*4882a593Smuzhiyun static const unsigned int jtag_b_tdi_pins[] = { GPIOC_1 };
296*4882a593Smuzhiyun static const unsigned int jtag_b_clk_pins[] = { GPIOC_4 };
297*4882a593Smuzhiyun static const unsigned int jtag_b_tms_pins[] = { GPIOC_5 };
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* bt565_a */
300*4882a593Smuzhiyun static const unsigned int bt565_a_vs_pins[] = { GPIOZ_0 };
301*4882a593Smuzhiyun static const unsigned int bt565_a_hs_pins[] = { GPIOZ_1 };
302*4882a593Smuzhiyun static const unsigned int bt565_a_clk_pins[] = { GPIOZ_3 };
303*4882a593Smuzhiyun static const unsigned int bt565_a_din0_pins[] = { GPIOZ_4 };
304*4882a593Smuzhiyun static const unsigned int bt565_a_din1_pins[] = { GPIOZ_5 };
305*4882a593Smuzhiyun static const unsigned int bt565_a_din2_pins[] = { GPIOZ_6 };
306*4882a593Smuzhiyun static const unsigned int bt565_a_din3_pins[] = { GPIOZ_7 };
307*4882a593Smuzhiyun static const unsigned int bt565_a_din4_pins[] = { GPIOZ_8 };
308*4882a593Smuzhiyun static const unsigned int bt565_a_din5_pins[] = { GPIOZ_9 };
309*4882a593Smuzhiyun static const unsigned int bt565_a_din6_pins[] = { GPIOZ_10 };
310*4882a593Smuzhiyun static const unsigned int bt565_a_din7_pins[] = { GPIOZ_11 };
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /* tsin_a */
313*4882a593Smuzhiyun static const unsigned int tsin_a_valid_pins[] = { GPIOX_2 };
314*4882a593Smuzhiyun static const unsigned int tsin_a_sop_pins[] = { GPIOX_1 };
315*4882a593Smuzhiyun static const unsigned int tsin_a_din0_pins[] = { GPIOX_0 };
316*4882a593Smuzhiyun static const unsigned int tsin_a_clk_pins[] = { GPIOX_3 };
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /* tsin_b */
319*4882a593Smuzhiyun static const unsigned int tsin_b_valid_x_pins[] = { GPIOX_9 };
320*4882a593Smuzhiyun static const unsigned int tsin_b_sop_x_pins[] = { GPIOX_8 };
321*4882a593Smuzhiyun static const unsigned int tsin_b_din0_x_pins[] = { GPIOX_10 };
322*4882a593Smuzhiyun static const unsigned int tsin_b_clk_x_pins[] = { GPIOX_11 };
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun static const unsigned int tsin_b_valid_z_pins[] = { GPIOZ_2 };
325*4882a593Smuzhiyun static const unsigned int tsin_b_sop_z_pins[] = { GPIOZ_3 };
326*4882a593Smuzhiyun static const unsigned int tsin_b_din0_z_pins[] = { GPIOZ_4 };
327*4882a593Smuzhiyun static const unsigned int tsin_b_clk_z_pins[] = { GPIOZ_5 };
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun static const unsigned int tsin_b_fail_pins[] = { GPIOZ_6 };
330*4882a593Smuzhiyun static const unsigned int tsin_b_din1_pins[] = { GPIOZ_7 };
331*4882a593Smuzhiyun static const unsigned int tsin_b_din2_pins[] = { GPIOZ_8 };
332*4882a593Smuzhiyun static const unsigned int tsin_b_din3_pins[] = { GPIOZ_9 };
333*4882a593Smuzhiyun static const unsigned int tsin_b_din4_pins[] = { GPIOZ_10 };
334*4882a593Smuzhiyun static const unsigned int tsin_b_din5_pins[] = { GPIOZ_11 };
335*4882a593Smuzhiyun static const unsigned int tsin_b_din6_pins[] = { GPIOZ_12 };
336*4882a593Smuzhiyun static const unsigned int tsin_b_din7_pins[] = { GPIOZ_13 };
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* hdmitx */
339*4882a593Smuzhiyun static const unsigned int hdmitx_sda_pins[] = { GPIOH_0 };
340*4882a593Smuzhiyun static const unsigned int hdmitx_sck_pins[] = { GPIOH_1 };
341*4882a593Smuzhiyun static const unsigned int hdmitx_hpd_in_pins[] = { GPIOH_2 };
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /* pdm */
344*4882a593Smuzhiyun static const unsigned int pdm_din0_c_pins[] = { GPIOC_0 };
345*4882a593Smuzhiyun static const unsigned int pdm_din1_c_pins[] = { GPIOC_1 };
346*4882a593Smuzhiyun static const unsigned int pdm_din2_c_pins[] = { GPIOC_2 };
347*4882a593Smuzhiyun static const unsigned int pdm_din3_c_pins[] = { GPIOC_3 };
348*4882a593Smuzhiyun static const unsigned int pdm_dclk_c_pins[] = { GPIOC_4 };
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun static const unsigned int pdm_din0_x_pins[] = { GPIOX_0 };
351*4882a593Smuzhiyun static const unsigned int pdm_din1_x_pins[] = { GPIOX_1 };
352*4882a593Smuzhiyun static const unsigned int pdm_din2_x_pins[] = { GPIOX_2 };
353*4882a593Smuzhiyun static const unsigned int pdm_din3_x_pins[] = { GPIOX_3 };
354*4882a593Smuzhiyun static const unsigned int pdm_dclk_x_pins[] = { GPIOX_4 };
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun static const unsigned int pdm_din0_z_pins[] = { GPIOZ_2 };
357*4882a593Smuzhiyun static const unsigned int pdm_din1_z_pins[] = { GPIOZ_3 };
358*4882a593Smuzhiyun static const unsigned int pdm_din2_z_pins[] = { GPIOZ_4 };
359*4882a593Smuzhiyun static const unsigned int pdm_din3_z_pins[] = { GPIOZ_5 };
360*4882a593Smuzhiyun static const unsigned int pdm_dclk_z_pins[] = { GPIOZ_6 };
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun static const unsigned int pdm_din0_a_pins[] = { GPIOA_8 };
363*4882a593Smuzhiyun static const unsigned int pdm_din1_a_pins[] = { GPIOA_9 };
364*4882a593Smuzhiyun static const unsigned int pdm_din2_a_pins[] = { GPIOA_6 };
365*4882a593Smuzhiyun static const unsigned int pdm_din3_a_pins[] = { GPIOA_5 };
366*4882a593Smuzhiyun static const unsigned int pdm_dclk_a_pins[] = { GPIOA_7 };
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun /* spdif_in */
369*4882a593Smuzhiyun static const unsigned int spdif_in_h_pins[] = { GPIOH_5 };
370*4882a593Smuzhiyun static const unsigned int spdif_in_a10_pins[] = { GPIOA_10 };
371*4882a593Smuzhiyun static const unsigned int spdif_in_a12_pins[] = { GPIOA_12 };
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /* spdif_out */
374*4882a593Smuzhiyun static const unsigned int spdif_out_h_pins[] = { GPIOH_4 };
375*4882a593Smuzhiyun static const unsigned int spdif_out_a11_pins[] = { GPIOA_11 };
376*4882a593Smuzhiyun static const unsigned int spdif_out_a13_pins[] = { GPIOA_13 };
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /* mclk0 */
379*4882a593Smuzhiyun static const unsigned int mclk0_a_pins[] = { GPIOA_0 };
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /* mclk1 */
382*4882a593Smuzhiyun static const unsigned int mclk1_x_pins[] = { GPIOX_5 };
383*4882a593Smuzhiyun static const unsigned int mclk1_z_pins[] = { GPIOZ_8 };
384*4882a593Smuzhiyun static const unsigned int mclk1_a_pins[] = { GPIOA_11 };
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /* tdm */
387*4882a593Smuzhiyun static const unsigned int tdm_a_slv_sclk_pins[] = { GPIOX_11 };
388*4882a593Smuzhiyun static const unsigned int tdm_a_slv_fs_pins[] = { GPIOX_10 };
389*4882a593Smuzhiyun static const unsigned int tdm_a_sclk_pins[] = { GPIOX_11 };
390*4882a593Smuzhiyun static const unsigned int tdm_a_fs_pins[] = { GPIOX_10 };
391*4882a593Smuzhiyun static const unsigned int tdm_a_din0_pins[] = { GPIOX_9 };
392*4882a593Smuzhiyun static const unsigned int tdm_a_din1_pins[] = { GPIOX_8 };
393*4882a593Smuzhiyun static const unsigned int tdm_a_dout0_pins[] = { GPIOX_9 };
394*4882a593Smuzhiyun static const unsigned int tdm_a_dout1_pins[] = { GPIOX_8 };
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun static const unsigned int tdm_b_slv_sclk_pins[] = { GPIOA_1 };
397*4882a593Smuzhiyun static const unsigned int tdm_b_slv_fs_pins[] = { GPIOA_2 };
398*4882a593Smuzhiyun static const unsigned int tdm_b_sclk_pins[] = { GPIOA_1 };
399*4882a593Smuzhiyun static const unsigned int tdm_b_fs_pins[] = { GPIOA_2 };
400*4882a593Smuzhiyun static const unsigned int tdm_b_din0_pins[] = { GPIOA_3 };
401*4882a593Smuzhiyun static const unsigned int tdm_b_din1_pins[] = { GPIOA_4 };
402*4882a593Smuzhiyun static const unsigned int tdm_b_din2_pins[] = { GPIOA_5 };
403*4882a593Smuzhiyun static const unsigned int tdm_b_din3_a_pins[] = { GPIOA_6 };
404*4882a593Smuzhiyun static const unsigned int tdm_b_din3_h_pins[] = { GPIOH_5 };
405*4882a593Smuzhiyun static const unsigned int tdm_b_dout0_pins[] = { GPIOA_3 };
406*4882a593Smuzhiyun static const unsigned int tdm_b_dout1_pins[] = { GPIOA_4 };
407*4882a593Smuzhiyun static const unsigned int tdm_b_dout2_pins[] = { GPIOA_5 };
408*4882a593Smuzhiyun static const unsigned int tdm_b_dout3_a_pins[] = { GPIOA_6 };
409*4882a593Smuzhiyun static const unsigned int tdm_b_dout3_h_pins[] = { GPIOH_5 };
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun static const unsigned int tdm_c_slv_sclk_a_pins[] = { GPIOA_12 };
412*4882a593Smuzhiyun static const unsigned int tdm_c_slv_fs_a_pins[] = { GPIOA_13 };
413*4882a593Smuzhiyun static const unsigned int tdm_c_slv_sclk_z_pins[] = { GPIOZ_7 };
414*4882a593Smuzhiyun static const unsigned int tdm_c_slv_fs_z_pins[] = { GPIOZ_6 };
415*4882a593Smuzhiyun static const unsigned int tdm_c_sclk_a_pins[] = { GPIOA_12 };
416*4882a593Smuzhiyun static const unsigned int tdm_c_fs_a_pins[] = { GPIOA_13 };
417*4882a593Smuzhiyun static const unsigned int tdm_c_sclk_z_pins[] = { GPIOZ_7 };
418*4882a593Smuzhiyun static const unsigned int tdm_c_fs_z_pins[] = { GPIOZ_6 };
419*4882a593Smuzhiyun static const unsigned int tdm_c_din0_a_pins[] = { GPIOA_10 };
420*4882a593Smuzhiyun static const unsigned int tdm_c_din1_a_pins[] = { GPIOA_9 };
421*4882a593Smuzhiyun static const unsigned int tdm_c_din2_a_pins[] = { GPIOA_8 };
422*4882a593Smuzhiyun static const unsigned int tdm_c_din3_a_pins[] = { GPIOA_7 };
423*4882a593Smuzhiyun static const unsigned int tdm_c_din0_z_pins[] = { GPIOZ_2 };
424*4882a593Smuzhiyun static const unsigned int tdm_c_din1_z_pins[] = { GPIOZ_3 };
425*4882a593Smuzhiyun static const unsigned int tdm_c_din2_z_pins[] = { GPIOZ_4 };
426*4882a593Smuzhiyun static const unsigned int tdm_c_din3_z_pins[] = { GPIOZ_5 };
427*4882a593Smuzhiyun static const unsigned int tdm_c_dout0_a_pins[] = { GPIOA_10 };
428*4882a593Smuzhiyun static const unsigned int tdm_c_dout1_a_pins[] = { GPIOA_9 };
429*4882a593Smuzhiyun static const unsigned int tdm_c_dout2_a_pins[] = { GPIOA_8 };
430*4882a593Smuzhiyun static const unsigned int tdm_c_dout3_a_pins[] = { GPIOA_7 };
431*4882a593Smuzhiyun static const unsigned int tdm_c_dout0_z_pins[] = { GPIOZ_2 };
432*4882a593Smuzhiyun static const unsigned int tdm_c_dout1_z_pins[] = { GPIOZ_3 };
433*4882a593Smuzhiyun static const unsigned int tdm_c_dout2_z_pins[] = { GPIOZ_4 };
434*4882a593Smuzhiyun static const unsigned int tdm_c_dout3_z_pins[] = { GPIOZ_5 };
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun static struct meson_pmx_group meson_g12a_periphs_groups[] = {
437*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_0),
438*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_1),
439*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_2),
440*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_3),
441*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_4),
442*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_5),
443*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_6),
444*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_7),
445*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_8),
446*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_9),
447*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_10),
448*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_11),
449*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_12),
450*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_13),
451*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_14),
452*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_15),
453*4882a593Smuzhiyun GPIO_GROUP(GPIOH_0),
454*4882a593Smuzhiyun GPIO_GROUP(GPIOH_1),
455*4882a593Smuzhiyun GPIO_GROUP(GPIOH_2),
456*4882a593Smuzhiyun GPIO_GROUP(GPIOH_3),
457*4882a593Smuzhiyun GPIO_GROUP(GPIOH_4),
458*4882a593Smuzhiyun GPIO_GROUP(GPIOH_5),
459*4882a593Smuzhiyun GPIO_GROUP(GPIOH_6),
460*4882a593Smuzhiyun GPIO_GROUP(GPIOH_7),
461*4882a593Smuzhiyun GPIO_GROUP(GPIOH_8),
462*4882a593Smuzhiyun GPIO_GROUP(BOOT_0),
463*4882a593Smuzhiyun GPIO_GROUP(BOOT_1),
464*4882a593Smuzhiyun GPIO_GROUP(BOOT_2),
465*4882a593Smuzhiyun GPIO_GROUP(BOOT_3),
466*4882a593Smuzhiyun GPIO_GROUP(BOOT_4),
467*4882a593Smuzhiyun GPIO_GROUP(BOOT_5),
468*4882a593Smuzhiyun GPIO_GROUP(BOOT_6),
469*4882a593Smuzhiyun GPIO_GROUP(BOOT_7),
470*4882a593Smuzhiyun GPIO_GROUP(BOOT_8),
471*4882a593Smuzhiyun GPIO_GROUP(BOOT_9),
472*4882a593Smuzhiyun GPIO_GROUP(BOOT_10),
473*4882a593Smuzhiyun GPIO_GROUP(BOOT_11),
474*4882a593Smuzhiyun GPIO_GROUP(BOOT_12),
475*4882a593Smuzhiyun GPIO_GROUP(BOOT_13),
476*4882a593Smuzhiyun GPIO_GROUP(BOOT_14),
477*4882a593Smuzhiyun GPIO_GROUP(BOOT_15),
478*4882a593Smuzhiyun GPIO_GROUP(GPIOC_0),
479*4882a593Smuzhiyun GPIO_GROUP(GPIOC_1),
480*4882a593Smuzhiyun GPIO_GROUP(GPIOC_2),
481*4882a593Smuzhiyun GPIO_GROUP(GPIOC_3),
482*4882a593Smuzhiyun GPIO_GROUP(GPIOC_4),
483*4882a593Smuzhiyun GPIO_GROUP(GPIOC_5),
484*4882a593Smuzhiyun GPIO_GROUP(GPIOC_6),
485*4882a593Smuzhiyun GPIO_GROUP(GPIOC_7),
486*4882a593Smuzhiyun GPIO_GROUP(GPIOA_0),
487*4882a593Smuzhiyun GPIO_GROUP(GPIOA_1),
488*4882a593Smuzhiyun GPIO_GROUP(GPIOA_2),
489*4882a593Smuzhiyun GPIO_GROUP(GPIOA_3),
490*4882a593Smuzhiyun GPIO_GROUP(GPIOA_4),
491*4882a593Smuzhiyun GPIO_GROUP(GPIOA_5),
492*4882a593Smuzhiyun GPIO_GROUP(GPIOA_6),
493*4882a593Smuzhiyun GPIO_GROUP(GPIOA_7),
494*4882a593Smuzhiyun GPIO_GROUP(GPIOA_8),
495*4882a593Smuzhiyun GPIO_GROUP(GPIOA_9),
496*4882a593Smuzhiyun GPIO_GROUP(GPIOA_10),
497*4882a593Smuzhiyun GPIO_GROUP(GPIOA_11),
498*4882a593Smuzhiyun GPIO_GROUP(GPIOA_12),
499*4882a593Smuzhiyun GPIO_GROUP(GPIOA_13),
500*4882a593Smuzhiyun GPIO_GROUP(GPIOA_14),
501*4882a593Smuzhiyun GPIO_GROUP(GPIOA_15),
502*4882a593Smuzhiyun GPIO_GROUP(GPIOX_0),
503*4882a593Smuzhiyun GPIO_GROUP(GPIOX_1),
504*4882a593Smuzhiyun GPIO_GROUP(GPIOX_2),
505*4882a593Smuzhiyun GPIO_GROUP(GPIOX_3),
506*4882a593Smuzhiyun GPIO_GROUP(GPIOX_4),
507*4882a593Smuzhiyun GPIO_GROUP(GPIOX_5),
508*4882a593Smuzhiyun GPIO_GROUP(GPIOX_6),
509*4882a593Smuzhiyun GPIO_GROUP(GPIOX_7),
510*4882a593Smuzhiyun GPIO_GROUP(GPIOX_8),
511*4882a593Smuzhiyun GPIO_GROUP(GPIOX_9),
512*4882a593Smuzhiyun GPIO_GROUP(GPIOX_10),
513*4882a593Smuzhiyun GPIO_GROUP(GPIOX_11),
514*4882a593Smuzhiyun GPIO_GROUP(GPIOX_12),
515*4882a593Smuzhiyun GPIO_GROUP(GPIOX_13),
516*4882a593Smuzhiyun GPIO_GROUP(GPIOX_14),
517*4882a593Smuzhiyun GPIO_GROUP(GPIOX_15),
518*4882a593Smuzhiyun GPIO_GROUP(GPIOX_16),
519*4882a593Smuzhiyun GPIO_GROUP(GPIOX_17),
520*4882a593Smuzhiyun GPIO_GROUP(GPIOX_18),
521*4882a593Smuzhiyun GPIO_GROUP(GPIOX_19),
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun /* bank BOOT */
524*4882a593Smuzhiyun GROUP(emmc_nand_d0, 1),
525*4882a593Smuzhiyun GROUP(emmc_nand_d1, 1),
526*4882a593Smuzhiyun GROUP(emmc_nand_d2, 1),
527*4882a593Smuzhiyun GROUP(emmc_nand_d3, 1),
528*4882a593Smuzhiyun GROUP(emmc_nand_d4, 1),
529*4882a593Smuzhiyun GROUP(emmc_nand_d5, 1),
530*4882a593Smuzhiyun GROUP(emmc_nand_d6, 1),
531*4882a593Smuzhiyun GROUP(emmc_nand_d7, 1),
532*4882a593Smuzhiyun GROUP(emmc_clk, 1),
533*4882a593Smuzhiyun GROUP(emmc_cmd, 1),
534*4882a593Smuzhiyun GROUP(emmc_nand_ds, 1),
535*4882a593Smuzhiyun GROUP(nand_ce0, 2),
536*4882a593Smuzhiyun GROUP(nand_ale, 2),
537*4882a593Smuzhiyun GROUP(nand_cle, 2),
538*4882a593Smuzhiyun GROUP(nand_wen_clk, 2),
539*4882a593Smuzhiyun GROUP(nand_ren_wr, 2),
540*4882a593Smuzhiyun GROUP(nand_rb0, 2),
541*4882a593Smuzhiyun GROUP(nand_ce1, 2),
542*4882a593Smuzhiyun GROUP(nor_hold, 3),
543*4882a593Smuzhiyun GROUP(nor_d, 3),
544*4882a593Smuzhiyun GROUP(nor_q, 3),
545*4882a593Smuzhiyun GROUP(nor_c, 3),
546*4882a593Smuzhiyun GROUP(nor_wp, 3),
547*4882a593Smuzhiyun GROUP(nor_cs, 3),
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun /* bank GPIOZ */
550*4882a593Smuzhiyun GROUP(sdcard_d0_z, 5),
551*4882a593Smuzhiyun GROUP(sdcard_d1_z, 5),
552*4882a593Smuzhiyun GROUP(sdcard_d2_z, 5),
553*4882a593Smuzhiyun GROUP(sdcard_d3_z, 5),
554*4882a593Smuzhiyun GROUP(sdcard_clk_z, 5),
555*4882a593Smuzhiyun GROUP(sdcard_cmd_z, 5),
556*4882a593Smuzhiyun GROUP(i2c0_sda_z0, 4),
557*4882a593Smuzhiyun GROUP(i2c0_sck_z1, 4),
558*4882a593Smuzhiyun GROUP(i2c0_sda_z7, 7),
559*4882a593Smuzhiyun GROUP(i2c0_sck_z8, 7),
560*4882a593Smuzhiyun GROUP(i2c2_sda_z, 3),
561*4882a593Smuzhiyun GROUP(i2c2_sck_z, 3),
562*4882a593Smuzhiyun GROUP(iso7816_clk_z, 3),
563*4882a593Smuzhiyun GROUP(iso7816_data_z, 3),
564*4882a593Smuzhiyun GROUP(eth_mdio, 1),
565*4882a593Smuzhiyun GROUP(eth_mdc, 1),
566*4882a593Smuzhiyun GROUP(eth_rgmii_rx_clk, 1),
567*4882a593Smuzhiyun GROUP(eth_rx_dv, 1),
568*4882a593Smuzhiyun GROUP(eth_rxd0, 1),
569*4882a593Smuzhiyun GROUP(eth_rxd1, 1),
570*4882a593Smuzhiyun GROUP(eth_rxd2_rgmii, 1),
571*4882a593Smuzhiyun GROUP(eth_rxd3_rgmii, 1),
572*4882a593Smuzhiyun GROUP(eth_rgmii_tx_clk, 1),
573*4882a593Smuzhiyun GROUP(eth_txen, 1),
574*4882a593Smuzhiyun GROUP(eth_txd0, 1),
575*4882a593Smuzhiyun GROUP(eth_txd1, 1),
576*4882a593Smuzhiyun GROUP(eth_txd2_rgmii, 1),
577*4882a593Smuzhiyun GROUP(eth_txd3_rgmii, 1),
578*4882a593Smuzhiyun GROUP(eth_link_led, 1),
579*4882a593Smuzhiyun GROUP(eth_act_led, 1),
580*4882a593Smuzhiyun GROUP(bt565_a_vs, 2),
581*4882a593Smuzhiyun GROUP(bt565_a_hs, 2),
582*4882a593Smuzhiyun GROUP(bt565_a_clk, 2),
583*4882a593Smuzhiyun GROUP(bt565_a_din0, 2),
584*4882a593Smuzhiyun GROUP(bt565_a_din1, 2),
585*4882a593Smuzhiyun GROUP(bt565_a_din2, 2),
586*4882a593Smuzhiyun GROUP(bt565_a_din3, 2),
587*4882a593Smuzhiyun GROUP(bt565_a_din4, 2),
588*4882a593Smuzhiyun GROUP(bt565_a_din5, 2),
589*4882a593Smuzhiyun GROUP(bt565_a_din6, 2),
590*4882a593Smuzhiyun GROUP(bt565_a_din7, 2),
591*4882a593Smuzhiyun GROUP(tsin_b_valid_z, 3),
592*4882a593Smuzhiyun GROUP(tsin_b_sop_z, 3),
593*4882a593Smuzhiyun GROUP(tsin_b_din0_z, 3),
594*4882a593Smuzhiyun GROUP(tsin_b_clk_z, 3),
595*4882a593Smuzhiyun GROUP(tsin_b_fail, 3),
596*4882a593Smuzhiyun GROUP(tsin_b_din1, 3),
597*4882a593Smuzhiyun GROUP(tsin_b_din2, 3),
598*4882a593Smuzhiyun GROUP(tsin_b_din3, 3),
599*4882a593Smuzhiyun GROUP(tsin_b_din4, 3),
600*4882a593Smuzhiyun GROUP(tsin_b_din5, 3),
601*4882a593Smuzhiyun GROUP(tsin_b_din6, 3),
602*4882a593Smuzhiyun GROUP(tsin_b_din7, 3),
603*4882a593Smuzhiyun GROUP(pdm_din0_z, 7),
604*4882a593Smuzhiyun GROUP(pdm_din1_z, 7),
605*4882a593Smuzhiyun GROUP(pdm_din2_z, 7),
606*4882a593Smuzhiyun GROUP(pdm_din3_z, 7),
607*4882a593Smuzhiyun GROUP(pdm_dclk_z, 7),
608*4882a593Smuzhiyun GROUP(tdm_c_slv_sclk_z, 6),
609*4882a593Smuzhiyun GROUP(tdm_c_slv_fs_z, 6),
610*4882a593Smuzhiyun GROUP(tdm_c_din0_z, 6),
611*4882a593Smuzhiyun GROUP(tdm_c_din1_z, 6),
612*4882a593Smuzhiyun GROUP(tdm_c_din2_z, 6),
613*4882a593Smuzhiyun GROUP(tdm_c_din3_z, 6),
614*4882a593Smuzhiyun GROUP(tdm_c_sclk_z, 4),
615*4882a593Smuzhiyun GROUP(tdm_c_fs_z, 4),
616*4882a593Smuzhiyun GROUP(tdm_c_dout0_z, 4),
617*4882a593Smuzhiyun GROUP(tdm_c_dout1_z, 4),
618*4882a593Smuzhiyun GROUP(tdm_c_dout2_z, 4),
619*4882a593Smuzhiyun GROUP(tdm_c_dout3_z, 4),
620*4882a593Smuzhiyun GROUP(mclk1_z, 4),
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun /* bank GPIOX */
623*4882a593Smuzhiyun GROUP(sdio_d0, 1),
624*4882a593Smuzhiyun GROUP(sdio_d1, 1),
625*4882a593Smuzhiyun GROUP(sdio_d2, 1),
626*4882a593Smuzhiyun GROUP(sdio_d3, 1),
627*4882a593Smuzhiyun GROUP(sdio_clk, 1),
628*4882a593Smuzhiyun GROUP(sdio_cmd, 1),
629*4882a593Smuzhiyun GROUP(spi0_mosi_x, 4),
630*4882a593Smuzhiyun GROUP(spi0_miso_x, 4),
631*4882a593Smuzhiyun GROUP(spi0_ss0_x, 4),
632*4882a593Smuzhiyun GROUP(spi0_clk_x, 4),
633*4882a593Smuzhiyun GROUP(i2c1_sda_x, 5),
634*4882a593Smuzhiyun GROUP(i2c1_sck_x, 5),
635*4882a593Smuzhiyun GROUP(i2c2_sda_x, 1),
636*4882a593Smuzhiyun GROUP(i2c2_sck_x, 1),
637*4882a593Smuzhiyun GROUP(uart_a_tx, 1),
638*4882a593Smuzhiyun GROUP(uart_a_rx, 1),
639*4882a593Smuzhiyun GROUP(uart_a_cts, 1),
640*4882a593Smuzhiyun GROUP(uart_a_rts, 1),
641*4882a593Smuzhiyun GROUP(uart_b_tx, 2),
642*4882a593Smuzhiyun GROUP(uart_b_rx, 2),
643*4882a593Smuzhiyun GROUP(iso7816_clk_x, 6),
644*4882a593Smuzhiyun GROUP(iso7816_data_x, 6),
645*4882a593Smuzhiyun GROUP(pwm_a, 1),
646*4882a593Smuzhiyun GROUP(pwm_b_x7, 4),
647*4882a593Smuzhiyun GROUP(pwm_b_x19, 1),
648*4882a593Smuzhiyun GROUP(pwm_c_x5, 4),
649*4882a593Smuzhiyun GROUP(pwm_c_x8, 5),
650*4882a593Smuzhiyun GROUP(pwm_d_x3, 4),
651*4882a593Smuzhiyun GROUP(pwm_d_x6, 4),
652*4882a593Smuzhiyun GROUP(pwm_e, 1),
653*4882a593Smuzhiyun GROUP(pwm_f_x, 1),
654*4882a593Smuzhiyun GROUP(tsin_a_valid, 3),
655*4882a593Smuzhiyun GROUP(tsin_a_sop, 3),
656*4882a593Smuzhiyun GROUP(tsin_a_din0, 3),
657*4882a593Smuzhiyun GROUP(tsin_a_clk, 3),
658*4882a593Smuzhiyun GROUP(tsin_b_valid_x, 3),
659*4882a593Smuzhiyun GROUP(tsin_b_sop_x, 3),
660*4882a593Smuzhiyun GROUP(tsin_b_din0_x, 3),
661*4882a593Smuzhiyun GROUP(tsin_b_clk_x, 3),
662*4882a593Smuzhiyun GROUP(pdm_din0_x, 2),
663*4882a593Smuzhiyun GROUP(pdm_din1_x, 2),
664*4882a593Smuzhiyun GROUP(pdm_din2_x, 2),
665*4882a593Smuzhiyun GROUP(pdm_din3_x, 2),
666*4882a593Smuzhiyun GROUP(pdm_dclk_x, 2),
667*4882a593Smuzhiyun GROUP(tdm_a_slv_sclk, 2),
668*4882a593Smuzhiyun GROUP(tdm_a_slv_fs, 2),
669*4882a593Smuzhiyun GROUP(tdm_a_din0, 2),
670*4882a593Smuzhiyun GROUP(tdm_a_din1, 2),
671*4882a593Smuzhiyun GROUP(tdm_a_sclk, 1),
672*4882a593Smuzhiyun GROUP(tdm_a_fs, 1),
673*4882a593Smuzhiyun GROUP(tdm_a_dout0, 1),
674*4882a593Smuzhiyun GROUP(tdm_a_dout1, 1),
675*4882a593Smuzhiyun GROUP(mclk1_x, 2),
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun /* bank GPIOC */
678*4882a593Smuzhiyun GROUP(sdcard_d0_c, 1),
679*4882a593Smuzhiyun GROUP(sdcard_d1_c, 1),
680*4882a593Smuzhiyun GROUP(sdcard_d2_c, 1),
681*4882a593Smuzhiyun GROUP(sdcard_d3_c, 1),
682*4882a593Smuzhiyun GROUP(sdcard_clk_c, 1),
683*4882a593Smuzhiyun GROUP(sdcard_cmd_c, 1),
684*4882a593Smuzhiyun GROUP(spi0_mosi_c, 5),
685*4882a593Smuzhiyun GROUP(spi0_miso_c, 5),
686*4882a593Smuzhiyun GROUP(spi0_ss0_c, 5),
687*4882a593Smuzhiyun GROUP(spi0_clk_c, 5),
688*4882a593Smuzhiyun GROUP(i2c0_sda_c, 3),
689*4882a593Smuzhiyun GROUP(i2c0_sck_c, 3),
690*4882a593Smuzhiyun GROUP(uart_ao_a_rx_c, 2),
691*4882a593Smuzhiyun GROUP(uart_ao_a_tx_c, 2),
692*4882a593Smuzhiyun GROUP(iso7816_clk_c, 5),
693*4882a593Smuzhiyun GROUP(iso7816_data_c, 5),
694*4882a593Smuzhiyun GROUP(pwm_c_c, 5),
695*4882a593Smuzhiyun GROUP(jtag_b_tdo, 2),
696*4882a593Smuzhiyun GROUP(jtag_b_tdi, 2),
697*4882a593Smuzhiyun GROUP(jtag_b_clk, 2),
698*4882a593Smuzhiyun GROUP(jtag_b_tms, 2),
699*4882a593Smuzhiyun GROUP(pdm_din0_c, 4),
700*4882a593Smuzhiyun GROUP(pdm_din1_c, 4),
701*4882a593Smuzhiyun GROUP(pdm_din2_c, 4),
702*4882a593Smuzhiyun GROUP(pdm_din3_c, 4),
703*4882a593Smuzhiyun GROUP(pdm_dclk_c, 4),
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun /* bank GPIOH */
706*4882a593Smuzhiyun GROUP(spi1_mosi, 3),
707*4882a593Smuzhiyun GROUP(spi1_miso, 3),
708*4882a593Smuzhiyun GROUP(spi1_ss0, 3),
709*4882a593Smuzhiyun GROUP(spi1_clk, 3),
710*4882a593Smuzhiyun GROUP(i2c1_sda_h2, 2),
711*4882a593Smuzhiyun GROUP(i2c1_sck_h3, 2),
712*4882a593Smuzhiyun GROUP(i2c1_sda_h6, 4),
713*4882a593Smuzhiyun GROUP(i2c1_sck_h7, 4),
714*4882a593Smuzhiyun GROUP(i2c3_sda_h, 2),
715*4882a593Smuzhiyun GROUP(i2c3_sck_h, 2),
716*4882a593Smuzhiyun GROUP(uart_c_tx, 2),
717*4882a593Smuzhiyun GROUP(uart_c_rx, 2),
718*4882a593Smuzhiyun GROUP(uart_c_cts, 2),
719*4882a593Smuzhiyun GROUP(uart_c_rts, 2),
720*4882a593Smuzhiyun GROUP(iso7816_clk_h, 1),
721*4882a593Smuzhiyun GROUP(iso7816_data_h, 1),
722*4882a593Smuzhiyun GROUP(pwm_f_h, 4),
723*4882a593Smuzhiyun GROUP(cec_ao_a_h, 4),
724*4882a593Smuzhiyun GROUP(cec_ao_b_h, 5),
725*4882a593Smuzhiyun GROUP(hdmitx_sda, 1),
726*4882a593Smuzhiyun GROUP(hdmitx_sck, 1),
727*4882a593Smuzhiyun GROUP(hdmitx_hpd_in, 1),
728*4882a593Smuzhiyun GROUP(spdif_out_h, 1),
729*4882a593Smuzhiyun GROUP(spdif_in_h, 1),
730*4882a593Smuzhiyun GROUP(tdm_b_din3_h, 6),
731*4882a593Smuzhiyun GROUP(tdm_b_dout3_h, 5),
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun /* bank GPIOA */
734*4882a593Smuzhiyun GROUP(i2c3_sda_a, 2),
735*4882a593Smuzhiyun GROUP(i2c3_sck_a, 2),
736*4882a593Smuzhiyun GROUP(pdm_din0_a, 1),
737*4882a593Smuzhiyun GROUP(pdm_din1_a, 1),
738*4882a593Smuzhiyun GROUP(pdm_din2_a, 1),
739*4882a593Smuzhiyun GROUP(pdm_din3_a, 1),
740*4882a593Smuzhiyun GROUP(pdm_dclk_a, 1),
741*4882a593Smuzhiyun GROUP(spdif_in_a10, 1),
742*4882a593Smuzhiyun GROUP(spdif_in_a12, 1),
743*4882a593Smuzhiyun GROUP(spdif_out_a11, 1),
744*4882a593Smuzhiyun GROUP(spdif_out_a13, 1),
745*4882a593Smuzhiyun GROUP(tdm_b_slv_sclk, 2),
746*4882a593Smuzhiyun GROUP(tdm_b_slv_fs, 2),
747*4882a593Smuzhiyun GROUP(tdm_b_din0, 2),
748*4882a593Smuzhiyun GROUP(tdm_b_din1, 2),
749*4882a593Smuzhiyun GROUP(tdm_b_din2, 2),
750*4882a593Smuzhiyun GROUP(tdm_b_din3_a, 2),
751*4882a593Smuzhiyun GROUP(tdm_b_sclk, 1),
752*4882a593Smuzhiyun GROUP(tdm_b_fs, 1),
753*4882a593Smuzhiyun GROUP(tdm_b_dout0, 1),
754*4882a593Smuzhiyun GROUP(tdm_b_dout1, 1),
755*4882a593Smuzhiyun GROUP(tdm_b_dout2, 3),
756*4882a593Smuzhiyun GROUP(tdm_b_dout3_a, 3),
757*4882a593Smuzhiyun GROUP(tdm_c_slv_sclk_a, 3),
758*4882a593Smuzhiyun GROUP(tdm_c_slv_fs_a, 3),
759*4882a593Smuzhiyun GROUP(tdm_c_din0_a, 3),
760*4882a593Smuzhiyun GROUP(tdm_c_din1_a, 3),
761*4882a593Smuzhiyun GROUP(tdm_c_din2_a, 3),
762*4882a593Smuzhiyun GROUP(tdm_c_din3_a, 3),
763*4882a593Smuzhiyun GROUP(tdm_c_sclk_a, 2),
764*4882a593Smuzhiyun GROUP(tdm_c_fs_a, 2),
765*4882a593Smuzhiyun GROUP(tdm_c_dout0_a, 2),
766*4882a593Smuzhiyun GROUP(tdm_c_dout1_a, 2),
767*4882a593Smuzhiyun GROUP(tdm_c_dout2_a, 2),
768*4882a593Smuzhiyun GROUP(tdm_c_dout3_a, 2),
769*4882a593Smuzhiyun GROUP(mclk0_a, 1),
770*4882a593Smuzhiyun GROUP(mclk1_a, 2),
771*4882a593Smuzhiyun };
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun /* uart_ao_a */
774*4882a593Smuzhiyun static const unsigned int uart_ao_a_tx_pins[] = { GPIOAO_0 };
775*4882a593Smuzhiyun static const unsigned int uart_ao_a_rx_pins[] = { GPIOAO_1 };
776*4882a593Smuzhiyun static const unsigned int uart_ao_a_cts_pins[] = { GPIOE_0 };
777*4882a593Smuzhiyun static const unsigned int uart_ao_a_rts_pins[] = { GPIOE_1 };
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun /* uart_ao_b */
780*4882a593Smuzhiyun static const unsigned int uart_ao_b_tx_2_pins[] = { GPIOAO_2 };
781*4882a593Smuzhiyun static const unsigned int uart_ao_b_rx_3_pins[] = { GPIOAO_3 };
782*4882a593Smuzhiyun static const unsigned int uart_ao_b_tx_8_pins[] = { GPIOAO_8 };
783*4882a593Smuzhiyun static const unsigned int uart_ao_b_rx_9_pins[] = { GPIOAO_9 };
784*4882a593Smuzhiyun static const unsigned int uart_ao_b_cts_pins[] = { GPIOE_0 };
785*4882a593Smuzhiyun static const unsigned int uart_ao_b_rts_pins[] = { GPIOE_1 };
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun /* i2c_ao */
788*4882a593Smuzhiyun static const unsigned int i2c_ao_sck_pins[] = { GPIOAO_2 };
789*4882a593Smuzhiyun static const unsigned int i2c_ao_sda_pins[] = { GPIOAO_3 };
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun static const unsigned int i2c_ao_sck_e_pins[] = { GPIOE_0 };
792*4882a593Smuzhiyun static const unsigned int i2c_ao_sda_e_pins[] = { GPIOE_1 };
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun /* i2c_ao_slave */
795*4882a593Smuzhiyun static const unsigned int i2c_ao_slave_sck_pins[] = { GPIOAO_2 };
796*4882a593Smuzhiyun static const unsigned int i2c_ao_slave_sda_pins[] = { GPIOAO_3 };
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun /* ir_in */
799*4882a593Smuzhiyun static const unsigned int remote_ao_input_pins[] = { GPIOAO_5 };
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun /* ir_out */
802*4882a593Smuzhiyun static const unsigned int remote_ao_out_pins[] = { GPIOAO_4 };
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun /* pwm_a_e */
805*4882a593Smuzhiyun static const unsigned int pwm_a_e_pins[] = { GPIOE_2 };
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun /* pwm_ao_a */
808*4882a593Smuzhiyun static const unsigned int pwm_ao_a_pins[] = { GPIOAO_11 };
809*4882a593Smuzhiyun static const unsigned int pwm_ao_a_hiz_pins[] = { GPIOAO_11 };
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun /* pwm_ao_b */
812*4882a593Smuzhiyun static const unsigned int pwm_ao_b_pins[] = { GPIOE_0 };
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun /* pwm_ao_c */
815*4882a593Smuzhiyun static const unsigned int pwm_ao_c_4_pins[] = { GPIOAO_4 };
816*4882a593Smuzhiyun static const unsigned int pwm_ao_c_hiz_pins[] = { GPIOAO_4 };
817*4882a593Smuzhiyun static const unsigned int pwm_ao_c_6_pins[] = { GPIOAO_6 };
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun /* pwm_ao_d */
820*4882a593Smuzhiyun static const unsigned int pwm_ao_d_5_pins[] = { GPIOAO_5 };
821*4882a593Smuzhiyun static const unsigned int pwm_ao_d_10_pins[] = { GPIOAO_10 };
822*4882a593Smuzhiyun static const unsigned int pwm_ao_d_e_pins[] = { GPIOE_1 };
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun /* jtag_a */
825*4882a593Smuzhiyun static const unsigned int jtag_a_tdi_pins[] = { GPIOAO_8 };
826*4882a593Smuzhiyun static const unsigned int jtag_a_tdo_pins[] = { GPIOAO_9 };
827*4882a593Smuzhiyun static const unsigned int jtag_a_clk_pins[] = { GPIOAO_6 };
828*4882a593Smuzhiyun static const unsigned int jtag_a_tms_pins[] = { GPIOAO_7 };
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun /* cec_ao */
831*4882a593Smuzhiyun static const unsigned int cec_ao_a_pins[] = { GPIOAO_10 };
832*4882a593Smuzhiyun static const unsigned int cec_ao_b_pins[] = { GPIOAO_10 };
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun /* tsin_ao_a */
835*4882a593Smuzhiyun static const unsigned int tsin_ao_asop_pins[] = { GPIOAO_6 };
836*4882a593Smuzhiyun static const unsigned int tsin_ao_adin0_pins[] = { GPIOAO_7 };
837*4882a593Smuzhiyun static const unsigned int tsin_ao_aclk_pins[] = { GPIOAO_8 };
838*4882a593Smuzhiyun static const unsigned int tsin_ao_a_valid_pins[] = { GPIOAO_9 };
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun /* spdif_ao_out */
841*4882a593Smuzhiyun static const unsigned int spdif_ao_out_pins[] = { GPIOAO_10 };
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun /* tdm_ao_b */
844*4882a593Smuzhiyun static const unsigned int tdm_ao_b_slv_fs_pins[] = { GPIOAO_7 };
845*4882a593Smuzhiyun static const unsigned int tdm_ao_b_slv_sclk_pins[] = { GPIOAO_8 };
846*4882a593Smuzhiyun static const unsigned int tdm_ao_b_fs_pins[] = { GPIOAO_7 };
847*4882a593Smuzhiyun static const unsigned int tdm_ao_b_sclk_pins[] = { GPIOAO_8 };
848*4882a593Smuzhiyun static const unsigned int tdm_ao_b_din0_pins[] = { GPIOAO_4 };
849*4882a593Smuzhiyun static const unsigned int tdm_ao_b_din1_pins[] = { GPIOAO_10 };
850*4882a593Smuzhiyun static const unsigned int tdm_ao_b_din2_pins[] = { GPIOAO_6 };
851*4882a593Smuzhiyun static const unsigned int tdm_ao_b_dout0_pins[] = { GPIOAO_4 };
852*4882a593Smuzhiyun static const unsigned int tdm_ao_b_dout1_pins[] = { GPIOAO_10 };
853*4882a593Smuzhiyun static const unsigned int tdm_ao_b_dout2_pins[] = { GPIOAO_6 };
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun /* mclk0_ao */
856*4882a593Smuzhiyun static const unsigned int mclk0_ao_pins[] = { GPIOAO_9 };
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun static struct meson_pmx_group meson_g12a_aobus_groups[] = {
859*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_0),
860*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_1),
861*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_2),
862*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_3),
863*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_4),
864*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_5),
865*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_6),
866*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_7),
867*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_8),
868*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_9),
869*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_10),
870*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_11),
871*4882a593Smuzhiyun GPIO_GROUP(GPIOE_0),
872*4882a593Smuzhiyun GPIO_GROUP(GPIOE_1),
873*4882a593Smuzhiyun GPIO_GROUP(GPIOE_2),
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun /* bank AO */
876*4882a593Smuzhiyun GROUP(uart_ao_a_tx, 1),
877*4882a593Smuzhiyun GROUP(uart_ao_a_rx, 1),
878*4882a593Smuzhiyun GROUP(uart_ao_a_cts, 1),
879*4882a593Smuzhiyun GROUP(uart_ao_a_rts, 1),
880*4882a593Smuzhiyun GROUP(uart_ao_b_tx_2, 2),
881*4882a593Smuzhiyun GROUP(uart_ao_b_rx_3, 2),
882*4882a593Smuzhiyun GROUP(uart_ao_b_tx_8, 3),
883*4882a593Smuzhiyun GROUP(uart_ao_b_rx_9, 3),
884*4882a593Smuzhiyun GROUP(uart_ao_b_cts, 2),
885*4882a593Smuzhiyun GROUP(uart_ao_b_rts, 2),
886*4882a593Smuzhiyun GROUP(i2c_ao_sck, 1),
887*4882a593Smuzhiyun GROUP(i2c_ao_sda, 1),
888*4882a593Smuzhiyun GROUP(i2c_ao_sck_e, 4),
889*4882a593Smuzhiyun GROUP(i2c_ao_sda_e, 4),
890*4882a593Smuzhiyun GROUP(i2c_ao_slave_sck, 3),
891*4882a593Smuzhiyun GROUP(i2c_ao_slave_sda, 3),
892*4882a593Smuzhiyun GROUP(remote_ao_input, 1),
893*4882a593Smuzhiyun GROUP(remote_ao_out, 1),
894*4882a593Smuzhiyun GROUP(pwm_a_e, 3),
895*4882a593Smuzhiyun GROUP(pwm_ao_a, 3),
896*4882a593Smuzhiyun GROUP(pwm_ao_a_hiz, 2),
897*4882a593Smuzhiyun GROUP(pwm_ao_b, 3),
898*4882a593Smuzhiyun GROUP(pwm_ao_c_4, 3),
899*4882a593Smuzhiyun GROUP(pwm_ao_c_hiz, 4),
900*4882a593Smuzhiyun GROUP(pwm_ao_c_6, 3),
901*4882a593Smuzhiyun GROUP(pwm_ao_d_5, 3),
902*4882a593Smuzhiyun GROUP(pwm_ao_d_10, 3),
903*4882a593Smuzhiyun GROUP(pwm_ao_d_e, 3),
904*4882a593Smuzhiyun GROUP(jtag_a_tdi, 1),
905*4882a593Smuzhiyun GROUP(jtag_a_tdo, 1),
906*4882a593Smuzhiyun GROUP(jtag_a_clk, 1),
907*4882a593Smuzhiyun GROUP(jtag_a_tms, 1),
908*4882a593Smuzhiyun GROUP(cec_ao_a, 1),
909*4882a593Smuzhiyun GROUP(cec_ao_b, 2),
910*4882a593Smuzhiyun GROUP(tsin_ao_asop, 4),
911*4882a593Smuzhiyun GROUP(tsin_ao_adin0, 4),
912*4882a593Smuzhiyun GROUP(tsin_ao_aclk, 4),
913*4882a593Smuzhiyun GROUP(tsin_ao_a_valid, 4),
914*4882a593Smuzhiyun GROUP(spdif_ao_out, 4),
915*4882a593Smuzhiyun GROUP(tdm_ao_b_dout0, 5),
916*4882a593Smuzhiyun GROUP(tdm_ao_b_dout1, 5),
917*4882a593Smuzhiyun GROUP(tdm_ao_b_dout2, 5),
918*4882a593Smuzhiyun GROUP(tdm_ao_b_fs, 5),
919*4882a593Smuzhiyun GROUP(tdm_ao_b_sclk, 5),
920*4882a593Smuzhiyun GROUP(tdm_ao_b_din0, 6),
921*4882a593Smuzhiyun GROUP(tdm_ao_b_din1, 6),
922*4882a593Smuzhiyun GROUP(tdm_ao_b_din2, 6),
923*4882a593Smuzhiyun GROUP(tdm_ao_b_slv_fs, 6),
924*4882a593Smuzhiyun GROUP(tdm_ao_b_slv_sclk, 6),
925*4882a593Smuzhiyun GROUP(mclk0_ao, 5),
926*4882a593Smuzhiyun };
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun static const char * const gpio_periphs_groups[] = {
929*4882a593Smuzhiyun "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
930*4882a593Smuzhiyun "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
931*4882a593Smuzhiyun "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
932*4882a593Smuzhiyun "GPIOZ_15",
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
935*4882a593Smuzhiyun "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8",
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
938*4882a593Smuzhiyun "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
939*4882a593Smuzhiyun "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
940*4882a593Smuzhiyun "BOOT_15",
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun "GPIOC_0", "GPIOC_1", "GPIOC_2", "GPIOC_3", "GPIOC_4",
943*4882a593Smuzhiyun "GPIOC_5", "GPIOC_6", "GPIOC_7",
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4",
946*4882a593Smuzhiyun "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9",
947*4882a593Smuzhiyun "GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14",
948*4882a593Smuzhiyun "GPIOA_15",
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
951*4882a593Smuzhiyun "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
952*4882a593Smuzhiyun "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
953*4882a593Smuzhiyun "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
954*4882a593Smuzhiyun };
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun static const char * const emmc_groups[] = {
957*4882a593Smuzhiyun "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
958*4882a593Smuzhiyun "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
959*4882a593Smuzhiyun "emmc_nand_d6", "emmc_nand_d7",
960*4882a593Smuzhiyun "emmc_clk", "emmc_cmd", "emmc_nand_ds",
961*4882a593Smuzhiyun };
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun static const char * const nand_groups[] = {
964*4882a593Smuzhiyun "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
965*4882a593Smuzhiyun "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
966*4882a593Smuzhiyun "emmc_nand_d6", "emmc_nand_d7",
967*4882a593Smuzhiyun "nand_ce0", "nand_ale", "nand_cle",
968*4882a593Smuzhiyun "nand_wen_clk", "nand_ren_wr", "nand_rb0",
969*4882a593Smuzhiyun "emmc_nand_ds", "nand_ce1",
970*4882a593Smuzhiyun };
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun static const char * const nor_groups[] = {
973*4882a593Smuzhiyun "nor_d", "nor_q", "nor_c", "nor_cs",
974*4882a593Smuzhiyun "nor_hold", "nor_wp",
975*4882a593Smuzhiyun };
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun static const char * const sdio_groups[] = {
978*4882a593Smuzhiyun "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
979*4882a593Smuzhiyun "sdio_cmd", "sdio_clk", "sdio_dummy",
980*4882a593Smuzhiyun };
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun static const char * const sdcard_groups[] = {
983*4882a593Smuzhiyun "sdcard_d0_c", "sdcard_d1_c", "sdcard_d2_c", "sdcard_d3_c",
984*4882a593Smuzhiyun "sdcard_clk_c", "sdcard_cmd_c",
985*4882a593Smuzhiyun "sdcard_d0_z", "sdcard_d1_z", "sdcard_d2_z", "sdcard_d3_z",
986*4882a593Smuzhiyun "sdcard_clk_z", "sdcard_cmd_z",
987*4882a593Smuzhiyun };
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun static const char * const spi0_groups[] = {
990*4882a593Smuzhiyun "spi0_mosi_c", "spi0_miso_c", "spi0_ss0_c", "spi0_clk_c",
991*4882a593Smuzhiyun "spi0_mosi_x", "spi0_miso_x", "spi0_ss0_x", "spi0_clk_x",
992*4882a593Smuzhiyun };
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun static const char * const spi1_groups[] = {
995*4882a593Smuzhiyun "spi1_mosi", "spi1_miso", "spi1_ss0", "spi1_clk",
996*4882a593Smuzhiyun };
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun static const char * const i2c0_groups[] = {
999*4882a593Smuzhiyun "i2c0_sda_c", "i2c0_sck_c",
1000*4882a593Smuzhiyun "i2c0_sda_z0", "i2c0_sck_z1",
1001*4882a593Smuzhiyun "i2c0_sda_z7", "i2c0_sck_z8",
1002*4882a593Smuzhiyun };
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun static const char * const i2c1_groups[] = {
1005*4882a593Smuzhiyun "i2c1_sda_x", "i2c1_sck_x",
1006*4882a593Smuzhiyun "i2c1_sda_h2", "i2c1_sck_h3",
1007*4882a593Smuzhiyun "i2c1_sda_h6", "i2c1_sck_h7",
1008*4882a593Smuzhiyun };
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun static const char * const i2c2_groups[] = {
1011*4882a593Smuzhiyun "i2c2_sda_x", "i2c2_sck_x",
1012*4882a593Smuzhiyun "i2c2_sda_z", "i2c2_sck_z",
1013*4882a593Smuzhiyun };
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun static const char * const i2c3_groups[] = {
1016*4882a593Smuzhiyun "i2c3_sda_h", "i2c3_sck_h",
1017*4882a593Smuzhiyun "i2c3_sda_a", "i2c3_sck_a",
1018*4882a593Smuzhiyun };
1019*4882a593Smuzhiyun
1020*4882a593Smuzhiyun static const char * const uart_a_groups[] = {
1021*4882a593Smuzhiyun "uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts",
1022*4882a593Smuzhiyun };
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun static const char * const uart_b_groups[] = {
1025*4882a593Smuzhiyun "uart_b_tx", "uart_b_rx",
1026*4882a593Smuzhiyun };
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun static const char * const uart_c_groups[] = {
1029*4882a593Smuzhiyun "uart_c_tx", "uart_c_rx", "uart_c_cts", "uart_c_rts",
1030*4882a593Smuzhiyun };
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun static const char * const uart_ao_a_c_groups[] = {
1033*4882a593Smuzhiyun "uart_ao_a_rx_c", "uart_ao_a_tx_c",
1034*4882a593Smuzhiyun };
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun static const char * const iso7816_groups[] = {
1037*4882a593Smuzhiyun "iso7816_clk_c", "iso7816_data_c",
1038*4882a593Smuzhiyun "iso7816_clk_x", "iso7816_data_x",
1039*4882a593Smuzhiyun "iso7816_clk_h", "iso7816_data_h",
1040*4882a593Smuzhiyun "iso7816_clk_z", "iso7816_data_z",
1041*4882a593Smuzhiyun };
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun static const char * const eth_groups[] = {
1044*4882a593Smuzhiyun "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk",
1045*4882a593Smuzhiyun "eth_txd2_rgmii", "eth_txd3_rgmii", "eth_rgmii_rx_clk",
1046*4882a593Smuzhiyun "eth_txd0", "eth_txd1", "eth_txen", "eth_mdc",
1047*4882a593Smuzhiyun "eth_rxd0", "eth_rxd1", "eth_rx_dv", "eth_mdio",
1048*4882a593Smuzhiyun "eth_link_led", "eth_act_led",
1049*4882a593Smuzhiyun };
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun static const char * const pwm_a_groups[] = {
1052*4882a593Smuzhiyun "pwm_a",
1053*4882a593Smuzhiyun };
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun static const char * const pwm_b_groups[] = {
1056*4882a593Smuzhiyun "pwm_b_x7", "pwm_b_x19",
1057*4882a593Smuzhiyun };
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun static const char * const pwm_c_groups[] = {
1060*4882a593Smuzhiyun "pwm_c_c", "pwm_c_x5", "pwm_c_x8",
1061*4882a593Smuzhiyun };
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun static const char * const pwm_d_groups[] = {
1064*4882a593Smuzhiyun "pwm_d_x3", "pwm_d_x6",
1065*4882a593Smuzhiyun };
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun static const char * const pwm_e_groups[] = {
1068*4882a593Smuzhiyun "pwm_e",
1069*4882a593Smuzhiyun };
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun static const char * const pwm_f_groups[] = {
1072*4882a593Smuzhiyun "pwm_f_x", "pwm_f_h",
1073*4882a593Smuzhiyun };
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun static const char * const cec_ao_a_h_groups[] = {
1076*4882a593Smuzhiyun "cec_ao_a_h",
1077*4882a593Smuzhiyun };
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun static const char * const cec_ao_b_h_groups[] = {
1080*4882a593Smuzhiyun "cec_ao_b_h",
1081*4882a593Smuzhiyun };
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun static const char * const jtag_b_groups[] = {
1084*4882a593Smuzhiyun "jtag_b_tdi", "jtag_b_tdo", "jtag_b_clk", "jtag_b_tms",
1085*4882a593Smuzhiyun };
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun static const char * const bt565_a_groups[] = {
1088*4882a593Smuzhiyun "bt565_a_vs", "bt565_a_hs", "bt565_a_clk",
1089*4882a593Smuzhiyun "bt565_a_din0", "bt565_a_din1", "bt565_a_din2",
1090*4882a593Smuzhiyun "bt565_a_din3", "bt565_a_din4", "bt565_a_din5",
1091*4882a593Smuzhiyun "bt565_a_din6", "bt565_a_din7",
1092*4882a593Smuzhiyun };
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun static const char * const tsin_a_groups[] = {
1095*4882a593Smuzhiyun "tsin_a_valid", "tsin_a_sop", "tsin_a_din0",
1096*4882a593Smuzhiyun "tsin_a_clk",
1097*4882a593Smuzhiyun };
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun static const char * const tsin_b_groups[] = {
1100*4882a593Smuzhiyun "tsin_b_valid_x", "tsin_b_sop_x", "tsin_b_din0_x", "tsin_b_clk_x",
1101*4882a593Smuzhiyun "tsin_b_valid_z", "tsin_b_sop_z", "tsin_b_din0_z", "tsin_b_clk_z",
1102*4882a593Smuzhiyun "tsin_b_fail", "tsin_b_din1", "tsin_b_din2", "tsin_b_din3",
1103*4882a593Smuzhiyun "tsin_b_din4", "tsin_b_din5", "tsin_b_din6", "tsin_b_din7",
1104*4882a593Smuzhiyun };
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun static const char * const hdmitx_groups[] = {
1107*4882a593Smuzhiyun "hdmitx_sda", "hdmitx_sck", "hdmitx_hpd_in",
1108*4882a593Smuzhiyun };
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun static const char * const pdm_groups[] = {
1111*4882a593Smuzhiyun "pdm_din0_c", "pdm_din1_c", "pdm_din2_c", "pdm_din3_c",
1112*4882a593Smuzhiyun "pdm_dclk_c",
1113*4882a593Smuzhiyun "pdm_din0_x", "pdm_din1_x", "pdm_din2_x", "pdm_din3_x",
1114*4882a593Smuzhiyun "pdm_dclk_x",
1115*4882a593Smuzhiyun "pdm_din0_z", "pdm_din1_z", "pdm_din2_z", "pdm_din3_z",
1116*4882a593Smuzhiyun "pdm_dclk_z",
1117*4882a593Smuzhiyun "pdm_din0_a", "pdm_din1_a", "pdm_din2_a", "pdm_din3_a",
1118*4882a593Smuzhiyun "pdm_dclk_a",
1119*4882a593Smuzhiyun };
1120*4882a593Smuzhiyun
1121*4882a593Smuzhiyun static const char * const spdif_in_groups[] = {
1122*4882a593Smuzhiyun "spdif_in_h", "spdif_in_a10", "spdif_in_a12",
1123*4882a593Smuzhiyun };
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun static const char * const spdif_out_groups[] = {
1126*4882a593Smuzhiyun "spdif_out_h", "spdif_out_a11", "spdif_out_a13",
1127*4882a593Smuzhiyun };
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun static const char * const mclk0_groups[] = {
1130*4882a593Smuzhiyun "mclk0_a",
1131*4882a593Smuzhiyun };
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun static const char * const mclk1_groups[] = {
1134*4882a593Smuzhiyun "mclk1_x", "mclk1_z", "mclk1_a",
1135*4882a593Smuzhiyun };
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun static const char * const tdm_a_groups[] = {
1138*4882a593Smuzhiyun "tdm_a_slv_sclk", "tdm_a_slv_fs", "tdm_a_sclk", "tdm_a_fs",
1139*4882a593Smuzhiyun "tdm_a_din0", "tdm_a_din1", "tdm_a_dout0", "tdm_a_dout1",
1140*4882a593Smuzhiyun };
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun static const char * const tdm_b_groups[] = {
1143*4882a593Smuzhiyun "tdm_b_slv_sclk", "tdm_b_slv_fs", "tdm_b_sclk", "tdm_b_fs",
1144*4882a593Smuzhiyun "tdm_b_din0", "tdm_b_din1", "tdm_b_din2",
1145*4882a593Smuzhiyun "tdm_b_din3_a", "tdm_b_din3_h",
1146*4882a593Smuzhiyun "tdm_b_dout0", "tdm_b_dout1", "tdm_b_dout2",
1147*4882a593Smuzhiyun "tdm_b_dout3_a", "tdm_b_dout3_h",
1148*4882a593Smuzhiyun };
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun static const char * const tdm_c_groups[] = {
1151*4882a593Smuzhiyun "tdm_c_slv_sclk_a", "tdm_c_slv_fs_a",
1152*4882a593Smuzhiyun "tdm_c_slv_sclk_z", "tdm_c_slv_fs_z",
1153*4882a593Smuzhiyun "tdm_c_sclk_a", "tdm_c_fs_a",
1154*4882a593Smuzhiyun "tdm_c_sclk_z", "tdm_c_fs_z",
1155*4882a593Smuzhiyun "tdm_c_din0_a", "tdm_c_din1_a",
1156*4882a593Smuzhiyun "tdm_c_din2_a", "tdm_c_din3_a",
1157*4882a593Smuzhiyun "tdm_c_din0_z", "tdm_c_din1_z",
1158*4882a593Smuzhiyun "tdm_c_din2_z", "tdm_c_din3_z",
1159*4882a593Smuzhiyun "tdm_c_dout0_a", "tdm_c_dout1_a",
1160*4882a593Smuzhiyun "tdm_c_dout2_a", "tdm_c_dout3_a",
1161*4882a593Smuzhiyun "tdm_c_dout0_z", "tdm_c_dout1_z",
1162*4882a593Smuzhiyun "tdm_c_dout2_z", "tdm_c_dout3_z",
1163*4882a593Smuzhiyun };
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun static const char * const gpio_aobus_groups[] = {
1166*4882a593Smuzhiyun "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
1167*4882a593Smuzhiyun "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
1168*4882a593Smuzhiyun "GPIOAO_10", "GPIOAO_11", "GPIOE_0", "GPIOE_1", "GPIOE_2",
1169*4882a593Smuzhiyun };
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun static const char * const uart_ao_a_groups[] = {
1172*4882a593Smuzhiyun "uart_ao_a_tx", "uart_ao_a_rx",
1173*4882a593Smuzhiyun "uart_ao_a_cts", "uart_ao_a_rts",
1174*4882a593Smuzhiyun };
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun static const char * const uart_ao_b_groups[] = {
1177*4882a593Smuzhiyun "uart_ao_b_tx_2", "uart_ao_b_rx_3",
1178*4882a593Smuzhiyun "uart_ao_b_tx_8", "uart_ao_b_rx_9",
1179*4882a593Smuzhiyun "uart_ao_b_cts", "uart_ao_b_rts",
1180*4882a593Smuzhiyun };
1181*4882a593Smuzhiyun
1182*4882a593Smuzhiyun static const char * const i2c_ao_groups[] = {
1183*4882a593Smuzhiyun "i2c_ao_sck", "i2c_ao_sda",
1184*4882a593Smuzhiyun "i2c_ao_sck_e", "i2c_ao_sda_e",
1185*4882a593Smuzhiyun };
1186*4882a593Smuzhiyun
1187*4882a593Smuzhiyun static const char * const i2c_ao_slave_groups[] = {
1188*4882a593Smuzhiyun "i2c_ao_slave_sck", "i2c_ao_slave_sda",
1189*4882a593Smuzhiyun };
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun static const char * const remote_ao_input_groups[] = {
1192*4882a593Smuzhiyun "remote_ao_input",
1193*4882a593Smuzhiyun };
1194*4882a593Smuzhiyun
1195*4882a593Smuzhiyun static const char * const remote_ao_out_groups[] = {
1196*4882a593Smuzhiyun "remote_ao_out",
1197*4882a593Smuzhiyun };
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun static const char * const pwm_a_e_groups[] = {
1200*4882a593Smuzhiyun "pwm_a_e",
1201*4882a593Smuzhiyun };
1202*4882a593Smuzhiyun
1203*4882a593Smuzhiyun static const char * const pwm_ao_a_groups[] = {
1204*4882a593Smuzhiyun "pwm_ao_a", "pwm_ao_a_hiz",
1205*4882a593Smuzhiyun };
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun static const char * const pwm_ao_b_groups[] = {
1208*4882a593Smuzhiyun "pwm_ao_b",
1209*4882a593Smuzhiyun };
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun static const char * const pwm_ao_c_groups[] = {
1212*4882a593Smuzhiyun "pwm_ao_c_4", "pwm_ao_c_hiz",
1213*4882a593Smuzhiyun "pwm_ao_c_6",
1214*4882a593Smuzhiyun };
1215*4882a593Smuzhiyun
1216*4882a593Smuzhiyun static const char * const pwm_ao_d_groups[] = {
1217*4882a593Smuzhiyun "pwm_ao_d_5", "pwm_ao_d_10", "pwm_ao_d_e",
1218*4882a593Smuzhiyun };
1219*4882a593Smuzhiyun
1220*4882a593Smuzhiyun static const char * const jtag_a_groups[] = {
1221*4882a593Smuzhiyun "jtag_a_tdi", "jtag_a_tdo", "jtag_a_clk", "jtag_a_tms",
1222*4882a593Smuzhiyun };
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun static const char * const cec_ao_a_groups[] = {
1225*4882a593Smuzhiyun "cec_ao_a",
1226*4882a593Smuzhiyun };
1227*4882a593Smuzhiyun
1228*4882a593Smuzhiyun static const char * const cec_ao_b_groups[] = {
1229*4882a593Smuzhiyun "cec_ao_b",
1230*4882a593Smuzhiyun };
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun static const char * const tsin_ao_a_groups[] = {
1233*4882a593Smuzhiyun "tsin_ao_asop", "tsin_ao_adin0", "tsin_ao_aclk", "tsin_ao_a_valid",
1234*4882a593Smuzhiyun };
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun static const char * const spdif_ao_out_groups[] = {
1237*4882a593Smuzhiyun "spdif_ao_out",
1238*4882a593Smuzhiyun };
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun static const char * const tdm_ao_b_groups[] = {
1241*4882a593Smuzhiyun "tdm_ao_b_dout0", "tdm_ao_b_dout1", "tdm_ao_b_dout2",
1242*4882a593Smuzhiyun "tdm_ao_b_fs", "tdm_ao_b_sclk",
1243*4882a593Smuzhiyun "tdm_ao_b_din0", "tdm_ao_b_din1", "tdm_ao_b_din2",
1244*4882a593Smuzhiyun "tdm_ao_b_slv_fs", "tdm_ao_b_slv_sclk",
1245*4882a593Smuzhiyun };
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun static const char * const mclk0_ao_groups[] = {
1248*4882a593Smuzhiyun "mclk0_ao",
1249*4882a593Smuzhiyun };
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun static struct meson_pmx_func meson_g12a_periphs_functions[] = {
1252*4882a593Smuzhiyun FUNCTION(gpio_periphs),
1253*4882a593Smuzhiyun FUNCTION(emmc),
1254*4882a593Smuzhiyun FUNCTION(nor),
1255*4882a593Smuzhiyun FUNCTION(spi0),
1256*4882a593Smuzhiyun FUNCTION(spi1),
1257*4882a593Smuzhiyun FUNCTION(sdio),
1258*4882a593Smuzhiyun FUNCTION(nand),
1259*4882a593Smuzhiyun FUNCTION(sdcard),
1260*4882a593Smuzhiyun FUNCTION(i2c0),
1261*4882a593Smuzhiyun FUNCTION(i2c1),
1262*4882a593Smuzhiyun FUNCTION(i2c2),
1263*4882a593Smuzhiyun FUNCTION(i2c3),
1264*4882a593Smuzhiyun FUNCTION(uart_a),
1265*4882a593Smuzhiyun FUNCTION(uart_b),
1266*4882a593Smuzhiyun FUNCTION(uart_c),
1267*4882a593Smuzhiyun FUNCTION(uart_ao_a_c),
1268*4882a593Smuzhiyun FUNCTION(iso7816),
1269*4882a593Smuzhiyun FUNCTION(eth),
1270*4882a593Smuzhiyun FUNCTION(pwm_a),
1271*4882a593Smuzhiyun FUNCTION(pwm_b),
1272*4882a593Smuzhiyun FUNCTION(pwm_c),
1273*4882a593Smuzhiyun FUNCTION(pwm_d),
1274*4882a593Smuzhiyun FUNCTION(pwm_e),
1275*4882a593Smuzhiyun FUNCTION(pwm_f),
1276*4882a593Smuzhiyun FUNCTION(cec_ao_a_h),
1277*4882a593Smuzhiyun FUNCTION(cec_ao_b_h),
1278*4882a593Smuzhiyun FUNCTION(jtag_b),
1279*4882a593Smuzhiyun FUNCTION(bt565_a),
1280*4882a593Smuzhiyun FUNCTION(tsin_a),
1281*4882a593Smuzhiyun FUNCTION(tsin_b),
1282*4882a593Smuzhiyun FUNCTION(hdmitx),
1283*4882a593Smuzhiyun FUNCTION(pdm),
1284*4882a593Smuzhiyun FUNCTION(spdif_out),
1285*4882a593Smuzhiyun FUNCTION(spdif_in),
1286*4882a593Smuzhiyun FUNCTION(mclk0),
1287*4882a593Smuzhiyun FUNCTION(mclk1),
1288*4882a593Smuzhiyun FUNCTION(tdm_a),
1289*4882a593Smuzhiyun FUNCTION(tdm_b),
1290*4882a593Smuzhiyun FUNCTION(tdm_c),
1291*4882a593Smuzhiyun };
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun static struct meson_pmx_func meson_g12a_aobus_functions[] = {
1294*4882a593Smuzhiyun FUNCTION(gpio_aobus),
1295*4882a593Smuzhiyun FUNCTION(uart_ao_a),
1296*4882a593Smuzhiyun FUNCTION(uart_ao_b),
1297*4882a593Smuzhiyun FUNCTION(i2c_ao),
1298*4882a593Smuzhiyun FUNCTION(i2c_ao_slave),
1299*4882a593Smuzhiyun FUNCTION(remote_ao_input),
1300*4882a593Smuzhiyun FUNCTION(remote_ao_out),
1301*4882a593Smuzhiyun FUNCTION(pwm_a_e),
1302*4882a593Smuzhiyun FUNCTION(pwm_ao_a),
1303*4882a593Smuzhiyun FUNCTION(pwm_ao_b),
1304*4882a593Smuzhiyun FUNCTION(pwm_ao_c),
1305*4882a593Smuzhiyun FUNCTION(pwm_ao_d),
1306*4882a593Smuzhiyun FUNCTION(jtag_a),
1307*4882a593Smuzhiyun FUNCTION(cec_ao_a),
1308*4882a593Smuzhiyun FUNCTION(cec_ao_b),
1309*4882a593Smuzhiyun FUNCTION(tsin_ao_a),
1310*4882a593Smuzhiyun FUNCTION(spdif_ao_out),
1311*4882a593Smuzhiyun FUNCTION(tdm_ao_b),
1312*4882a593Smuzhiyun FUNCTION(mclk0_ao),
1313*4882a593Smuzhiyun };
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun static struct meson_bank meson_g12a_periphs_banks[] = {
1316*4882a593Smuzhiyun /* name first last irq pullen pull dir out in ds */
1317*4882a593Smuzhiyun BANK_DS("Z", GPIOZ_0, GPIOZ_15, 12, 27,
1318*4882a593Smuzhiyun 4, 0, 4, 0, 12, 0, 13, 0, 14, 0, 5, 0),
1319*4882a593Smuzhiyun BANK_DS("H", GPIOH_0, GPIOH_8, 28, 36,
1320*4882a593Smuzhiyun 3, 0, 3, 0, 9, 0, 10, 0, 11, 0, 4, 0),
1321*4882a593Smuzhiyun BANK_DS("BOOT", BOOT_0, BOOT_15, 37, 52,
1322*4882a593Smuzhiyun 0, 0, 0, 0, 0, 0, 1, 0, 2, 0, 0, 0),
1323*4882a593Smuzhiyun BANK_DS("C", GPIOC_0, GPIOC_7, 53, 60,
1324*4882a593Smuzhiyun 1, 0, 1, 0, 3, 0, 4, 0, 5, 0, 1, 0),
1325*4882a593Smuzhiyun BANK_DS("A", GPIOA_0, GPIOA_15, 61, 76,
1326*4882a593Smuzhiyun 5, 0, 5, 0, 16, 0, 17, 0, 18, 0, 6, 0),
1327*4882a593Smuzhiyun BANK_DS("X", GPIOX_0, GPIOX_19, 77, 96,
1328*4882a593Smuzhiyun 2, 0, 2, 0, 6, 0, 7, 0, 8, 0, 2, 0),
1329*4882a593Smuzhiyun };
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun static struct meson_bank meson_g12a_aobus_banks[] = {
1332*4882a593Smuzhiyun /* name first last irq pullen pull dir out in ds */
1333*4882a593Smuzhiyun BANK_DS("AO", GPIOAO_0, GPIOAO_11, 0, 11, 3, 0, 2, 0, 0, 0, 4, 0, 1, 0,
1334*4882a593Smuzhiyun 0, 0),
1335*4882a593Smuzhiyun /* GPIOE actually located in the AO bank */
1336*4882a593Smuzhiyun BANK_DS("E", GPIOE_0, GPIOE_2, 97, 99, 3, 16, 2, 16, 0, 16, 4, 16, 1,
1337*4882a593Smuzhiyun 16, 1, 0),
1338*4882a593Smuzhiyun };
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun static struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = {
1341*4882a593Smuzhiyun /* name first lask reg offset */
1342*4882a593Smuzhiyun BANK_PMX("Z", GPIOZ_0, GPIOZ_15, 0x6, 0),
1343*4882a593Smuzhiyun BANK_PMX("H", GPIOH_0, GPIOH_8, 0xb, 0),
1344*4882a593Smuzhiyun BANK_PMX("BOOT", BOOT_0, BOOT_15, 0x0, 0),
1345*4882a593Smuzhiyun BANK_PMX("C", GPIOC_0, GPIOC_7, 0x9, 0),
1346*4882a593Smuzhiyun BANK_PMX("A", GPIOA_0, GPIOA_15, 0xd, 0),
1347*4882a593Smuzhiyun BANK_PMX("X", GPIOX_0, GPIOX_19, 0x3, 0),
1348*4882a593Smuzhiyun };
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun static struct meson_axg_pmx_data meson_g12a_periphs_pmx_banks_data = {
1351*4882a593Smuzhiyun .pmx_banks = meson_g12a_periphs_pmx_banks,
1352*4882a593Smuzhiyun .num_pmx_banks = ARRAY_SIZE(meson_g12a_periphs_pmx_banks),
1353*4882a593Smuzhiyun };
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun static struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = {
1356*4882a593Smuzhiyun BANK_PMX("AO", GPIOAO_0, GPIOAO_11, 0x0, 0),
1357*4882a593Smuzhiyun BANK_PMX("E", GPIOE_0, GPIOE_2, 0x1, 16),
1358*4882a593Smuzhiyun };
1359*4882a593Smuzhiyun
1360*4882a593Smuzhiyun static struct meson_axg_pmx_data meson_g12a_aobus_pmx_banks_data = {
1361*4882a593Smuzhiyun .pmx_banks = meson_g12a_aobus_pmx_banks,
1362*4882a593Smuzhiyun .num_pmx_banks = ARRAY_SIZE(meson_g12a_aobus_pmx_banks),
1363*4882a593Smuzhiyun };
1364*4882a593Smuzhiyun
meson_g12a_aobus_parse_dt_extra(struct meson_pinctrl * pc)1365*4882a593Smuzhiyun static int meson_g12a_aobus_parse_dt_extra(struct meson_pinctrl *pc)
1366*4882a593Smuzhiyun {
1367*4882a593Smuzhiyun pc->reg_pull = pc->reg_gpio;
1368*4882a593Smuzhiyun pc->reg_pullen = pc->reg_gpio;
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun return 0;
1371*4882a593Smuzhiyun }
1372*4882a593Smuzhiyun
1373*4882a593Smuzhiyun static struct meson_pinctrl_data meson_g12a_periphs_pinctrl_data = {
1374*4882a593Smuzhiyun .name = "periphs-banks",
1375*4882a593Smuzhiyun .pins = meson_g12a_periphs_pins,
1376*4882a593Smuzhiyun .groups = meson_g12a_periphs_groups,
1377*4882a593Smuzhiyun .funcs = meson_g12a_periphs_functions,
1378*4882a593Smuzhiyun .banks = meson_g12a_periphs_banks,
1379*4882a593Smuzhiyun .num_pins = ARRAY_SIZE(meson_g12a_periphs_pins),
1380*4882a593Smuzhiyun .num_groups = ARRAY_SIZE(meson_g12a_periphs_groups),
1381*4882a593Smuzhiyun .num_funcs = ARRAY_SIZE(meson_g12a_periphs_functions),
1382*4882a593Smuzhiyun .num_banks = ARRAY_SIZE(meson_g12a_periphs_banks),
1383*4882a593Smuzhiyun .pmx_ops = &meson_axg_pmx_ops,
1384*4882a593Smuzhiyun .pmx_data = &meson_g12a_periphs_pmx_banks_data,
1385*4882a593Smuzhiyun };
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun static struct meson_pinctrl_data meson_g12a_aobus_pinctrl_data = {
1388*4882a593Smuzhiyun .name = "aobus-banks",
1389*4882a593Smuzhiyun .pins = meson_g12a_aobus_pins,
1390*4882a593Smuzhiyun .groups = meson_g12a_aobus_groups,
1391*4882a593Smuzhiyun .funcs = meson_g12a_aobus_functions,
1392*4882a593Smuzhiyun .banks = meson_g12a_aobus_banks,
1393*4882a593Smuzhiyun .num_pins = ARRAY_SIZE(meson_g12a_aobus_pins),
1394*4882a593Smuzhiyun .num_groups = ARRAY_SIZE(meson_g12a_aobus_groups),
1395*4882a593Smuzhiyun .num_funcs = ARRAY_SIZE(meson_g12a_aobus_functions),
1396*4882a593Smuzhiyun .num_banks = ARRAY_SIZE(meson_g12a_aobus_banks),
1397*4882a593Smuzhiyun .pmx_ops = &meson_axg_pmx_ops,
1398*4882a593Smuzhiyun .pmx_data = &meson_g12a_aobus_pmx_banks_data,
1399*4882a593Smuzhiyun .parse_dt = meson_g12a_aobus_parse_dt_extra,
1400*4882a593Smuzhiyun };
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun static const struct of_device_id meson_g12a_pinctrl_dt_match[] = {
1403*4882a593Smuzhiyun {
1404*4882a593Smuzhiyun .compatible = "amlogic,meson-g12a-periphs-pinctrl",
1405*4882a593Smuzhiyun .data = &meson_g12a_periphs_pinctrl_data,
1406*4882a593Smuzhiyun },
1407*4882a593Smuzhiyun {
1408*4882a593Smuzhiyun .compatible = "amlogic,meson-g12a-aobus-pinctrl",
1409*4882a593Smuzhiyun .data = &meson_g12a_aobus_pinctrl_data,
1410*4882a593Smuzhiyun },
1411*4882a593Smuzhiyun { },
1412*4882a593Smuzhiyun };
1413*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, meson_g12a_pinctrl_dt_match);
1414*4882a593Smuzhiyun
1415*4882a593Smuzhiyun static struct platform_driver meson_g12a_pinctrl_driver = {
1416*4882a593Smuzhiyun .probe = meson_pinctrl_probe,
1417*4882a593Smuzhiyun .driver = {
1418*4882a593Smuzhiyun .name = "meson-g12a-pinctrl",
1419*4882a593Smuzhiyun .of_match_table = meson_g12a_pinctrl_dt_match,
1420*4882a593Smuzhiyun },
1421*4882a593Smuzhiyun };
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun module_platform_driver(meson_g12a_pinctrl_driver);
1424*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
1425