1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2015 MediaTek Inc.
4*4882a593Smuzhiyun * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/of_device.h>
11*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
12*4882a593Smuzhiyun #include <linux/pinctrl/pinconf-generic.h>
13*4882a593Smuzhiyun #include <linux/mfd/mt6397/core.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "pinctrl-mtk-common.h"
16*4882a593Smuzhiyun #include "pinctrl-mtk-mt6397.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define MT6397_PIN_REG_BASE 0xc000
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {
21*4882a593Smuzhiyun .pins = mtk_pins_mt6397,
22*4882a593Smuzhiyun .npins = ARRAY_SIZE(mtk_pins_mt6397),
23*4882a593Smuzhiyun .dir_offset = (MT6397_PIN_REG_BASE + 0x000),
24*4882a593Smuzhiyun .ies_offset = MTK_PINCTRL_NOT_SUPPORT,
25*4882a593Smuzhiyun .smt_offset = MTK_PINCTRL_NOT_SUPPORT,
26*4882a593Smuzhiyun .pullen_offset = (MT6397_PIN_REG_BASE + 0x020),
27*4882a593Smuzhiyun .pullsel_offset = (MT6397_PIN_REG_BASE + 0x040),
28*4882a593Smuzhiyun .dout_offset = (MT6397_PIN_REG_BASE + 0x080),
29*4882a593Smuzhiyun .din_offset = (MT6397_PIN_REG_BASE + 0x0a0),
30*4882a593Smuzhiyun .pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0),
31*4882a593Smuzhiyun .type1_start = 41,
32*4882a593Smuzhiyun .type1_end = 41,
33*4882a593Smuzhiyun .port_shf = 3,
34*4882a593Smuzhiyun .port_mask = 0x3,
35*4882a593Smuzhiyun .port_align = 2,
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
mt6397_pinctrl_probe(struct platform_device * pdev)38*4882a593Smuzhiyun static int mt6397_pinctrl_probe(struct platform_device *pdev)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct mt6397_chip *mt6397;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun mt6397 = dev_get_drvdata(pdev->dev.parent);
43*4882a593Smuzhiyun return mtk_pctrl_init(pdev, &mt6397_pinctrl_data, mt6397->regmap);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun static const struct of_device_id mt6397_pctrl_match[] = {
47*4882a593Smuzhiyun { .compatible = "mediatek,mt6397-pinctrl", },
48*4882a593Smuzhiyun { }
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun static struct platform_driver mtk_pinctrl_driver = {
52*4882a593Smuzhiyun .probe = mt6397_pinctrl_probe,
53*4882a593Smuzhiyun .driver = {
54*4882a593Smuzhiyun .name = "mediatek-mt6397-pinctrl",
55*4882a593Smuzhiyun .of_match_table = mt6397_pctrl_match,
56*4882a593Smuzhiyun },
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun builtin_platform_driver(mtk_pinctrl_driver);
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