1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyunmenu "MediaTek pinctrl drivers" 3*4882a593Smuzhiyun depends on ARCH_MEDIATEK || COMPILE_TEST 4*4882a593Smuzhiyun 5*4882a593Smuzhiyunconfig EINT_MTK 6*4882a593Smuzhiyun tristate "MediaTek External Interrupt Support" 7*4882a593Smuzhiyun depends on PINCTRL_MTK || PINCTRL_MTK_MOORE || PINCTRL_MTK_PARIS || COMPILE_TEST 8*4882a593Smuzhiyun select GPIOLIB 9*4882a593Smuzhiyun select IRQ_DOMAIN 10*4882a593Smuzhiyun default y if PINCTRL_MTK || PINCTRL_MTK_MOORE 11*4882a593Smuzhiyun default PINCTRL_MTK_PARIS 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunconfig PINCTRL_MTK 14*4882a593Smuzhiyun bool 15*4882a593Smuzhiyun depends on OF 16*4882a593Smuzhiyun select PINMUX 17*4882a593Smuzhiyun select GENERIC_PINCONF 18*4882a593Smuzhiyun select GPIOLIB 19*4882a593Smuzhiyun select EINT_MTK 20*4882a593Smuzhiyun select OF_GPIO 21*4882a593Smuzhiyun 22*4882a593Smuzhiyunconfig PINCTRL_MTK_V2 23*4882a593Smuzhiyun tristate 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunconfig PINCTRL_MTK_MOORE 26*4882a593Smuzhiyun bool 27*4882a593Smuzhiyun depends on OF 28*4882a593Smuzhiyun select GENERIC_PINCONF 29*4882a593Smuzhiyun select GENERIC_PINCTRL_GROUPS 30*4882a593Smuzhiyun select GENERIC_PINMUX_FUNCTIONS 31*4882a593Smuzhiyun select GPIOLIB 32*4882a593Smuzhiyun select OF_GPIO 33*4882a593Smuzhiyun select EINT_MTK 34*4882a593Smuzhiyun select PINCTRL_MTK_V2 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunconfig PINCTRL_MTK_PARIS 37*4882a593Smuzhiyun tristate 38*4882a593Smuzhiyun depends on OF 39*4882a593Smuzhiyun select PINMUX 40*4882a593Smuzhiyun select GENERIC_PINCONF 41*4882a593Smuzhiyun select GPIOLIB 42*4882a593Smuzhiyun select EINT_MTK 43*4882a593Smuzhiyun select OF_GPIO 44*4882a593Smuzhiyun select PINCTRL_MTK_V2 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun# For ARMv7 SoCs 47*4882a593Smuzhiyunconfig PINCTRL_MT2701 48*4882a593Smuzhiyun bool "Mediatek MT2701 pin control" 49*4882a593Smuzhiyun depends on MACH_MT7623 || MACH_MT2701 || COMPILE_TEST 50*4882a593Smuzhiyun depends on OF 51*4882a593Smuzhiyun default MACH_MT2701 52*4882a593Smuzhiyun select PINCTRL_MTK 53*4882a593Smuzhiyun 54*4882a593Smuzhiyunconfig PINCTRL_MT7623 55*4882a593Smuzhiyun bool "Mediatek MT7623 pin control with generic binding" 56*4882a593Smuzhiyun depends on MACH_MT7623 || COMPILE_TEST 57*4882a593Smuzhiyun depends on OF 58*4882a593Smuzhiyun default MACH_MT7623 59*4882a593Smuzhiyun select PINCTRL_MTK_MOORE 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunconfig PINCTRL_MT7629 62*4882a593Smuzhiyun bool "Mediatek MT7629 pin control" 63*4882a593Smuzhiyun depends on MACH_MT7629 || COMPILE_TEST 64*4882a593Smuzhiyun depends on OF 65*4882a593Smuzhiyun default MACH_MT7629 66*4882a593Smuzhiyun select PINCTRL_MTK_MOORE 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunconfig PINCTRL_MT8135 69*4882a593Smuzhiyun bool "Mediatek MT8135 pin control" 70*4882a593Smuzhiyun depends on MACH_MT8135 || COMPILE_TEST 71*4882a593Smuzhiyun depends on OF 72*4882a593Smuzhiyun default MACH_MT8135 73*4882a593Smuzhiyun select PINCTRL_MTK 74*4882a593Smuzhiyun 75*4882a593Smuzhiyunconfig PINCTRL_MT8127 76*4882a593Smuzhiyun bool "Mediatek MT8127 pin control" 77*4882a593Smuzhiyun depends on MACH_MT8127 || COMPILE_TEST 78*4882a593Smuzhiyun depends on OF 79*4882a593Smuzhiyun default MACH_MT8127 80*4882a593Smuzhiyun select PINCTRL_MTK 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun# For ARMv8 SoCs 83*4882a593Smuzhiyunconfig PINCTRL_MT2712 84*4882a593Smuzhiyun bool "MediaTek MT2712 pin control" 85*4882a593Smuzhiyun depends on OF 86*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 87*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 88*4882a593Smuzhiyun select PINCTRL_MTK 89*4882a593Smuzhiyun 90*4882a593Smuzhiyunconfig PINCTRL_MT6765 91*4882a593Smuzhiyun tristate "Mediatek MT6765 pin control" 92*4882a593Smuzhiyun depends on OF 93*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 94*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 95*4882a593Smuzhiyun select PINCTRL_MTK_PARIS 96*4882a593Smuzhiyun 97*4882a593Smuzhiyunconfig PINCTRL_MT6779 98*4882a593Smuzhiyun tristate "Mediatek MT6779 pin control" 99*4882a593Smuzhiyun depends on OF 100*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 101*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 102*4882a593Smuzhiyun select PINCTRL_MTK_PARIS 103*4882a593Smuzhiyun help 104*4882a593Smuzhiyun Say yes here to support pin controller and gpio driver 105*4882a593Smuzhiyun on Mediatek MT6779 SoC. 106*4882a593Smuzhiyun In MTK platform, we support virtual gpio and use it to 107*4882a593Smuzhiyun map specific eint which doesn't have real gpio pin. 108*4882a593Smuzhiyun 109*4882a593Smuzhiyunconfig PINCTRL_MT6797 110*4882a593Smuzhiyun bool "Mediatek MT6797 pin control" 111*4882a593Smuzhiyun depends on OF 112*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 113*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 114*4882a593Smuzhiyun select PINCTRL_MTK_PARIS 115*4882a593Smuzhiyun 116*4882a593Smuzhiyunconfig PINCTRL_MT7622 117*4882a593Smuzhiyun bool "MediaTek MT7622 pin control" 118*4882a593Smuzhiyun depends on OF 119*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 120*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 121*4882a593Smuzhiyun select PINCTRL_MTK_MOORE 122*4882a593Smuzhiyun 123*4882a593Smuzhiyunconfig PINCTRL_MT8167 124*4882a593Smuzhiyun bool "Mediatek MT8167 pin control" 125*4882a593Smuzhiyun depends on OF 126*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 127*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 128*4882a593Smuzhiyun select PINCTRL_MTK 129*4882a593Smuzhiyun 130*4882a593Smuzhiyunconfig PINCTRL_MT8173 131*4882a593Smuzhiyun bool "Mediatek MT8173 pin control" 132*4882a593Smuzhiyun depends on OF 133*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 134*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 135*4882a593Smuzhiyun select PINCTRL_MTK 136*4882a593Smuzhiyun 137*4882a593Smuzhiyunconfig PINCTRL_MT8183 138*4882a593Smuzhiyun bool "Mediatek MT8183 pin control" 139*4882a593Smuzhiyun depends on OF 140*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 141*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 142*4882a593Smuzhiyun select PINCTRL_MTK_PARIS 143*4882a593Smuzhiyun 144*4882a593Smuzhiyunconfig PINCTRL_MT8192 145*4882a593Smuzhiyun bool "Mediatek MT8192 pin control" 146*4882a593Smuzhiyun depends on OF 147*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 148*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 149*4882a593Smuzhiyun select PINCTRL_MTK_PARIS 150*4882a593Smuzhiyun 151*4882a593Smuzhiyunconfig PINCTRL_MT8516 152*4882a593Smuzhiyun bool "Mediatek MT8516 pin control" 153*4882a593Smuzhiyun depends on OF 154*4882a593Smuzhiyun depends on ARM64 || COMPILE_TEST 155*4882a593Smuzhiyun default ARM64 && ARCH_MEDIATEK 156*4882a593Smuzhiyun select PINCTRL_MTK 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun# For PMIC 159*4882a593Smuzhiyunconfig PINCTRL_MT6397 160*4882a593Smuzhiyun bool "Mediatek MT6397 pin control" 161*4882a593Smuzhiyun depends on MFD_MT6397 || COMPILE_TEST 162*4882a593Smuzhiyun depends on OF 163*4882a593Smuzhiyun default MFD_MT6397 164*4882a593Smuzhiyun select PINCTRL_MTK 165*4882a593Smuzhiyun 166*4882a593Smuzhiyunendmenu 167