1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 Freescale Semiconductor, Inc.
4*4882a593Smuzhiyun * Copyright 2017~2018 NXP
5*4882a593Smuzhiyun * Dong Aisheng <aisheng.dong@nxp.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <dt-bindings/pinctrl/pads-imx8qm.h>
9*4882a593Smuzhiyun #include <linux/err.h>
10*4882a593Smuzhiyun #include <linux/firmware/imx/sci.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "pinctrl-imx.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static const struct pinctrl_pin_desc imx8qm_pinctrl_pads[] = {
20*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SIM0_CLK),
21*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SIM0_RST),
22*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SIM0_IO),
23*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SIM0_PD),
24*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SIM0_POWER_EN),
25*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SIM0_GPIO0_00),
26*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM),
27*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SCL),
28*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SDA),
29*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_00),
30*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_01),
31*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SCL),
32*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SDA),
33*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_00),
34*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_01),
35*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_GPT0_CLK),
36*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_GPT0_CAPTURE),
37*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_GPT0_COMPARE),
38*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_GPT1_CLK),
39*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_GPT1_CAPTURE),
40*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_GPT1_COMPARE),
41*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART0_RX),
42*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART0_TX),
43*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART0_RTS_B),
44*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART0_CTS_B),
45*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART1_TX),
46*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART1_RX),
47*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART1_RTS_B),
48*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_UART1_CTS_B),
49*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH),
50*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_PMIC_MEMC_ON),
51*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_WDOG_OUT),
52*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SDA),
53*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SCL),
54*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PMIC_EARLY_WARNING),
55*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PMIC_INT_B),
56*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_00),
57*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_01),
58*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_02),
59*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_03),
60*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_04),
61*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_05),
62*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_06),
63*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_07),
64*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE0),
65*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE1),
66*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE2),
67*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE3),
68*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE4),
69*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE5),
70*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO00),
71*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO01),
72*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SCL),
73*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SDA),
74*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SCL),
75*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SDA),
76*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO00),
77*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO01),
78*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SCL),
79*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SDA),
80*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SCL),
81*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SDA),
82*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO),
83*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SCL),
84*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SDA),
85*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_00),
86*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_01),
87*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SCL),
88*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SDA),
89*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_00),
90*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_01),
91*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO),
92*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_MCLK_OUT),
93*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SCL),
94*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SDA),
95*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_00),
96*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_01),
97*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_MCLK_OUT),
98*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_00),
99*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_01),
100*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SCL),
101*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SDA),
102*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SCL),
103*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SDA),
104*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO),
105*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_FSR),
106*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_FST),
107*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKR),
108*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKT),
109*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX0),
110*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX1),
111*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX2_RX3),
112*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX3_RX2),
113*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX4_RX1),
114*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX5_RX0),
115*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPDIF0_RX),
116*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPDIF0_TX),
117*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPDIF0_EXT_CLK),
118*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI3_SCK),
119*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI3_SDO),
120*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI3_SDI),
121*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI3_CS0),
122*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI3_CS1),
123*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB),
124*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_FSR),
125*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_FST),
126*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKR),
127*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKT),
128*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX0),
129*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX1),
130*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX2_RX3),
131*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX3_RX2),
132*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX4_RX1),
133*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX5_RX0),
134*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MCLK_IN0),
135*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MCLK_OUT0),
136*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC),
137*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI0_SCK),
138*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI0_SDO),
139*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI0_SDI),
140*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI0_CS0),
141*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI0_CS1),
142*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI2_SCK),
143*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI2_SDO),
144*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI2_SDI),
145*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI2_CS0),
146*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SPI2_CS1),
147*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SAI1_RXC),
148*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SAI1_RXD),
149*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SAI1_RXFS),
150*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SAI1_TXC),
151*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SAI1_TXD),
152*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_SAI1_TXFS),
153*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT),
154*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN7),
155*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN6),
156*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN5),
157*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN4),
158*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN3),
159*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN2),
160*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN1),
161*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ADC_IN0),
162*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MLB_SIG),
163*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MLB_CLK),
164*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_MLB_DATA),
165*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT),
166*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_RX),
167*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_TX),
168*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_RX),
169*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_TX),
170*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_RX),
171*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_TX),
172*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR),
173*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC0),
174*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC1),
175*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC2),
176*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC3),
177*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_USB3IO),
178*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_RESET_B),
179*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_VSELECT),
180*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_RESET_B),
181*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_VSELECT),
182*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_WP),
183*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_CD_B),
184*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP),
185*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_MDIO),
186*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_MDC),
187*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_REFCLK_125M_25M),
188*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_REFCLK_125M_25M),
189*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_MDIO),
190*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_MDC),
191*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT),
192*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS0_B),
193*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS1_B),
194*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SCLK),
195*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DQS),
196*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA3),
197*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA2),
198*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA1),
199*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA0),
200*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1),
201*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA0),
202*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA1),
203*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA2),
204*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA3),
205*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DQS),
206*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS0_B),
207*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS1_B),
208*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SCLK),
209*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SCLK),
210*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA0),
211*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA1),
212*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA2),
213*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA3),
214*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DQS),
215*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS0_B),
216*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS1_B),
217*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0),
218*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_CLKREQ_B),
219*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_WAKE_B),
220*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_PERST_B),
221*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_CLKREQ_B),
222*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_WAKE_B),
223*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_PERST_B),
224*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP),
225*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_DATA),
226*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_STROBE),
227*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_0_HSIC),
228*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_1_HSIC),
229*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_CLK),
230*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_CMD),
231*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA0),
232*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA1),
233*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA2),
234*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA3),
235*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA4),
236*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA5),
237*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA6),
238*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA7),
239*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_STROBE),
240*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_EMMC0_RESET_B),
241*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX),
242*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_CLK),
243*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_CMD),
244*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA0),
245*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA1),
246*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_RE_P_N),
247*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA2),
248*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA3),
249*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_DQS_P_N),
250*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA4),
251*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA5),
252*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA6),
253*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA7),
254*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC1_STROBE),
255*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2),
256*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_CLK),
257*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_CMD),
258*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA0),
259*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA1),
260*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA2),
261*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA3),
262*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3),
263*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXC),
264*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TX_CTL),
265*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD0),
266*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD1),
267*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD2),
268*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD3),
269*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXC),
270*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RX_CTL),
271*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD0),
272*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD1),
273*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD2),
274*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD3),
275*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB),
276*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXC),
277*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TX_CTL),
278*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD0),
279*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD1),
280*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD2),
281*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD3),
282*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXC),
283*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RX_CTL),
284*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD0),
285*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD1),
286*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD2),
287*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD3),
288*4882a593Smuzhiyun IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA),
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun static const struct imx_pinctrl_soc_info imx8qm_pinctrl_info = {
292*4882a593Smuzhiyun .pins = imx8qm_pinctrl_pads,
293*4882a593Smuzhiyun .npins = ARRAY_SIZE(imx8qm_pinctrl_pads),
294*4882a593Smuzhiyun .flags = IMX_USE_SCU,
295*4882a593Smuzhiyun .imx_pinconf_get = imx_pinconf_get_scu,
296*4882a593Smuzhiyun .imx_pinconf_set = imx_pinconf_set_scu,
297*4882a593Smuzhiyun .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu,
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun static const struct of_device_id imx8qm_pinctrl_of_match[] = {
301*4882a593Smuzhiyun { .compatible = "fsl,imx8qm-iomuxc", },
302*4882a593Smuzhiyun { /* sentinel */ }
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, imx8qm_pinctrl_of_match);
305*4882a593Smuzhiyun
imx8qm_pinctrl_probe(struct platform_device * pdev)306*4882a593Smuzhiyun static int imx8qm_pinctrl_probe(struct platform_device *pdev)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun int ret;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun ret = imx_pinctrl_sc_ipc_init(pdev);
311*4882a593Smuzhiyun if (ret)
312*4882a593Smuzhiyun return ret;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun return imx_pinctrl_probe(pdev, &imx8qm_pinctrl_info);
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun static struct platform_driver imx8qm_pinctrl_driver = {
318*4882a593Smuzhiyun .driver = {
319*4882a593Smuzhiyun .name = "imx8qm-pinctrl",
320*4882a593Smuzhiyun .of_match_table = of_match_ptr(imx8qm_pinctrl_of_match),
321*4882a593Smuzhiyun .suppress_bind_attrs = true,
322*4882a593Smuzhiyun },
323*4882a593Smuzhiyun .probe = imx8qm_pinctrl_probe,
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun
imx8qm_pinctrl_init(void)326*4882a593Smuzhiyun static int __init imx8qm_pinctrl_init(void)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun return platform_driver_register(&imx8qm_pinctrl_driver);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun arch_initcall(imx8qm_pinctrl_init);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
333*4882a593Smuzhiyun MODULE_DESCRIPTION("NXP i.MX8QM pinctrl driver");
334*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
335