1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Freescale imx7d pinctrl driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Author: Anson Huang <Anson.Huang@freescale.com>
6*4882a593Smuzhiyun // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "pinctrl-imx.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun enum imx7d_pads {
18*4882a593Smuzhiyun MX7D_PAD_RESERVE0 = 0,
19*4882a593Smuzhiyun MX7D_PAD_RESERVE1 = 1,
20*4882a593Smuzhiyun MX7D_PAD_RESERVE2 = 2,
21*4882a593Smuzhiyun MX7D_PAD_RESERVE3 = 3,
22*4882a593Smuzhiyun MX7D_PAD_RESERVE4 = 4,
23*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO08 = 5,
24*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO09 = 6,
25*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO10 = 7,
26*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO11 = 8,
27*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO12 = 9,
28*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO13 = 10,
29*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO14 = 11,
30*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO15 = 12,
31*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA00 = 13,
32*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA01 = 14,
33*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA02 = 15,
34*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA03 = 16,
35*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA04 = 17,
36*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA05 = 18,
37*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA06 = 19,
38*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA07 = 20,
39*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA08 = 21,
40*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA09 = 22,
41*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA10 = 23,
42*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA11 = 24,
43*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA12 = 25,
44*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA13 = 26,
45*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA14 = 27,
46*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA15 = 28,
47*4882a593Smuzhiyun MX7D_PAD_EPDC_SDCLK = 29,
48*4882a593Smuzhiyun MX7D_PAD_EPDC_SDLE = 30,
49*4882a593Smuzhiyun MX7D_PAD_EPDC_SDOE = 31,
50*4882a593Smuzhiyun MX7D_PAD_EPDC_SDSHR = 32,
51*4882a593Smuzhiyun MX7D_PAD_EPDC_SDCE0 = 33,
52*4882a593Smuzhiyun MX7D_PAD_EPDC_SDCE1 = 34,
53*4882a593Smuzhiyun MX7D_PAD_EPDC_SDCE2 = 35,
54*4882a593Smuzhiyun MX7D_PAD_EPDC_SDCE3 = 36,
55*4882a593Smuzhiyun MX7D_PAD_EPDC_GDCLK = 37,
56*4882a593Smuzhiyun MX7D_PAD_EPDC_GDOE = 38,
57*4882a593Smuzhiyun MX7D_PAD_EPDC_GDRL = 39,
58*4882a593Smuzhiyun MX7D_PAD_EPDC_GDSP = 40,
59*4882a593Smuzhiyun MX7D_PAD_EPDC_BDR0 = 41,
60*4882a593Smuzhiyun MX7D_PAD_EPDC_BDR1 = 42,
61*4882a593Smuzhiyun MX7D_PAD_EPDC_PWR_COM = 43,
62*4882a593Smuzhiyun MX7D_PAD_EPDC_PWR_STAT = 44,
63*4882a593Smuzhiyun MX7D_PAD_LCD_CLK = 45,
64*4882a593Smuzhiyun MX7D_PAD_LCD_ENABLE = 46,
65*4882a593Smuzhiyun MX7D_PAD_LCD_HSYNC = 47,
66*4882a593Smuzhiyun MX7D_PAD_LCD_VSYNC = 48,
67*4882a593Smuzhiyun MX7D_PAD_LCD_RESET = 49,
68*4882a593Smuzhiyun MX7D_PAD_LCD_DATA00 = 50,
69*4882a593Smuzhiyun MX7D_PAD_LCD_DATA01 = 51,
70*4882a593Smuzhiyun MX7D_PAD_LCD_DATA02 = 52,
71*4882a593Smuzhiyun MX7D_PAD_LCD_DATA03 = 53,
72*4882a593Smuzhiyun MX7D_PAD_LCD_DATA04 = 54,
73*4882a593Smuzhiyun MX7D_PAD_LCD_DATA05 = 55,
74*4882a593Smuzhiyun MX7D_PAD_LCD_DATA06 = 56,
75*4882a593Smuzhiyun MX7D_PAD_LCD_DATA07 = 57,
76*4882a593Smuzhiyun MX7D_PAD_LCD_DATA08 = 58,
77*4882a593Smuzhiyun MX7D_PAD_LCD_DATA09 = 59,
78*4882a593Smuzhiyun MX7D_PAD_LCD_DATA10 = 60,
79*4882a593Smuzhiyun MX7D_PAD_LCD_DATA11 = 61,
80*4882a593Smuzhiyun MX7D_PAD_LCD_DATA12 = 62,
81*4882a593Smuzhiyun MX7D_PAD_LCD_DATA13 = 63,
82*4882a593Smuzhiyun MX7D_PAD_LCD_DATA14 = 64,
83*4882a593Smuzhiyun MX7D_PAD_LCD_DATA15 = 65,
84*4882a593Smuzhiyun MX7D_PAD_LCD_DATA16 = 66,
85*4882a593Smuzhiyun MX7D_PAD_LCD_DATA17 = 67,
86*4882a593Smuzhiyun MX7D_PAD_LCD_DATA18 = 68,
87*4882a593Smuzhiyun MX7D_PAD_LCD_DATA19 = 69,
88*4882a593Smuzhiyun MX7D_PAD_LCD_DATA20 = 70,
89*4882a593Smuzhiyun MX7D_PAD_LCD_DATA21 = 71,
90*4882a593Smuzhiyun MX7D_PAD_LCD_DATA22 = 72,
91*4882a593Smuzhiyun MX7D_PAD_LCD_DATA23 = 73,
92*4882a593Smuzhiyun MX7D_PAD_UART1_RX_DATA = 74,
93*4882a593Smuzhiyun MX7D_PAD_UART1_TX_DATA = 75,
94*4882a593Smuzhiyun MX7D_PAD_UART2_RX_DATA = 76,
95*4882a593Smuzhiyun MX7D_PAD_UART2_TX_DATA = 77,
96*4882a593Smuzhiyun MX7D_PAD_UART3_RX_DATA = 78,
97*4882a593Smuzhiyun MX7D_PAD_UART3_TX_DATA = 79,
98*4882a593Smuzhiyun MX7D_PAD_UART3_RTS_B = 80,
99*4882a593Smuzhiyun MX7D_PAD_UART3_CTS_B = 81,
100*4882a593Smuzhiyun MX7D_PAD_I2C1_SCL = 82,
101*4882a593Smuzhiyun MX7D_PAD_I2C1_SDA = 83,
102*4882a593Smuzhiyun MX7D_PAD_I2C2_SCL = 84,
103*4882a593Smuzhiyun MX7D_PAD_I2C2_SDA = 85,
104*4882a593Smuzhiyun MX7D_PAD_I2C3_SCL = 86,
105*4882a593Smuzhiyun MX7D_PAD_I2C3_SDA = 87,
106*4882a593Smuzhiyun MX7D_PAD_I2C4_SCL = 88,
107*4882a593Smuzhiyun MX7D_PAD_I2C4_SDA = 89,
108*4882a593Smuzhiyun MX7D_PAD_ECSPI1_SCLK = 90,
109*4882a593Smuzhiyun MX7D_PAD_ECSPI1_MOSI = 91,
110*4882a593Smuzhiyun MX7D_PAD_ECSPI1_MISO = 92,
111*4882a593Smuzhiyun MX7D_PAD_ECSPI1_SS0 = 93,
112*4882a593Smuzhiyun MX7D_PAD_ECSPI2_SCLK = 94,
113*4882a593Smuzhiyun MX7D_PAD_ECSPI2_MOSI = 95,
114*4882a593Smuzhiyun MX7D_PAD_ECSPI2_MISO = 96,
115*4882a593Smuzhiyun MX7D_PAD_ECSPI2_SS0 = 97,
116*4882a593Smuzhiyun MX7D_PAD_SD1_CD_B = 98,
117*4882a593Smuzhiyun MX7D_PAD_SD1_WP = 99,
118*4882a593Smuzhiyun MX7D_PAD_SD1_RESET_B = 100,
119*4882a593Smuzhiyun MX7D_PAD_SD1_CLK = 101,
120*4882a593Smuzhiyun MX7D_PAD_SD1_CMD = 102,
121*4882a593Smuzhiyun MX7D_PAD_SD1_DATA0 = 103,
122*4882a593Smuzhiyun MX7D_PAD_SD1_DATA1 = 104,
123*4882a593Smuzhiyun MX7D_PAD_SD1_DATA2 = 105,
124*4882a593Smuzhiyun MX7D_PAD_SD1_DATA3 = 106,
125*4882a593Smuzhiyun MX7D_PAD_SD2_CD_B = 107,
126*4882a593Smuzhiyun MX7D_PAD_SD2_WP = 108,
127*4882a593Smuzhiyun MX7D_PAD_SD2_RESET_B = 109,
128*4882a593Smuzhiyun MX7D_PAD_SD2_CLK = 110,
129*4882a593Smuzhiyun MX7D_PAD_SD2_CMD = 111,
130*4882a593Smuzhiyun MX7D_PAD_SD2_DATA0 = 112,
131*4882a593Smuzhiyun MX7D_PAD_SD2_DATA1 = 113,
132*4882a593Smuzhiyun MX7D_PAD_SD2_DATA2 = 114,
133*4882a593Smuzhiyun MX7D_PAD_SD2_DATA3 = 115,
134*4882a593Smuzhiyun MX7D_PAD_SD3_CLK = 116,
135*4882a593Smuzhiyun MX7D_PAD_SD3_CMD = 117,
136*4882a593Smuzhiyun MX7D_PAD_SD3_DATA0 = 118,
137*4882a593Smuzhiyun MX7D_PAD_SD3_DATA1 = 119,
138*4882a593Smuzhiyun MX7D_PAD_SD3_DATA2 = 120,
139*4882a593Smuzhiyun MX7D_PAD_SD3_DATA3 = 121,
140*4882a593Smuzhiyun MX7D_PAD_SD3_DATA4 = 122,
141*4882a593Smuzhiyun MX7D_PAD_SD3_DATA5 = 123,
142*4882a593Smuzhiyun MX7D_PAD_SD3_DATA6 = 124,
143*4882a593Smuzhiyun MX7D_PAD_SD3_DATA7 = 125,
144*4882a593Smuzhiyun MX7D_PAD_SD3_STROBE = 126,
145*4882a593Smuzhiyun MX7D_PAD_SD3_RESET_B = 127,
146*4882a593Smuzhiyun MX7D_PAD_SAI1_RX_DATA = 128,
147*4882a593Smuzhiyun MX7D_PAD_SAI1_TX_BCLK = 129,
148*4882a593Smuzhiyun MX7D_PAD_SAI1_TX_SYNC = 130,
149*4882a593Smuzhiyun MX7D_PAD_SAI1_TX_DATA = 131,
150*4882a593Smuzhiyun MX7D_PAD_SAI1_RX_SYNC = 132,
151*4882a593Smuzhiyun MX7D_PAD_SAI1_RX_BCLK = 133,
152*4882a593Smuzhiyun MX7D_PAD_SAI1_MCLK = 134,
153*4882a593Smuzhiyun MX7D_PAD_SAI2_TX_SYNC = 135,
154*4882a593Smuzhiyun MX7D_PAD_SAI2_TX_BCLK = 136,
155*4882a593Smuzhiyun MX7D_PAD_SAI2_RX_DATA = 137,
156*4882a593Smuzhiyun MX7D_PAD_SAI2_TX_DATA = 138,
157*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_RD0 = 139,
158*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_RD1 = 140,
159*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_RD2 = 141,
160*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_RD3 = 142,
161*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_RX_CTL = 143,
162*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_RXC = 144,
163*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_TD0 = 145,
164*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_TD1 = 146,
165*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_TD2 = 147,
166*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_TD3 = 148,
167*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_TX_CTL = 149,
168*4882a593Smuzhiyun MX7D_PAD_ENET1_RGMII_TXC = 150,
169*4882a593Smuzhiyun MX7D_PAD_ENET1_TX_CLK = 151,
170*4882a593Smuzhiyun MX7D_PAD_ENET1_RX_CLK = 152,
171*4882a593Smuzhiyun MX7D_PAD_ENET1_CRS = 153,
172*4882a593Smuzhiyun MX7D_PAD_ENET1_COL = 154,
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun enum imx7d_lpsr_pads {
176*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO00 = 0,
177*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO01 = 1,
178*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO02 = 2,
179*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO03 = 3,
180*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO04 = 4,
181*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO05 = 5,
182*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO06 = 6,
183*4882a593Smuzhiyun MX7D_PAD_GPIO1_IO07 = 7,
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* Pad names for the pinmux subsystem */
187*4882a593Smuzhiyun static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
188*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0),
189*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_RESERVE1),
190*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_RESERVE2),
191*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_RESERVE3),
192*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_RESERVE4),
193*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO08),
194*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO09),
195*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO10),
196*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO11),
197*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO12),
198*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO13),
199*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO14),
200*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO15),
201*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA00),
202*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA01),
203*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA02),
204*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA03),
205*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA04),
206*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA05),
207*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA06),
208*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA07),
209*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA08),
210*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA09),
211*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA10),
212*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA11),
213*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA12),
214*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA13),
215*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA14),
216*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA15),
217*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCLK),
218*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDLE),
219*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDOE),
220*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDSHR),
221*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE0),
222*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE1),
223*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE2),
224*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE3),
225*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDCLK),
226*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDOE),
227*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDRL),
228*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDSP),
229*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR0),
230*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR1),
231*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_COM),
232*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_STAT),
233*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_CLK),
234*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_ENABLE),
235*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_HSYNC),
236*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_VSYNC),
237*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_RESET),
238*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA00),
239*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA01),
240*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA02),
241*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA03),
242*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA04),
243*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA05),
244*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA06),
245*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA07),
246*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA08),
247*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA09),
248*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA10),
249*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA11),
250*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA12),
251*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA13),
252*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA14),
253*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA15),
254*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA16),
255*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA17),
256*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA18),
257*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA19),
258*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA20),
259*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA21),
260*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA22),
261*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA23),
262*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART1_RX_DATA),
263*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART1_TX_DATA),
264*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART2_RX_DATA),
265*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART2_TX_DATA),
266*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART3_RX_DATA),
267*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART3_TX_DATA),
268*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART3_RTS_B),
269*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_UART3_CTS_B),
270*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SCL),
271*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SDA),
272*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SCL),
273*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SDA),
274*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SCL),
275*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SDA),
276*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SCL),
277*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SDA),
278*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SCLK),
279*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MOSI),
280*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MISO),
281*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SS0),
282*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SCLK),
283*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MOSI),
284*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MISO),
285*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SS0),
286*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_CD_B),
287*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_WP),
288*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_RESET_B),
289*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_CLK),
290*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_CMD),
291*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA0),
292*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA1),
293*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA2),
294*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA3),
295*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_CD_B),
296*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_WP),
297*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_RESET_B),
298*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_CLK),
299*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_CMD),
300*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA0),
301*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA1),
302*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA2),
303*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA3),
304*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_CLK),
305*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_CMD),
306*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA0),
307*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA1),
308*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA2),
309*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA3),
310*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA4),
311*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA5),
312*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA6),
313*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA7),
314*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_STROBE),
315*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SD3_RESET_B),
316*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_DATA),
317*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_BCLK),
318*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_SYNC),
319*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_DATA),
320*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_SYNC),
321*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_BCLK),
322*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI1_MCLK),
323*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_SYNC),
324*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_BCLK),
325*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI2_RX_DATA),
326*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_DATA),
327*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD0),
328*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD1),
329*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD2),
330*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD3),
331*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RX_CTL),
332*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RXC),
333*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD0),
334*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD1),
335*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD2),
336*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD3),
337*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TX_CTL),
338*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TXC),
339*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_TX_CLK),
340*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RX_CLK),
341*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_CRS),
342*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL),
343*4882a593Smuzhiyun };
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* Pad names for the pinmux subsystem */
346*4882a593Smuzhiyun static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = {
347*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00),
348*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01),
349*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02),
350*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03),
351*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04),
352*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05),
353*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06),
354*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07),
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun static const struct imx_pinctrl_soc_info imx7d_pinctrl_info = {
358*4882a593Smuzhiyun .pins = imx7d_pinctrl_pads,
359*4882a593Smuzhiyun .npins = ARRAY_SIZE(imx7d_pinctrl_pads),
360*4882a593Smuzhiyun .gpr_compatible = "fsl,imx7d-iomuxc-gpr",
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun static const struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = {
364*4882a593Smuzhiyun .pins = imx7d_lpsr_pinctrl_pads,
365*4882a593Smuzhiyun .npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads),
366*4882a593Smuzhiyun .flags = ZERO_OFFSET_VALID,
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun static const struct of_device_id imx7d_pinctrl_of_match[] = {
370*4882a593Smuzhiyun { .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
371*4882a593Smuzhiyun { .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
372*4882a593Smuzhiyun { /* sentinel */ }
373*4882a593Smuzhiyun };
374*4882a593Smuzhiyun
imx7d_pinctrl_probe(struct platform_device * pdev)375*4882a593Smuzhiyun static int imx7d_pinctrl_probe(struct platform_device *pdev)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun const struct imx_pinctrl_soc_info *pinctrl_info;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun pinctrl_info = of_device_get_match_data(&pdev->dev);
380*4882a593Smuzhiyun if (!pinctrl_info)
381*4882a593Smuzhiyun return -ENODEV;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun return imx_pinctrl_probe(pdev, pinctrl_info);
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun static struct platform_driver imx7d_pinctrl_driver = {
387*4882a593Smuzhiyun .driver = {
388*4882a593Smuzhiyun .name = "imx7d-pinctrl",
389*4882a593Smuzhiyun .of_match_table = of_match_ptr(imx7d_pinctrl_of_match),
390*4882a593Smuzhiyun },
391*4882a593Smuzhiyun .probe = imx7d_pinctrl_probe,
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
imx7d_pinctrl_init(void)394*4882a593Smuzhiyun static int __init imx7d_pinctrl_init(void)
395*4882a593Smuzhiyun {
396*4882a593Smuzhiyun return platform_driver_register(&imx7d_pinctrl_driver);
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun arch_initcall(imx7d_pinctrl_init);
399