1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Freescale imx6sx pinctrl driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Author: Anson Huang <Anson.Huang@freescale.com>
6*4882a593Smuzhiyun // Copyright (C) 2014 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "pinctrl-imx.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun enum imx6sx_pads {
18*4882a593Smuzhiyun MX6Sx_PAD_RESERVE0 = 0,
19*4882a593Smuzhiyun MX6Sx_PAD_RESERVE1 = 1,
20*4882a593Smuzhiyun MX6Sx_PAD_RESERVE2 = 2,
21*4882a593Smuzhiyun MX6Sx_PAD_RESERVE3 = 3,
22*4882a593Smuzhiyun MX6Sx_PAD_RESERVE4 = 4,
23*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO00 = 5,
24*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO01 = 6,
25*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO02 = 7,
26*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO03 = 8,
27*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO04 = 9,
28*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO05 = 10,
29*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO06 = 11,
30*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO07 = 12,
31*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO08 = 13,
32*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO09 = 14,
33*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO10 = 15,
34*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO11 = 16,
35*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO12 = 17,
36*4882a593Smuzhiyun MX6SX_PAD_GPIO1_IO13 = 18,
37*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA00 = 19,
38*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA01 = 20,
39*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA02 = 21,
40*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA03 = 22,
41*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA04 = 23,
42*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA05 = 24,
43*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA06 = 25,
44*4882a593Smuzhiyun MX6SX_PAD_CSI_DATA07 = 26,
45*4882a593Smuzhiyun MX6SX_PAD_CSI_HSYNC = 27,
46*4882a593Smuzhiyun MX6SX_PAD_CSI_MCLK = 28,
47*4882a593Smuzhiyun MX6SX_PAD_CSI_PIXCLK = 29,
48*4882a593Smuzhiyun MX6SX_PAD_CSI_VSYNC = 30,
49*4882a593Smuzhiyun MX6SX_PAD_ENET1_COL = 31,
50*4882a593Smuzhiyun MX6SX_PAD_ENET1_CRS = 32,
51*4882a593Smuzhiyun MX6SX_PAD_ENET1_MDC = 33,
52*4882a593Smuzhiyun MX6SX_PAD_ENET1_MDIO = 34,
53*4882a593Smuzhiyun MX6SX_PAD_ENET1_RX_CLK = 35,
54*4882a593Smuzhiyun MX6SX_PAD_ENET1_TX_CLK = 36,
55*4882a593Smuzhiyun MX6SX_PAD_ENET2_COL = 37,
56*4882a593Smuzhiyun MX6SX_PAD_ENET2_CRS = 38,
57*4882a593Smuzhiyun MX6SX_PAD_ENET2_RX_CLK = 39,
58*4882a593Smuzhiyun MX6SX_PAD_ENET2_TX_CLK = 40,
59*4882a593Smuzhiyun MX6SX_PAD_KEY_COL0 = 41,
60*4882a593Smuzhiyun MX6SX_PAD_KEY_COL1 = 42,
61*4882a593Smuzhiyun MX6SX_PAD_KEY_COL2 = 43,
62*4882a593Smuzhiyun MX6SX_PAD_KEY_COL3 = 44,
63*4882a593Smuzhiyun MX6SX_PAD_KEY_COL4 = 45,
64*4882a593Smuzhiyun MX6SX_PAD_KEY_ROW0 = 46,
65*4882a593Smuzhiyun MX6SX_PAD_KEY_ROW1 = 47,
66*4882a593Smuzhiyun MX6SX_PAD_KEY_ROW2 = 48,
67*4882a593Smuzhiyun MX6SX_PAD_KEY_ROW3 = 49,
68*4882a593Smuzhiyun MX6SX_PAD_KEY_ROW4 = 50,
69*4882a593Smuzhiyun MX6SX_PAD_LCD1_CLK = 51,
70*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA00 = 52,
71*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA01 = 53,
72*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA02 = 54,
73*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA03 = 55,
74*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA04 = 56,
75*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA05 = 57,
76*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA06 = 58,
77*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA07 = 59,
78*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA08 = 60,
79*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA09 = 61,
80*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA10 = 62,
81*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA11 = 63,
82*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA12 = 64,
83*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA13 = 65,
84*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA14 = 66,
85*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA15 = 67,
86*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA16 = 68,
87*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA17 = 69,
88*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA18 = 70,
89*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA19 = 71,
90*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA20 = 72,
91*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA21 = 73,
92*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA22 = 74,
93*4882a593Smuzhiyun MX6SX_PAD_LCD1_DATA23 = 75,
94*4882a593Smuzhiyun MX6SX_PAD_LCD1_ENABLE = 76,
95*4882a593Smuzhiyun MX6SX_PAD_LCD1_HSYNC = 77,
96*4882a593Smuzhiyun MX6SX_PAD_LCD1_RESET = 78,
97*4882a593Smuzhiyun MX6SX_PAD_LCD1_VSYNC = 79,
98*4882a593Smuzhiyun MX6SX_PAD_NAND_ALE = 80,
99*4882a593Smuzhiyun MX6SX_PAD_NAND_CE0_B = 81,
100*4882a593Smuzhiyun MX6SX_PAD_NAND_CE1_B = 82,
101*4882a593Smuzhiyun MX6SX_PAD_NAND_CLE = 83,
102*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA00 = 84 ,
103*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA01 = 85,
104*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA02 = 86,
105*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA03 = 87,
106*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA04 = 88,
107*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA05 = 89,
108*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA06 = 90,
109*4882a593Smuzhiyun MX6SX_PAD_NAND_DATA07 = 91,
110*4882a593Smuzhiyun MX6SX_PAD_NAND_RE_B = 92,
111*4882a593Smuzhiyun MX6SX_PAD_NAND_READY_B = 93,
112*4882a593Smuzhiyun MX6SX_PAD_NAND_WE_B = 94,
113*4882a593Smuzhiyun MX6SX_PAD_NAND_WP_B = 95,
114*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_DATA0 = 96,
115*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_DATA1 = 97,
116*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_DATA2 = 98,
117*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_DATA3 = 99,
118*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_DQS = 100,
119*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_SCLK = 101,
120*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_SS0_B = 102,
121*4882a593Smuzhiyun MX6SX_PAD_QSPI1A_SS1_B = 103,
122*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_DATA0 = 104,
123*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_DATA1 = 105,
124*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_DATA2 = 106,
125*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_DATA3 = 107,
126*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_DQS = 108,
127*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_SCLK = 109,
128*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_SS0_B = 110,
129*4882a593Smuzhiyun MX6SX_PAD_QSPI1B_SS1_B = 111,
130*4882a593Smuzhiyun MX6SX_PAD_RGMII1_RD0 = 112,
131*4882a593Smuzhiyun MX6SX_PAD_RGMII1_RD1 = 113,
132*4882a593Smuzhiyun MX6SX_PAD_RGMII1_RD2 = 114,
133*4882a593Smuzhiyun MX6SX_PAD_RGMII1_RD3 = 115,
134*4882a593Smuzhiyun MX6SX_PAD_RGMII1_RX_CTL = 116,
135*4882a593Smuzhiyun MX6SX_PAD_RGMII1_RXC = 117,
136*4882a593Smuzhiyun MX6SX_PAD_RGMII1_TD0 = 118,
137*4882a593Smuzhiyun MX6SX_PAD_RGMII1_TD1 = 119,
138*4882a593Smuzhiyun MX6SX_PAD_RGMII1_TD2 = 120,
139*4882a593Smuzhiyun MX6SX_PAD_RGMII1_TD3 = 121,
140*4882a593Smuzhiyun MX6SX_PAD_RGMII1_TX_CTL = 122,
141*4882a593Smuzhiyun MX6SX_PAD_RGMII1_TXC = 123,
142*4882a593Smuzhiyun MX6SX_PAD_RGMII2_RD0 = 124,
143*4882a593Smuzhiyun MX6SX_PAD_RGMII2_RD1 = 125,
144*4882a593Smuzhiyun MX6SX_PAD_RGMII2_RD2 = 126,
145*4882a593Smuzhiyun MX6SX_PAD_RGMII2_RD3 = 127,
146*4882a593Smuzhiyun MX6SX_PAD_RGMII2_RX_CTL = 128,
147*4882a593Smuzhiyun MX6SX_PAD_RGMII2_RXC = 129,
148*4882a593Smuzhiyun MX6SX_PAD_RGMII2_TD0 = 130,
149*4882a593Smuzhiyun MX6SX_PAD_RGMII2_TD1 = 131,
150*4882a593Smuzhiyun MX6SX_PAD_RGMII2_TD2 = 132,
151*4882a593Smuzhiyun MX6SX_PAD_RGMII2_TD3 = 133,
152*4882a593Smuzhiyun MX6SX_PAD_RGMII2_TX_CTL = 134,
153*4882a593Smuzhiyun MX6SX_PAD_RGMII2_TXC = 135,
154*4882a593Smuzhiyun MX6SX_PAD_SD1_CLK = 136,
155*4882a593Smuzhiyun MX6SX_PAD_SD1_CMD = 137,
156*4882a593Smuzhiyun MX6SX_PAD_SD1_DATA0 = 138,
157*4882a593Smuzhiyun MX6SX_PAD_SD1_DATA1 = 139,
158*4882a593Smuzhiyun MX6SX_PAD_SD1_DATA2 = 140,
159*4882a593Smuzhiyun MX6SX_PAD_SD1_DATA3 = 141,
160*4882a593Smuzhiyun MX6SX_PAD_SD2_CLK = 142,
161*4882a593Smuzhiyun MX6SX_PAD_SD2_CMD = 143,
162*4882a593Smuzhiyun MX6SX_PAD_SD2_DATA0 = 144,
163*4882a593Smuzhiyun MX6SX_PAD_SD2_DATA1 = 145,
164*4882a593Smuzhiyun MX6SX_PAD_SD2_DATA2 = 146,
165*4882a593Smuzhiyun MX6SX_PAD_SD2_DATA3 = 147,
166*4882a593Smuzhiyun MX6SX_PAD_SD3_CLK = 148,
167*4882a593Smuzhiyun MX6SX_PAD_SD3_CMD = 149,
168*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA0 = 150,
169*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA1 = 151,
170*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA2 = 152,
171*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA3 = 153,
172*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA4 = 154,
173*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA5 = 155,
174*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA6 = 156,
175*4882a593Smuzhiyun MX6SX_PAD_SD3_DATA7 = 157,
176*4882a593Smuzhiyun MX6SX_PAD_SD4_CLK = 158,
177*4882a593Smuzhiyun MX6SX_PAD_SD4_CMD = 159,
178*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA0 = 160,
179*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA1 = 161,
180*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA2 = 162,
181*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA3 = 163,
182*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA4 = 164,
183*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA5 = 165,
184*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA6 = 166,
185*4882a593Smuzhiyun MX6SX_PAD_SD4_DATA7 = 167,
186*4882a593Smuzhiyun MX6SX_PAD_SD4_RESET_B = 168,
187*4882a593Smuzhiyun MX6SX_PAD_USB_H_DATA = 169,
188*4882a593Smuzhiyun MX6SX_PAD_USB_H_STROBE = 170,
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* Pad names for the pinmux subsystem */
192*4882a593Smuzhiyun static const struct pinctrl_pin_desc imx6sx_pinctrl_pads[] = {
193*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE0),
194*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE1),
195*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE2),
196*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE3),
197*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE4),
198*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO00),
199*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO01),
200*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO02),
201*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO03),
202*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO04),
203*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO05),
204*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO06),
205*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO07),
206*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO08),
207*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO09),
208*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO10),
209*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO11),
210*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO12),
211*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO13),
212*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA00),
213*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA01),
214*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA02),
215*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA03),
216*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA04),
217*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA05),
218*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA06),
219*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA07),
220*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_HSYNC),
221*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_MCLK),
222*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_PIXCLK),
223*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_CSI_VSYNC),
224*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_COL),
225*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_CRS),
226*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDC),
227*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDIO),
228*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_RX_CLK),
229*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_TX_CLK),
230*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_COL),
231*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_CRS),
232*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_RX_CLK),
233*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_TX_CLK),
234*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL0),
235*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL1),
236*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL2),
237*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL3),
238*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL4),
239*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW0),
240*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW1),
241*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW2),
242*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW3),
243*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW4),
244*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_CLK),
245*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA00),
246*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA01),
247*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA02),
248*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA03),
249*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA04),
250*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA05),
251*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA06),
252*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA07),
253*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA08),
254*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA09),
255*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA10),
256*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA11),
257*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA12),
258*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA13),
259*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA14),
260*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA15),
261*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA16),
262*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA17),
263*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA18),
264*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA19),
265*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA20),
266*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA21),
267*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA22),
268*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA23),
269*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_ENABLE),
270*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_HSYNC),
271*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_RESET),
272*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_VSYNC),
273*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_ALE),
274*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE0_B),
275*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE1_B),
276*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CLE),
277*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA00),
278*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA01),
279*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA02),
280*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA03),
281*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA04),
282*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA05),
283*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA06),
284*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA07),
285*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_RE_B),
286*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_READY_B),
287*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WE_B),
288*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WP_B),
289*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA0),
290*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA1),
291*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA2),
292*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA3),
293*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DQS),
294*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SCLK),
295*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS0_B),
296*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS1_B),
297*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA0),
298*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA1),
299*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA2),
300*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA3),
301*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DQS),
302*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SCLK),
303*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS0_B),
304*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS1_B),
305*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD0),
306*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD1),
307*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD2),
308*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD3),
309*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RX_CTL),
310*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RXC),
311*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD0),
312*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD1),
313*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD2),
314*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD3),
315*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TX_CTL),
316*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TXC),
317*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD0),
318*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD1),
319*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD2),
320*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD3),
321*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RX_CTL),
322*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RXC),
323*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD0),
324*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD1),
325*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD2),
326*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD3),
327*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TX_CTL),
328*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TXC),
329*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CLK),
330*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CMD),
331*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA0),
332*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA1),
333*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA2),
334*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA3),
335*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CLK),
336*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CMD),
337*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA0),
338*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA1),
339*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA2),
340*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA3),
341*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CLK),
342*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CMD),
343*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA0),
344*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA1),
345*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA2),
346*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA3),
347*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA4),
348*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA5),
349*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA6),
350*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA7),
351*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CLK),
352*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CMD),
353*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA0),
354*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA1),
355*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA2),
356*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA3),
357*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA4),
358*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA5),
359*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA6),
360*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA7),
361*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_SD4_RESET_B),
362*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_DATA),
363*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_STROBE),
364*4882a593Smuzhiyun };
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun static const struct imx_pinctrl_soc_info imx6sx_pinctrl_info = {
367*4882a593Smuzhiyun .pins = imx6sx_pinctrl_pads,
368*4882a593Smuzhiyun .npins = ARRAY_SIZE(imx6sx_pinctrl_pads),
369*4882a593Smuzhiyun .gpr_compatible = "fsl,imx6sx-iomuxc-gpr",
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun static const struct of_device_id imx6sx_pinctrl_of_match[] = {
373*4882a593Smuzhiyun { .compatible = "fsl,imx6sx-iomuxc", },
374*4882a593Smuzhiyun { /* sentinel */ }
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun
imx6sx_pinctrl_probe(struct platform_device * pdev)377*4882a593Smuzhiyun static int imx6sx_pinctrl_probe(struct platform_device *pdev)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun return imx_pinctrl_probe(pdev, &imx6sx_pinctrl_info);
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun static struct platform_driver imx6sx_pinctrl_driver = {
383*4882a593Smuzhiyun .driver = {
384*4882a593Smuzhiyun .name = "imx6sx-pinctrl",
385*4882a593Smuzhiyun .of_match_table = of_match_ptr(imx6sx_pinctrl_of_match),
386*4882a593Smuzhiyun },
387*4882a593Smuzhiyun .probe = imx6sx_pinctrl_probe,
388*4882a593Smuzhiyun };
389*4882a593Smuzhiyun
imx6sx_pinctrl_init(void)390*4882a593Smuzhiyun static int __init imx6sx_pinctrl_init(void)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun return platform_driver_register(&imx6sx_pinctrl_driver);
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun arch_initcall(imx6sx_pinctrl_init);
395