xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/freescale/pinctrl-imx6sl.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Freescale imx6sl pinctrl driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Author: Shawn Guo <shawn.guo@linaro.org>
6*4882a593Smuzhiyun // Copyright (C) 2013 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include "pinctrl-imx.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun enum imx6sl_pads {
18*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE0 = 0,
19*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE1 = 1,
20*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE2 = 2,
21*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE3 = 3,
22*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE4 = 4,
23*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE5 = 5,
24*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE6 = 6,
25*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE7 = 7,
26*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE8 = 8,
27*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE9 = 9,
28*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE10 = 10,
29*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE11 = 11,
30*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE12 = 12,
31*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE13 = 13,
32*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE14 = 14,
33*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE15 = 15,
34*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE16 = 16,
35*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE17 = 17,
36*4882a593Smuzhiyun 	MX6SL_PAD_RESERVE18 = 18,
37*4882a593Smuzhiyun 	MX6SL_PAD_AUD_MCLK = 19,
38*4882a593Smuzhiyun 	MX6SL_PAD_AUD_RXC = 20,
39*4882a593Smuzhiyun 	MX6SL_PAD_AUD_RXD = 21,
40*4882a593Smuzhiyun 	MX6SL_PAD_AUD_RXFS = 22,
41*4882a593Smuzhiyun 	MX6SL_PAD_AUD_TXC = 23,
42*4882a593Smuzhiyun 	MX6SL_PAD_AUD_TXD = 24,
43*4882a593Smuzhiyun 	MX6SL_PAD_AUD_TXFS = 25,
44*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI1_MISO = 26,
45*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI1_MOSI = 27,
46*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI1_SCLK = 28,
47*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI1_SS0 = 29,
48*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI2_MISO = 30,
49*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI2_MOSI = 31,
50*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI2_SCLK = 32,
51*4882a593Smuzhiyun 	MX6SL_PAD_ECSPI2_SS0 = 33,
52*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_BDR0 = 34,
53*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_BDR1 = 35,
54*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D0 = 36,
55*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D1 = 37,
56*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D10 = 38,
57*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D11 = 39,
58*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D12 = 40,
59*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D13 = 41,
60*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D14 = 42,
61*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D15 = 43,
62*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D2 = 44,
63*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D3 = 45,
64*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D4 = 46,
65*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D5 = 47,
66*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D6 = 48,
67*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D7 = 49,
68*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D8 = 50,
69*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_D9 = 51,
70*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_GDCLK = 52,
71*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_GDOE = 53,
72*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_GDRL = 54,
73*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_GDSP = 55,
74*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRCOM = 56,
75*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRCTRL0 = 57,
76*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRCTRL1 = 58,
77*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRCTRL2 = 59,
78*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRCTRL3 = 60,
79*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRINT = 61,
80*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRSTAT = 62,
81*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_PWRWAKEUP = 63,
82*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDCE0 = 64,
83*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDCE1 = 65,
84*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDCE2 = 66,
85*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDCE3 = 67,
86*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDCLK = 68,
87*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDLE = 69,
88*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDOE = 70,
89*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_SDSHR = 71,
90*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_VCOM0 = 72,
91*4882a593Smuzhiyun 	MX6SL_PAD_EPDC_VCOM1 = 73,
92*4882a593Smuzhiyun 	MX6SL_PAD_FEC_CRS_DV = 74,
93*4882a593Smuzhiyun 	MX6SL_PAD_FEC_MDC = 75,
94*4882a593Smuzhiyun 	MX6SL_PAD_FEC_MDIO = 76,
95*4882a593Smuzhiyun 	MX6SL_PAD_FEC_REF_CLK = 77,
96*4882a593Smuzhiyun 	MX6SL_PAD_FEC_RX_ER = 78,
97*4882a593Smuzhiyun 	MX6SL_PAD_FEC_RXD0 = 79,
98*4882a593Smuzhiyun 	MX6SL_PAD_FEC_RXD1 = 80,
99*4882a593Smuzhiyun 	MX6SL_PAD_FEC_TX_CLK = 81,
100*4882a593Smuzhiyun 	MX6SL_PAD_FEC_TX_EN = 82,
101*4882a593Smuzhiyun 	MX6SL_PAD_FEC_TXD0 = 83,
102*4882a593Smuzhiyun 	MX6SL_PAD_FEC_TXD1 = 84,
103*4882a593Smuzhiyun 	MX6SL_PAD_HSIC_DAT = 85,
104*4882a593Smuzhiyun 	MX6SL_PAD_HSIC_STROBE = 86,
105*4882a593Smuzhiyun 	MX6SL_PAD_I2C1_SCL = 87,
106*4882a593Smuzhiyun 	MX6SL_PAD_I2C1_SDA = 88,
107*4882a593Smuzhiyun 	MX6SL_PAD_I2C2_SCL = 89,
108*4882a593Smuzhiyun 	MX6SL_PAD_I2C2_SDA = 90,
109*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL0 = 91,
110*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL1 = 92,
111*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL2 = 93,
112*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL3 = 94,
113*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL4 = 95,
114*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL5 = 96,
115*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL6 = 97,
116*4882a593Smuzhiyun 	MX6SL_PAD_KEY_COL7 = 98,
117*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW0 = 99,
118*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW1 = 100,
119*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW2 = 101,
120*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW3 = 102,
121*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW4 = 103,
122*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW5 = 104,
123*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW6 = 105,
124*4882a593Smuzhiyun 	MX6SL_PAD_KEY_ROW7 = 106,
125*4882a593Smuzhiyun 	MX6SL_PAD_LCD_CLK = 107,
126*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT0 = 108,
127*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT1 = 109,
128*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT10 = 110,
129*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT11 = 111,
130*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT12 = 112,
131*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT13 = 113,
132*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT14 = 114,
133*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT15 = 115,
134*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT16 = 116,
135*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT17 = 117,
136*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT18 = 118,
137*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT19 = 119,
138*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT2 = 120,
139*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT20 = 121,
140*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT21 = 122,
141*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT22 = 123,
142*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT23 = 124,
143*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT3 = 125,
144*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT4 = 126,
145*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT5 = 127,
146*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT6 = 128,
147*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT7 = 129,
148*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT8 = 130,
149*4882a593Smuzhiyun 	MX6SL_PAD_LCD_DAT9 = 131,
150*4882a593Smuzhiyun 	MX6SL_PAD_LCD_ENABLE = 132,
151*4882a593Smuzhiyun 	MX6SL_PAD_LCD_HSYNC = 133,
152*4882a593Smuzhiyun 	MX6SL_PAD_LCD_RESET = 134,
153*4882a593Smuzhiyun 	MX6SL_PAD_LCD_VSYNC = 135,
154*4882a593Smuzhiyun 	MX6SL_PAD_PWM1 = 136,
155*4882a593Smuzhiyun 	MX6SL_PAD_REF_CLK_24M = 137,
156*4882a593Smuzhiyun 	MX6SL_PAD_REF_CLK_32K = 138,
157*4882a593Smuzhiyun 	MX6SL_PAD_SD1_CLK = 139,
158*4882a593Smuzhiyun 	MX6SL_PAD_SD1_CMD = 140,
159*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT0 = 141,
160*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT1 = 142,
161*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT2 = 143,
162*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT3 = 144,
163*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT4 = 145,
164*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT5 = 146,
165*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT6 = 147,
166*4882a593Smuzhiyun 	MX6SL_PAD_SD1_DAT7 = 148,
167*4882a593Smuzhiyun 	MX6SL_PAD_SD2_CLK = 149,
168*4882a593Smuzhiyun 	MX6SL_PAD_SD2_CMD = 150,
169*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT0 = 151,
170*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT1 = 152,
171*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT2 = 153,
172*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT3 = 154,
173*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT4 = 155,
174*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT5 = 156,
175*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT6 = 157,
176*4882a593Smuzhiyun 	MX6SL_PAD_SD2_DAT7 = 158,
177*4882a593Smuzhiyun 	MX6SL_PAD_SD2_RST = 159,
178*4882a593Smuzhiyun 	MX6SL_PAD_SD3_CLK = 160,
179*4882a593Smuzhiyun 	MX6SL_PAD_SD3_CMD = 161,
180*4882a593Smuzhiyun 	MX6SL_PAD_SD3_DAT0 = 162,
181*4882a593Smuzhiyun 	MX6SL_PAD_SD3_DAT1 = 163,
182*4882a593Smuzhiyun 	MX6SL_PAD_SD3_DAT2 = 164,
183*4882a593Smuzhiyun 	MX6SL_PAD_SD3_DAT3 = 165,
184*4882a593Smuzhiyun 	MX6SL_PAD_UART1_RXD = 166,
185*4882a593Smuzhiyun 	MX6SL_PAD_UART1_TXD = 167,
186*4882a593Smuzhiyun 	MX6SL_PAD_WDOG_B = 168,
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun /* Pad names for the pinmux subsystem */
190*4882a593Smuzhiyun static const struct pinctrl_pin_desc imx6sl_pinctrl_pads[] = {
191*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE0),
192*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE1),
193*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE2),
194*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE3),
195*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE4),
196*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE5),
197*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE6),
198*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE7),
199*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE8),
200*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE9),
201*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE10),
202*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE11),
203*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE12),
204*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE13),
205*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE14),
206*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE15),
207*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE16),
208*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE17),
209*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE18),
210*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_MCLK),
211*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXC),
212*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXD),
213*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXFS),
214*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXC),
215*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXD),
216*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXFS),
217*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MISO),
218*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MOSI),
219*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SCLK),
220*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SS0),
221*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MISO),
222*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MOSI),
223*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SCLK),
224*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SS0),
225*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR0),
226*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR1),
227*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D0),
228*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D1),
229*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D10),
230*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D11),
231*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D12),
232*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D13),
233*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D14),
234*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D15),
235*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D2),
236*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D3),
237*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D4),
238*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D5),
239*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D6),
240*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D7),
241*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D8),
242*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D9),
243*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDCLK),
244*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDOE),
245*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDRL),
246*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDSP),
247*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCOM),
248*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL0),
249*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL1),
250*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL2),
251*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL3),
252*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRINT),
253*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRSTAT),
254*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRWAKEUP),
255*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE0),
256*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE1),
257*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE2),
258*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE3),
259*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCLK),
260*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDLE),
261*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDOE),
262*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDSHR),
263*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM0),
264*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM1),
265*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_CRS_DV),
266*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDC),
267*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDIO),
268*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_REF_CLK),
269*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RX_ER),
270*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD0),
271*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD1),
272*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_CLK),
273*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_EN),
274*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD0),
275*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD1),
276*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_DAT),
277*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_STROBE),
278*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SCL),
279*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SDA),
280*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SCL),
281*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SDA),
282*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL0),
283*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL1),
284*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL2),
285*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL3),
286*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL4),
287*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL5),
288*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL6),
289*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL7),
290*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW0),
291*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW1),
292*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW2),
293*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW3),
294*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW4),
295*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW5),
296*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW6),
297*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW7),
298*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_CLK),
299*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT0),
300*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT1),
301*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT10),
302*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT11),
303*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT12),
304*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT13),
305*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT14),
306*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT15),
307*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT16),
308*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT17),
309*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT18),
310*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT19),
311*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT2),
312*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT20),
313*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT21),
314*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT22),
315*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT23),
316*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT3),
317*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT4),
318*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT5),
319*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT6),
320*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT7),
321*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT8),
322*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT9),
323*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_ENABLE),
324*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_HSYNC),
325*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_RESET),
326*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_VSYNC),
327*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_PWM1),
328*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_24M),
329*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_32K),
330*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CLK),
331*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CMD),
332*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT0),
333*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT1),
334*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT2),
335*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT3),
336*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT4),
337*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT5),
338*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT6),
339*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT7),
340*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CLK),
341*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CMD),
342*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT0),
343*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT1),
344*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT2),
345*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT3),
346*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT4),
347*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT5),
348*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT6),
349*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT7),
350*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_RST),
351*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CLK),
352*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CMD),
353*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT0),
354*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT1),
355*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT2),
356*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT3),
357*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_UART1_RXD),
358*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_UART1_TXD),
359*4882a593Smuzhiyun 	IMX_PINCTRL_PIN(MX6SL_PAD_WDOG_B),
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun static const struct imx_pinctrl_soc_info imx6sl_pinctrl_info = {
363*4882a593Smuzhiyun 	.pins = imx6sl_pinctrl_pads,
364*4882a593Smuzhiyun 	.npins = ARRAY_SIZE(imx6sl_pinctrl_pads),
365*4882a593Smuzhiyun 	.gpr_compatible = "fsl,imx6sl-iomuxc-gpr",
366*4882a593Smuzhiyun };
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun static const struct of_device_id imx6sl_pinctrl_of_match[] = {
369*4882a593Smuzhiyun 	{ .compatible = "fsl,imx6sl-iomuxc", },
370*4882a593Smuzhiyun 	{ /* sentinel */ }
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun 
imx6sl_pinctrl_probe(struct platform_device * pdev)373*4882a593Smuzhiyun static int imx6sl_pinctrl_probe(struct platform_device *pdev)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	return imx_pinctrl_probe(pdev, &imx6sl_pinctrl_info);
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun static struct platform_driver imx6sl_pinctrl_driver = {
379*4882a593Smuzhiyun 	.driver = {
380*4882a593Smuzhiyun 		.name = "imx6sl-pinctrl",
381*4882a593Smuzhiyun 		.of_match_table = imx6sl_pinctrl_of_match,
382*4882a593Smuzhiyun 	},
383*4882a593Smuzhiyun 	.probe = imx6sl_pinctrl_probe,
384*4882a593Smuzhiyun };
385*4882a593Smuzhiyun 
imx6sl_pinctrl_init(void)386*4882a593Smuzhiyun static int __init imx6sl_pinctrl_init(void)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun 	return platform_driver_register(&imx6sl_pinctrl_driver);
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun arch_initcall(imx6sl_pinctrl_init);
391