1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Freescale imx6dl pinctrl driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Author: Shawn Guo <shawn.guo@linaro.org>
6*4882a593Smuzhiyun // Copyright (C) 2013 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/of_device.h>
13*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "pinctrl-imx.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun enum imx6dl_pads {
18*4882a593Smuzhiyun MX6DL_PAD_RESERVE0 = 0,
19*4882a593Smuzhiyun MX6DL_PAD_RESERVE1 = 1,
20*4882a593Smuzhiyun MX6DL_PAD_RESERVE2 = 2,
21*4882a593Smuzhiyun MX6DL_PAD_RESERVE3 = 3,
22*4882a593Smuzhiyun MX6DL_PAD_RESERVE4 = 4,
23*4882a593Smuzhiyun MX6DL_PAD_RESERVE5 = 5,
24*4882a593Smuzhiyun MX6DL_PAD_RESERVE6 = 6,
25*4882a593Smuzhiyun MX6DL_PAD_RESERVE7 = 7,
26*4882a593Smuzhiyun MX6DL_PAD_RESERVE8 = 8,
27*4882a593Smuzhiyun MX6DL_PAD_RESERVE9 = 9,
28*4882a593Smuzhiyun MX6DL_PAD_RESERVE10 = 10,
29*4882a593Smuzhiyun MX6DL_PAD_RESERVE11 = 11,
30*4882a593Smuzhiyun MX6DL_PAD_RESERVE12 = 12,
31*4882a593Smuzhiyun MX6DL_PAD_RESERVE13 = 13,
32*4882a593Smuzhiyun MX6DL_PAD_RESERVE14 = 14,
33*4882a593Smuzhiyun MX6DL_PAD_RESERVE15 = 15,
34*4882a593Smuzhiyun MX6DL_PAD_RESERVE16 = 16,
35*4882a593Smuzhiyun MX6DL_PAD_RESERVE17 = 17,
36*4882a593Smuzhiyun MX6DL_PAD_RESERVE18 = 18,
37*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT10 = 19,
38*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT11 = 20,
39*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT12 = 21,
40*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT13 = 22,
41*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT14 = 23,
42*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT15 = 24,
43*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT16 = 25,
44*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT17 = 26,
45*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT18 = 27,
46*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT19 = 28,
47*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT4 = 29,
48*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT5 = 30,
49*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT6 = 31,
50*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT7 = 32,
51*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT8 = 33,
52*4882a593Smuzhiyun MX6DL_PAD_CSI0_DAT9 = 34,
53*4882a593Smuzhiyun MX6DL_PAD_CSI0_DATA_EN = 35,
54*4882a593Smuzhiyun MX6DL_PAD_CSI0_MCLK = 36,
55*4882a593Smuzhiyun MX6DL_PAD_CSI0_PIXCLK = 37,
56*4882a593Smuzhiyun MX6DL_PAD_CSI0_VSYNC = 38,
57*4882a593Smuzhiyun MX6DL_PAD_DI0_DISP_CLK = 39,
58*4882a593Smuzhiyun MX6DL_PAD_DI0_PIN15 = 40,
59*4882a593Smuzhiyun MX6DL_PAD_DI0_PIN2 = 41,
60*4882a593Smuzhiyun MX6DL_PAD_DI0_PIN3 = 42,
61*4882a593Smuzhiyun MX6DL_PAD_DI0_PIN4 = 43,
62*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT0 = 44,
63*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT1 = 45,
64*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT10 = 46,
65*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT11 = 47,
66*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT12 = 48,
67*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT13 = 49,
68*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT14 = 50,
69*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT15 = 51,
70*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT16 = 52,
71*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT17 = 53,
72*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT18 = 54,
73*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT19 = 55,
74*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT2 = 56,
75*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT20 = 57,
76*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT21 = 58,
77*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT22 = 59,
78*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT23 = 60,
79*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT3 = 61,
80*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT4 = 62,
81*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT5 = 63,
82*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT6 = 64,
83*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT7 = 65,
84*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT8 = 66,
85*4882a593Smuzhiyun MX6DL_PAD_DISP0_DAT9 = 67,
86*4882a593Smuzhiyun MX6DL_PAD_EIM_A16 = 68,
87*4882a593Smuzhiyun MX6DL_PAD_EIM_A17 = 69,
88*4882a593Smuzhiyun MX6DL_PAD_EIM_A18 = 70,
89*4882a593Smuzhiyun MX6DL_PAD_EIM_A19 = 71,
90*4882a593Smuzhiyun MX6DL_PAD_EIM_A20 = 72,
91*4882a593Smuzhiyun MX6DL_PAD_EIM_A21 = 73,
92*4882a593Smuzhiyun MX6DL_PAD_EIM_A22 = 74,
93*4882a593Smuzhiyun MX6DL_PAD_EIM_A23 = 75,
94*4882a593Smuzhiyun MX6DL_PAD_EIM_A24 = 76,
95*4882a593Smuzhiyun MX6DL_PAD_EIM_A25 = 77,
96*4882a593Smuzhiyun MX6DL_PAD_EIM_BCLK = 78,
97*4882a593Smuzhiyun MX6DL_PAD_EIM_CS0 = 79,
98*4882a593Smuzhiyun MX6DL_PAD_EIM_CS1 = 80,
99*4882a593Smuzhiyun MX6DL_PAD_EIM_D16 = 81,
100*4882a593Smuzhiyun MX6DL_PAD_EIM_D17 = 82,
101*4882a593Smuzhiyun MX6DL_PAD_EIM_D18 = 83,
102*4882a593Smuzhiyun MX6DL_PAD_EIM_D19 = 84,
103*4882a593Smuzhiyun MX6DL_PAD_EIM_D20 = 85,
104*4882a593Smuzhiyun MX6DL_PAD_EIM_D21 = 86,
105*4882a593Smuzhiyun MX6DL_PAD_EIM_D22 = 87,
106*4882a593Smuzhiyun MX6DL_PAD_EIM_D23 = 88,
107*4882a593Smuzhiyun MX6DL_PAD_EIM_D24 = 89,
108*4882a593Smuzhiyun MX6DL_PAD_EIM_D25 = 90,
109*4882a593Smuzhiyun MX6DL_PAD_EIM_D26 = 91,
110*4882a593Smuzhiyun MX6DL_PAD_EIM_D27 = 92,
111*4882a593Smuzhiyun MX6DL_PAD_EIM_D28 = 93,
112*4882a593Smuzhiyun MX6DL_PAD_EIM_D29 = 94,
113*4882a593Smuzhiyun MX6DL_PAD_EIM_D30 = 95,
114*4882a593Smuzhiyun MX6DL_PAD_EIM_D31 = 96,
115*4882a593Smuzhiyun MX6DL_PAD_EIM_DA0 = 97,
116*4882a593Smuzhiyun MX6DL_PAD_EIM_DA1 = 98,
117*4882a593Smuzhiyun MX6DL_PAD_EIM_DA10 = 99,
118*4882a593Smuzhiyun MX6DL_PAD_EIM_DA11 = 100,
119*4882a593Smuzhiyun MX6DL_PAD_EIM_DA12 = 101,
120*4882a593Smuzhiyun MX6DL_PAD_EIM_DA13 = 102,
121*4882a593Smuzhiyun MX6DL_PAD_EIM_DA14 = 103,
122*4882a593Smuzhiyun MX6DL_PAD_EIM_DA15 = 104,
123*4882a593Smuzhiyun MX6DL_PAD_EIM_DA2 = 105,
124*4882a593Smuzhiyun MX6DL_PAD_EIM_DA3 = 106,
125*4882a593Smuzhiyun MX6DL_PAD_EIM_DA4 = 107,
126*4882a593Smuzhiyun MX6DL_PAD_EIM_DA5 = 108,
127*4882a593Smuzhiyun MX6DL_PAD_EIM_DA6 = 109,
128*4882a593Smuzhiyun MX6DL_PAD_EIM_DA7 = 110,
129*4882a593Smuzhiyun MX6DL_PAD_EIM_DA8 = 111,
130*4882a593Smuzhiyun MX6DL_PAD_EIM_DA9 = 112,
131*4882a593Smuzhiyun MX6DL_PAD_EIM_EB0 = 113,
132*4882a593Smuzhiyun MX6DL_PAD_EIM_EB1 = 114,
133*4882a593Smuzhiyun MX6DL_PAD_EIM_EB2 = 115,
134*4882a593Smuzhiyun MX6DL_PAD_EIM_EB3 = 116,
135*4882a593Smuzhiyun MX6DL_PAD_EIM_LBA = 117,
136*4882a593Smuzhiyun MX6DL_PAD_EIM_OE = 118,
137*4882a593Smuzhiyun MX6DL_PAD_EIM_RW = 119,
138*4882a593Smuzhiyun MX6DL_PAD_EIM_WAIT = 120,
139*4882a593Smuzhiyun MX6DL_PAD_ENET_CRS_DV = 121,
140*4882a593Smuzhiyun MX6DL_PAD_ENET_MDC = 122,
141*4882a593Smuzhiyun MX6DL_PAD_ENET_MDIO = 123,
142*4882a593Smuzhiyun MX6DL_PAD_ENET_REF_CLK = 124,
143*4882a593Smuzhiyun MX6DL_PAD_ENET_RX_ER = 125,
144*4882a593Smuzhiyun MX6DL_PAD_ENET_RXD0 = 126,
145*4882a593Smuzhiyun MX6DL_PAD_ENET_RXD1 = 127,
146*4882a593Smuzhiyun MX6DL_PAD_ENET_TX_EN = 128,
147*4882a593Smuzhiyun MX6DL_PAD_ENET_TXD0 = 129,
148*4882a593Smuzhiyun MX6DL_PAD_ENET_TXD1 = 130,
149*4882a593Smuzhiyun MX6DL_PAD_GPIO_0 = 131,
150*4882a593Smuzhiyun MX6DL_PAD_GPIO_1 = 132,
151*4882a593Smuzhiyun MX6DL_PAD_GPIO_16 = 133,
152*4882a593Smuzhiyun MX6DL_PAD_GPIO_17 = 134,
153*4882a593Smuzhiyun MX6DL_PAD_GPIO_18 = 135,
154*4882a593Smuzhiyun MX6DL_PAD_GPIO_19 = 136,
155*4882a593Smuzhiyun MX6DL_PAD_GPIO_2 = 137,
156*4882a593Smuzhiyun MX6DL_PAD_GPIO_3 = 138,
157*4882a593Smuzhiyun MX6DL_PAD_GPIO_4 = 139,
158*4882a593Smuzhiyun MX6DL_PAD_GPIO_5 = 140,
159*4882a593Smuzhiyun MX6DL_PAD_GPIO_6 = 141,
160*4882a593Smuzhiyun MX6DL_PAD_GPIO_7 = 142,
161*4882a593Smuzhiyun MX6DL_PAD_GPIO_8 = 143,
162*4882a593Smuzhiyun MX6DL_PAD_GPIO_9 = 144,
163*4882a593Smuzhiyun MX6DL_PAD_KEY_COL0 = 145,
164*4882a593Smuzhiyun MX6DL_PAD_KEY_COL1 = 146,
165*4882a593Smuzhiyun MX6DL_PAD_KEY_COL2 = 147,
166*4882a593Smuzhiyun MX6DL_PAD_KEY_COL3 = 148,
167*4882a593Smuzhiyun MX6DL_PAD_KEY_COL4 = 149,
168*4882a593Smuzhiyun MX6DL_PAD_KEY_ROW0 = 150,
169*4882a593Smuzhiyun MX6DL_PAD_KEY_ROW1 = 151,
170*4882a593Smuzhiyun MX6DL_PAD_KEY_ROW2 = 152,
171*4882a593Smuzhiyun MX6DL_PAD_KEY_ROW3 = 153,
172*4882a593Smuzhiyun MX6DL_PAD_KEY_ROW4 = 154,
173*4882a593Smuzhiyun MX6DL_PAD_NANDF_ALE = 155,
174*4882a593Smuzhiyun MX6DL_PAD_NANDF_CLE = 156,
175*4882a593Smuzhiyun MX6DL_PAD_NANDF_CS0 = 157,
176*4882a593Smuzhiyun MX6DL_PAD_NANDF_CS1 = 158,
177*4882a593Smuzhiyun MX6DL_PAD_NANDF_CS2 = 159,
178*4882a593Smuzhiyun MX6DL_PAD_NANDF_CS3 = 160,
179*4882a593Smuzhiyun MX6DL_PAD_NANDF_D0 = 161,
180*4882a593Smuzhiyun MX6DL_PAD_NANDF_D1 = 162,
181*4882a593Smuzhiyun MX6DL_PAD_NANDF_D2 = 163,
182*4882a593Smuzhiyun MX6DL_PAD_NANDF_D3 = 164,
183*4882a593Smuzhiyun MX6DL_PAD_NANDF_D4 = 165,
184*4882a593Smuzhiyun MX6DL_PAD_NANDF_D5 = 166,
185*4882a593Smuzhiyun MX6DL_PAD_NANDF_D6 = 167,
186*4882a593Smuzhiyun MX6DL_PAD_NANDF_D7 = 168,
187*4882a593Smuzhiyun MX6DL_PAD_NANDF_RB0 = 169,
188*4882a593Smuzhiyun MX6DL_PAD_NANDF_WP_B = 170,
189*4882a593Smuzhiyun MX6DL_PAD_RGMII_RD0 = 171,
190*4882a593Smuzhiyun MX6DL_PAD_RGMII_RD1 = 172,
191*4882a593Smuzhiyun MX6DL_PAD_RGMII_RD2 = 173,
192*4882a593Smuzhiyun MX6DL_PAD_RGMII_RD3 = 174,
193*4882a593Smuzhiyun MX6DL_PAD_RGMII_RX_CTL = 175,
194*4882a593Smuzhiyun MX6DL_PAD_RGMII_RXC = 176,
195*4882a593Smuzhiyun MX6DL_PAD_RGMII_TD0 = 177,
196*4882a593Smuzhiyun MX6DL_PAD_RGMII_TD1 = 178,
197*4882a593Smuzhiyun MX6DL_PAD_RGMII_TD2 = 179,
198*4882a593Smuzhiyun MX6DL_PAD_RGMII_TD3 = 180,
199*4882a593Smuzhiyun MX6DL_PAD_RGMII_TX_CTL = 181,
200*4882a593Smuzhiyun MX6DL_PAD_RGMII_TXC = 182,
201*4882a593Smuzhiyun MX6DL_PAD_SD1_CLK = 183,
202*4882a593Smuzhiyun MX6DL_PAD_SD1_CMD = 184,
203*4882a593Smuzhiyun MX6DL_PAD_SD1_DAT0 = 185,
204*4882a593Smuzhiyun MX6DL_PAD_SD1_DAT1 = 186,
205*4882a593Smuzhiyun MX6DL_PAD_SD1_DAT2 = 187,
206*4882a593Smuzhiyun MX6DL_PAD_SD1_DAT3 = 188,
207*4882a593Smuzhiyun MX6DL_PAD_SD2_CLK = 189,
208*4882a593Smuzhiyun MX6DL_PAD_SD2_CMD = 190,
209*4882a593Smuzhiyun MX6DL_PAD_SD2_DAT0 = 191,
210*4882a593Smuzhiyun MX6DL_PAD_SD2_DAT1 = 192,
211*4882a593Smuzhiyun MX6DL_PAD_SD2_DAT2 = 193,
212*4882a593Smuzhiyun MX6DL_PAD_SD2_DAT3 = 194,
213*4882a593Smuzhiyun MX6DL_PAD_SD3_CLK = 195,
214*4882a593Smuzhiyun MX6DL_PAD_SD3_CMD = 196,
215*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT0 = 197,
216*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT1 = 198,
217*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT2 = 199,
218*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT3 = 200,
219*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT4 = 201,
220*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT5 = 202,
221*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT6 = 203,
222*4882a593Smuzhiyun MX6DL_PAD_SD3_DAT7 = 204,
223*4882a593Smuzhiyun MX6DL_PAD_SD3_RST = 205,
224*4882a593Smuzhiyun MX6DL_PAD_SD4_CLK = 206,
225*4882a593Smuzhiyun MX6DL_PAD_SD4_CMD = 207,
226*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT0 = 208,
227*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT1 = 209,
228*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT2 = 210,
229*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT3 = 211,
230*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT4 = 212,
231*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT5 = 213,
232*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT6 = 214,
233*4882a593Smuzhiyun MX6DL_PAD_SD4_DAT7 = 215,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /* Pad names for the pinmux subsystem */
237*4882a593Smuzhiyun static const struct pinctrl_pin_desc imx6dl_pinctrl_pads[] = {
238*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE0),
239*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE1),
240*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE2),
241*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE3),
242*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE4),
243*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE5),
244*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE6),
245*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE7),
246*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE8),
247*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE9),
248*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE10),
249*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE11),
250*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE12),
251*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE13),
252*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE14),
253*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE15),
254*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE16),
255*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE17),
256*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE18),
257*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT10),
258*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT11),
259*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT12),
260*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT13),
261*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT14),
262*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT15),
263*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT16),
264*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT17),
265*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT18),
266*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT19),
267*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT4),
268*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT5),
269*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT6),
270*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT7),
271*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT8),
272*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT9),
273*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DATA_EN),
274*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_MCLK),
275*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_PIXCLK),
276*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_VSYNC),
277*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DI0_DISP_CLK),
278*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN15),
279*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN2),
280*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN3),
281*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN4),
282*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT0),
283*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT1),
284*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT10),
285*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT11),
286*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT12),
287*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT13),
288*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT14),
289*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT15),
290*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT16),
291*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT17),
292*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT18),
293*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT19),
294*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT2),
295*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT20),
296*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT21),
297*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT22),
298*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT23),
299*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT3),
300*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT4),
301*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT5),
302*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT6),
303*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT7),
304*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT8),
305*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT9),
306*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A16),
307*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A17),
308*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A18),
309*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A19),
310*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A20),
311*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A21),
312*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A22),
313*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A23),
314*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A24),
315*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A25),
316*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_BCLK),
317*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS0),
318*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS1),
319*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D16),
320*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D17),
321*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D18),
322*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D19),
323*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D20),
324*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D21),
325*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D22),
326*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D23),
327*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D24),
328*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D25),
329*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D26),
330*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D27),
331*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D28),
332*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D29),
333*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D30),
334*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D31),
335*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA0),
336*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA1),
337*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA10),
338*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA11),
339*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA12),
340*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA13),
341*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA14),
342*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA15),
343*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA2),
344*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA3),
345*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA4),
346*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA5),
347*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA6),
348*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA7),
349*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA8),
350*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA9),
351*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB0),
352*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB1),
353*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB2),
354*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB3),
355*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_LBA),
356*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_OE),
357*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_RW),
358*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_EIM_WAIT),
359*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_CRS_DV),
360*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDC),
361*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDIO),
362*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_REF_CLK),
363*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RX_ER),
364*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD0),
365*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD1),
366*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TX_EN),
367*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD0),
368*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD1),
369*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_0),
370*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_1),
371*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_16),
372*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_17),
373*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_18),
374*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_19),
375*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_2),
376*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_3),
377*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_4),
378*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_5),
379*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_6),
380*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_7),
381*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_8),
382*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_9),
383*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL0),
384*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL1),
385*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL2),
386*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL3),
387*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL4),
388*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW0),
389*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW1),
390*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW2),
391*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW3),
392*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW4),
393*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_ALE),
394*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CLE),
395*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS0),
396*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS1),
397*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS2),
398*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS3),
399*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D0),
400*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D1),
401*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D2),
402*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D3),
403*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D4),
404*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D5),
405*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D6),
406*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D7),
407*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_RB0),
408*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_WP_B),
409*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD0),
410*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD1),
411*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD2),
412*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD3),
413*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RX_CTL),
414*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RXC),
415*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD0),
416*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD1),
417*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD2),
418*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD3),
419*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TX_CTL),
420*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TXC),
421*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CLK),
422*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CMD),
423*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT0),
424*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT1),
425*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT2),
426*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT3),
427*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CLK),
428*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CMD),
429*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT0),
430*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT1),
431*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT2),
432*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT3),
433*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CLK),
434*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CMD),
435*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT0),
436*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT1),
437*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT2),
438*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT3),
439*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT4),
440*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT5),
441*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT6),
442*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT7),
443*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD3_RST),
444*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CLK),
445*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CMD),
446*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT0),
447*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT1),
448*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT2),
449*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT3),
450*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT4),
451*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT5),
452*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT6),
453*4882a593Smuzhiyun IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT7),
454*4882a593Smuzhiyun };
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun static const struct imx_pinctrl_soc_info imx6dl_pinctrl_info = {
457*4882a593Smuzhiyun .pins = imx6dl_pinctrl_pads,
458*4882a593Smuzhiyun .npins = ARRAY_SIZE(imx6dl_pinctrl_pads),
459*4882a593Smuzhiyun .gpr_compatible = "fsl,imx6q-iomuxc-gpr",
460*4882a593Smuzhiyun };
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun static const struct of_device_id imx6dl_pinctrl_of_match[] = {
463*4882a593Smuzhiyun { .compatible = "fsl,imx6dl-iomuxc", },
464*4882a593Smuzhiyun { /* sentinel */ }
465*4882a593Smuzhiyun };
466*4882a593Smuzhiyun
imx6dl_pinctrl_probe(struct platform_device * pdev)467*4882a593Smuzhiyun static int imx6dl_pinctrl_probe(struct platform_device *pdev)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun return imx_pinctrl_probe(pdev, &imx6dl_pinctrl_info);
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun static struct platform_driver imx6dl_pinctrl_driver = {
473*4882a593Smuzhiyun .driver = {
474*4882a593Smuzhiyun .name = "imx6dl-pinctrl",
475*4882a593Smuzhiyun .of_match_table = imx6dl_pinctrl_of_match,
476*4882a593Smuzhiyun },
477*4882a593Smuzhiyun .probe = imx6dl_pinctrl_probe,
478*4882a593Smuzhiyun };
479*4882a593Smuzhiyun
imx6dl_pinctrl_init(void)480*4882a593Smuzhiyun static int __init imx6dl_pinctrl_init(void)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun return platform_driver_register(&imx6dl_pinctrl_driver);
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun arch_initcall(imx6dl_pinctrl_init);
485