1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun# 3*4882a593Smuzhiyun# Broadcom pinctrl drivers 4*4882a593Smuzhiyun# 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunconfig PINCTRL_BCM281XX 7*4882a593Smuzhiyun bool "Broadcom BCM281xx pinctrl driver" 8*4882a593Smuzhiyun depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST) 9*4882a593Smuzhiyun select PINMUX 10*4882a593Smuzhiyun select PINCONF 11*4882a593Smuzhiyun select GENERIC_PINCONF 12*4882a593Smuzhiyun select REGMAP_MMIO 13*4882a593Smuzhiyun default ARCH_BCM_MOBILE 14*4882a593Smuzhiyun help 15*4882a593Smuzhiyun Say Y here to support Broadcom BCM281xx pinctrl driver, which is used 16*4882a593Smuzhiyun for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351, 17*4882a593Smuzhiyun BCM28145, and BCM28155 SoCs. This driver requires the pinctrl 18*4882a593Smuzhiyun framework. GPIO is provided by a separate GPIO driver. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunconfig PINCTRL_BCM2835 21*4882a593Smuzhiyun bool "Broadcom BCM2835 GPIO (with PINCONF) driver" 22*4882a593Smuzhiyun depends on OF && (ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST) 23*4882a593Smuzhiyun select PINMUX 24*4882a593Smuzhiyun select PINCONF 25*4882a593Smuzhiyun select GENERIC_PINCONF 26*4882a593Smuzhiyun select GPIOLIB 27*4882a593Smuzhiyun select GPIOLIB_IRQCHIP 28*4882a593Smuzhiyun default ARCH_BCM2835 || ARCH_BRCMSTB 29*4882a593Smuzhiyun help 30*4882a593Smuzhiyun Say Y here to enable the Broadcom BCM2835 GPIO driver. 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunconfig PINCTRL_IPROC_GPIO 33*4882a593Smuzhiyun bool "Broadcom iProc GPIO (with PINCONF) driver" 34*4882a593Smuzhiyun depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST) 35*4882a593Smuzhiyun select GPIOLIB_IRQCHIP 36*4882a593Smuzhiyun select PINCONF 37*4882a593Smuzhiyun select GENERIC_PINCONF 38*4882a593Smuzhiyun default ARCH_BCM_IPROC 39*4882a593Smuzhiyun help 40*4882a593Smuzhiyun Say yes here to enable the Broadcom iProc GPIO driver. 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use 43*4882a593Smuzhiyun same GPIO Controller IP hence this driver could be used for all. 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU 46*4882a593Smuzhiyun GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and 47*4882a593Smuzhiyun the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are 48*4882a593Smuzhiyun supported by this driver. 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun The Broadcom NSP has two GPIO controllers including the ChipcommonA 51*4882a593Smuzhiyun GPIO, the ChipcommonB GPIO. Later controller is supported by this 52*4882a593Smuzhiyun driver. 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun The Broadcom NS2 has two GPIO controller including the CRMU GPIO, 55*4882a593Smuzhiyun the ChipcommonG GPIO. Both controllers are supported by this driver. 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun The Broadcom Stingray GPIO controllers are supported by this driver. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun All above SoCs GPIO controllers support basic PINCONF functions such 60*4882a593Smuzhiyun as bias pull up, pull down, and drive strength configurations, when 61*4882a593Smuzhiyun these pins are muxed to GPIO. 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun It provides the framework where pins from the individual GPIO can be 64*4882a593Smuzhiyun individually muxed to GPIO function, through interaction with the 65*4882a593Smuzhiyun SoCs IOMUX controller. This features could be used only on SoCs which 66*4882a593Smuzhiyun support individual pin muxing. 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunconfig PINCTRL_CYGNUS_MUX 69*4882a593Smuzhiyun bool "Broadcom Cygnus IOMUX driver" 70*4882a593Smuzhiyun depends on (ARCH_BCM_CYGNUS || COMPILE_TEST) 71*4882a593Smuzhiyun depends on OF 72*4882a593Smuzhiyun select PINMUX 73*4882a593Smuzhiyun select GENERIC_PINCONF 74*4882a593Smuzhiyun default ARCH_BCM_CYGNUS 75*4882a593Smuzhiyun help 76*4882a593Smuzhiyun Say yes here to enable the Broadcom Cygnus IOMUX driver. 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun The Broadcom Cygnus IOMUX driver supports group based IOMUX 79*4882a593Smuzhiyun configuration, with the exception that certain individual pins 80*4882a593Smuzhiyun can be overridden to GPIO function 81*4882a593Smuzhiyun 82*4882a593Smuzhiyunconfig PINCTRL_NS 83*4882a593Smuzhiyun bool "Broadcom Northstar pins driver" 84*4882a593Smuzhiyun depends on OF && (ARCH_BCM_5301X || COMPILE_TEST) 85*4882a593Smuzhiyun select PINMUX 86*4882a593Smuzhiyun select GENERIC_PINCONF 87*4882a593Smuzhiyun default ARCH_BCM_5301X 88*4882a593Smuzhiyun help 89*4882a593Smuzhiyun Say yes here to enable the Broadcom NS SoC pins driver. 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun The Broadcom Northstar pins driver supports muxing multi-purpose pins 92*4882a593Smuzhiyun that can be used for various functions (e.g. SPI, I2C, UART) as well 93*4882a593Smuzhiyun as GPIOs. 94*4882a593Smuzhiyun 95*4882a593Smuzhiyunconfig PINCTRL_NSP_GPIO 96*4882a593Smuzhiyun bool "Broadcom NSP GPIO (with PINCONF) driver" 97*4882a593Smuzhiyun depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST) 98*4882a593Smuzhiyun select GPIOLIB_IRQCHIP 99*4882a593Smuzhiyun select PINCONF 100*4882a593Smuzhiyun select GENERIC_PINCONF 101*4882a593Smuzhiyun default ARCH_BCM_NSP 102*4882a593Smuzhiyun help 103*4882a593Smuzhiyun Say yes here to enable the Broadcom NSP GPIO driver. 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is 106*4882a593Smuzhiyun supported by this driver. 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun The ChipcommonA GPIO controller support basic PINCONF functions such 109*4882a593Smuzhiyun as bias pull up, pull down, and drive strength configurations, when 110*4882a593Smuzhiyun these pins are muxed to GPIO. 111*4882a593Smuzhiyun 112*4882a593Smuzhiyunconfig PINCTRL_NS2_MUX 113*4882a593Smuzhiyun bool "Broadcom Northstar2 pinmux driver" 114*4882a593Smuzhiyun depends on OF 115*4882a593Smuzhiyun depends on ARCH_BCM_IPROC || COMPILE_TEST 116*4882a593Smuzhiyun select PINMUX 117*4882a593Smuzhiyun select GENERIC_PINCONF 118*4882a593Smuzhiyun default ARM64 && ARCH_BCM_IPROC 119*4882a593Smuzhiyun help 120*4882a593Smuzhiyun Say yes here to enable the Broadcom NS2 MUX driver. 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun The Broadcom Northstar2 IOMUX driver supports group based IOMUX 123*4882a593Smuzhiyun configuration. 124*4882a593Smuzhiyun 125*4882a593Smuzhiyunconfig PINCTRL_NSP_MUX 126*4882a593Smuzhiyun bool "Broadcom NSP IOMUX driver" 127*4882a593Smuzhiyun depends on (ARCH_BCM_NSP || COMPILE_TEST) 128*4882a593Smuzhiyun depends on OF 129*4882a593Smuzhiyun select PINMUX 130*4882a593Smuzhiyun select GENERIC_PINCONF 131*4882a593Smuzhiyun default ARCH_BCM_NSP 132*4882a593Smuzhiyun help 133*4882a593Smuzhiyun Say yes here to enable the Broadcom NSP SOC IOMUX driver. 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX 136*4882a593Smuzhiyun configuration, with certain individual pins can be overridden 137*4882a593Smuzhiyun to GPIO function. 138