xref: /OK3568_Linux_fs/kernel/drivers/phy/tegra/xusb.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
4*4882a593Smuzhiyun  * Copyright (c) 2015, Google Inc.
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef __PHY_TEGRA_XUSB_H
8*4882a593Smuzhiyun #define __PHY_TEGRA_XUSB_H
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/mutex.h>
12*4882a593Smuzhiyun #include <linux/workqueue.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/usb/otg.h>
15*4882a593Smuzhiyun #include <linux/usb/role.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /* legacy entry points for backwards-compatibility */
18*4882a593Smuzhiyun int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
19*4882a593Smuzhiyun int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun struct phy;
22*4882a593Smuzhiyun struct phy_provider;
23*4882a593Smuzhiyun struct platform_device;
24*4882a593Smuzhiyun struct regulator;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun  * lanes
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun struct tegra_xusb_lane_soc {
30*4882a593Smuzhiyun 	const char *name;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	unsigned int offset;
33*4882a593Smuzhiyun 	unsigned int shift;
34*4882a593Smuzhiyun 	unsigned int mask;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	const char * const *funcs;
37*4882a593Smuzhiyun 	unsigned int num_funcs;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun struct tegra_xusb_lane {
41*4882a593Smuzhiyun 	const struct tegra_xusb_lane_soc *soc;
42*4882a593Smuzhiyun 	struct tegra_xusb_pad *pad;
43*4882a593Smuzhiyun 	struct device_node *np;
44*4882a593Smuzhiyun 	struct list_head list;
45*4882a593Smuzhiyun 	unsigned int function;
46*4882a593Smuzhiyun 	unsigned int index;
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
50*4882a593Smuzhiyun 			     struct device_node *np);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun struct tegra_xusb_usb3_lane {
53*4882a593Smuzhiyun 	struct tegra_xusb_lane base;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun static inline struct tegra_xusb_usb3_lane *
to_usb3_lane(struct tegra_xusb_lane * lane)57*4882a593Smuzhiyun to_usb3_lane(struct tegra_xusb_lane *lane)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	return container_of(lane, struct tegra_xusb_usb3_lane, base);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun struct tegra_xusb_usb2_lane {
63*4882a593Smuzhiyun 	struct tegra_xusb_lane base;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	u32 hs_curr_level_offset;
66*4882a593Smuzhiyun 	bool powered_on;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun static inline struct tegra_xusb_usb2_lane *
to_usb2_lane(struct tegra_xusb_lane * lane)70*4882a593Smuzhiyun to_usb2_lane(struct tegra_xusb_lane *lane)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	return container_of(lane, struct tegra_xusb_usb2_lane, base);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun struct tegra_xusb_ulpi_lane {
76*4882a593Smuzhiyun 	struct tegra_xusb_lane base;
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun static inline struct tegra_xusb_ulpi_lane *
to_ulpi_lane(struct tegra_xusb_lane * lane)80*4882a593Smuzhiyun to_ulpi_lane(struct tegra_xusb_lane *lane)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	return container_of(lane, struct tegra_xusb_ulpi_lane, base);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun struct tegra_xusb_hsic_lane {
86*4882a593Smuzhiyun 	struct tegra_xusb_lane base;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	u32 strobe_trim;
89*4882a593Smuzhiyun 	u32 rx_strobe_trim;
90*4882a593Smuzhiyun 	u32 rx_data_trim;
91*4882a593Smuzhiyun 	u32 tx_rtune_n;
92*4882a593Smuzhiyun 	u32 tx_rtune_p;
93*4882a593Smuzhiyun 	u32 tx_rslew_n;
94*4882a593Smuzhiyun 	u32 tx_rslew_p;
95*4882a593Smuzhiyun 	bool auto_term;
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun static inline struct tegra_xusb_hsic_lane *
to_hsic_lane(struct tegra_xusb_lane * lane)99*4882a593Smuzhiyun to_hsic_lane(struct tegra_xusb_lane *lane)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	return container_of(lane, struct tegra_xusb_hsic_lane, base);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun struct tegra_xusb_pcie_lane {
105*4882a593Smuzhiyun 	struct tegra_xusb_lane base;
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun static inline struct tegra_xusb_pcie_lane *
to_pcie_lane(struct tegra_xusb_lane * lane)109*4882a593Smuzhiyun to_pcie_lane(struct tegra_xusb_lane *lane)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	return container_of(lane, struct tegra_xusb_pcie_lane, base);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun struct tegra_xusb_sata_lane {
115*4882a593Smuzhiyun 	struct tegra_xusb_lane base;
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun static inline struct tegra_xusb_sata_lane *
to_sata_lane(struct tegra_xusb_lane * lane)119*4882a593Smuzhiyun to_sata_lane(struct tegra_xusb_lane *lane)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	return container_of(lane, struct tegra_xusb_sata_lane, base);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun struct tegra_xusb_lane_ops {
125*4882a593Smuzhiyun 	struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
126*4882a593Smuzhiyun 					 struct device_node *np,
127*4882a593Smuzhiyun 					 unsigned int index);
128*4882a593Smuzhiyun 	void (*remove)(struct tegra_xusb_lane *lane);
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /*
132*4882a593Smuzhiyun  * pads
133*4882a593Smuzhiyun  */
134*4882a593Smuzhiyun struct tegra_xusb_pad_soc;
135*4882a593Smuzhiyun struct tegra_xusb_padctl;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun struct tegra_xusb_pad_ops {
138*4882a593Smuzhiyun 	struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
139*4882a593Smuzhiyun 					const struct tegra_xusb_pad_soc *soc,
140*4882a593Smuzhiyun 					struct device_node *np);
141*4882a593Smuzhiyun 	void (*remove)(struct tegra_xusb_pad *pad);
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun struct tegra_xusb_pad_soc {
145*4882a593Smuzhiyun 	const char *name;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	const struct tegra_xusb_lane_soc *lanes;
148*4882a593Smuzhiyun 	unsigned int num_lanes;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	const struct tegra_xusb_pad_ops *ops;
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun struct tegra_xusb_pad {
154*4882a593Smuzhiyun 	const struct tegra_xusb_pad_soc *soc;
155*4882a593Smuzhiyun 	struct tegra_xusb_padctl *padctl;
156*4882a593Smuzhiyun 	struct phy_provider *provider;
157*4882a593Smuzhiyun 	struct phy **lanes;
158*4882a593Smuzhiyun 	struct device dev;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	const struct tegra_xusb_lane_ops *ops;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	struct list_head list;
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun 
to_tegra_xusb_pad(struct device * dev)165*4882a593Smuzhiyun static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	return container_of(dev, struct tegra_xusb_pad, dev);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
171*4882a593Smuzhiyun 			struct tegra_xusb_padctl *padctl,
172*4882a593Smuzhiyun 			struct device_node *np);
173*4882a593Smuzhiyun int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
174*4882a593Smuzhiyun 			    const struct phy_ops *ops);
175*4882a593Smuzhiyun void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun struct tegra_xusb_usb3_pad {
178*4882a593Smuzhiyun 	struct tegra_xusb_pad base;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	unsigned int enable;
181*4882a593Smuzhiyun 	struct mutex lock;
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun static inline struct tegra_xusb_usb3_pad *
to_usb3_pad(struct tegra_xusb_pad * pad)185*4882a593Smuzhiyun to_usb3_pad(struct tegra_xusb_pad *pad)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	return container_of(pad, struct tegra_xusb_usb3_pad, base);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun struct tegra_xusb_usb2_pad {
191*4882a593Smuzhiyun 	struct tegra_xusb_pad base;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	struct clk *clk;
194*4882a593Smuzhiyun 	unsigned int enable;
195*4882a593Smuzhiyun 	struct mutex lock;
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun static inline struct tegra_xusb_usb2_pad *
to_usb2_pad(struct tegra_xusb_pad * pad)199*4882a593Smuzhiyun to_usb2_pad(struct tegra_xusb_pad *pad)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	return container_of(pad, struct tegra_xusb_usb2_pad, base);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun struct tegra_xusb_ulpi_pad {
205*4882a593Smuzhiyun 	struct tegra_xusb_pad base;
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun static inline struct tegra_xusb_ulpi_pad *
to_ulpi_pad(struct tegra_xusb_pad * pad)209*4882a593Smuzhiyun to_ulpi_pad(struct tegra_xusb_pad *pad)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun 	return container_of(pad, struct tegra_xusb_ulpi_pad, base);
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun struct tegra_xusb_hsic_pad {
215*4882a593Smuzhiyun 	struct tegra_xusb_pad base;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	struct regulator *supply;
218*4882a593Smuzhiyun 	struct clk *clk;
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun static inline struct tegra_xusb_hsic_pad *
to_hsic_pad(struct tegra_xusb_pad * pad)222*4882a593Smuzhiyun to_hsic_pad(struct tegra_xusb_pad *pad)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	return container_of(pad, struct tegra_xusb_hsic_pad, base);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun struct tegra_xusb_pcie_pad {
228*4882a593Smuzhiyun 	struct tegra_xusb_pad base;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	struct reset_control *rst;
231*4882a593Smuzhiyun 	struct clk *pll;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	unsigned int enable;
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun static inline struct tegra_xusb_pcie_pad *
to_pcie_pad(struct tegra_xusb_pad * pad)237*4882a593Smuzhiyun to_pcie_pad(struct tegra_xusb_pad *pad)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	return container_of(pad, struct tegra_xusb_pcie_pad, base);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun struct tegra_xusb_sata_pad {
243*4882a593Smuzhiyun 	struct tegra_xusb_pad base;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	struct reset_control *rst;
246*4882a593Smuzhiyun 	struct clk *pll;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	unsigned int enable;
249*4882a593Smuzhiyun };
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun static inline struct tegra_xusb_sata_pad *
to_sata_pad(struct tegra_xusb_pad * pad)252*4882a593Smuzhiyun to_sata_pad(struct tegra_xusb_pad *pad)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun 	return container_of(pad, struct tegra_xusb_sata_pad, base);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun /*
258*4882a593Smuzhiyun  * ports
259*4882a593Smuzhiyun  */
260*4882a593Smuzhiyun struct tegra_xusb_port_ops;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun struct tegra_xusb_port {
263*4882a593Smuzhiyun 	struct tegra_xusb_padctl *padctl;
264*4882a593Smuzhiyun 	struct tegra_xusb_lane *lane;
265*4882a593Smuzhiyun 	unsigned int index;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	struct list_head list;
268*4882a593Smuzhiyun 	struct device dev;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	struct usb_role_switch *usb_role_sw;
271*4882a593Smuzhiyun 	struct work_struct usb_phy_work;
272*4882a593Smuzhiyun 	struct usb_phy usb_phy;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	const struct tegra_xusb_port_ops *ops;
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun 
to_tegra_xusb_port(struct device * dev)277*4882a593Smuzhiyun static inline struct tegra_xusb_port *to_tegra_xusb_port(struct device *dev)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun 	return container_of(dev, struct tegra_xusb_port, dev);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun struct tegra_xusb_lane_map {
283*4882a593Smuzhiyun 	unsigned int port;
284*4882a593Smuzhiyun 	const char *type;
285*4882a593Smuzhiyun 	unsigned int index;
286*4882a593Smuzhiyun 	const char *func;
287*4882a593Smuzhiyun };
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun struct tegra_xusb_lane *
290*4882a593Smuzhiyun tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
291*4882a593Smuzhiyun 			  const struct tegra_xusb_lane_map *map,
292*4882a593Smuzhiyun 			  const char *function);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun struct tegra_xusb_port *
295*4882a593Smuzhiyun tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
296*4882a593Smuzhiyun 		     unsigned int index);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun struct tegra_xusb_usb2_port {
299*4882a593Smuzhiyun 	struct tegra_xusb_port base;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	struct regulator *supply;
302*4882a593Smuzhiyun 	enum usb_dr_mode mode;
303*4882a593Smuzhiyun 	bool internal;
304*4882a593Smuzhiyun 	int usb3_port_fake;
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun static inline struct tegra_xusb_usb2_port *
to_usb2_port(struct tegra_xusb_port * port)308*4882a593Smuzhiyun to_usb2_port(struct tegra_xusb_port *port)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	return container_of(port, struct tegra_xusb_usb2_port, base);
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun struct tegra_xusb_usb2_port *
314*4882a593Smuzhiyun tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
315*4882a593Smuzhiyun 			  unsigned int index);
316*4882a593Smuzhiyun void tegra_xusb_usb2_port_release(struct tegra_xusb_port *port);
317*4882a593Smuzhiyun void tegra_xusb_usb2_port_remove(struct tegra_xusb_port *port);
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun struct tegra_xusb_ulpi_port {
320*4882a593Smuzhiyun 	struct tegra_xusb_port base;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	struct regulator *supply;
323*4882a593Smuzhiyun 	bool internal;
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun static inline struct tegra_xusb_ulpi_port *
to_ulpi_port(struct tegra_xusb_port * port)327*4882a593Smuzhiyun to_ulpi_port(struct tegra_xusb_port *port)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun 	return container_of(port, struct tegra_xusb_ulpi_port, base);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun void tegra_xusb_ulpi_port_release(struct tegra_xusb_port *port);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun struct tegra_xusb_hsic_port {
335*4882a593Smuzhiyun 	struct tegra_xusb_port base;
336*4882a593Smuzhiyun };
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun static inline struct tegra_xusb_hsic_port *
to_hsic_port(struct tegra_xusb_port * port)339*4882a593Smuzhiyun to_hsic_port(struct tegra_xusb_port *port)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun 	return container_of(port, struct tegra_xusb_hsic_port, base);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun void tegra_xusb_hsic_port_release(struct tegra_xusb_port *port);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun struct tegra_xusb_usb3_port {
347*4882a593Smuzhiyun 	struct tegra_xusb_port base;
348*4882a593Smuzhiyun 	struct regulator *supply;
349*4882a593Smuzhiyun 	bool context_saved;
350*4882a593Smuzhiyun 	unsigned int port;
351*4882a593Smuzhiyun 	bool internal;
352*4882a593Smuzhiyun 	bool disable_gen2;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	u32 tap1;
355*4882a593Smuzhiyun 	u32 amp;
356*4882a593Smuzhiyun 	u32 ctle_z;
357*4882a593Smuzhiyun 	u32 ctle_g;
358*4882a593Smuzhiyun };
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun static inline struct tegra_xusb_usb3_port *
to_usb3_port(struct tegra_xusb_port * port)361*4882a593Smuzhiyun to_usb3_port(struct tegra_xusb_port *port)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun 	return container_of(port, struct tegra_xusb_usb3_port, base);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun struct tegra_xusb_usb3_port *
367*4882a593Smuzhiyun tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
368*4882a593Smuzhiyun 			  unsigned int index);
369*4882a593Smuzhiyun void tegra_xusb_usb3_port_release(struct tegra_xusb_port *port);
370*4882a593Smuzhiyun void tegra_xusb_usb3_port_remove(struct tegra_xusb_port *port);
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun struct tegra_xusb_port_ops {
373*4882a593Smuzhiyun 	void (*release)(struct tegra_xusb_port *port);
374*4882a593Smuzhiyun 	void (*remove)(struct tegra_xusb_port *port);
375*4882a593Smuzhiyun 	int (*enable)(struct tegra_xusb_port *port);
376*4882a593Smuzhiyun 	void (*disable)(struct tegra_xusb_port *port);
377*4882a593Smuzhiyun 	struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
378*4882a593Smuzhiyun };
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun /*
381*4882a593Smuzhiyun  * pad controller
382*4882a593Smuzhiyun  */
383*4882a593Smuzhiyun struct tegra_xusb_padctl_soc;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun struct tegra_xusb_padctl_ops {
386*4882a593Smuzhiyun 	struct tegra_xusb_padctl *
387*4882a593Smuzhiyun 		(*probe)(struct device *dev,
388*4882a593Smuzhiyun 			 const struct tegra_xusb_padctl_soc *soc);
389*4882a593Smuzhiyun 	void (*remove)(struct tegra_xusb_padctl *padctl);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
392*4882a593Smuzhiyun 				 unsigned int index);
393*4882a593Smuzhiyun 	int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
394*4882a593Smuzhiyun 			     unsigned int index, bool idle);
395*4882a593Smuzhiyun 	int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
396*4882a593Smuzhiyun 				    unsigned int index, bool enable);
397*4882a593Smuzhiyun 	int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set);
398*4882a593Smuzhiyun 	int (*utmi_port_reset)(struct phy *phy);
399*4882a593Smuzhiyun };
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun struct tegra_xusb_padctl_soc {
402*4882a593Smuzhiyun 	const struct tegra_xusb_pad_soc * const *pads;
403*4882a593Smuzhiyun 	unsigned int num_pads;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	struct {
406*4882a593Smuzhiyun 		struct {
407*4882a593Smuzhiyun 			const struct tegra_xusb_port_ops *ops;
408*4882a593Smuzhiyun 			unsigned int count;
409*4882a593Smuzhiyun 		} usb2, ulpi, hsic, usb3;
410*4882a593Smuzhiyun 	} ports;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	const struct tegra_xusb_padctl_ops *ops;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	const char * const *supply_names;
415*4882a593Smuzhiyun 	unsigned int num_supplies;
416*4882a593Smuzhiyun 	bool supports_gen2;
417*4882a593Smuzhiyun 	bool need_fake_usb3_port;
418*4882a593Smuzhiyun };
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun struct tegra_xusb_padctl {
421*4882a593Smuzhiyun 	struct device *dev;
422*4882a593Smuzhiyun 	void __iomem *regs;
423*4882a593Smuzhiyun 	struct mutex lock;
424*4882a593Smuzhiyun 	struct reset_control *rst;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	const struct tegra_xusb_padctl_soc *soc;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	struct tegra_xusb_pad *pcie;
429*4882a593Smuzhiyun 	struct tegra_xusb_pad *sata;
430*4882a593Smuzhiyun 	struct tegra_xusb_pad *ulpi;
431*4882a593Smuzhiyun 	struct tegra_xusb_pad *usb2;
432*4882a593Smuzhiyun 	struct tegra_xusb_pad *hsic;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	struct list_head ports;
435*4882a593Smuzhiyun 	struct list_head lanes;
436*4882a593Smuzhiyun 	struct list_head pads;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	unsigned int enable;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	struct clk *clk;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	struct regulator_bulk_data *supplies;
443*4882a593Smuzhiyun };
444*4882a593Smuzhiyun 
padctl_writel(struct tegra_xusb_padctl * padctl,u32 value,unsigned long offset)445*4882a593Smuzhiyun static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
446*4882a593Smuzhiyun 				 unsigned long offset)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
449*4882a593Smuzhiyun 	writel(value, padctl->regs + offset);
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun 
padctl_readl(struct tegra_xusb_padctl * padctl,unsigned long offset)452*4882a593Smuzhiyun static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
453*4882a593Smuzhiyun 			       unsigned long offset)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun 	u32 value = readl(padctl->regs + offset);
456*4882a593Smuzhiyun 	dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
457*4882a593Smuzhiyun 	return value;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
461*4882a593Smuzhiyun 					     const char *name,
462*4882a593Smuzhiyun 					     unsigned int index);
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
465*4882a593Smuzhiyun extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
466*4882a593Smuzhiyun #endif
467*4882a593Smuzhiyun #if defined(CONFIG_ARCH_TEGRA_210_SOC)
468*4882a593Smuzhiyun extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
469*4882a593Smuzhiyun #endif
470*4882a593Smuzhiyun #if defined(CONFIG_ARCH_TEGRA_186_SOC)
471*4882a593Smuzhiyun extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
472*4882a593Smuzhiyun #endif
473*4882a593Smuzhiyun #if defined(CONFIG_ARCH_TEGRA_194_SOC)
474*4882a593Smuzhiyun extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
475*4882a593Smuzhiyun #endif
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun #endif /* __PHY_TEGRA_XUSB_H */
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