1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Rockchip MIPI CSI2 DPHY driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/of_graph.h>
14*4882a593Smuzhiyun #include <linux/of_platform.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
19*4882a593Smuzhiyun #include <media/media-entity.h>
20*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
21*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
22*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
23*4882a593Smuzhiyun #include <media/v4l2-device.h>
24*4882a593Smuzhiyun #include <linux/phy/phy.h>
25*4882a593Smuzhiyun #include "phy-rockchip-csi2-dphy-common.h"
26*4882a593Smuzhiyun #include "phy-rockchip-samsung-dcphy.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static struct rkmodule_csi_dphy_param rk3588_dcphy_param = {
29*4882a593Smuzhiyun .vendor = PHY_VENDOR_SAMSUNG,
30*4882a593Smuzhiyun .lp_vol_ref = 3,
31*4882a593Smuzhiyun .lp_hys_sw = {3, 0, 0, 0},
32*4882a593Smuzhiyun .lp_escclk_pol_sel = {1, 0, 0, 0},
33*4882a593Smuzhiyun .skew_data_cal_clk = {0, 3, 3, 3},
34*4882a593Smuzhiyun .clk_hs_term_sel = 2,
35*4882a593Smuzhiyun .data_hs_term_sel = {2, 2, 2, 2},
36*4882a593Smuzhiyun .reserved = {0},
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun struct sensor_async_subdev {
40*4882a593Smuzhiyun struct v4l2_async_subdev asd;
41*4882a593Smuzhiyun struct v4l2_mbus_config mbus;
42*4882a593Smuzhiyun int lanes;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static LIST_HEAD(csi2dphy_device_list);
46*4882a593Smuzhiyun
to_csi2_dphy(struct v4l2_subdev * subdev)47*4882a593Smuzhiyun static inline struct csi2_dphy *to_csi2_dphy(struct v4l2_subdev *subdev)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun return container_of(subdev, struct csi2_dphy, sd);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
get_remote_sensor(struct v4l2_subdev * sd)52*4882a593Smuzhiyun static struct v4l2_subdev *get_remote_sensor(struct v4l2_subdev *sd)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct media_pad *local, *remote;
55*4882a593Smuzhiyun struct media_entity *sensor_me;
56*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun if (dphy->num_sensors == 0)
59*4882a593Smuzhiyun return NULL;
60*4882a593Smuzhiyun local = &sd->entity.pads[CSI2_DPHY_RX_PAD_SINK];
61*4882a593Smuzhiyun remote = media_entity_remote_pad(local);
62*4882a593Smuzhiyun if (!remote) {
63*4882a593Smuzhiyun v4l2_warn(sd, "No link between dphy and sensor\n");
64*4882a593Smuzhiyun return NULL;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun sensor_me = media_entity_remote_pad(local)->entity;
68*4882a593Smuzhiyun return media_entity_to_v4l2_subdev(sensor_me);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
sd_to_sensor(struct csi2_dphy * dphy,struct v4l2_subdev * sd)71*4882a593Smuzhiyun static struct csi2_sensor *sd_to_sensor(struct csi2_dphy *dphy,
72*4882a593Smuzhiyun struct v4l2_subdev *sd)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun int i;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun for (i = 0; i < dphy->num_sensors; ++i)
77*4882a593Smuzhiyun if (dphy->sensors[i].sd == sd)
78*4882a593Smuzhiyun return &dphy->sensors[i];
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return NULL;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
csi2_dphy_get_sensor_data_rate(struct v4l2_subdev * sd)83*4882a593Smuzhiyun static int csi2_dphy_get_sensor_data_rate(struct v4l2_subdev *sd)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
86*4882a593Smuzhiyun struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
87*4882a593Smuzhiyun struct v4l2_ctrl *link_freq;
88*4882a593Smuzhiyun struct v4l2_querymenu qm = { .id = V4L2_CID_LINK_FREQ, };
89*4882a593Smuzhiyun int ret = 0;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun if (!sensor_sd)
92*4882a593Smuzhiyun return -ENODEV;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun link_freq = v4l2_ctrl_find(sensor_sd->ctrl_handler, V4L2_CID_LINK_FREQ);
95*4882a593Smuzhiyun if (!link_freq) {
96*4882a593Smuzhiyun v4l2_warn(sd, "No pixel rate control in subdev\n");
97*4882a593Smuzhiyun return -EPIPE;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun qm.index = v4l2_ctrl_g_ctrl(link_freq);
101*4882a593Smuzhiyun ret = v4l2_querymenu(sensor_sd->ctrl_handler, &qm);
102*4882a593Smuzhiyun if (ret < 0) {
103*4882a593Smuzhiyun v4l2_err(sd, "Failed to get menu item\n");
104*4882a593Smuzhiyun return ret;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun if (!qm.value) {
108*4882a593Smuzhiyun v4l2_err(sd, "Invalid link_freq\n");
109*4882a593Smuzhiyun return -EINVAL;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun dphy->data_rate_mbps = qm.value * 2;
112*4882a593Smuzhiyun do_div(dphy->data_rate_mbps, 1000 * 1000);
113*4882a593Smuzhiyun v4l2_info(sd, "dphy%d, data_rate_mbps %lld\n",
114*4882a593Smuzhiyun dphy->phy_index, dphy->data_rate_mbps);
115*4882a593Smuzhiyun return 0;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
rockchip_csi2_dphy_attach_hw(struct csi2_dphy * dphy,int csi_idx,int index)118*4882a593Smuzhiyun static int rockchip_csi2_dphy_attach_hw(struct csi2_dphy *dphy, int csi_idx, int index)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct csi2_dphy_hw *dphy_hw;
121*4882a593Smuzhiyun struct samsung_mipi_dcphy *dcphy_hw;
122*4882a593Smuzhiyun struct v4l2_subdev *sensor_sd = get_remote_sensor(&dphy->sd);
123*4882a593Smuzhiyun struct csi2_sensor *sensor = NULL;
124*4882a593Smuzhiyun int lanes = 2;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (sensor_sd) {
127*4882a593Smuzhiyun sensor = sd_to_sensor(dphy, sensor_sd);
128*4882a593Smuzhiyun lanes = sensor->lanes;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (dphy->drv_data->chip_id == CHIP_ID_RK3568 ||
132*4882a593Smuzhiyun dphy->drv_data->chip_id == CHIP_ID_RV1106) {
133*4882a593Smuzhiyun dphy_hw = dphy->dphy_hw_group[0];
134*4882a593Smuzhiyun mutex_lock(&dphy_hw->mutex);
135*4882a593Smuzhiyun dphy_hw->dphy_dev[dphy_hw->dphy_dev_num] = dphy;
136*4882a593Smuzhiyun dphy_hw->dphy_dev_num++;
137*4882a593Smuzhiyun switch (dphy->phy_index) {
138*4882a593Smuzhiyun case 0:
139*4882a593Smuzhiyun dphy->lane_mode = PHY_FULL_MODE;
140*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_FULL;
141*4882a593Smuzhiyun break;
142*4882a593Smuzhiyun case 1:
143*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_01;
144*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_SPLIT;
145*4882a593Smuzhiyun break;
146*4882a593Smuzhiyun case 2:
147*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_23;
148*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_SPLIT;
149*4882a593Smuzhiyun break;
150*4882a593Smuzhiyun default:
151*4882a593Smuzhiyun dphy->lane_mode = PHY_FULL_MODE;
152*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_FULL;
153*4882a593Smuzhiyun break;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun dphy->dphy_hw = dphy_hw;
156*4882a593Smuzhiyun dphy->phy_hw[index] = (void *)dphy_hw;
157*4882a593Smuzhiyun dphy->csi_info.dphy_vendor[index] = PHY_VENDOR_INNO;
158*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
159*4882a593Smuzhiyun } else if (dphy->drv_data->chip_id == CHIP_ID_RK3588) {
160*4882a593Smuzhiyun if (csi_idx < 2) {
161*4882a593Smuzhiyun dcphy_hw = dphy->samsung_phy_group[csi_idx];
162*4882a593Smuzhiyun mutex_lock(&dcphy_hw->mutex);
163*4882a593Smuzhiyun dcphy_hw->dphy_dev_num++;
164*4882a593Smuzhiyun mutex_unlock(&dcphy_hw->mutex);
165*4882a593Smuzhiyun dphy->samsung_phy = dcphy_hw;
166*4882a593Smuzhiyun dphy->phy_hw[index] = (void *)dcphy_hw;
167*4882a593Smuzhiyun dphy->dphy_param = rk3588_dcphy_param;
168*4882a593Smuzhiyun dphy->csi_info.dphy_vendor[index] = PHY_VENDOR_SAMSUNG;
169*4882a593Smuzhiyun } else {
170*4882a593Smuzhiyun dphy_hw = dphy->dphy_hw_group[(csi_idx - 2) / 2];
171*4882a593Smuzhiyun mutex_lock(&dphy_hw->mutex);
172*4882a593Smuzhiyun if (csi_idx == 2 || csi_idx == 4) {
173*4882a593Smuzhiyun if (lanes == 4) {
174*4882a593Smuzhiyun dphy->lane_mode = PHY_FULL_MODE;
175*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_FULL;
176*4882a593Smuzhiyun if (csi_idx == 2)
177*4882a593Smuzhiyun dphy->phy_index = 0;
178*4882a593Smuzhiyun else
179*4882a593Smuzhiyun dphy->phy_index = 3;
180*4882a593Smuzhiyun } else {
181*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_01;
182*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_SPLIT;
183*4882a593Smuzhiyun if (csi_idx == 2)
184*4882a593Smuzhiyun dphy->phy_index = 1;
185*4882a593Smuzhiyun else
186*4882a593Smuzhiyun dphy->phy_index = 4;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun } else if (csi_idx == 3 || csi_idx == 5) {
189*4882a593Smuzhiyun if (lanes == 4) {
190*4882a593Smuzhiyun dev_info(dphy->dev, "%s csi host%d only support PHY_SPLIT_23\n",
191*4882a593Smuzhiyun __func__, csi_idx);
192*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
193*4882a593Smuzhiyun return -EINVAL;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_23;
196*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_SPLIT;
197*4882a593Smuzhiyun if (csi_idx == 3)
198*4882a593Smuzhiyun dphy->phy_index = 2;
199*4882a593Smuzhiyun else
200*4882a593Smuzhiyun dphy->phy_index = 5;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun dphy_hw->dphy_dev_num++;
203*4882a593Smuzhiyun dphy->dphy_hw = dphy_hw;
204*4882a593Smuzhiyun dphy->phy_hw[index] = (void *)dphy_hw;
205*4882a593Smuzhiyun dphy->csi_info.dphy_vendor[index] = PHY_VENDOR_INNO;
206*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun } else {
209*4882a593Smuzhiyun dphy_hw = dphy->dphy_hw_group[csi_idx / 2];
210*4882a593Smuzhiyun mutex_lock(&dphy_hw->mutex);
211*4882a593Smuzhiyun if (csi_idx == 0 || csi_idx == 2) {
212*4882a593Smuzhiyun if (lanes == 4) {
213*4882a593Smuzhiyun dphy->lane_mode = PHY_FULL_MODE;
214*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_FULL;
215*4882a593Smuzhiyun if (csi_idx == 0)
216*4882a593Smuzhiyun dphy->phy_index = 0;
217*4882a593Smuzhiyun else
218*4882a593Smuzhiyun dphy->phy_index = 3;
219*4882a593Smuzhiyun } else {
220*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_01;
221*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_SPLIT;
222*4882a593Smuzhiyun if (csi_idx == 0)
223*4882a593Smuzhiyun dphy->phy_index = 1;
224*4882a593Smuzhiyun else
225*4882a593Smuzhiyun dphy->phy_index = 4;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun } else if (csi_idx == 1 || csi_idx == 3) {
228*4882a593Smuzhiyun if (lanes == 4) {
229*4882a593Smuzhiyun dev_info(dphy->dev, "%s csi host%d only support PHY_SPLIT_23\n",
230*4882a593Smuzhiyun __func__, csi_idx);
231*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
232*4882a593Smuzhiyun return -EINVAL;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_23;
235*4882a593Smuzhiyun dphy_hw->lane_mode = LANE_MODE_SPLIT;
236*4882a593Smuzhiyun if (csi_idx == 1)
237*4882a593Smuzhiyun dphy->phy_index = 2;
238*4882a593Smuzhiyun else
239*4882a593Smuzhiyun dphy->phy_index = 5;
240*4882a593Smuzhiyun } else {
241*4882a593Smuzhiyun dev_info(dphy->dev, "%s error csi host%d\n",
242*4882a593Smuzhiyun __func__, csi_idx);
243*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
244*4882a593Smuzhiyun return -EINVAL;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun dphy_hw->dphy_dev[dphy_hw->dphy_dev_num] = dphy;
247*4882a593Smuzhiyun dphy->phy_hw[index] = (void *)dphy_hw;
248*4882a593Smuzhiyun dphy->csi_info.dphy_vendor[index] = PHY_VENDOR_INNO;
249*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun return 0;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
rockchip_csi2_dphy_detach_hw(struct csi2_dphy * dphy,int csi_idx,int index)255*4882a593Smuzhiyun static int rockchip_csi2_dphy_detach_hw(struct csi2_dphy *dphy, int csi_idx, int index)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun struct csi2_dphy_hw *dphy_hw = NULL;
258*4882a593Smuzhiyun struct samsung_mipi_dcphy *dcphy_hw = NULL;
259*4882a593Smuzhiyun struct csi2_dphy *csi2_dphy = NULL;
260*4882a593Smuzhiyun int i = 0;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (dphy->drv_data->chip_id == CHIP_ID_RK3568 ||
263*4882a593Smuzhiyun dphy->drv_data->chip_id == CHIP_ID_RV1106) {
264*4882a593Smuzhiyun dphy_hw = (struct csi2_dphy_hw *)dphy->phy_hw[index];
265*4882a593Smuzhiyun if (!dphy_hw) {
266*4882a593Smuzhiyun dev_err(dphy->dev, "%s csi_idx %d detach hw failed\n",
267*4882a593Smuzhiyun __func__, csi_idx);
268*4882a593Smuzhiyun return -EINVAL;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun mutex_lock(&dphy_hw->mutex);
271*4882a593Smuzhiyun for (i = 0; i < dphy_hw->dphy_dev_num; i++) {
272*4882a593Smuzhiyun csi2_dphy = dphy_hw->dphy_dev[i];
273*4882a593Smuzhiyun if (csi2_dphy &&
274*4882a593Smuzhiyun csi2_dphy->phy_index == dphy->phy_index) {
275*4882a593Smuzhiyun dphy_hw->dphy_dev[i] = NULL;
276*4882a593Smuzhiyun dphy_hw->dphy_dev_num--;
277*4882a593Smuzhiyun break;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
281*4882a593Smuzhiyun } else if (dphy->drv_data->chip_id == CHIP_ID_RK3588) {
282*4882a593Smuzhiyun if (csi_idx < 2) {
283*4882a593Smuzhiyun dcphy_hw = (struct samsung_mipi_dcphy *)dphy->phy_hw[index];
284*4882a593Smuzhiyun if (!dcphy_hw) {
285*4882a593Smuzhiyun dev_err(dphy->dev, "%s csi_idx %d detach hw failed\n",
286*4882a593Smuzhiyun __func__, csi_idx);
287*4882a593Smuzhiyun return -EINVAL;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun mutex_lock(&dcphy_hw->mutex);
290*4882a593Smuzhiyun dcphy_hw->dphy_dev_num--;
291*4882a593Smuzhiyun mutex_unlock(&dcphy_hw->mutex);
292*4882a593Smuzhiyun } else {
293*4882a593Smuzhiyun dphy_hw = (struct csi2_dphy_hw *)dphy->phy_hw[index];
294*4882a593Smuzhiyun if (!dphy_hw) {
295*4882a593Smuzhiyun dev_err(dphy->dev, "%s csi_idx %d detach hw failed\n",
296*4882a593Smuzhiyun __func__, csi_idx);
297*4882a593Smuzhiyun return -EINVAL;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun mutex_lock(&dphy_hw->mutex);
300*4882a593Smuzhiyun dphy_hw->dphy_dev_num--;
301*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun } else {
304*4882a593Smuzhiyun dphy_hw = (struct csi2_dphy_hw *)dphy->phy_hw[index];
305*4882a593Smuzhiyun if (!dphy_hw) {
306*4882a593Smuzhiyun dev_err(dphy->dev, "%s csi_idx %d detach hw failed\n",
307*4882a593Smuzhiyun __func__, csi_idx);
308*4882a593Smuzhiyun return -EINVAL;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun mutex_lock(&dphy_hw->mutex);
311*4882a593Smuzhiyun dphy_hw->dphy_dev_num--;
312*4882a593Smuzhiyun mutex_unlock(&dphy_hw->mutex);
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun return 0;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
csi2_dphy_update_sensor_mbus(struct v4l2_subdev * sd)318*4882a593Smuzhiyun static int csi2_dphy_update_sensor_mbus(struct v4l2_subdev *sd)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
321*4882a593Smuzhiyun struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
322*4882a593Smuzhiyun struct csi2_sensor *sensor;
323*4882a593Smuzhiyun struct v4l2_mbus_config mbus;
324*4882a593Smuzhiyun int ret = 0;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (!sensor_sd)
327*4882a593Smuzhiyun return -ENODEV;
328*4882a593Smuzhiyun sensor = sd_to_sensor(dphy, sensor_sd);
329*4882a593Smuzhiyun if (!sensor)
330*4882a593Smuzhiyun return -ENODEV;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun ret = v4l2_subdev_call(sensor_sd, pad, get_mbus_config, 0, &mbus);
333*4882a593Smuzhiyun if (ret)
334*4882a593Smuzhiyun return ret;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun sensor->mbus = mbus;
337*4882a593Smuzhiyun switch (mbus.flags & V4L2_MBUS_CSI2_LANES) {
338*4882a593Smuzhiyun case V4L2_MBUS_CSI2_1_LANE:
339*4882a593Smuzhiyun sensor->lanes = 1;
340*4882a593Smuzhiyun break;
341*4882a593Smuzhiyun case V4L2_MBUS_CSI2_2_LANE:
342*4882a593Smuzhiyun sensor->lanes = 2;
343*4882a593Smuzhiyun break;
344*4882a593Smuzhiyun case V4L2_MBUS_CSI2_3_LANE:
345*4882a593Smuzhiyun sensor->lanes = 3;
346*4882a593Smuzhiyun break;
347*4882a593Smuzhiyun case V4L2_MBUS_CSI2_4_LANE:
348*4882a593Smuzhiyun sensor->lanes = 4;
349*4882a593Smuzhiyun break;
350*4882a593Smuzhiyun default:
351*4882a593Smuzhiyun return -EINVAL;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun return 0;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
csi2_dphy_update_config(struct v4l2_subdev * sd)357*4882a593Smuzhiyun static int csi2_dphy_update_config(struct v4l2_subdev *sd)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
360*4882a593Smuzhiyun struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
361*4882a593Smuzhiyun struct rkmodule_csi_dphy_param dphy_param;
362*4882a593Smuzhiyun struct rkmodule_bus_config bus_config;
363*4882a593Smuzhiyun int csi_idx = 0;
364*4882a593Smuzhiyun int ret = 0;
365*4882a593Smuzhiyun int i = 0;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun for (i = 0; i < dphy->csi_info.csi_num; i++) {
368*4882a593Smuzhiyun if (dphy->drv_data->chip_id != CHIP_ID_RK3568 &&
369*4882a593Smuzhiyun dphy->drv_data->chip_id != CHIP_ID_RV1106) {
370*4882a593Smuzhiyun csi_idx = dphy->csi_info.csi_idx[i];
371*4882a593Smuzhiyun rockchip_csi2_dphy_attach_hw(dphy, csi_idx, i);
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun if (dphy->csi_info.dphy_vendor[i] == PHY_VENDOR_INNO) {
374*4882a593Smuzhiyun ret = v4l2_subdev_call(sensor_sd, core, ioctl,
375*4882a593Smuzhiyun RKMODULE_GET_BUS_CONFIG, &bus_config);
376*4882a593Smuzhiyun if (!ret) {
377*4882a593Smuzhiyun dev_info(dphy->dev, "phy_mode %d,lane %d\n",
378*4882a593Smuzhiyun bus_config.bus.phy_mode, bus_config.bus.lanes);
379*4882a593Smuzhiyun if (bus_config.bus.phy_mode == PHY_FULL_MODE) {
380*4882a593Smuzhiyun if (dphy->phy_index % 3 == 2) {
381*4882a593Smuzhiyun dev_err(dphy->dev, "%s dphy%d only use for PHY_SPLIT_23\n",
382*4882a593Smuzhiyun __func__, dphy->phy_index);
383*4882a593Smuzhiyun return -EINVAL;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun dphy->lane_mode = PHY_FULL_MODE;
386*4882a593Smuzhiyun dphy->dphy_hw->lane_mode = LANE_MODE_FULL;
387*4882a593Smuzhiyun } else if (bus_config.bus.phy_mode == PHY_SPLIT_01) {
388*4882a593Smuzhiyun if (dphy->phy_index % 3 == 2) {
389*4882a593Smuzhiyun dev_err(dphy->dev, "%s dphy%d only use for PHY_SPLIT_23\n",
390*4882a593Smuzhiyun __func__, dphy->phy_index);
391*4882a593Smuzhiyun return -EINVAL;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_01;
394*4882a593Smuzhiyun dphy->dphy_hw->lane_mode = LANE_MODE_SPLIT;
395*4882a593Smuzhiyun } else if (bus_config.bus.phy_mode == PHY_SPLIT_23) {
396*4882a593Smuzhiyun if (dphy->phy_index % 3 != 2) {
397*4882a593Smuzhiyun dev_err(dphy->dev, "%s dphy%d not support PHY_SPLIT_23\n",
398*4882a593Smuzhiyun __func__, dphy->phy_index);
399*4882a593Smuzhiyun return -EINVAL;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun dphy->lane_mode = PHY_SPLIT_23;
402*4882a593Smuzhiyun dphy->dphy_hw->lane_mode = LANE_MODE_SPLIT;
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun ret = v4l2_subdev_call(sensor_sd, core, ioctl,
408*4882a593Smuzhiyun RKMODULE_GET_CSI_DPHY_PARAM,
409*4882a593Smuzhiyun &dphy_param);
410*4882a593Smuzhiyun if (!ret)
411*4882a593Smuzhiyun dphy->dphy_param = dphy_param;
412*4882a593Smuzhiyun return 0;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
csi2_dphy_s_stream_start(struct v4l2_subdev * sd)415*4882a593Smuzhiyun static int csi2_dphy_s_stream_start(struct v4l2_subdev *sd)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
418*4882a593Smuzhiyun int i = 0;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun for (i = 0; i < dphy->csi_info.csi_num; i++) {
421*4882a593Smuzhiyun if (dphy->csi_info.dphy_vendor[i] == PHY_VENDOR_SAMSUNG) {
422*4882a593Smuzhiyun dphy->samsung_phy = (struct samsung_mipi_dcphy *)dphy->phy_hw[i];
423*4882a593Smuzhiyun if (dphy->samsung_phy && dphy->samsung_phy->stream_on)
424*4882a593Smuzhiyun dphy->samsung_phy->stream_on(dphy, sd);
425*4882a593Smuzhiyun } else {
426*4882a593Smuzhiyun dphy->dphy_hw = (struct csi2_dphy_hw *)dphy->phy_hw[i];
427*4882a593Smuzhiyun if (dphy->dphy_hw && dphy->dphy_hw->stream_on)
428*4882a593Smuzhiyun dphy->dphy_hw->stream_on(dphy, sd);
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun dphy->is_streaming = true;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun return 0;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
csi2_dphy_s_stream_stop(struct v4l2_subdev * sd)437*4882a593Smuzhiyun static int csi2_dphy_s_stream_stop(struct v4l2_subdev *sd)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
440*4882a593Smuzhiyun int i = 0;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun for (i = 0; i < dphy->csi_info.csi_num; i++) {
443*4882a593Smuzhiyun if (dphy->csi_info.dphy_vendor[i] == PHY_VENDOR_SAMSUNG) {
444*4882a593Smuzhiyun dphy->samsung_phy = (struct samsung_mipi_dcphy *)dphy->phy_hw[i];
445*4882a593Smuzhiyun if (dphy->samsung_phy && dphy->samsung_phy->stream_off)
446*4882a593Smuzhiyun dphy->samsung_phy->stream_off(dphy, sd);
447*4882a593Smuzhiyun } else {
448*4882a593Smuzhiyun dphy->dphy_hw = (struct csi2_dphy_hw *)dphy->phy_hw[i];
449*4882a593Smuzhiyun if (dphy->dphy_hw && dphy->dphy_hw->stream_off)
450*4882a593Smuzhiyun dphy->dphy_hw->stream_off(dphy, sd);
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun if (dphy->drv_data->chip_id != CHIP_ID_RK3568 &&
453*4882a593Smuzhiyun dphy->drv_data->chip_id != CHIP_ID_RV1106)
454*4882a593Smuzhiyun rockchip_csi2_dphy_detach_hw(dphy, dphy->csi_info.csi_idx[i], i);
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun dphy->is_streaming = false;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun dev_info(dphy->dev, "%s stream stop, dphy%d\n",
460*4882a593Smuzhiyun __func__, dphy->phy_index);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun return 0;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
csi2_dphy_enable_clk(struct csi2_dphy * dphy)465*4882a593Smuzhiyun static int csi2_dphy_enable_clk(struct csi2_dphy *dphy)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun struct csi2_dphy_hw *hw = NULL;
468*4882a593Smuzhiyun struct samsung_mipi_dcphy *samsung_phy = NULL;
469*4882a593Smuzhiyun int ret;
470*4882a593Smuzhiyun int i = 0;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun for (i = 0; i < dphy->csi_info.csi_num; i++) {
473*4882a593Smuzhiyun if (dphy->csi_info.dphy_vendor[i] == PHY_VENDOR_SAMSUNG) {
474*4882a593Smuzhiyun samsung_phy = (struct samsung_mipi_dcphy *)dphy->phy_hw[i];
475*4882a593Smuzhiyun if (samsung_phy)
476*4882a593Smuzhiyun clk_prepare_enable(samsung_phy->pclk);
477*4882a593Smuzhiyun } else {
478*4882a593Smuzhiyun hw = (struct csi2_dphy_hw *)dphy->phy_hw[i];
479*4882a593Smuzhiyun if (hw) {
480*4882a593Smuzhiyun ret = clk_bulk_prepare_enable(hw->num_clks, hw->clks_bulk);
481*4882a593Smuzhiyun if (ret) {
482*4882a593Smuzhiyun dev_err(hw->dev, "failed to enable clks\n");
483*4882a593Smuzhiyun return ret;
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun return 0;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
csi2_dphy_disable_clk(struct csi2_dphy * dphy)491*4882a593Smuzhiyun static void csi2_dphy_disable_clk(struct csi2_dphy *dphy)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun struct csi2_dphy_hw *hw = NULL;
494*4882a593Smuzhiyun struct samsung_mipi_dcphy *samsung_phy = NULL;
495*4882a593Smuzhiyun int i = 0;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun for (i = 0; i < dphy->csi_info.csi_num; i++) {
498*4882a593Smuzhiyun if (dphy->csi_info.dphy_vendor[i] == PHY_VENDOR_SAMSUNG) {
499*4882a593Smuzhiyun samsung_phy = (struct samsung_mipi_dcphy *)dphy->phy_hw[i];
500*4882a593Smuzhiyun if (samsung_phy)
501*4882a593Smuzhiyun clk_disable_unprepare(samsung_phy->pclk);
502*4882a593Smuzhiyun } else {
503*4882a593Smuzhiyun hw = (struct csi2_dphy_hw *)dphy->phy_hw[i];
504*4882a593Smuzhiyun if (hw)
505*4882a593Smuzhiyun clk_bulk_disable_unprepare(hw->num_clks, hw->clks_bulk);
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
csi2_dphy_s_stream(struct v4l2_subdev * sd,int on)510*4882a593Smuzhiyun static int csi2_dphy_s_stream(struct v4l2_subdev *sd, int on)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
513*4882a593Smuzhiyun int ret = 0;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun mutex_lock(&dphy->mutex);
516*4882a593Smuzhiyun if (on) {
517*4882a593Smuzhiyun if (dphy->is_streaming) {
518*4882a593Smuzhiyun mutex_unlock(&dphy->mutex);
519*4882a593Smuzhiyun return 0;
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun ret = csi2_dphy_get_sensor_data_rate(sd);
523*4882a593Smuzhiyun if (ret < 0) {
524*4882a593Smuzhiyun mutex_unlock(&dphy->mutex);
525*4882a593Smuzhiyun return ret;
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun csi2_dphy_update_sensor_mbus(sd);
529*4882a593Smuzhiyun ret = csi2_dphy_update_config(sd);
530*4882a593Smuzhiyun if (ret < 0) {
531*4882a593Smuzhiyun mutex_unlock(&dphy->mutex);
532*4882a593Smuzhiyun return ret;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun ret = csi2_dphy_enable_clk(dphy);
536*4882a593Smuzhiyun if (ret) {
537*4882a593Smuzhiyun mutex_unlock(&dphy->mutex);
538*4882a593Smuzhiyun return ret;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun ret = csi2_dphy_s_stream_start(sd);
541*4882a593Smuzhiyun } else {
542*4882a593Smuzhiyun if (!dphy->is_streaming) {
543*4882a593Smuzhiyun mutex_unlock(&dphy->mutex);
544*4882a593Smuzhiyun return 0;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun ret = csi2_dphy_s_stream_stop(sd);
547*4882a593Smuzhiyun csi2_dphy_disable_clk(dphy);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun mutex_unlock(&dphy->mutex);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun dev_info(dphy->dev, "%s stream on:%d, dphy%d, ret %d\n",
552*4882a593Smuzhiyun __func__, on, dphy->phy_index, ret);
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun return ret;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
csi2_dphy_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)557*4882a593Smuzhiyun static int csi2_dphy_g_frame_interval(struct v4l2_subdev *sd,
558*4882a593Smuzhiyun struct v4l2_subdev_frame_interval *fi)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun struct v4l2_subdev *sensor = get_remote_sensor(sd);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun if (sensor)
563*4882a593Smuzhiyun return v4l2_subdev_call(sensor, video, g_frame_interval, fi);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun return -EINVAL;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun
csi2_dphy_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)568*4882a593Smuzhiyun static int csi2_dphy_g_mbus_config(struct v4l2_subdev *sd,
569*4882a593Smuzhiyun unsigned int pad_id,
570*4882a593Smuzhiyun struct v4l2_mbus_config *config)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
573*4882a593Smuzhiyun struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
574*4882a593Smuzhiyun struct csi2_sensor *sensor;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun if (!sensor_sd)
577*4882a593Smuzhiyun return -ENODEV;
578*4882a593Smuzhiyun sensor = sd_to_sensor(dphy, sensor_sd);
579*4882a593Smuzhiyun if (!sensor)
580*4882a593Smuzhiyun return -ENODEV;
581*4882a593Smuzhiyun csi2_dphy_update_sensor_mbus(sd);
582*4882a593Smuzhiyun *config = sensor->mbus;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun return 0;
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun
csi2_dphy_s_power(struct v4l2_subdev * sd,int on)587*4882a593Smuzhiyun static int csi2_dphy_s_power(struct v4l2_subdev *sd, int on)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun if (on)
592*4882a593Smuzhiyun return pm_runtime_get_sync(dphy->dev);
593*4882a593Smuzhiyun else
594*4882a593Smuzhiyun return pm_runtime_put(dphy->dev);
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
csi2_dphy_runtime_suspend(struct device * dev)597*4882a593Smuzhiyun static __maybe_unused int csi2_dphy_runtime_suspend(struct device *dev)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun struct media_entity *me = dev_get_drvdata(dev);
600*4882a593Smuzhiyun struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(me);
601*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun if (dphy->is_streaming) {
604*4882a593Smuzhiyun csi2_dphy_s_stream(sd, 0);
605*4882a593Smuzhiyun dphy->is_streaming = false;
606*4882a593Smuzhiyun }
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun return 0;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
csi2_dphy_runtime_resume(struct device * dev)611*4882a593Smuzhiyun static __maybe_unused int csi2_dphy_runtime_resume(struct device *dev)
612*4882a593Smuzhiyun {
613*4882a593Smuzhiyun return 0;
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun /* dphy accepts all fmt/size from sensor */
csi2_dphy_get_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)617*4882a593Smuzhiyun static int csi2_dphy_get_set_fmt(struct v4l2_subdev *sd,
618*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
619*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
622*4882a593Smuzhiyun struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
623*4882a593Smuzhiyun struct csi2_sensor *sensor;
624*4882a593Smuzhiyun int ret;
625*4882a593Smuzhiyun /*
626*4882a593Smuzhiyun * Do not allow format changes and just relay whatever
627*4882a593Smuzhiyun * set currently in the sensor.
628*4882a593Smuzhiyun */
629*4882a593Smuzhiyun if (!sensor_sd)
630*4882a593Smuzhiyun return -ENODEV;
631*4882a593Smuzhiyun sensor = sd_to_sensor(dphy, sensor_sd);
632*4882a593Smuzhiyun if (!sensor)
633*4882a593Smuzhiyun return -ENODEV;
634*4882a593Smuzhiyun ret = v4l2_subdev_call(sensor_sd, pad, get_fmt, NULL, fmt);
635*4882a593Smuzhiyun if (!ret && fmt->pad == 0 && fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
636*4882a593Smuzhiyun sensor->format = fmt->format;
637*4882a593Smuzhiyun return ret;
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
csi2_dphy_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)640*4882a593Smuzhiyun static int csi2_dphy_get_selection(struct v4l2_subdev *sd,
641*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
642*4882a593Smuzhiyun struct v4l2_subdev_selection *sel)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun struct v4l2_subdev *sensor = get_remote_sensor(sd);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun return v4l2_subdev_call(sensor, pad, get_selection, NULL, sel);
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
rkcif_csi2_dphy_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)649*4882a593Smuzhiyun static long rkcif_csi2_dphy_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
652*4882a593Smuzhiyun long ret = 0;
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun switch (cmd) {
655*4882a593Smuzhiyun case RKCIF_CMD_SET_CSI_IDX:
656*4882a593Smuzhiyun if (dphy->drv_data->chip_id != CHIP_ID_RK3568 &&
657*4882a593Smuzhiyun dphy->drv_data->chip_id != CHIP_ID_RV1106)
658*4882a593Smuzhiyun dphy->csi_info = *((struct rkcif_csi_info *)arg);
659*4882a593Smuzhiyun break;
660*4882a593Smuzhiyun default:
661*4882a593Smuzhiyun ret = -ENOIOCTLCMD;
662*4882a593Smuzhiyun break;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun return ret;
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
rkcif_csi2_dphy_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)669*4882a593Smuzhiyun static long rkcif_csi2_dphy_compat_ioctl32(struct v4l2_subdev *sd,
670*4882a593Smuzhiyun unsigned int cmd, unsigned long arg)
671*4882a593Smuzhiyun {
672*4882a593Smuzhiyun void __user *up = compat_ptr(arg);
673*4882a593Smuzhiyun struct rkcif_csi_info csi_info = {0};
674*4882a593Smuzhiyun long ret;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun switch (cmd) {
677*4882a593Smuzhiyun case RKCIF_CMD_SET_CSI_IDX:
678*4882a593Smuzhiyun if (copy_from_user(&csi_info, up, sizeof(struct rkcif_csi_info)))
679*4882a593Smuzhiyun return -EFAULT;
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun ret = rkcif_csi2_dphy_ioctl(sd, cmd, &csi_info);
682*4882a593Smuzhiyun break;
683*4882a593Smuzhiyun default:
684*4882a593Smuzhiyun ret = -ENOIOCTLCMD;
685*4882a593Smuzhiyun break;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun return ret;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun #endif
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops csi2_dphy_core_ops = {
693*4882a593Smuzhiyun .s_power = csi2_dphy_s_power,
694*4882a593Smuzhiyun .ioctl = rkcif_csi2_dphy_ioctl,
695*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
696*4882a593Smuzhiyun .compat_ioctl32 = rkcif_csi2_dphy_compat_ioctl32,
697*4882a593Smuzhiyun #endif
698*4882a593Smuzhiyun };
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops csi2_dphy_video_ops = {
701*4882a593Smuzhiyun .g_frame_interval = csi2_dphy_g_frame_interval,
702*4882a593Smuzhiyun .s_stream = csi2_dphy_s_stream,
703*4882a593Smuzhiyun };
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops csi2_dphy_subdev_pad_ops = {
706*4882a593Smuzhiyun .set_fmt = csi2_dphy_get_set_fmt,
707*4882a593Smuzhiyun .get_fmt = csi2_dphy_get_set_fmt,
708*4882a593Smuzhiyun .get_selection = csi2_dphy_get_selection,
709*4882a593Smuzhiyun .get_mbus_config = csi2_dphy_g_mbus_config,
710*4882a593Smuzhiyun };
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun static const struct v4l2_subdev_ops csi2_dphy_subdev_ops = {
713*4882a593Smuzhiyun .core = &csi2_dphy_core_ops,
714*4882a593Smuzhiyun .video = &csi2_dphy_video_ops,
715*4882a593Smuzhiyun .pad = &csi2_dphy_subdev_pad_ops,
716*4882a593Smuzhiyun };
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun /* The .bound() notifier callback when a match is found */
719*4882a593Smuzhiyun static int
rockchip_csi2_dphy_notifier_bound(struct v4l2_async_notifier * notifier,struct v4l2_subdev * sd,struct v4l2_async_subdev * asd)720*4882a593Smuzhiyun rockchip_csi2_dphy_notifier_bound(struct v4l2_async_notifier *notifier,
721*4882a593Smuzhiyun struct v4l2_subdev *sd,
722*4882a593Smuzhiyun struct v4l2_async_subdev *asd)
723*4882a593Smuzhiyun {
724*4882a593Smuzhiyun struct csi2_dphy *dphy = container_of(notifier,
725*4882a593Smuzhiyun struct csi2_dphy,
726*4882a593Smuzhiyun notifier);
727*4882a593Smuzhiyun struct sensor_async_subdev *s_asd = container_of(asd,
728*4882a593Smuzhiyun struct sensor_async_subdev, asd);
729*4882a593Smuzhiyun struct csi2_sensor *sensor;
730*4882a593Smuzhiyun unsigned int pad, ret;
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun if (dphy->num_sensors == ARRAY_SIZE(dphy->sensors))
733*4882a593Smuzhiyun return -EBUSY;
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun sensor = &dphy->sensors[dphy->num_sensors++];
736*4882a593Smuzhiyun sensor->lanes = s_asd->lanes;
737*4882a593Smuzhiyun sensor->mbus = s_asd->mbus;
738*4882a593Smuzhiyun sensor->sd = sd;
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun dev_info(dphy->dev, "dphy%d matches %s:bus type %d\n",
741*4882a593Smuzhiyun dphy->phy_index, sd->name, s_asd->mbus.type);
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun for (pad = 0; pad < sensor->sd->entity.num_pads; pad++)
744*4882a593Smuzhiyun if (sensor->sd->entity.pads[pad].flags & MEDIA_PAD_FL_SOURCE)
745*4882a593Smuzhiyun break;
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun if (pad == sensor->sd->entity.num_pads) {
748*4882a593Smuzhiyun dev_err(dphy->dev,
749*4882a593Smuzhiyun "failed to find src pad for %s\n",
750*4882a593Smuzhiyun sensor->sd->name);
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun return -ENXIO;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun ret = media_create_pad_link(
756*4882a593Smuzhiyun &sensor->sd->entity, pad,
757*4882a593Smuzhiyun &dphy->sd.entity, CSI2_DPHY_RX_PAD_SINK,
758*4882a593Smuzhiyun dphy->num_sensors != 1 ? 0 : MEDIA_LNK_FL_ENABLED);
759*4882a593Smuzhiyun if (ret) {
760*4882a593Smuzhiyun dev_err(dphy->dev,
761*4882a593Smuzhiyun "failed to create link for %s\n",
762*4882a593Smuzhiyun sensor->sd->name);
763*4882a593Smuzhiyun return ret;
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun return 0;
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun /* The .unbind callback */
770*4882a593Smuzhiyun static void
rockchip_csi2_dphy_notifier_unbind(struct v4l2_async_notifier * notifier,struct v4l2_subdev * sd,struct v4l2_async_subdev * asd)771*4882a593Smuzhiyun rockchip_csi2_dphy_notifier_unbind(struct v4l2_async_notifier *notifier,
772*4882a593Smuzhiyun struct v4l2_subdev *sd,
773*4882a593Smuzhiyun struct v4l2_async_subdev *asd)
774*4882a593Smuzhiyun {
775*4882a593Smuzhiyun struct csi2_dphy *dphy = container_of(notifier,
776*4882a593Smuzhiyun struct csi2_dphy,
777*4882a593Smuzhiyun notifier);
778*4882a593Smuzhiyun struct csi2_sensor *sensor = sd_to_sensor(dphy, sd);
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun if (sensor)
781*4882a593Smuzhiyun sensor->sd = NULL;
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun static const struct
785*4882a593Smuzhiyun v4l2_async_notifier_operations rockchip_csi2_dphy_async_ops = {
786*4882a593Smuzhiyun .bound = rockchip_csi2_dphy_notifier_bound,
787*4882a593Smuzhiyun .unbind = rockchip_csi2_dphy_notifier_unbind,
788*4882a593Smuzhiyun };
789*4882a593Smuzhiyun
rockchip_csi2_dphy_fwnode_parse(struct device * dev,struct v4l2_fwnode_endpoint * vep,struct v4l2_async_subdev * asd)790*4882a593Smuzhiyun static int rockchip_csi2_dphy_fwnode_parse(struct device *dev,
791*4882a593Smuzhiyun struct v4l2_fwnode_endpoint *vep,
792*4882a593Smuzhiyun struct v4l2_async_subdev *asd)
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun struct sensor_async_subdev *s_asd =
795*4882a593Smuzhiyun container_of(asd, struct sensor_async_subdev, asd);
796*4882a593Smuzhiyun struct v4l2_mbus_config *config = &s_asd->mbus;
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun if (vep->base.port != 0) {
799*4882a593Smuzhiyun dev_err(dev, "The PHY has only port 0\n");
800*4882a593Smuzhiyun return -EINVAL;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun if (vep->bus_type == V4L2_MBUS_CSI2_DPHY ||
804*4882a593Smuzhiyun vep->bus_type == V4L2_MBUS_CSI2_CPHY) {
805*4882a593Smuzhiyun config->type = vep->bus_type;
806*4882a593Smuzhiyun config->flags = vep->bus.mipi_csi2.flags;
807*4882a593Smuzhiyun s_asd->lanes = vep->bus.mipi_csi2.num_data_lanes;
808*4882a593Smuzhiyun } else if (vep->bus_type == V4L2_MBUS_CCP2) {
809*4882a593Smuzhiyun config->type = V4L2_MBUS_CCP2;
810*4882a593Smuzhiyun s_asd->lanes = vep->bus.mipi_csi1.data_lane;
811*4882a593Smuzhiyun } else {
812*4882a593Smuzhiyun dev_err(dev, "Only CSI2 type is currently supported\n");
813*4882a593Smuzhiyun return -EINVAL;
814*4882a593Smuzhiyun }
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun switch (s_asd->lanes) {
817*4882a593Smuzhiyun case 1:
818*4882a593Smuzhiyun config->flags |= V4L2_MBUS_CSI2_1_LANE;
819*4882a593Smuzhiyun break;
820*4882a593Smuzhiyun case 2:
821*4882a593Smuzhiyun config->flags |= V4L2_MBUS_CSI2_2_LANE;
822*4882a593Smuzhiyun break;
823*4882a593Smuzhiyun case 3:
824*4882a593Smuzhiyun config->flags |= V4L2_MBUS_CSI2_3_LANE;
825*4882a593Smuzhiyun break;
826*4882a593Smuzhiyun case 4:
827*4882a593Smuzhiyun config->flags |= V4L2_MBUS_CSI2_4_LANE;
828*4882a593Smuzhiyun break;
829*4882a593Smuzhiyun default:
830*4882a593Smuzhiyun return -EINVAL;
831*4882a593Smuzhiyun }
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun return 0;
834*4882a593Smuzhiyun }
835*4882a593Smuzhiyun
rockchip_csi2dphy_media_init(struct csi2_dphy * dphy)836*4882a593Smuzhiyun static int rockchip_csi2dphy_media_init(struct csi2_dphy *dphy)
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun int ret;
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun dphy->pads[CSI2_DPHY_RX_PAD_SOURCE].flags =
841*4882a593Smuzhiyun MEDIA_PAD_FL_SOURCE | MEDIA_PAD_FL_MUST_CONNECT;
842*4882a593Smuzhiyun dphy->pads[CSI2_DPHY_RX_PAD_SINK].flags =
843*4882a593Smuzhiyun MEDIA_PAD_FL_SINK | MEDIA_PAD_FL_MUST_CONNECT;
844*4882a593Smuzhiyun dphy->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
845*4882a593Smuzhiyun ret = media_entity_pads_init(&dphy->sd.entity,
846*4882a593Smuzhiyun CSI2_DPHY_RX_PADS_NUM, dphy->pads);
847*4882a593Smuzhiyun if (ret < 0)
848*4882a593Smuzhiyun return ret;
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun v4l2_async_notifier_init(&dphy->notifier);
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun ret = v4l2_async_notifier_parse_fwnode_endpoints_by_port(
853*4882a593Smuzhiyun dphy->dev, &dphy->notifier,
854*4882a593Smuzhiyun sizeof(struct sensor_async_subdev), 0,
855*4882a593Smuzhiyun rockchip_csi2_dphy_fwnode_parse);
856*4882a593Smuzhiyun if (ret < 0)
857*4882a593Smuzhiyun return ret;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun dphy->sd.subdev_notifier = &dphy->notifier;
860*4882a593Smuzhiyun dphy->notifier.ops = &rockchip_csi2_dphy_async_ops;
861*4882a593Smuzhiyun ret = v4l2_async_subdev_notifier_register(&dphy->sd, &dphy->notifier);
862*4882a593Smuzhiyun if (ret) {
863*4882a593Smuzhiyun dev_err(dphy->dev,
864*4882a593Smuzhiyun "failed to register async notifier : %d\n", ret);
865*4882a593Smuzhiyun v4l2_async_notifier_cleanup(&dphy->notifier);
866*4882a593Smuzhiyun return ret;
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun return v4l2_async_register_subdev(&dphy->sd);
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun static struct dphy_drv_data rk3568_dphy_drv_data = {
873*4882a593Smuzhiyun .dev_name = "csi2dphy",
874*4882a593Smuzhiyun .chip_id = CHIP_ID_RK3568,
875*4882a593Smuzhiyun .num_inno_phy = 1,
876*4882a593Smuzhiyun .num_samsung_phy = 0,
877*4882a593Smuzhiyun };
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun static struct dphy_drv_data rk3588_dphy_drv_data = {
880*4882a593Smuzhiyun .dev_name = "csi2dphy",
881*4882a593Smuzhiyun .chip_id = CHIP_ID_RK3588,
882*4882a593Smuzhiyun .num_inno_phy = 2,
883*4882a593Smuzhiyun .num_samsung_phy = 2,
884*4882a593Smuzhiyun };
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun static struct dphy_drv_data rv1106_dphy_drv_data = {
887*4882a593Smuzhiyun .dev_name = "csi2dphy",
888*4882a593Smuzhiyun .chip_id = CHIP_ID_RV1106,
889*4882a593Smuzhiyun .num_inno_phy = 1,
890*4882a593Smuzhiyun .num_samsung_phy = 0,
891*4882a593Smuzhiyun };
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun static struct dphy_drv_data rk3562_dphy_drv_data = {
894*4882a593Smuzhiyun .dev_name = "csi2dphy",
895*4882a593Smuzhiyun .chip_id = CHIP_ID_RK3562,
896*4882a593Smuzhiyun .num_inno_phy = 2,
897*4882a593Smuzhiyun .num_samsung_phy = 0,
898*4882a593Smuzhiyun };
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun static const struct of_device_id rockchip_csi2_dphy_match_id[] = {
901*4882a593Smuzhiyun {
902*4882a593Smuzhiyun .compatible = "rockchip,rk3568-csi2-dphy",
903*4882a593Smuzhiyun .data = &rk3568_dphy_drv_data,
904*4882a593Smuzhiyun },
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun .compatible = "rockchip,rk3588-csi2-dphy",
907*4882a593Smuzhiyun .data = &rk3588_dphy_drv_data,
908*4882a593Smuzhiyun },
909*4882a593Smuzhiyun {
910*4882a593Smuzhiyun .compatible = "rockchip,rv1106-csi2-dphy",
911*4882a593Smuzhiyun .data = &rv1106_dphy_drv_data,
912*4882a593Smuzhiyun },
913*4882a593Smuzhiyun {
914*4882a593Smuzhiyun .compatible = "rockchip,rk3562-csi2-dphy",
915*4882a593Smuzhiyun .data = &rk3562_dphy_drv_data,
916*4882a593Smuzhiyun },
917*4882a593Smuzhiyun {}
918*4882a593Smuzhiyun };
919*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rockchip_csi2_dphy_match_id);
920*4882a593Smuzhiyun
rockchip_csi2_dphy_get_samsung_phy_hw(struct csi2_dphy * dphy)921*4882a593Smuzhiyun static int rockchip_csi2_dphy_get_samsung_phy_hw(struct csi2_dphy *dphy)
922*4882a593Smuzhiyun {
923*4882a593Smuzhiyun struct phy *dcphy;
924*4882a593Smuzhiyun struct device *dev = dphy->dev;
925*4882a593Smuzhiyun struct samsung_mipi_dcphy *dcphy_hw;
926*4882a593Smuzhiyun char phy_name[32];
927*4882a593Smuzhiyun int i = 0;
928*4882a593Smuzhiyun int ret = 0;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun for (i = 0; i < dphy->drv_data->num_samsung_phy; i++) {
931*4882a593Smuzhiyun sprintf(phy_name, "dcphy%d", i);
932*4882a593Smuzhiyun dcphy = devm_phy_optional_get(dev, phy_name);
933*4882a593Smuzhiyun if (IS_ERR(dcphy)) {
934*4882a593Smuzhiyun ret = PTR_ERR(dcphy);
935*4882a593Smuzhiyun dev_err(dphy->dev, "failed to get mipi dcphy: %d\n", ret);
936*4882a593Smuzhiyun return ret;
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun dcphy_hw = phy_get_drvdata(dcphy);
939*4882a593Smuzhiyun dphy->samsung_phy_group[i] = dcphy_hw;
940*4882a593Smuzhiyun }
941*4882a593Smuzhiyun return 0;
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun
rockchip_csi2_dphy_get_inno_phy_hw(struct csi2_dphy * dphy)944*4882a593Smuzhiyun static int rockchip_csi2_dphy_get_inno_phy_hw(struct csi2_dphy *dphy)
945*4882a593Smuzhiyun {
946*4882a593Smuzhiyun struct platform_device *plat_dev;
947*4882a593Smuzhiyun struct device *dev = dphy->dev;
948*4882a593Smuzhiyun struct csi2_dphy_hw *dphy_hw;
949*4882a593Smuzhiyun struct device_node *np;
950*4882a593Smuzhiyun int i = 0;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun for (i = 0; i < dphy->drv_data->num_inno_phy; i++) {
953*4882a593Smuzhiyun np = of_parse_phandle(dev->of_node, "rockchip,hw", i);
954*4882a593Smuzhiyun if (!np || !of_device_is_available(np)) {
955*4882a593Smuzhiyun dev_err(dphy->dev,
956*4882a593Smuzhiyun "failed to get dphy%d hw node\n", dphy->phy_index);
957*4882a593Smuzhiyun return -ENODEV;
958*4882a593Smuzhiyun }
959*4882a593Smuzhiyun plat_dev = of_find_device_by_node(np);
960*4882a593Smuzhiyun of_node_put(np);
961*4882a593Smuzhiyun if (!plat_dev) {
962*4882a593Smuzhiyun dev_err(dphy->dev,
963*4882a593Smuzhiyun "failed to get dphy%d hw from node\n",
964*4882a593Smuzhiyun dphy->phy_index);
965*4882a593Smuzhiyun return -ENODEV;
966*4882a593Smuzhiyun }
967*4882a593Smuzhiyun dphy_hw = platform_get_drvdata(plat_dev);
968*4882a593Smuzhiyun if (!dphy_hw) {
969*4882a593Smuzhiyun dev_err(dphy->dev,
970*4882a593Smuzhiyun "failed attach dphy%d hw\n",
971*4882a593Smuzhiyun dphy->phy_index);
972*4882a593Smuzhiyun return -EINVAL;
973*4882a593Smuzhiyun }
974*4882a593Smuzhiyun dphy->dphy_hw_group[i] = dphy_hw;
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun return 0;
977*4882a593Smuzhiyun }
978*4882a593Smuzhiyun
rockchip_csi2_dphy_get_hw(struct csi2_dphy * dphy)979*4882a593Smuzhiyun static int rockchip_csi2_dphy_get_hw(struct csi2_dphy *dphy)
980*4882a593Smuzhiyun {
981*4882a593Smuzhiyun int ret = 0;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun if (dphy->drv_data->chip_id == CHIP_ID_RK3588) {
984*4882a593Smuzhiyun ret = rockchip_csi2_dphy_get_samsung_phy_hw(dphy);
985*4882a593Smuzhiyun if (ret)
986*4882a593Smuzhiyun return ret;
987*4882a593Smuzhiyun ret = rockchip_csi2_dphy_get_inno_phy_hw(dphy);
988*4882a593Smuzhiyun } else {
989*4882a593Smuzhiyun ret = rockchip_csi2_dphy_get_inno_phy_hw(dphy);
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun return ret;
992*4882a593Smuzhiyun }
993*4882a593Smuzhiyun
rockchip_csi2_dphy_probe(struct platform_device * pdev)994*4882a593Smuzhiyun static int rockchip_csi2_dphy_probe(struct platform_device *pdev)
995*4882a593Smuzhiyun {
996*4882a593Smuzhiyun struct device *dev = &pdev->dev;
997*4882a593Smuzhiyun const struct of_device_id *of_id;
998*4882a593Smuzhiyun struct csi2_dphy *csi2dphy;
999*4882a593Smuzhiyun struct v4l2_subdev *sd;
1000*4882a593Smuzhiyun const struct dphy_drv_data *drv_data;
1001*4882a593Smuzhiyun int ret;
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun csi2dphy = devm_kzalloc(dev, sizeof(*csi2dphy), GFP_KERNEL);
1004*4882a593Smuzhiyun if (!csi2dphy)
1005*4882a593Smuzhiyun return -ENOMEM;
1006*4882a593Smuzhiyun csi2dphy->dev = dev;
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun of_id = of_match_device(rockchip_csi2_dphy_match_id, dev);
1009*4882a593Smuzhiyun if (!of_id)
1010*4882a593Smuzhiyun return -EINVAL;
1011*4882a593Smuzhiyun drv_data = of_id->data;
1012*4882a593Smuzhiyun csi2dphy->drv_data = drv_data;
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun csi2dphy->phy_index = of_alias_get_id(dev->of_node, drv_data->dev_name);
1015*4882a593Smuzhiyun if (csi2dphy->phy_index < 0 || csi2dphy->phy_index >= PHY_MAX)
1016*4882a593Smuzhiyun csi2dphy->phy_index = 0;
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun ret = rockchip_csi2_dphy_get_hw(csi2dphy);
1019*4882a593Smuzhiyun if (ret)
1020*4882a593Smuzhiyun return -EINVAL;
1021*4882a593Smuzhiyun if (csi2dphy->drv_data->chip_id == CHIP_ID_RK3568 ||
1022*4882a593Smuzhiyun csi2dphy->drv_data->chip_id == CHIP_ID_RV1106) {
1023*4882a593Smuzhiyun csi2dphy->csi_info.csi_num = 1;
1024*4882a593Smuzhiyun csi2dphy->csi_info.dphy_vendor[0] = PHY_VENDOR_INNO;
1025*4882a593Smuzhiyun rockchip_csi2_dphy_attach_hw(csi2dphy, 0, 0);
1026*4882a593Smuzhiyun } else {
1027*4882a593Smuzhiyun csi2dphy->csi_info.csi_num = 0;
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun sd = &csi2dphy->sd;
1030*4882a593Smuzhiyun mutex_init(&csi2dphy->mutex);
1031*4882a593Smuzhiyun v4l2_subdev_init(sd, &csi2_dphy_subdev_ops);
1032*4882a593Smuzhiyun sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1033*4882a593Smuzhiyun snprintf(sd->name, sizeof(sd->name),
1034*4882a593Smuzhiyun "rockchip-csi2-dphy%d", csi2dphy->phy_index);
1035*4882a593Smuzhiyun sd->dev = dev;
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun platform_set_drvdata(pdev, &sd->entity);
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun ret = rockchip_csi2dphy_media_init(csi2dphy);
1040*4882a593Smuzhiyun if (ret < 0)
1041*4882a593Smuzhiyun goto detach_hw;
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun pm_runtime_enable(&pdev->dev);
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun dev_info(dev, "csi2 dphy%d probe successfully!\n", csi2dphy->phy_index);
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun return 0;
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun detach_hw:
1050*4882a593Smuzhiyun mutex_destroy(&csi2dphy->mutex);
1051*4882a593Smuzhiyun return -EINVAL;
1052*4882a593Smuzhiyun }
1053*4882a593Smuzhiyun
rockchip_csi2_dphy_remove(struct platform_device * pdev)1054*4882a593Smuzhiyun static int rockchip_csi2_dphy_remove(struct platform_device *pdev)
1055*4882a593Smuzhiyun {
1056*4882a593Smuzhiyun struct media_entity *me = platform_get_drvdata(pdev);
1057*4882a593Smuzhiyun struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(me);
1058*4882a593Smuzhiyun struct csi2_dphy *dphy = to_csi2_dphy(sd);
1059*4882a593Smuzhiyun int i = 0;
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun for (i = 0; i < dphy->csi_info.csi_num; i++)
1062*4882a593Smuzhiyun rockchip_csi2_dphy_detach_hw(dphy, dphy->csi_info.csi_idx[i], i);
1063*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun pm_runtime_disable(&pdev->dev);
1066*4882a593Smuzhiyun mutex_destroy(&dphy->mutex);
1067*4882a593Smuzhiyun return 0;
1068*4882a593Smuzhiyun }
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun static const struct dev_pm_ops rockchip_csi2_dphy_pm_ops = {
1071*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(csi2_dphy_runtime_suspend,
1072*4882a593Smuzhiyun csi2_dphy_runtime_resume, NULL)
1073*4882a593Smuzhiyun };
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun struct platform_driver rockchip_csi2_dphy_driver = {
1076*4882a593Smuzhiyun .probe = rockchip_csi2_dphy_probe,
1077*4882a593Smuzhiyun .remove = rockchip_csi2_dphy_remove,
1078*4882a593Smuzhiyun .driver = {
1079*4882a593Smuzhiyun .name = "rockchip-csi2-dphy",
1080*4882a593Smuzhiyun .pm = &rockchip_csi2_dphy_pm_ops,
1081*4882a593Smuzhiyun .of_match_table = rockchip_csi2_dphy_match_id,
1082*4882a593Smuzhiyun },
1083*4882a593Smuzhiyun };
1084*4882a593Smuzhiyun
rockchip_csi2_dphy_init(void)1085*4882a593Smuzhiyun int rockchip_csi2_dphy_init(void)
1086*4882a593Smuzhiyun {
1087*4882a593Smuzhiyun return platform_driver_register(&rockchip_csi2_dphy_driver);
1088*4882a593Smuzhiyun }
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun #if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC)
1091*4882a593Smuzhiyun subsys_initcall(rockchip_csi2_dphy_init);
1092*4882a593Smuzhiyun #else
1093*4882a593Smuzhiyun #if !defined(CONFIG_VIDEO_REVERSE_IMAGE)
1094*4882a593Smuzhiyun module_platform_driver(rockchip_csi2_dphy_driver);
1095*4882a593Smuzhiyun #endif
1096*4882a593Smuzhiyun #endif
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun MODULE_AUTHOR("Rockchip Camera/ISP team");
1099*4882a593Smuzhiyun MODULE_DESCRIPTION("Rockchip MIPI CSI2 DPHY driver");
1100*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1101