xref: /OK3568_Linux_fs/kernel/drivers/phy/renesas/phy-rcar-gen3-pcie.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Renesas R-Car Gen3 PCIe PHY driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2018 Cogent Embedded, Inc.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/phy/phy.h>
13*4882a593Smuzhiyun #include <linux/of_device.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/spinlock.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define PHY_CTRL		0x4000		/* R8A77980 only */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* PHY control register (PHY_CTRL) */
20*4882a593Smuzhiyun #define PHY_CTRL_PHY_PWDN	BIT(2)
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct rcar_gen3_phy {
23*4882a593Smuzhiyun 	struct phy *phy;
24*4882a593Smuzhiyun 	spinlock_t lock;
25*4882a593Smuzhiyun 	void __iomem *base;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun 
rcar_gen3_phy_pcie_modify_reg(struct phy * p,unsigned int reg,u32 clear,u32 set)28*4882a593Smuzhiyun static void rcar_gen3_phy_pcie_modify_reg(struct phy *p, unsigned int reg,
29*4882a593Smuzhiyun 					  u32 clear, u32 set)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	struct rcar_gen3_phy *phy = phy_get_drvdata(p);
32*4882a593Smuzhiyun 	void __iomem *base = phy->base;
33*4882a593Smuzhiyun 	unsigned long flags;
34*4882a593Smuzhiyun 	u32 value;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	spin_lock_irqsave(&phy->lock, flags);
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	value = readl(base + reg);
39*4882a593Smuzhiyun 	value &= ~clear;
40*4882a593Smuzhiyun 	value |= set;
41*4882a593Smuzhiyun 	writel(value, base + reg);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	spin_unlock_irqrestore(&phy->lock, flags);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
r8a77980_phy_pcie_power_on(struct phy * p)46*4882a593Smuzhiyun static int r8a77980_phy_pcie_power_on(struct phy *p)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	/* Power on the PCIe PHY */
49*4882a593Smuzhiyun 	rcar_gen3_phy_pcie_modify_reg(p, PHY_CTRL, PHY_CTRL_PHY_PWDN, 0);
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	return 0;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
r8a77980_phy_pcie_power_off(struct phy * p)54*4882a593Smuzhiyun static int r8a77980_phy_pcie_power_off(struct phy *p)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	/* Power off the PCIe PHY */
57*4882a593Smuzhiyun 	rcar_gen3_phy_pcie_modify_reg(p, PHY_CTRL, 0, PHY_CTRL_PHY_PWDN);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun static const struct phy_ops r8a77980_phy_pcie_ops = {
63*4882a593Smuzhiyun 	.power_on	= r8a77980_phy_pcie_power_on,
64*4882a593Smuzhiyun 	.power_off	= r8a77980_phy_pcie_power_off,
65*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun static const struct of_device_id rcar_gen3_phy_pcie_match_table[] = {
69*4882a593Smuzhiyun 	{ .compatible = "renesas,r8a77980-pcie-phy" },
70*4882a593Smuzhiyun 	{ }
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rcar_gen3_phy_pcie_match_table);
73*4882a593Smuzhiyun 
rcar_gen3_phy_pcie_probe(struct platform_device * pdev)74*4882a593Smuzhiyun static int rcar_gen3_phy_pcie_probe(struct platform_device *pdev)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
77*4882a593Smuzhiyun 	struct phy_provider *provider;
78*4882a593Smuzhiyun 	struct rcar_gen3_phy *phy;
79*4882a593Smuzhiyun 	struct resource *res;
80*4882a593Smuzhiyun 	void __iomem *base;
81*4882a593Smuzhiyun 	int error;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	if (!dev->of_node) {
84*4882a593Smuzhiyun 		dev_err(dev,
85*4882a593Smuzhiyun 			"This driver must only be instantiated from the device tree\n");
86*4882a593Smuzhiyun 		return -EINVAL;
87*4882a593Smuzhiyun 	}
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
90*4882a593Smuzhiyun 	base = devm_ioremap_resource(dev, res);
91*4882a593Smuzhiyun 	if (IS_ERR(base))
92*4882a593Smuzhiyun 		return PTR_ERR(base);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
95*4882a593Smuzhiyun 	if (!phy)
96*4882a593Smuzhiyun 		return -ENOMEM;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	spin_lock_init(&phy->lock);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	phy->base = base;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	/*
103*4882a593Smuzhiyun 	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
104*4882a593Smuzhiyun 	 * And then, phy-core will manage runtime PM for this device.
105*4882a593Smuzhiyun 	 */
106*4882a593Smuzhiyun 	pm_runtime_enable(dev);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	phy->phy = devm_phy_create(dev, NULL, &r8a77980_phy_pcie_ops);
109*4882a593Smuzhiyun 	if (IS_ERR(phy->phy)) {
110*4882a593Smuzhiyun 		dev_err(dev, "Failed to create PCIe PHY\n");
111*4882a593Smuzhiyun 		error = PTR_ERR(phy->phy);
112*4882a593Smuzhiyun 		goto error;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 	phy_set_drvdata(phy->phy, phy);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
117*4882a593Smuzhiyun 	if (IS_ERR(provider)) {
118*4882a593Smuzhiyun 		dev_err(dev, "Failed to register PHY provider\n");
119*4882a593Smuzhiyun 		error = PTR_ERR(provider);
120*4882a593Smuzhiyun 		goto error;
121*4882a593Smuzhiyun 	}
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	return 0;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun error:
126*4882a593Smuzhiyun 	pm_runtime_disable(dev);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	return error;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
rcar_gen3_phy_pcie_remove(struct platform_device * pdev)131*4882a593Smuzhiyun static int rcar_gen3_phy_pcie_remove(struct platform_device *pdev)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	pm_runtime_disable(&pdev->dev);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	return 0;
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun static struct platform_driver rcar_gen3_phy_driver = {
139*4882a593Smuzhiyun 	.driver = {
140*4882a593Smuzhiyun 		.name		= "phy_rcar_gen3_pcie",
141*4882a593Smuzhiyun 		.of_match_table	= rcar_gen3_phy_pcie_match_table,
142*4882a593Smuzhiyun 	},
143*4882a593Smuzhiyun 	.probe	= rcar_gen3_phy_pcie_probe,
144*4882a593Smuzhiyun 	.remove = rcar_gen3_phy_pcie_remove,
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun module_platform_driver(rcar_gen3_phy_driver);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
150*4882a593Smuzhiyun MODULE_DESCRIPTION("Renesas R-Car Gen3 PCIe PHY");
151*4882a593Smuzhiyun MODULE_AUTHOR("Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>");
152