1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /**
3*4882a593Smuzhiyun * Copyright (C) 2016 Linaro Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun #include <linux/module.h>
6*4882a593Smuzhiyun #include <linux/ulpi/driver.h>
7*4882a593Smuzhiyun #include <linux/ulpi/regs.h>
8*4882a593Smuzhiyun #include <linux/phy/phy.h>
9*4882a593Smuzhiyun #include <linux/pinctrl/consumer.h>
10*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl-state.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define ULPI_HSIC_CFG 0x30
15*4882a593Smuzhiyun #define ULPI_HSIC_IO_CAL 0x33
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun struct qcom_usb_hsic_phy {
18*4882a593Smuzhiyun struct ulpi *ulpi;
19*4882a593Smuzhiyun struct phy *phy;
20*4882a593Smuzhiyun struct pinctrl *pctl;
21*4882a593Smuzhiyun struct clk *phy_clk;
22*4882a593Smuzhiyun struct clk *cal_clk;
23*4882a593Smuzhiyun struct clk *cal_sleep_clk;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
qcom_usb_hsic_phy_power_on(struct phy * phy)26*4882a593Smuzhiyun static int qcom_usb_hsic_phy_power_on(struct phy *phy)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
29*4882a593Smuzhiyun struct ulpi *ulpi = uphy->ulpi;
30*4882a593Smuzhiyun struct pinctrl_state *pins_default;
31*4882a593Smuzhiyun int ret;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun ret = clk_prepare_enable(uphy->phy_clk);
34*4882a593Smuzhiyun if (ret)
35*4882a593Smuzhiyun return ret;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun ret = clk_prepare_enable(uphy->cal_clk);
38*4882a593Smuzhiyun if (ret)
39*4882a593Smuzhiyun goto err_cal;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun ret = clk_prepare_enable(uphy->cal_sleep_clk);
42*4882a593Smuzhiyun if (ret)
43*4882a593Smuzhiyun goto err_sleep;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* Set periodic calibration interval to ~2.048sec in HSIC_IO_CAL_REG */
46*4882a593Smuzhiyun ret = ulpi_write(ulpi, ULPI_HSIC_IO_CAL, 0xff);
47*4882a593Smuzhiyun if (ret)
48*4882a593Smuzhiyun goto err_ulpi;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* Enable periodic IO calibration in HSIC_CFG register */
51*4882a593Smuzhiyun ret = ulpi_write(ulpi, ULPI_HSIC_CFG, 0xa8);
52*4882a593Smuzhiyun if (ret)
53*4882a593Smuzhiyun goto err_ulpi;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Configure pins for HSIC functionality */
56*4882a593Smuzhiyun pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT);
57*4882a593Smuzhiyun if (IS_ERR(pins_default)) {
58*4882a593Smuzhiyun ret = PTR_ERR(pins_default);
59*4882a593Smuzhiyun goto err_ulpi;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun ret = pinctrl_select_state(uphy->pctl, pins_default);
63*4882a593Smuzhiyun if (ret)
64*4882a593Smuzhiyun goto err_ulpi;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* Enable HSIC mode in HSIC_CFG register */
67*4882a593Smuzhiyun ret = ulpi_write(ulpi, ULPI_SET(ULPI_HSIC_CFG), 0x01);
68*4882a593Smuzhiyun if (ret)
69*4882a593Smuzhiyun goto err_ulpi;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Disable auto-resume */
72*4882a593Smuzhiyun ret = ulpi_write(ulpi, ULPI_CLR(ULPI_IFC_CTRL),
73*4882a593Smuzhiyun ULPI_IFC_CTRL_AUTORESUME);
74*4882a593Smuzhiyun if (ret)
75*4882a593Smuzhiyun goto err_ulpi;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun return ret;
78*4882a593Smuzhiyun err_ulpi:
79*4882a593Smuzhiyun clk_disable_unprepare(uphy->cal_sleep_clk);
80*4882a593Smuzhiyun err_sleep:
81*4882a593Smuzhiyun clk_disable_unprepare(uphy->cal_clk);
82*4882a593Smuzhiyun err_cal:
83*4882a593Smuzhiyun clk_disable_unprepare(uphy->phy_clk);
84*4882a593Smuzhiyun return ret;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
qcom_usb_hsic_phy_power_off(struct phy * phy)87*4882a593Smuzhiyun static int qcom_usb_hsic_phy_power_off(struct phy *phy)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun clk_disable_unprepare(uphy->cal_sleep_clk);
92*4882a593Smuzhiyun clk_disable_unprepare(uphy->cal_clk);
93*4882a593Smuzhiyun clk_disable_unprepare(uphy->phy_clk);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static const struct phy_ops qcom_usb_hsic_phy_ops = {
99*4882a593Smuzhiyun .power_on = qcom_usb_hsic_phy_power_on,
100*4882a593Smuzhiyun .power_off = qcom_usb_hsic_phy_power_off,
101*4882a593Smuzhiyun .owner = THIS_MODULE,
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
qcom_usb_hsic_phy_probe(struct ulpi * ulpi)104*4882a593Smuzhiyun static int qcom_usb_hsic_phy_probe(struct ulpi *ulpi)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct qcom_usb_hsic_phy *uphy;
107*4882a593Smuzhiyun struct phy_provider *p;
108*4882a593Smuzhiyun struct clk *clk;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
111*4882a593Smuzhiyun if (!uphy)
112*4882a593Smuzhiyun return -ENOMEM;
113*4882a593Smuzhiyun ulpi_set_drvdata(ulpi, uphy);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun uphy->ulpi = ulpi;
116*4882a593Smuzhiyun uphy->pctl = devm_pinctrl_get(&ulpi->dev);
117*4882a593Smuzhiyun if (IS_ERR(uphy->pctl))
118*4882a593Smuzhiyun return PTR_ERR(uphy->pctl);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy");
121*4882a593Smuzhiyun if (IS_ERR(clk))
122*4882a593Smuzhiyun return PTR_ERR(clk);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun uphy->cal_clk = clk = devm_clk_get(&ulpi->dev, "cal");
125*4882a593Smuzhiyun if (IS_ERR(clk))
126*4882a593Smuzhiyun return PTR_ERR(clk);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun uphy->cal_sleep_clk = clk = devm_clk_get(&ulpi->dev, "cal_sleep");
129*4882a593Smuzhiyun if (IS_ERR(clk))
130*4882a593Smuzhiyun return PTR_ERR(clk);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
133*4882a593Smuzhiyun &qcom_usb_hsic_phy_ops);
134*4882a593Smuzhiyun if (IS_ERR(uphy->phy))
135*4882a593Smuzhiyun return PTR_ERR(uphy->phy);
136*4882a593Smuzhiyun phy_set_drvdata(uphy->phy, uphy);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
139*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(p);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun static const struct of_device_id qcom_usb_hsic_phy_match[] = {
143*4882a593Smuzhiyun { .compatible = "qcom,usb-hsic-phy", },
144*4882a593Smuzhiyun { }
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qcom_usb_hsic_phy_match);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static struct ulpi_driver qcom_usb_hsic_phy_driver = {
149*4882a593Smuzhiyun .probe = qcom_usb_hsic_phy_probe,
150*4882a593Smuzhiyun .driver = {
151*4882a593Smuzhiyun .name = "qcom_usb_hsic_phy",
152*4882a593Smuzhiyun .of_match_table = qcom_usb_hsic_phy_match,
153*4882a593Smuzhiyun },
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun module_ulpi_driver(qcom_usb_hsic_phy_driver);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm USB HSIC phy");
158*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
159