1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyunobj-$(CONFIG_ARM_CCI_PMU) += arm-cci.o 3*4882a593Smuzhiyunobj-$(CONFIG_ARM_CCN) += arm-ccn.o 4*4882a593Smuzhiyunobj-$(CONFIG_ARM_CMN) += arm-cmn.o 5*4882a593Smuzhiyunobj-$(CONFIG_ARM_DSU_PMU) += arm_dsu_pmu.o 6*4882a593Smuzhiyunobj-$(CONFIG_ARM_PMU) += arm_pmu.o arm_pmu_platform.o 7*4882a593Smuzhiyunobj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o 8*4882a593Smuzhiyunobj-$(CONFIG_ARM_SMMU_V3_PMU) += arm_smmuv3_pmu.o 9*4882a593Smuzhiyunobj-$(CONFIG_FSL_IMX8_DDR_PMU) += fsl_imx8_ddr_perf.o 10*4882a593Smuzhiyunobj-$(CONFIG_HISI_PMU) += hisilicon/ 11*4882a593Smuzhiyunobj-$(CONFIG_QCOM_L2_PMU) += qcom_l2_pmu.o 12*4882a593Smuzhiyunobj-$(CONFIG_QCOM_L3_PMU) += qcom_l3_pmu.o 13*4882a593Smuzhiyunobj-$(CONFIG_THUNDERX2_PMU) += thunderx2_pmu.o 14*4882a593Smuzhiyunobj-$(CONFIG_XGENE_PMU) += xgene_pmu.o 15*4882a593Smuzhiyunobj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o 16