1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Regular cardbus driver ("yenta_socket")
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 1999, 2000 Linus Torvalds
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Changelog:
8*4882a593Smuzhiyun * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
9*4882a593Smuzhiyun * Dynamically adjust the size of the bridge resource
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * May 2003: Dominik Brodowski <linux@brodo.de>
12*4882a593Smuzhiyun * Merge pci_socket.c and yenta.c into one file
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/pci.h>
16*4882a593Smuzhiyun #include <linux/workqueue.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <pcmcia/ss.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include "yenta_socket.h"
26*4882a593Smuzhiyun #include "i82365.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static bool disable_clkrun;
29*4882a593Smuzhiyun module_param(disable_clkrun, bool, 0444);
30*4882a593Smuzhiyun MODULE_PARM_DESC(disable_clkrun,
31*4882a593Smuzhiyun "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)");
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static bool isa_probe = 1;
34*4882a593Smuzhiyun module_param(isa_probe, bool, 0444);
35*4882a593Smuzhiyun MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static bool pwr_irqs_off;
38*4882a593Smuzhiyun module_param(pwr_irqs_off, bool, 0644);
39*4882a593Smuzhiyun MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static char o2_speedup[] = "default";
42*4882a593Smuzhiyun module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
43*4882a593Smuzhiyun MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
44*4882a593Smuzhiyun "or 'default' (uses recommended behaviour for the detected bridge)");
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun * Only probe "regular" interrupts, don't
48*4882a593Smuzhiyun * touch dangerous spots like the mouse irq,
49*4882a593Smuzhiyun * because there are mice that apparently
50*4882a593Smuzhiyun * get really confused if they get fondled
51*4882a593Smuzhiyun * too intimately.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * Default to 11, 10, 9, 7, 6, 5, 4, 3.
54*4882a593Smuzhiyun */
55*4882a593Smuzhiyun static u32 isa_interrupts = 0x0ef8;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Don't ask.. */
61*4882a593Smuzhiyun #define to_cycles(ns) ((ns)/120)
62*4882a593Smuzhiyun #define to_ns(cycles) ((cycles)*120)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /*
65*4882a593Smuzhiyun * yenta PCI irq probing.
66*4882a593Smuzhiyun * currently only used in the TI/EnE initialization code
67*4882a593Smuzhiyun */
68*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TI
69*4882a593Smuzhiyun static int yenta_probe_cb_irq(struct yenta_socket *socket);
70*4882a593Smuzhiyun static unsigned int yenta_probe_irq(struct yenta_socket *socket,
71*4882a593Smuzhiyun u32 isa_irq_mask);
72*4882a593Smuzhiyun #endif
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static unsigned int override_bios;
76*4882a593Smuzhiyun module_param(override_bios, uint, 0000);
77*4882a593Smuzhiyun MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /*
80*4882a593Smuzhiyun * Generate easy-to-use ways of reading a cardbus sockets
81*4882a593Smuzhiyun * regular memory space ("cb_xxx"), configuration space
82*4882a593Smuzhiyun * ("config_xxx") and compatibility space ("exca_xxxx")
83*4882a593Smuzhiyun */
cb_readl(struct yenta_socket * socket,unsigned reg)84*4882a593Smuzhiyun static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun u32 val = readl(socket->base + reg);
87*4882a593Smuzhiyun debug("%04x %08x\n", socket, reg, val);
88*4882a593Smuzhiyun return val;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
cb_writel(struct yenta_socket * socket,unsigned reg,u32 val)91*4882a593Smuzhiyun static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun debug("%04x %08x\n", socket, reg, val);
94*4882a593Smuzhiyun writel(val, socket->base + reg);
95*4882a593Smuzhiyun readl(socket->base + reg); /* avoid problems with PCI write posting */
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
config_readb(struct yenta_socket * socket,unsigned offset)98*4882a593Smuzhiyun static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun u8 val;
101*4882a593Smuzhiyun pci_read_config_byte(socket->dev, offset, &val);
102*4882a593Smuzhiyun debug("%04x %02x\n", socket, offset, val);
103*4882a593Smuzhiyun return val;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
config_readw(struct yenta_socket * socket,unsigned offset)106*4882a593Smuzhiyun static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun u16 val;
109*4882a593Smuzhiyun pci_read_config_word(socket->dev, offset, &val);
110*4882a593Smuzhiyun debug("%04x %04x\n", socket, offset, val);
111*4882a593Smuzhiyun return val;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
config_readl(struct yenta_socket * socket,unsigned offset)114*4882a593Smuzhiyun static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun u32 val;
117*4882a593Smuzhiyun pci_read_config_dword(socket->dev, offset, &val);
118*4882a593Smuzhiyun debug("%04x %08x\n", socket, offset, val);
119*4882a593Smuzhiyun return val;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
config_writeb(struct yenta_socket * socket,unsigned offset,u8 val)122*4882a593Smuzhiyun static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun debug("%04x %02x\n", socket, offset, val);
125*4882a593Smuzhiyun pci_write_config_byte(socket->dev, offset, val);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
config_writew(struct yenta_socket * socket,unsigned offset,u16 val)128*4882a593Smuzhiyun static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun debug("%04x %04x\n", socket, offset, val);
131*4882a593Smuzhiyun pci_write_config_word(socket->dev, offset, val);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
config_writel(struct yenta_socket * socket,unsigned offset,u32 val)134*4882a593Smuzhiyun static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun debug("%04x %08x\n", socket, offset, val);
137*4882a593Smuzhiyun pci_write_config_dword(socket->dev, offset, val);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
exca_readb(struct yenta_socket * socket,unsigned reg)140*4882a593Smuzhiyun static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun u8 val = readb(socket->base + 0x800 + reg);
143*4882a593Smuzhiyun debug("%04x %02x\n", socket, reg, val);
144*4882a593Smuzhiyun return val;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
exca_readw(struct yenta_socket * socket,unsigned reg)147*4882a593Smuzhiyun static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun u16 val;
150*4882a593Smuzhiyun val = readb(socket->base + 0x800 + reg);
151*4882a593Smuzhiyun val |= readb(socket->base + 0x800 + reg + 1) << 8;
152*4882a593Smuzhiyun debug("%04x %04x\n", socket, reg, val);
153*4882a593Smuzhiyun return val;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
exca_writeb(struct yenta_socket * socket,unsigned reg,u8 val)156*4882a593Smuzhiyun static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun debug("%04x %02x\n", socket, reg, val);
159*4882a593Smuzhiyun writeb(val, socket->base + 0x800 + reg);
160*4882a593Smuzhiyun readb(socket->base + 0x800 + reg); /* PCI write posting... */
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
exca_writew(struct yenta_socket * socket,unsigned reg,u16 val)163*4882a593Smuzhiyun static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun debug("%04x %04x\n", socket, reg, val);
166*4882a593Smuzhiyun writeb(val, socket->base + 0x800 + reg);
167*4882a593Smuzhiyun writeb(val >> 8, socket->base + 0x800 + reg + 1);
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* PCI write posting... */
170*4882a593Smuzhiyun readb(socket->base + 0x800 + reg);
171*4882a593Smuzhiyun readb(socket->base + 0x800 + reg + 1);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
show_yenta_registers(struct device * yentadev,struct device_attribute * attr,char * buf)174*4882a593Smuzhiyun static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun struct yenta_socket *socket = dev_get_drvdata(yentadev);
177*4882a593Smuzhiyun int offset = 0, i;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun offset = snprintf(buf, PAGE_SIZE, "CB registers:");
180*4882a593Smuzhiyun for (i = 0; i < 0x24; i += 4) {
181*4882a593Smuzhiyun unsigned val;
182*4882a593Smuzhiyun if (!(i & 15))
183*4882a593Smuzhiyun offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
184*4882a593Smuzhiyun val = cb_readl(socket, i);
185*4882a593Smuzhiyun offset += scnprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
189*4882a593Smuzhiyun for (i = 0; i < 0x45; i++) {
190*4882a593Smuzhiyun unsigned char val;
191*4882a593Smuzhiyun if (!(i & 7)) {
192*4882a593Smuzhiyun if (i & 8) {
193*4882a593Smuzhiyun memcpy(buf + offset, " -", 2);
194*4882a593Smuzhiyun offset += 2;
195*4882a593Smuzhiyun } else
196*4882a593Smuzhiyun offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun val = exca_readb(socket, i);
199*4882a593Smuzhiyun offset += scnprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun buf[offset++] = '\n';
202*4882a593Smuzhiyun return offset;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /*
208*4882a593Smuzhiyun * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
209*4882a593Smuzhiyun * on what kind of card is inserted..
210*4882a593Smuzhiyun */
yenta_get_status(struct pcmcia_socket * sock,unsigned int * value)211*4882a593Smuzhiyun static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
214*4882a593Smuzhiyun unsigned int val;
215*4882a593Smuzhiyun u32 state = cb_readl(socket, CB_SOCKET_STATE);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun val = (state & CB_3VCARD) ? SS_3VCARD : 0;
218*4882a593Smuzhiyun val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
219*4882a593Smuzhiyun val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
220*4882a593Smuzhiyun val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun if (state & CB_CBCARD) {
224*4882a593Smuzhiyun val |= SS_CARDBUS;
225*4882a593Smuzhiyun val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
226*4882a593Smuzhiyun val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
227*4882a593Smuzhiyun val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
228*4882a593Smuzhiyun } else if (state & CB_16BITCARD) {
229*4882a593Smuzhiyun u8 status = exca_readb(socket, I365_STATUS);
230*4882a593Smuzhiyun val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
231*4882a593Smuzhiyun if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
232*4882a593Smuzhiyun val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
233*4882a593Smuzhiyun } else {
234*4882a593Smuzhiyun val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
235*4882a593Smuzhiyun val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
238*4882a593Smuzhiyun val |= (status & I365_CS_READY) ? SS_READY : 0;
239*4882a593Smuzhiyun val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun *value = val;
243*4882a593Smuzhiyun return 0;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
yenta_set_power(struct yenta_socket * socket,socket_state_t * state)246*4882a593Smuzhiyun static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun /* some birdges require to use the ExCA registers to power 16bit cards */
249*4882a593Smuzhiyun if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
250*4882a593Smuzhiyun (socket->flags & YENTA_16BIT_POWER_EXCA)) {
251*4882a593Smuzhiyun u8 reg, old;
252*4882a593Smuzhiyun reg = old = exca_readb(socket, I365_POWER);
253*4882a593Smuzhiyun reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* i82365SL-DF style */
256*4882a593Smuzhiyun if (socket->flags & YENTA_16BIT_POWER_DF) {
257*4882a593Smuzhiyun switch (state->Vcc) {
258*4882a593Smuzhiyun case 33:
259*4882a593Smuzhiyun reg |= I365_VCC_3V;
260*4882a593Smuzhiyun break;
261*4882a593Smuzhiyun case 50:
262*4882a593Smuzhiyun reg |= I365_VCC_5V;
263*4882a593Smuzhiyun break;
264*4882a593Smuzhiyun default:
265*4882a593Smuzhiyun reg = 0;
266*4882a593Smuzhiyun break;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun switch (state->Vpp) {
269*4882a593Smuzhiyun case 33:
270*4882a593Smuzhiyun case 50:
271*4882a593Smuzhiyun reg |= I365_VPP1_5V;
272*4882a593Smuzhiyun break;
273*4882a593Smuzhiyun case 120:
274*4882a593Smuzhiyun reg |= I365_VPP1_12V;
275*4882a593Smuzhiyun break;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun } else {
278*4882a593Smuzhiyun /* i82365SL-B style */
279*4882a593Smuzhiyun switch (state->Vcc) {
280*4882a593Smuzhiyun case 50:
281*4882a593Smuzhiyun reg |= I365_VCC_5V;
282*4882a593Smuzhiyun break;
283*4882a593Smuzhiyun default:
284*4882a593Smuzhiyun reg = 0;
285*4882a593Smuzhiyun break;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun switch (state->Vpp) {
288*4882a593Smuzhiyun case 50:
289*4882a593Smuzhiyun reg |= I365_VPP1_5V | I365_VPP2_5V;
290*4882a593Smuzhiyun break;
291*4882a593Smuzhiyun case 120:
292*4882a593Smuzhiyun reg |= I365_VPP1_12V | I365_VPP2_12V;
293*4882a593Smuzhiyun break;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun if (reg != old)
298*4882a593Smuzhiyun exca_writeb(socket, I365_POWER, reg);
299*4882a593Smuzhiyun } else {
300*4882a593Smuzhiyun u32 reg = 0; /* CB_SC_STPCLK? */
301*4882a593Smuzhiyun switch (state->Vcc) {
302*4882a593Smuzhiyun case 33:
303*4882a593Smuzhiyun reg = CB_SC_VCC_3V;
304*4882a593Smuzhiyun break;
305*4882a593Smuzhiyun case 50:
306*4882a593Smuzhiyun reg = CB_SC_VCC_5V;
307*4882a593Smuzhiyun break;
308*4882a593Smuzhiyun default:
309*4882a593Smuzhiyun reg = 0;
310*4882a593Smuzhiyun break;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun switch (state->Vpp) {
313*4882a593Smuzhiyun case 33:
314*4882a593Smuzhiyun reg |= CB_SC_VPP_3V;
315*4882a593Smuzhiyun break;
316*4882a593Smuzhiyun case 50:
317*4882a593Smuzhiyun reg |= CB_SC_VPP_5V;
318*4882a593Smuzhiyun break;
319*4882a593Smuzhiyun case 120:
320*4882a593Smuzhiyun reg |= CB_SC_VPP_12V;
321*4882a593Smuzhiyun break;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
324*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_CONTROL, reg);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
yenta_set_socket(struct pcmcia_socket * sock,socket_state_t * state)328*4882a593Smuzhiyun static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
331*4882a593Smuzhiyun u16 bridge;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun /* if powering down: do it immediately */
334*4882a593Smuzhiyun if (state->Vcc == 0)
335*4882a593Smuzhiyun yenta_set_power(socket, state);
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun socket->io_irq = state->io_irq;
338*4882a593Smuzhiyun bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
339*4882a593Smuzhiyun if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
340*4882a593Smuzhiyun u8 intr;
341*4882a593Smuzhiyun bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /* ISA interrupt control? */
344*4882a593Smuzhiyun intr = exca_readb(socket, I365_INTCTL);
345*4882a593Smuzhiyun intr = (intr & ~0xf);
346*4882a593Smuzhiyun if (!socket->dev->irq) {
347*4882a593Smuzhiyun intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
348*4882a593Smuzhiyun bridge |= CB_BRIDGE_INTR;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun exca_writeb(socket, I365_INTCTL, intr);
351*4882a593Smuzhiyun } else {
352*4882a593Smuzhiyun u8 reg;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
355*4882a593Smuzhiyun reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
356*4882a593Smuzhiyun reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
357*4882a593Smuzhiyun if (state->io_irq != socket->dev->irq) {
358*4882a593Smuzhiyun reg |= state->io_irq;
359*4882a593Smuzhiyun bridge |= CB_BRIDGE_INTR;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun exca_writeb(socket, I365_INTCTL, reg);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
364*4882a593Smuzhiyun reg |= I365_PWR_NORESET;
365*4882a593Smuzhiyun if (state->flags & SS_PWR_AUTO)
366*4882a593Smuzhiyun reg |= I365_PWR_AUTO;
367*4882a593Smuzhiyun if (state->flags & SS_OUTPUT_ENA)
368*4882a593Smuzhiyun reg |= I365_PWR_OUT;
369*4882a593Smuzhiyun if (exca_readb(socket, I365_POWER) != reg)
370*4882a593Smuzhiyun exca_writeb(socket, I365_POWER, reg);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun /* CSC interrupt: no ISA irq for CSC */
373*4882a593Smuzhiyun reg = exca_readb(socket, I365_CSCINT);
374*4882a593Smuzhiyun reg &= I365_CSC_IRQ_MASK;
375*4882a593Smuzhiyun reg |= I365_CSC_DETECT;
376*4882a593Smuzhiyun if (state->flags & SS_IOCARD) {
377*4882a593Smuzhiyun if (state->csc_mask & SS_STSCHG)
378*4882a593Smuzhiyun reg |= I365_CSC_STSCHG;
379*4882a593Smuzhiyun } else {
380*4882a593Smuzhiyun if (state->csc_mask & SS_BATDEAD)
381*4882a593Smuzhiyun reg |= I365_CSC_BVD1;
382*4882a593Smuzhiyun if (state->csc_mask & SS_BATWARN)
383*4882a593Smuzhiyun reg |= I365_CSC_BVD2;
384*4882a593Smuzhiyun if (state->csc_mask & SS_READY)
385*4882a593Smuzhiyun reg |= I365_CSC_READY;
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun exca_writeb(socket, I365_CSCINT, reg);
388*4882a593Smuzhiyun exca_readb(socket, I365_CSC);
389*4882a593Smuzhiyun if (sock->zoom_video)
390*4882a593Smuzhiyun sock->zoom_video(sock, state->flags & SS_ZVCARD);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun config_writew(socket, CB_BRIDGE_CONTROL, bridge);
393*4882a593Smuzhiyun /* Socket event mask: get card insert/remove events.. */
394*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_EVENT, -1);
395*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /* if powering up: do it as the last step when the socket is configured */
398*4882a593Smuzhiyun if (state->Vcc != 0)
399*4882a593Smuzhiyun yenta_set_power(socket, state);
400*4882a593Smuzhiyun return 0;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
yenta_set_io_map(struct pcmcia_socket * sock,struct pccard_io_map * io)403*4882a593Smuzhiyun static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
406*4882a593Smuzhiyun int map;
407*4882a593Smuzhiyun unsigned char ioctl, addr, enable;
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun map = io->map;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun if (map > 1)
412*4882a593Smuzhiyun return -EINVAL;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun enable = I365_ENA_IO(map);
415*4882a593Smuzhiyun addr = exca_readb(socket, I365_ADDRWIN);
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun /* Disable the window before changing it.. */
418*4882a593Smuzhiyun if (addr & enable) {
419*4882a593Smuzhiyun addr &= ~enable;
420*4882a593Smuzhiyun exca_writeb(socket, I365_ADDRWIN, addr);
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
424*4882a593Smuzhiyun exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
427*4882a593Smuzhiyun if (io->flags & MAP_0WS)
428*4882a593Smuzhiyun ioctl |= I365_IOCTL_0WS(map);
429*4882a593Smuzhiyun if (io->flags & MAP_16BIT)
430*4882a593Smuzhiyun ioctl |= I365_IOCTL_16BIT(map);
431*4882a593Smuzhiyun if (io->flags & MAP_AUTOSZ)
432*4882a593Smuzhiyun ioctl |= I365_IOCTL_IOCS16(map);
433*4882a593Smuzhiyun exca_writeb(socket, I365_IOCTL, ioctl);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun if (io->flags & MAP_ACTIVE)
436*4882a593Smuzhiyun exca_writeb(socket, I365_ADDRWIN, addr | enable);
437*4882a593Smuzhiyun return 0;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
yenta_set_mem_map(struct pcmcia_socket * sock,struct pccard_mem_map * mem)440*4882a593Smuzhiyun static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
443*4882a593Smuzhiyun struct pci_bus_region region;
444*4882a593Smuzhiyun int map;
445*4882a593Smuzhiyun unsigned char addr, enable;
446*4882a593Smuzhiyun unsigned int start, stop, card_start;
447*4882a593Smuzhiyun unsigned short word;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun map = mem->map;
452*4882a593Smuzhiyun start = region.start;
453*4882a593Smuzhiyun stop = region.end;
454*4882a593Smuzhiyun card_start = mem->card_start;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
457*4882a593Smuzhiyun (card_start >> 26) || mem->speed > 1000)
458*4882a593Smuzhiyun return -EINVAL;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun enable = I365_ENA_MEM(map);
461*4882a593Smuzhiyun addr = exca_readb(socket, I365_ADDRWIN);
462*4882a593Smuzhiyun if (addr & enable) {
463*4882a593Smuzhiyun addr &= ~enable;
464*4882a593Smuzhiyun exca_writeb(socket, I365_ADDRWIN, addr);
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun word = (start >> 12) & 0x0fff;
470*4882a593Smuzhiyun if (mem->flags & MAP_16BIT)
471*4882a593Smuzhiyun word |= I365_MEM_16BIT;
472*4882a593Smuzhiyun if (mem->flags & MAP_0WS)
473*4882a593Smuzhiyun word |= I365_MEM_0WS;
474*4882a593Smuzhiyun exca_writew(socket, I365_MEM(map) + I365_W_START, word);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun word = (stop >> 12) & 0x0fff;
477*4882a593Smuzhiyun switch (to_cycles(mem->speed)) {
478*4882a593Smuzhiyun case 0:
479*4882a593Smuzhiyun break;
480*4882a593Smuzhiyun case 1:
481*4882a593Smuzhiyun word |= I365_MEM_WS0;
482*4882a593Smuzhiyun break;
483*4882a593Smuzhiyun case 2:
484*4882a593Smuzhiyun word |= I365_MEM_WS1;
485*4882a593Smuzhiyun break;
486*4882a593Smuzhiyun default:
487*4882a593Smuzhiyun word |= I365_MEM_WS1 | I365_MEM_WS0;
488*4882a593Smuzhiyun break;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun word = ((card_start - start) >> 12) & 0x3fff;
493*4882a593Smuzhiyun if (mem->flags & MAP_WRPROT)
494*4882a593Smuzhiyun word |= I365_MEM_WRPROT;
495*4882a593Smuzhiyun if (mem->flags & MAP_ATTRIB)
496*4882a593Smuzhiyun word |= I365_MEM_REG;
497*4882a593Smuzhiyun exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun if (mem->flags & MAP_ACTIVE)
500*4882a593Smuzhiyun exca_writeb(socket, I365_ADDRWIN, addr | enable);
501*4882a593Smuzhiyun return 0;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun
yenta_interrupt(int irq,void * dev_id)506*4882a593Smuzhiyun static irqreturn_t yenta_interrupt(int irq, void *dev_id)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun unsigned int events;
509*4882a593Smuzhiyun struct yenta_socket *socket = (struct yenta_socket *) dev_id;
510*4882a593Smuzhiyun u8 csc;
511*4882a593Smuzhiyun u32 cb_event;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun /* Clear interrupt status for the event */
514*4882a593Smuzhiyun cb_event = cb_readl(socket, CB_SOCKET_EVENT);
515*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_EVENT, cb_event);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun csc = exca_readb(socket, I365_CSC);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun if (!(cb_event || csc))
520*4882a593Smuzhiyun return IRQ_NONE;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
523*4882a593Smuzhiyun events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
524*4882a593Smuzhiyun if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
525*4882a593Smuzhiyun events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
526*4882a593Smuzhiyun } else {
527*4882a593Smuzhiyun events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
528*4882a593Smuzhiyun events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
529*4882a593Smuzhiyun events |= (csc & I365_CSC_READY) ? SS_READY : 0;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun if (events)
533*4882a593Smuzhiyun pcmcia_parse_events(&socket->socket, events);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun return IRQ_HANDLED;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun
yenta_interrupt_wrapper(struct timer_list * t)538*4882a593Smuzhiyun static void yenta_interrupt_wrapper(struct timer_list *t)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun struct yenta_socket *socket = from_timer(socket, t, poll_timer);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun yenta_interrupt(0, (void *)socket);
543*4882a593Smuzhiyun socket->poll_timer.expires = jiffies + HZ;
544*4882a593Smuzhiyun add_timer(&socket->poll_timer);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
yenta_clear_maps(struct yenta_socket * socket)547*4882a593Smuzhiyun static void yenta_clear_maps(struct yenta_socket *socket)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun int i;
550*4882a593Smuzhiyun struct resource res = { .start = 0, .end = 0x0fff };
551*4882a593Smuzhiyun pccard_io_map io = { 0, 0, 0, 0, 1 };
552*4882a593Smuzhiyun pccard_mem_map mem = { .res = &res, };
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun yenta_set_socket(&socket->socket, &dead_socket);
555*4882a593Smuzhiyun for (i = 0; i < 2; i++) {
556*4882a593Smuzhiyun io.map = i;
557*4882a593Smuzhiyun yenta_set_io_map(&socket->socket, &io);
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun for (i = 0; i < 5; i++) {
560*4882a593Smuzhiyun mem.map = i;
561*4882a593Smuzhiyun yenta_set_mem_map(&socket->socket, &mem);
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun /* redoes voltage interrogation if required */
yenta_interrogate(struct yenta_socket * socket)566*4882a593Smuzhiyun static void yenta_interrogate(struct yenta_socket *socket)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun u32 state;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun state = cb_readl(socket, CB_SOCKET_STATE);
571*4882a593Smuzhiyun if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
572*4882a593Smuzhiyun (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
573*4882a593Smuzhiyun ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
574*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun /* Called at resume and initialization events */
yenta_sock_init(struct pcmcia_socket * sock)578*4882a593Smuzhiyun static int yenta_sock_init(struct pcmcia_socket *sock)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun exca_writeb(socket, I365_GBLCTL, 0x00);
583*4882a593Smuzhiyun exca_writeb(socket, I365_GENCTL, 0x00);
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun /* Redo card voltage interrogation */
586*4882a593Smuzhiyun yenta_interrogate(socket);
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun yenta_clear_maps(socket);
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun if (socket->type && socket->type->sock_init)
591*4882a593Smuzhiyun socket->type->sock_init(socket);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun /* Re-enable CSC interrupts */
594*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun return 0;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun
yenta_sock_suspend(struct pcmcia_socket * sock)599*4882a593Smuzhiyun static int yenta_sock_suspend(struct pcmcia_socket *sock)
600*4882a593Smuzhiyun {
601*4882a593Smuzhiyun struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* Disable CSC interrupts */
604*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, 0x0);
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun return 0;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun /*
610*4882a593Smuzhiyun * Use an adaptive allocation for the memory resource,
611*4882a593Smuzhiyun * sometimes the memory behind pci bridges is limited:
612*4882a593Smuzhiyun * 1/8 of the size of the io window of the parent.
613*4882a593Smuzhiyun * max 4 MB, min 16 kB. We try very hard to not get below
614*4882a593Smuzhiyun * the "ACC" values, though.
615*4882a593Smuzhiyun */
616*4882a593Smuzhiyun #define BRIDGE_MEM_MAX (4*1024*1024)
617*4882a593Smuzhiyun #define BRIDGE_MEM_ACC (128*1024)
618*4882a593Smuzhiyun #define BRIDGE_MEM_MIN (16*1024)
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun #define BRIDGE_IO_MAX 512
621*4882a593Smuzhiyun #define BRIDGE_IO_ACC 256
622*4882a593Smuzhiyun #define BRIDGE_IO_MIN 32
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun #ifndef PCIBIOS_MIN_CARDBUS_IO
625*4882a593Smuzhiyun #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
626*4882a593Smuzhiyun #endif
627*4882a593Smuzhiyun
yenta_search_one_res(struct resource * root,struct resource * res,u32 min)628*4882a593Smuzhiyun static int yenta_search_one_res(struct resource *root, struct resource *res,
629*4882a593Smuzhiyun u32 min)
630*4882a593Smuzhiyun {
631*4882a593Smuzhiyun u32 align, size, start, end;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun if (res->flags & IORESOURCE_IO) {
634*4882a593Smuzhiyun align = 1024;
635*4882a593Smuzhiyun size = BRIDGE_IO_MAX;
636*4882a593Smuzhiyun start = PCIBIOS_MIN_CARDBUS_IO;
637*4882a593Smuzhiyun end = ~0U;
638*4882a593Smuzhiyun } else {
639*4882a593Smuzhiyun unsigned long avail = root->end - root->start;
640*4882a593Smuzhiyun int i;
641*4882a593Smuzhiyun size = BRIDGE_MEM_MAX;
642*4882a593Smuzhiyun if (size > avail/8) {
643*4882a593Smuzhiyun size = (avail+1)/8;
644*4882a593Smuzhiyun /* round size down to next power of 2 */
645*4882a593Smuzhiyun i = 0;
646*4882a593Smuzhiyun while ((size /= 2) != 0)
647*4882a593Smuzhiyun i++;
648*4882a593Smuzhiyun size = 1 << i;
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun if (size < min)
651*4882a593Smuzhiyun size = min;
652*4882a593Smuzhiyun align = size;
653*4882a593Smuzhiyun start = PCIBIOS_MIN_MEM;
654*4882a593Smuzhiyun end = ~0U;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun do {
658*4882a593Smuzhiyun if (allocate_resource(root, res, size, start, end, align,
659*4882a593Smuzhiyun NULL, NULL) == 0) {
660*4882a593Smuzhiyun return 1;
661*4882a593Smuzhiyun }
662*4882a593Smuzhiyun size = size/2;
663*4882a593Smuzhiyun align = size;
664*4882a593Smuzhiyun } while (size >= min);
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun return 0;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun
yenta_search_res(struct yenta_socket * socket,struct resource * res,u32 min)670*4882a593Smuzhiyun static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
671*4882a593Smuzhiyun u32 min)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun struct resource *root;
674*4882a593Smuzhiyun int i;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun pci_bus_for_each_resource(socket->dev->bus, root, i) {
677*4882a593Smuzhiyun if (!root)
678*4882a593Smuzhiyun continue;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun if ((res->flags ^ root->flags) &
681*4882a593Smuzhiyun (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
682*4882a593Smuzhiyun continue; /* Wrong type */
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun if (yenta_search_one_res(root, res, min))
685*4882a593Smuzhiyun return 1;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun return 0;
688*4882a593Smuzhiyun }
689*4882a593Smuzhiyun
yenta_allocate_res(struct yenta_socket * socket,int nr,unsigned type,int addr_start,int addr_end)690*4882a593Smuzhiyun static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
691*4882a593Smuzhiyun {
692*4882a593Smuzhiyun struct pci_dev *dev = socket->dev;
693*4882a593Smuzhiyun struct resource *res;
694*4882a593Smuzhiyun struct pci_bus_region region;
695*4882a593Smuzhiyun unsigned mask;
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun res = &dev->resource[nr];
698*4882a593Smuzhiyun /* Already allocated? */
699*4882a593Smuzhiyun if (res->parent)
700*4882a593Smuzhiyun return 0;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
703*4882a593Smuzhiyun mask = ~0xfff;
704*4882a593Smuzhiyun if (type & IORESOURCE_IO)
705*4882a593Smuzhiyun mask = ~3;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun res->name = dev->subordinate->name;
708*4882a593Smuzhiyun res->flags = type;
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun region.start = config_readl(socket, addr_start) & mask;
711*4882a593Smuzhiyun region.end = config_readl(socket, addr_end) | ~mask;
712*4882a593Smuzhiyun if (region.start && region.end > region.start && !override_bios) {
713*4882a593Smuzhiyun pcibios_bus_to_resource(dev->bus, res, ®ion);
714*4882a593Smuzhiyun if (pci_claim_resource(dev, nr) == 0)
715*4882a593Smuzhiyun return 0;
716*4882a593Smuzhiyun dev_info(&dev->dev,
717*4882a593Smuzhiyun "Preassigned resource %d busy or not available, reconfiguring...\n",
718*4882a593Smuzhiyun nr);
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun if (type & IORESOURCE_IO) {
722*4882a593Smuzhiyun if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
723*4882a593Smuzhiyun (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
724*4882a593Smuzhiyun (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
725*4882a593Smuzhiyun return 1;
726*4882a593Smuzhiyun } else {
727*4882a593Smuzhiyun if (type & IORESOURCE_PREFETCH) {
728*4882a593Smuzhiyun if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
729*4882a593Smuzhiyun (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
730*4882a593Smuzhiyun (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
731*4882a593Smuzhiyun return 1;
732*4882a593Smuzhiyun /* Approximating prefetchable by non-prefetchable */
733*4882a593Smuzhiyun res->flags = IORESOURCE_MEM;
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
736*4882a593Smuzhiyun (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
737*4882a593Smuzhiyun (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
738*4882a593Smuzhiyun return 1;
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun dev_info(&dev->dev,
742*4882a593Smuzhiyun "no resource of type %x available, trying to continue...\n",
743*4882a593Smuzhiyun type);
744*4882a593Smuzhiyun res->start = res->end = res->flags = 0;
745*4882a593Smuzhiyun return 0;
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun
yenta_free_res(struct yenta_socket * socket,int nr)748*4882a593Smuzhiyun static void yenta_free_res(struct yenta_socket *socket, int nr)
749*4882a593Smuzhiyun {
750*4882a593Smuzhiyun struct pci_dev *dev = socket->dev;
751*4882a593Smuzhiyun struct resource *res;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun res = &dev->resource[nr];
754*4882a593Smuzhiyun if (res->start != 0 && res->end != 0)
755*4882a593Smuzhiyun release_resource(res);
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun res->start = res->end = res->flags = 0;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun /*
761*4882a593Smuzhiyun * Allocate the bridge mappings for the device..
762*4882a593Smuzhiyun */
yenta_allocate_resources(struct yenta_socket * socket)763*4882a593Smuzhiyun static void yenta_allocate_resources(struct yenta_socket *socket)
764*4882a593Smuzhiyun {
765*4882a593Smuzhiyun int program = 0;
766*4882a593Smuzhiyun program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW,
767*4882a593Smuzhiyun IORESOURCE_IO,
768*4882a593Smuzhiyun PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
769*4882a593Smuzhiyun program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW,
770*4882a593Smuzhiyun IORESOURCE_IO,
771*4882a593Smuzhiyun PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
772*4882a593Smuzhiyun program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW,
773*4882a593Smuzhiyun IORESOURCE_MEM | IORESOURCE_PREFETCH,
774*4882a593Smuzhiyun PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
775*4882a593Smuzhiyun program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW,
776*4882a593Smuzhiyun IORESOURCE_MEM,
777*4882a593Smuzhiyun PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
778*4882a593Smuzhiyun if (program)
779*4882a593Smuzhiyun pci_setup_cardbus(socket->dev->subordinate);
780*4882a593Smuzhiyun }
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun /*
784*4882a593Smuzhiyun * Free the bridge mappings for the device..
785*4882a593Smuzhiyun */
yenta_free_resources(struct yenta_socket * socket)786*4882a593Smuzhiyun static void yenta_free_resources(struct yenta_socket *socket)
787*4882a593Smuzhiyun {
788*4882a593Smuzhiyun yenta_free_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW);
789*4882a593Smuzhiyun yenta_free_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW);
790*4882a593Smuzhiyun yenta_free_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW);
791*4882a593Smuzhiyun yenta_free_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW);
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun /*
796*4882a593Smuzhiyun * Close it down - release our resources and go home..
797*4882a593Smuzhiyun */
yenta_close(struct pci_dev * dev)798*4882a593Smuzhiyun static void yenta_close(struct pci_dev *dev)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun struct yenta_socket *sock = pci_get_drvdata(dev);
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun /* Remove the register attributes */
803*4882a593Smuzhiyun device_remove_file(&dev->dev, &dev_attr_yenta_registers);
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun /* we don't want a dying socket registered */
806*4882a593Smuzhiyun pcmcia_unregister_socket(&sock->socket);
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun /* Disable all events so we don't die in an IRQ storm */
809*4882a593Smuzhiyun cb_writel(sock, CB_SOCKET_MASK, 0x0);
810*4882a593Smuzhiyun exca_writeb(sock, I365_CSCINT, 0);
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun if (sock->cb_irq)
813*4882a593Smuzhiyun free_irq(sock->cb_irq, sock);
814*4882a593Smuzhiyun else
815*4882a593Smuzhiyun del_timer_sync(&sock->poll_timer);
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun iounmap(sock->base);
818*4882a593Smuzhiyun yenta_free_resources(sock);
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun pci_release_regions(dev);
821*4882a593Smuzhiyun pci_disable_device(dev);
822*4882a593Smuzhiyun pci_set_drvdata(dev, NULL);
823*4882a593Smuzhiyun kfree(sock);
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun static struct pccard_operations yenta_socket_operations = {
828*4882a593Smuzhiyun .init = yenta_sock_init,
829*4882a593Smuzhiyun .suspend = yenta_sock_suspend,
830*4882a593Smuzhiyun .get_status = yenta_get_status,
831*4882a593Smuzhiyun .set_socket = yenta_set_socket,
832*4882a593Smuzhiyun .set_io_map = yenta_set_io_map,
833*4882a593Smuzhiyun .set_mem_map = yenta_set_mem_map,
834*4882a593Smuzhiyun };
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TI
838*4882a593Smuzhiyun #include "ti113x.h"
839*4882a593Smuzhiyun #endif
840*4882a593Smuzhiyun #ifdef CONFIG_YENTA_RICOH
841*4882a593Smuzhiyun #include "ricoh.h"
842*4882a593Smuzhiyun #endif
843*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TOSHIBA
844*4882a593Smuzhiyun #include "topic.h"
845*4882a593Smuzhiyun #endif
846*4882a593Smuzhiyun #ifdef CONFIG_YENTA_O2
847*4882a593Smuzhiyun #include "o2micro.h"
848*4882a593Smuzhiyun #endif
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun enum {
851*4882a593Smuzhiyun CARDBUS_TYPE_DEFAULT = -1,
852*4882a593Smuzhiyun CARDBUS_TYPE_TI,
853*4882a593Smuzhiyun CARDBUS_TYPE_TI113X,
854*4882a593Smuzhiyun CARDBUS_TYPE_TI12XX,
855*4882a593Smuzhiyun CARDBUS_TYPE_TI1250,
856*4882a593Smuzhiyun CARDBUS_TYPE_RICOH,
857*4882a593Smuzhiyun CARDBUS_TYPE_TOPIC95,
858*4882a593Smuzhiyun CARDBUS_TYPE_TOPIC97,
859*4882a593Smuzhiyun CARDBUS_TYPE_O2MICRO,
860*4882a593Smuzhiyun CARDBUS_TYPE_ENE,
861*4882a593Smuzhiyun };
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun /*
864*4882a593Smuzhiyun * Different cardbus controllers have slightly different
865*4882a593Smuzhiyun * initialization sequences etc details. List them here..
866*4882a593Smuzhiyun */
867*4882a593Smuzhiyun static struct cardbus_type cardbus_type[] = {
868*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TI
869*4882a593Smuzhiyun [CARDBUS_TYPE_TI] = {
870*4882a593Smuzhiyun .override = ti_override,
871*4882a593Smuzhiyun .save_state = ti_save_state,
872*4882a593Smuzhiyun .restore_state = ti_restore_state,
873*4882a593Smuzhiyun .sock_init = ti_init,
874*4882a593Smuzhiyun },
875*4882a593Smuzhiyun [CARDBUS_TYPE_TI113X] = {
876*4882a593Smuzhiyun .override = ti113x_override,
877*4882a593Smuzhiyun .save_state = ti_save_state,
878*4882a593Smuzhiyun .restore_state = ti_restore_state,
879*4882a593Smuzhiyun .sock_init = ti_init,
880*4882a593Smuzhiyun },
881*4882a593Smuzhiyun [CARDBUS_TYPE_TI12XX] = {
882*4882a593Smuzhiyun .override = ti12xx_override,
883*4882a593Smuzhiyun .save_state = ti_save_state,
884*4882a593Smuzhiyun .restore_state = ti_restore_state,
885*4882a593Smuzhiyun .sock_init = ti_init,
886*4882a593Smuzhiyun },
887*4882a593Smuzhiyun [CARDBUS_TYPE_TI1250] = {
888*4882a593Smuzhiyun .override = ti1250_override,
889*4882a593Smuzhiyun .save_state = ti_save_state,
890*4882a593Smuzhiyun .restore_state = ti_restore_state,
891*4882a593Smuzhiyun .sock_init = ti_init,
892*4882a593Smuzhiyun },
893*4882a593Smuzhiyun [CARDBUS_TYPE_ENE] = {
894*4882a593Smuzhiyun .override = ene_override,
895*4882a593Smuzhiyun .save_state = ti_save_state,
896*4882a593Smuzhiyun .restore_state = ti_restore_state,
897*4882a593Smuzhiyun .sock_init = ti_init,
898*4882a593Smuzhiyun },
899*4882a593Smuzhiyun #endif
900*4882a593Smuzhiyun #ifdef CONFIG_YENTA_RICOH
901*4882a593Smuzhiyun [CARDBUS_TYPE_RICOH] = {
902*4882a593Smuzhiyun .override = ricoh_override,
903*4882a593Smuzhiyun .save_state = ricoh_save_state,
904*4882a593Smuzhiyun .restore_state = ricoh_restore_state,
905*4882a593Smuzhiyun },
906*4882a593Smuzhiyun #endif
907*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TOSHIBA
908*4882a593Smuzhiyun [CARDBUS_TYPE_TOPIC95] = {
909*4882a593Smuzhiyun .override = topic95_override,
910*4882a593Smuzhiyun },
911*4882a593Smuzhiyun [CARDBUS_TYPE_TOPIC97] = {
912*4882a593Smuzhiyun .override = topic97_override,
913*4882a593Smuzhiyun },
914*4882a593Smuzhiyun #endif
915*4882a593Smuzhiyun #ifdef CONFIG_YENTA_O2
916*4882a593Smuzhiyun [CARDBUS_TYPE_O2MICRO] = {
917*4882a593Smuzhiyun .override = o2micro_override,
918*4882a593Smuzhiyun .restore_state = o2micro_restore_state,
919*4882a593Smuzhiyun },
920*4882a593Smuzhiyun #endif
921*4882a593Smuzhiyun };
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun
yenta_probe_irq(struct yenta_socket * socket,u32 isa_irq_mask)924*4882a593Smuzhiyun static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun int i;
927*4882a593Smuzhiyun unsigned long val;
928*4882a593Smuzhiyun u32 mask;
929*4882a593Smuzhiyun u8 reg;
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun /*
932*4882a593Smuzhiyun * Probe for usable interrupts using the force
933*4882a593Smuzhiyun * register to generate bogus card status events.
934*4882a593Smuzhiyun */
935*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_EVENT, -1);
936*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
937*4882a593Smuzhiyun reg = exca_readb(socket, I365_CSCINT);
938*4882a593Smuzhiyun exca_writeb(socket, I365_CSCINT, 0);
939*4882a593Smuzhiyun val = probe_irq_on() & isa_irq_mask;
940*4882a593Smuzhiyun for (i = 1; i < 16; i++) {
941*4882a593Smuzhiyun if (!((val >> i) & 1))
942*4882a593Smuzhiyun continue;
943*4882a593Smuzhiyun exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
944*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
945*4882a593Smuzhiyun udelay(100);
946*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_EVENT, -1);
947*4882a593Smuzhiyun }
948*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, 0);
949*4882a593Smuzhiyun exca_writeb(socket, I365_CSCINT, reg);
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun mask = probe_irq_mask(val) & 0xffff;
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun return mask;
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun /*
958*4882a593Smuzhiyun * yenta PCI irq probing.
959*4882a593Smuzhiyun * currently only used in the TI/EnE initialization code
960*4882a593Smuzhiyun */
961*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TI
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun /* interrupt handler, only used during probing */
yenta_probe_handler(int irq,void * dev_id)964*4882a593Smuzhiyun static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
965*4882a593Smuzhiyun {
966*4882a593Smuzhiyun struct yenta_socket *socket = (struct yenta_socket *) dev_id;
967*4882a593Smuzhiyun u8 csc;
968*4882a593Smuzhiyun u32 cb_event;
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun /* Clear interrupt status for the event */
971*4882a593Smuzhiyun cb_event = cb_readl(socket, CB_SOCKET_EVENT);
972*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_EVENT, -1);
973*4882a593Smuzhiyun csc = exca_readb(socket, I365_CSC);
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun if (cb_event || csc) {
976*4882a593Smuzhiyun socket->probe_status = 1;
977*4882a593Smuzhiyun return IRQ_HANDLED;
978*4882a593Smuzhiyun }
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun return IRQ_NONE;
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun /* probes the PCI interrupt, use only on override functions */
yenta_probe_cb_irq(struct yenta_socket * socket)984*4882a593Smuzhiyun static int yenta_probe_cb_irq(struct yenta_socket *socket)
985*4882a593Smuzhiyun {
986*4882a593Smuzhiyun u8 reg = 0;
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun if (!socket->cb_irq)
989*4882a593Smuzhiyun return -1;
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun socket->probe_status = 0;
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
994*4882a593Smuzhiyun dev_warn(&socket->dev->dev,
995*4882a593Smuzhiyun "request_irq() in yenta_probe_cb_irq() failed!\n");
996*4882a593Smuzhiyun return -1;
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun
999*4882a593Smuzhiyun /* generate interrupt, wait */
1000*4882a593Smuzhiyun if (!socket->dev->irq)
1001*4882a593Smuzhiyun reg = exca_readb(socket, I365_CSCINT);
1002*4882a593Smuzhiyun exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
1003*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_EVENT, -1);
1004*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
1005*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun msleep(100);
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun /* disable interrupts */
1010*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, 0);
1011*4882a593Smuzhiyun exca_writeb(socket, I365_CSCINT, reg);
1012*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_EVENT, -1);
1013*4882a593Smuzhiyun exca_readb(socket, I365_CSC);
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun free_irq(socket->cb_irq, socket);
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun return (int) socket->probe_status;
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun
1020*4882a593Smuzhiyun #endif /* CONFIG_YENTA_TI */
1021*4882a593Smuzhiyun
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun /*
1024*4882a593Smuzhiyun * Set static data that doesn't need re-initializing..
1025*4882a593Smuzhiyun */
yenta_get_socket_capabilities(struct yenta_socket * socket,u32 isa_irq_mask)1026*4882a593Smuzhiyun static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1027*4882a593Smuzhiyun {
1028*4882a593Smuzhiyun socket->socket.pci_irq = socket->cb_irq;
1029*4882a593Smuzhiyun if (isa_probe)
1030*4882a593Smuzhiyun socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1031*4882a593Smuzhiyun else
1032*4882a593Smuzhiyun socket->socket.irq_mask = 0;
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
1035*4882a593Smuzhiyun socket->socket.irq_mask, socket->cb_irq);
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun /*
1039*4882a593Smuzhiyun * Initialize the standard cardbus registers
1040*4882a593Smuzhiyun */
yenta_config_init(struct yenta_socket * socket)1041*4882a593Smuzhiyun static void yenta_config_init(struct yenta_socket *socket)
1042*4882a593Smuzhiyun {
1043*4882a593Smuzhiyun u16 bridge;
1044*4882a593Smuzhiyun struct pci_dev *dev = socket->dev;
1045*4882a593Smuzhiyun struct pci_bus_region region;
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]);
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1050*4882a593Smuzhiyun config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1051*4882a593Smuzhiyun config_writew(socket, PCI_COMMAND,
1052*4882a593Smuzhiyun PCI_COMMAND_IO |
1053*4882a593Smuzhiyun PCI_COMMAND_MEMORY |
1054*4882a593Smuzhiyun PCI_COMMAND_MASTER |
1055*4882a593Smuzhiyun PCI_COMMAND_WAIT);
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun /* MAGIC NUMBERS! Fixme */
1058*4882a593Smuzhiyun config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1059*4882a593Smuzhiyun config_writeb(socket, PCI_LATENCY_TIMER, 168);
1060*4882a593Smuzhiyun config_writel(socket, PCI_PRIMARY_BUS,
1061*4882a593Smuzhiyun (176 << 24) | /* sec. latency timer */
1062*4882a593Smuzhiyun ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */
1063*4882a593Smuzhiyun ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */
1064*4882a593Smuzhiyun dev->subordinate->primary); /* primary bus */
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun /*
1067*4882a593Smuzhiyun * Set up the bridging state:
1068*4882a593Smuzhiyun * - enable write posting.
1069*4882a593Smuzhiyun * - memory window 0 prefetchable, window 1 non-prefetchable
1070*4882a593Smuzhiyun * - PCI interrupts enabled if a PCI interrupt exists..
1071*4882a593Smuzhiyun */
1072*4882a593Smuzhiyun bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1073*4882a593Smuzhiyun bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1074*4882a593Smuzhiyun bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1075*4882a593Smuzhiyun config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1076*4882a593Smuzhiyun }
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun /**
1079*4882a593Smuzhiyun * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
1080*4882a593Smuzhiyun * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1081*4882a593Smuzhiyun *
1082*4882a593Smuzhiyun * Checks if devices on the bus which the CardBus bridge bridges to would be
1083*4882a593Smuzhiyun * invisible during PCI scans because of a misconfigured subordinate number
1084*4882a593Smuzhiyun * of the parent brige - some BIOSes seem to be too lazy to set it right.
1085*4882a593Smuzhiyun * Does the fixup carefully by checking how far it can go without conflicts.
1086*4882a593Smuzhiyun * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
1087*4882a593Smuzhiyun */
yenta_fixup_parent_bridge(struct pci_bus * cardbus_bridge)1088*4882a593Smuzhiyun static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1089*4882a593Smuzhiyun {
1090*4882a593Smuzhiyun struct pci_bus *sibling;
1091*4882a593Smuzhiyun unsigned char upper_limit;
1092*4882a593Smuzhiyun /*
1093*4882a593Smuzhiyun * We only check and fix the parent bridge: All systems which need
1094*4882a593Smuzhiyun * this fixup that have been reviewed are laptops and the only bridge
1095*4882a593Smuzhiyun * which needed fixing was the parent bridge of the CardBus bridge:
1096*4882a593Smuzhiyun */
1097*4882a593Smuzhiyun struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun /* Check bus numbers are already set up correctly: */
1100*4882a593Smuzhiyun if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end)
1101*4882a593Smuzhiyun return; /* The subordinate number is ok, nothing to do */
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun if (!bridge_to_fix->parent)
1104*4882a593Smuzhiyun return; /* Root bridges are ok */
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun /* stay within the limits of the bus range of the parent: */
1107*4882a593Smuzhiyun upper_limit = bridge_to_fix->parent->busn_res.end;
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun /* check the bus ranges of all sibling bridges to prevent overlap */
1110*4882a593Smuzhiyun list_for_each_entry(sibling, &bridge_to_fix->parent->children,
1111*4882a593Smuzhiyun node) {
1112*4882a593Smuzhiyun /*
1113*4882a593Smuzhiyun * If the sibling has a higher secondary bus number
1114*4882a593Smuzhiyun * and it's secondary is equal or smaller than our
1115*4882a593Smuzhiyun * current upper limit, set the new upper limit to
1116*4882a593Smuzhiyun * the bus number below the sibling's range:
1117*4882a593Smuzhiyun */
1118*4882a593Smuzhiyun if (sibling->busn_res.start > bridge_to_fix->busn_res.end
1119*4882a593Smuzhiyun && sibling->busn_res.start <= upper_limit)
1120*4882a593Smuzhiyun upper_limit = sibling->busn_res.start - 1;
1121*4882a593Smuzhiyun }
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun /* Show that the wanted subordinate number is not possible: */
1124*4882a593Smuzhiyun if (cardbus_bridge->busn_res.end > upper_limit)
1125*4882a593Smuzhiyun dev_warn(&cardbus_bridge->dev,
1126*4882a593Smuzhiyun "Upper limit for fixing this bridge's parent bridge: #%02x\n",
1127*4882a593Smuzhiyun upper_limit);
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun /* If we have room to increase the bridge's subordinate number, */
1130*4882a593Smuzhiyun if (bridge_to_fix->busn_res.end < upper_limit) {
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun /* use the highest number of the hidden bus, within limits */
1133*4882a593Smuzhiyun unsigned char subordinate_to_assign =
1134*4882a593Smuzhiyun min_t(int, cardbus_bridge->busn_res.end, upper_limit);
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun dev_info(&bridge_to_fix->dev,
1137*4882a593Smuzhiyun "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n",
1138*4882a593Smuzhiyun bridge_to_fix->number,
1139*4882a593Smuzhiyun (int)bridge_to_fix->busn_res.end,
1140*4882a593Smuzhiyun subordinate_to_assign);
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun /* Save the new subordinate in the bus struct of the bridge */
1143*4882a593Smuzhiyun bridge_to_fix->busn_res.end = subordinate_to_assign;
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun /* and update the PCI config space with the new subordinate */
1146*4882a593Smuzhiyun pci_write_config_byte(bridge_to_fix->self,
1147*4882a593Smuzhiyun PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end);
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun /*
1152*4882a593Smuzhiyun * Initialize a cardbus controller. Make sure we have a usable
1153*4882a593Smuzhiyun * interrupt, and that we can map the cardbus area. Fill in the
1154*4882a593Smuzhiyun * socket information structure..
1155*4882a593Smuzhiyun */
yenta_probe(struct pci_dev * dev,const struct pci_device_id * id)1156*4882a593Smuzhiyun static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1157*4882a593Smuzhiyun {
1158*4882a593Smuzhiyun struct yenta_socket *socket;
1159*4882a593Smuzhiyun int ret;
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun /*
1162*4882a593Smuzhiyun * If we failed to assign proper bus numbers for this cardbus
1163*4882a593Smuzhiyun * controller during PCI probe, its subordinate pci_bus is NULL.
1164*4882a593Smuzhiyun * Bail out if so.
1165*4882a593Smuzhiyun */
1166*4882a593Smuzhiyun if (!dev->subordinate) {
1167*4882a593Smuzhiyun dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n");
1168*4882a593Smuzhiyun return -ENODEV;
1169*4882a593Smuzhiyun }
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1172*4882a593Smuzhiyun if (!socket)
1173*4882a593Smuzhiyun return -ENOMEM;
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun /* prepare pcmcia_socket */
1176*4882a593Smuzhiyun socket->socket.ops = ¥ta_socket_operations;
1177*4882a593Smuzhiyun socket->socket.resource_ops = &pccard_nonstatic_ops;
1178*4882a593Smuzhiyun socket->socket.dev.parent = &dev->dev;
1179*4882a593Smuzhiyun socket->socket.driver_data = socket;
1180*4882a593Smuzhiyun socket->socket.owner = THIS_MODULE;
1181*4882a593Smuzhiyun socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1182*4882a593Smuzhiyun socket->socket.map_size = 0x1000;
1183*4882a593Smuzhiyun socket->socket.cb_dev = dev;
1184*4882a593Smuzhiyun
1185*4882a593Smuzhiyun /* prepare struct yenta_socket */
1186*4882a593Smuzhiyun socket->dev = dev;
1187*4882a593Smuzhiyun pci_set_drvdata(dev, socket);
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun /*
1190*4882a593Smuzhiyun * Do some basic sanity checking..
1191*4882a593Smuzhiyun */
1192*4882a593Smuzhiyun if (pci_enable_device(dev)) {
1193*4882a593Smuzhiyun ret = -EBUSY;
1194*4882a593Smuzhiyun goto free;
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun ret = pci_request_regions(dev, "yenta_socket");
1198*4882a593Smuzhiyun if (ret)
1199*4882a593Smuzhiyun goto disable;
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun if (!pci_resource_start(dev, 0)) {
1202*4882a593Smuzhiyun dev_err(&dev->dev, "No cardbus resource!\n");
1203*4882a593Smuzhiyun ret = -ENODEV;
1204*4882a593Smuzhiyun goto release;
1205*4882a593Smuzhiyun }
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun /*
1208*4882a593Smuzhiyun * Ok, start setup.. Map the cardbus registers,
1209*4882a593Smuzhiyun * and request the IRQ.
1210*4882a593Smuzhiyun */
1211*4882a593Smuzhiyun socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1212*4882a593Smuzhiyun if (!socket->base) {
1213*4882a593Smuzhiyun ret = -ENOMEM;
1214*4882a593Smuzhiyun goto release;
1215*4882a593Smuzhiyun }
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun /*
1218*4882a593Smuzhiyun * report the subsystem vendor and device for help debugging
1219*4882a593Smuzhiyun * the irq stuff...
1220*4882a593Smuzhiyun */
1221*4882a593Smuzhiyun dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n",
1222*4882a593Smuzhiyun dev->subsystem_vendor, dev->subsystem_device);
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun yenta_config_init(socket);
1225*4882a593Smuzhiyun
1226*4882a593Smuzhiyun /* Disable all events */
1227*4882a593Smuzhiyun cb_writel(socket, CB_SOCKET_MASK, 0x0);
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun /* Set up the bridge regions.. */
1230*4882a593Smuzhiyun yenta_allocate_resources(socket);
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun socket->cb_irq = dev->irq;
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun /* Do we have special options for the device? */
1235*4882a593Smuzhiyun if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1236*4882a593Smuzhiyun id->driver_data < ARRAY_SIZE(cardbus_type)) {
1237*4882a593Smuzhiyun socket->type = &cardbus_type[id->driver_data];
1238*4882a593Smuzhiyun
1239*4882a593Smuzhiyun ret = socket->type->override(socket);
1240*4882a593Smuzhiyun if (ret < 0)
1241*4882a593Smuzhiyun goto unmap;
1242*4882a593Smuzhiyun }
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun /* We must finish initialization here */
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1247*4882a593Smuzhiyun /* No IRQ or request_irq failed. Poll */
1248*4882a593Smuzhiyun socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1249*4882a593Smuzhiyun timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0);
1250*4882a593Smuzhiyun mod_timer(&socket->poll_timer, jiffies + HZ);
1251*4882a593Smuzhiyun dev_info(&dev->dev,
1252*4882a593Smuzhiyun "no PCI IRQ, CardBus support disabled for this socket.\n");
1253*4882a593Smuzhiyun dev_info(&dev->dev,
1254*4882a593Smuzhiyun "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
1255*4882a593Smuzhiyun } else {
1256*4882a593Smuzhiyun socket->socket.features |= SS_CAP_CARDBUS;
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun /* Figure out what the dang thing can do for the PCMCIA layer... */
1260*4882a593Smuzhiyun yenta_interrogate(socket);
1261*4882a593Smuzhiyun yenta_get_socket_capabilities(socket, isa_interrupts);
1262*4882a593Smuzhiyun dev_info(&dev->dev, "Socket status: %08x\n",
1263*4882a593Smuzhiyun cb_readl(socket, CB_SOCKET_STATE));
1264*4882a593Smuzhiyun
1265*4882a593Smuzhiyun yenta_fixup_parent_bridge(dev->subordinate);
1266*4882a593Smuzhiyun
1267*4882a593Smuzhiyun /* Register it with the pcmcia layer.. */
1268*4882a593Smuzhiyun ret = pcmcia_register_socket(&socket->socket);
1269*4882a593Smuzhiyun if (ret)
1270*4882a593Smuzhiyun goto free_irq;
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun /* Add the yenta register attributes */
1273*4882a593Smuzhiyun ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1274*4882a593Smuzhiyun if (ret)
1275*4882a593Smuzhiyun goto unregister_socket;
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun return ret;
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun /* error path... */
1280*4882a593Smuzhiyun unregister_socket:
1281*4882a593Smuzhiyun pcmcia_unregister_socket(&socket->socket);
1282*4882a593Smuzhiyun free_irq:
1283*4882a593Smuzhiyun if (socket->cb_irq)
1284*4882a593Smuzhiyun free_irq(socket->cb_irq, socket);
1285*4882a593Smuzhiyun else
1286*4882a593Smuzhiyun del_timer_sync(&socket->poll_timer);
1287*4882a593Smuzhiyun unmap:
1288*4882a593Smuzhiyun iounmap(socket->base);
1289*4882a593Smuzhiyun yenta_free_resources(socket);
1290*4882a593Smuzhiyun release:
1291*4882a593Smuzhiyun pci_release_regions(dev);
1292*4882a593Smuzhiyun disable:
1293*4882a593Smuzhiyun pci_disable_device(dev);
1294*4882a593Smuzhiyun free:
1295*4882a593Smuzhiyun pci_set_drvdata(dev, NULL);
1296*4882a593Smuzhiyun kfree(socket);
1297*4882a593Smuzhiyun return ret;
1298*4882a593Smuzhiyun }
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun #ifdef CONFIG_PM
yenta_dev_suspend_noirq(struct device * dev)1301*4882a593Smuzhiyun static int yenta_dev_suspend_noirq(struct device *dev)
1302*4882a593Smuzhiyun {
1303*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(dev);
1304*4882a593Smuzhiyun struct yenta_socket *socket = pci_get_drvdata(pdev);
1305*4882a593Smuzhiyun
1306*4882a593Smuzhiyun if (!socket)
1307*4882a593Smuzhiyun return 0;
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun if (socket->type && socket->type->save_state)
1310*4882a593Smuzhiyun socket->type->save_state(socket);
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun pci_save_state(pdev);
1313*4882a593Smuzhiyun pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1314*4882a593Smuzhiyun pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1315*4882a593Smuzhiyun pci_disable_device(pdev);
1316*4882a593Smuzhiyun
1317*4882a593Smuzhiyun return 0;
1318*4882a593Smuzhiyun }
1319*4882a593Smuzhiyun
yenta_dev_resume_noirq(struct device * dev)1320*4882a593Smuzhiyun static int yenta_dev_resume_noirq(struct device *dev)
1321*4882a593Smuzhiyun {
1322*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(dev);
1323*4882a593Smuzhiyun struct yenta_socket *socket = pci_get_drvdata(pdev);
1324*4882a593Smuzhiyun int ret;
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun if (!socket)
1327*4882a593Smuzhiyun return 0;
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1330*4882a593Smuzhiyun pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun ret = pci_enable_device(pdev);
1333*4882a593Smuzhiyun if (ret)
1334*4882a593Smuzhiyun return ret;
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun pci_set_master(pdev);
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun if (socket->type && socket->type->restore_state)
1339*4882a593Smuzhiyun socket->type->restore_state(socket);
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun return 0;
1342*4882a593Smuzhiyun }
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun static const struct dev_pm_ops yenta_pm_ops = {
1345*4882a593Smuzhiyun .suspend_noirq = yenta_dev_suspend_noirq,
1346*4882a593Smuzhiyun .resume_noirq = yenta_dev_resume_noirq,
1347*4882a593Smuzhiyun .freeze_noirq = yenta_dev_suspend_noirq,
1348*4882a593Smuzhiyun .thaw_noirq = yenta_dev_resume_noirq,
1349*4882a593Smuzhiyun .poweroff_noirq = yenta_dev_suspend_noirq,
1350*4882a593Smuzhiyun .restore_noirq = yenta_dev_resume_noirq,
1351*4882a593Smuzhiyun };
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun #define YENTA_PM_OPS (¥ta_pm_ops)
1354*4882a593Smuzhiyun #else
1355*4882a593Smuzhiyun #define YENTA_PM_OPS NULL
1356*4882a593Smuzhiyun #endif
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun #define CB_ID(vend, dev, type) \
1359*4882a593Smuzhiyun { \
1360*4882a593Smuzhiyun .vendor = vend, \
1361*4882a593Smuzhiyun .device = dev, \
1362*4882a593Smuzhiyun .subvendor = PCI_ANY_ID, \
1363*4882a593Smuzhiyun .subdevice = PCI_ANY_ID, \
1364*4882a593Smuzhiyun .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1365*4882a593Smuzhiyun .class_mask = ~0, \
1366*4882a593Smuzhiyun .driver_data = CARDBUS_TYPE_##type, \
1367*4882a593Smuzhiyun }
1368*4882a593Smuzhiyun
1369*4882a593Smuzhiyun static const struct pci_device_id yenta_table[] = {
1370*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun /*
1373*4882a593Smuzhiyun * TBD: Check if these TI variants can use more
1374*4882a593Smuzhiyun * advanced overrides instead. (I can't get the
1375*4882a593Smuzhiyun * data sheets for these devices. --rmk)
1376*4882a593Smuzhiyun */
1377*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TI
1378*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1381*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1382*4882a593Smuzhiyun
1383*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1384*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1385*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1386*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1387*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1388*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1389*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1390*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1391*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1392*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1393*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1394*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1395*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1396*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1397*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1398*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1399*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1402*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1405*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
1406*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
1407*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1408*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1409*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1410*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1411*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1414*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1415*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1416*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
1417*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1418*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1419*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1420*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
1421*4882a593Smuzhiyun #endif /* CONFIG_YENTA_TI */
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun #ifdef CONFIG_YENTA_RICOH
1424*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1425*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1426*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1427*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1428*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1429*4882a593Smuzhiyun #endif
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun #ifdef CONFIG_YENTA_TOSHIBA
1432*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1433*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1434*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1435*4882a593Smuzhiyun #endif
1436*4882a593Smuzhiyun
1437*4882a593Smuzhiyun #ifdef CONFIG_YENTA_O2
1438*4882a593Smuzhiyun CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1439*4882a593Smuzhiyun #endif
1440*4882a593Smuzhiyun
1441*4882a593Smuzhiyun /* match any cardbus bridge */
1442*4882a593Smuzhiyun CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1443*4882a593Smuzhiyun { /* all zeroes */ }
1444*4882a593Smuzhiyun };
1445*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, yenta_table);
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun
1448*4882a593Smuzhiyun static struct pci_driver yenta_cardbus_driver = {
1449*4882a593Smuzhiyun .name = "yenta_cardbus",
1450*4882a593Smuzhiyun .id_table = yenta_table,
1451*4882a593Smuzhiyun .probe = yenta_probe,
1452*4882a593Smuzhiyun .remove = yenta_close,
1453*4882a593Smuzhiyun .driver.pm = YENTA_PM_OPS,
1454*4882a593Smuzhiyun };
1455*4882a593Smuzhiyun
1456*4882a593Smuzhiyun module_pci_driver(yenta_cardbus_driver);
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1459