xref: /OK3568_Linux_fs/kernel/drivers/pcmcia/vrc4171_card.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2003-2005  Yoichi Yuasa <yuasa@linux-mips.org>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/ioport.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/spinlock.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <asm/io.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <pcmcia/ss.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "i82365.h"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
22*4882a593Smuzhiyun MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>");
23*4882a593Smuzhiyun MODULE_LICENSE("GPL");
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define CARD_MAX_SLOTS		2
26*4882a593Smuzhiyun #define CARD_SLOTA		0
27*4882a593Smuzhiyun #define CARD_SLOTB		1
28*4882a593Smuzhiyun #define CARD_SLOTB_OFFSET	0x40
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define CARD_MEM_START		0x10000000
31*4882a593Smuzhiyun #define CARD_MEM_END		0x13ffffff
32*4882a593Smuzhiyun #define CARD_MAX_MEM_OFFSET	0x3ffffff
33*4882a593Smuzhiyun #define CARD_MAX_MEM_SPEED	1000
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define CARD_CONTROLLER_INDEX	0x03e0
36*4882a593Smuzhiyun #define CARD_CONTROLLER_DATA	0x03e1
37*4882a593Smuzhiyun  /* Power register */
38*4882a593Smuzhiyun   #define VPP_GET_VCC		0x01
39*4882a593Smuzhiyun   #define POWER_ENABLE		0x10
40*4882a593Smuzhiyun  #define CARD_VOLTAGE_SENSE	0x1f
41*4882a593Smuzhiyun   #define VCC_3VORXV_CAPABLE	0x00
42*4882a593Smuzhiyun   #define VCC_XV_ONLY		0x01
43*4882a593Smuzhiyun   #define VCC_3V_CAPABLE	0x02
44*4882a593Smuzhiyun   #define VCC_5V_ONLY		0x03
45*4882a593Smuzhiyun  #define CARD_VOLTAGE_SELECT	0x2f
46*4882a593Smuzhiyun   #define VCC_3V		0x01
47*4882a593Smuzhiyun   #define VCC_5V		0x00
48*4882a593Smuzhiyun   #define VCC_XV		0x02
49*4882a593Smuzhiyun   #define VCC_STATUS_3V		0x02
50*4882a593Smuzhiyun   #define VCC_STATUS_5V		0x01
51*4882a593Smuzhiyun   #define VCC_STATUS_XV		0x03
52*4882a593Smuzhiyun  #define GLOBAL_CONTROL		0x1e
53*4882a593Smuzhiyun   #define EXWRBK		0x04
54*4882a593Smuzhiyun   #define IRQPM_EN		0x08
55*4882a593Smuzhiyun   #define CLRPMIRQ		0x10
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define INTERRUPT_STATUS	0x05fa
58*4882a593Smuzhiyun  #define IRQ_A			0x02
59*4882a593Smuzhiyun  #define IRQ_B			0x04
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define CONFIGURATION1		0x05fe
62*4882a593Smuzhiyun  #define SLOTB_CONFIG		0xc000
63*4882a593Smuzhiyun  #define SLOTB_NONE		0x0000
64*4882a593Smuzhiyun  #define SLOTB_PCCARD		0x4000
65*4882a593Smuzhiyun  #define SLOTB_CF		0x8000
66*4882a593Smuzhiyun  #define SLOTB_FLASHROM		0xc000
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define CARD_CONTROLLER_START	CARD_CONTROLLER_INDEX
69*4882a593Smuzhiyun #define CARD_CONTROLLER_END	CARD_CONTROLLER_DATA
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define IO_MAX_MAPS	2
72*4882a593Smuzhiyun #define MEM_MAX_MAPS	5
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun enum vrc4171_slot {
75*4882a593Smuzhiyun 	SLOT_PROBE = 0,
76*4882a593Smuzhiyun 	SLOT_NOPROBE_IO,
77*4882a593Smuzhiyun 	SLOT_NOPROBE_MEM,
78*4882a593Smuzhiyun 	SLOT_NOPROBE_ALL,
79*4882a593Smuzhiyun 	SLOT_INITIALIZED,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun enum vrc4171_slotb {
83*4882a593Smuzhiyun 	SLOTB_IS_NONE,
84*4882a593Smuzhiyun 	SLOTB_IS_PCCARD,
85*4882a593Smuzhiyun 	SLOTB_IS_CF,
86*4882a593Smuzhiyun 	SLOTB_IS_FLASHROM,
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun struct vrc4171_socket {
90*4882a593Smuzhiyun 	enum vrc4171_slot slot;
91*4882a593Smuzhiyun 	struct pcmcia_socket pcmcia_socket;
92*4882a593Smuzhiyun 	char name[24];
93*4882a593Smuzhiyun 	int csc_irq;
94*4882a593Smuzhiyun 	int io_irq;
95*4882a593Smuzhiyun 	spinlock_t lock;
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun static struct vrc4171_socket vrc4171_sockets[CARD_MAX_SLOTS];
99*4882a593Smuzhiyun static enum vrc4171_slotb vrc4171_slotb = SLOTB_IS_NONE;
100*4882a593Smuzhiyun static char vrc4171_card_name[] = "NEC VRC4171 Card Controller";
101*4882a593Smuzhiyun static unsigned int vrc4171_irq;
102*4882a593Smuzhiyun static uint16_t vrc4171_irq_mask = 0xdeb8;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun static struct resource vrc4171_card_resource[3] = {
105*4882a593Smuzhiyun 	{	.name		= vrc4171_card_name,
106*4882a593Smuzhiyun 		.start		= CARD_CONTROLLER_START,
107*4882a593Smuzhiyun 		.end		= CARD_CONTROLLER_END,
108*4882a593Smuzhiyun 		.flags		= IORESOURCE_IO,	},
109*4882a593Smuzhiyun 	{	.name		= vrc4171_card_name,
110*4882a593Smuzhiyun 		.start		= INTERRUPT_STATUS,
111*4882a593Smuzhiyun 		.end		= INTERRUPT_STATUS,
112*4882a593Smuzhiyun 		.flags		= IORESOURCE_IO,	},
113*4882a593Smuzhiyun 	{	.name		= vrc4171_card_name,
114*4882a593Smuzhiyun 		.start		= CONFIGURATION1,
115*4882a593Smuzhiyun 		.end		= CONFIGURATION1,
116*4882a593Smuzhiyun 		.flags		= IORESOURCE_IO,	},
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun static struct platform_device vrc4171_card_device = {
120*4882a593Smuzhiyun 	.name		= vrc4171_card_name,
121*4882a593Smuzhiyun 	.id		= 0,
122*4882a593Smuzhiyun 	.num_resources	= 3,
123*4882a593Smuzhiyun 	.resource	= vrc4171_card_resource,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
vrc4171_get_irq_status(void)126*4882a593Smuzhiyun static inline uint16_t vrc4171_get_irq_status(void)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	return inw(INTERRUPT_STATUS);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
vrc4171_set_multifunction_pin(enum vrc4171_slotb config)131*4882a593Smuzhiyun static inline void vrc4171_set_multifunction_pin(enum vrc4171_slotb config)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	uint16_t config1;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	config1 = inw(CONFIGURATION1);
136*4882a593Smuzhiyun 	config1 &= ~SLOTB_CONFIG;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	switch (config) {
139*4882a593Smuzhiyun 	case SLOTB_IS_NONE:
140*4882a593Smuzhiyun 		config1 |= SLOTB_NONE;
141*4882a593Smuzhiyun 		break;
142*4882a593Smuzhiyun 	case SLOTB_IS_PCCARD:
143*4882a593Smuzhiyun 		config1 |= SLOTB_PCCARD;
144*4882a593Smuzhiyun 		break;
145*4882a593Smuzhiyun 	case SLOTB_IS_CF:
146*4882a593Smuzhiyun 		config1 |= SLOTB_CF;
147*4882a593Smuzhiyun 		break;
148*4882a593Smuzhiyun 	case SLOTB_IS_FLASHROM:
149*4882a593Smuzhiyun 		config1 |= SLOTB_FLASHROM;
150*4882a593Smuzhiyun 		break;
151*4882a593Smuzhiyun 	default:
152*4882a593Smuzhiyun 		break;
153*4882a593Smuzhiyun 	}
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	outw(config1, CONFIGURATION1);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun 
exca_read_byte(int slot,uint8_t index)158*4882a593Smuzhiyun static inline uint8_t exca_read_byte(int slot, uint8_t index)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	if (slot == CARD_SLOTB)
161*4882a593Smuzhiyun 		index += CARD_SLOTB_OFFSET;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	outb(index, CARD_CONTROLLER_INDEX);
164*4882a593Smuzhiyun 	return inb(CARD_CONTROLLER_DATA);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
exca_read_word(int slot,uint8_t index)167*4882a593Smuzhiyun static inline uint16_t exca_read_word(int slot, uint8_t index)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	uint16_t data;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	if (slot == CARD_SLOTB)
172*4882a593Smuzhiyun 		index += CARD_SLOTB_OFFSET;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	outb(index++, CARD_CONTROLLER_INDEX);
175*4882a593Smuzhiyun 	data = inb(CARD_CONTROLLER_DATA);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	outb(index, CARD_CONTROLLER_INDEX);
178*4882a593Smuzhiyun 	data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	return data;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
exca_write_byte(int slot,uint8_t index,uint8_t data)183*4882a593Smuzhiyun static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	if (slot == CARD_SLOTB)
186*4882a593Smuzhiyun 		index += CARD_SLOTB_OFFSET;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	outb(index, CARD_CONTROLLER_INDEX);
189*4882a593Smuzhiyun 	outb(data, CARD_CONTROLLER_DATA);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	return data;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
exca_write_word(int slot,uint8_t index,uint16_t data)194*4882a593Smuzhiyun static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun 	if (slot == CARD_SLOTB)
197*4882a593Smuzhiyun 		index += CARD_SLOTB_OFFSET;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	outb(index++, CARD_CONTROLLER_INDEX);
200*4882a593Smuzhiyun 	outb(data, CARD_CONTROLLER_DATA);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	outb(index, CARD_CONTROLLER_INDEX);
203*4882a593Smuzhiyun 	outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	return data;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
search_nonuse_irq(void)208*4882a593Smuzhiyun static inline int search_nonuse_irq(void)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	int i;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	for (i = 0; i < 16; i++) {
213*4882a593Smuzhiyun 		if (vrc4171_irq_mask & (1 << i)) {
214*4882a593Smuzhiyun 			vrc4171_irq_mask &= ~(1 << i);
215*4882a593Smuzhiyun 			return i;
216*4882a593Smuzhiyun 		}
217*4882a593Smuzhiyun 	}
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	return -1;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
pccard_init(struct pcmcia_socket * sock)222*4882a593Smuzhiyun static int pccard_init(struct pcmcia_socket *sock)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	struct vrc4171_socket *socket;
225*4882a593Smuzhiyun 	unsigned int slot;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	sock->features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
228*4882a593Smuzhiyun 	sock->irq_mask = 0;
229*4882a593Smuzhiyun 	sock->map_size = 0x1000;
230*4882a593Smuzhiyun 	sock->pci_irq = vrc4171_irq;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	slot = sock->sock;
233*4882a593Smuzhiyun 	socket = &vrc4171_sockets[slot];
234*4882a593Smuzhiyun 	socket->csc_irq = search_nonuse_irq();
235*4882a593Smuzhiyun 	socket->io_irq = search_nonuse_irq();
236*4882a593Smuzhiyun 	spin_lock_init(&socket->lock);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	return 0;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun 
pccard_get_status(struct pcmcia_socket * sock,u_int * value)241*4882a593Smuzhiyun static int pccard_get_status(struct pcmcia_socket *sock, u_int *value)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	unsigned int slot;
244*4882a593Smuzhiyun 	uint8_t status, sense;
245*4882a593Smuzhiyun 	u_int val = 0;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (sock == NULL || sock->sock >= CARD_MAX_SLOTS || value == NULL)
248*4882a593Smuzhiyun 		return -EINVAL;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	slot = sock->sock;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	status = exca_read_byte(slot, I365_STATUS);
253*4882a593Smuzhiyun 	if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
254*4882a593Smuzhiyun 		if (status & I365_CS_STSCHG)
255*4882a593Smuzhiyun 			val |= SS_STSCHG;
256*4882a593Smuzhiyun 	} else {
257*4882a593Smuzhiyun 		if (!(status & I365_CS_BVD1))
258*4882a593Smuzhiyun 			val |= SS_BATDEAD;
259*4882a593Smuzhiyun 		else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
260*4882a593Smuzhiyun 			val |= SS_BATWARN;
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 	if ((status & I365_CS_DETECT) == I365_CS_DETECT)
263*4882a593Smuzhiyun 		val |= SS_DETECT;
264*4882a593Smuzhiyun 	if (status & I365_CS_WRPROT)
265*4882a593Smuzhiyun 		val |= SS_WRPROT;
266*4882a593Smuzhiyun 	if (status & I365_CS_READY)
267*4882a593Smuzhiyun 		val |= SS_READY;
268*4882a593Smuzhiyun 	if (status & I365_CS_POWERON)
269*4882a593Smuzhiyun 		val |= SS_POWERON;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE);
272*4882a593Smuzhiyun 	switch (sense) {
273*4882a593Smuzhiyun 	case VCC_3VORXV_CAPABLE:
274*4882a593Smuzhiyun 		val |= SS_3VCARD | SS_XVCARD;
275*4882a593Smuzhiyun 		break;
276*4882a593Smuzhiyun 	case VCC_XV_ONLY:
277*4882a593Smuzhiyun 		val |= SS_XVCARD;
278*4882a593Smuzhiyun 		break;
279*4882a593Smuzhiyun 	case VCC_3V_CAPABLE:
280*4882a593Smuzhiyun 		val |= SS_3VCARD;
281*4882a593Smuzhiyun 		break;
282*4882a593Smuzhiyun 	default:
283*4882a593Smuzhiyun 		/* 5V only */
284*4882a593Smuzhiyun 		break;
285*4882a593Smuzhiyun 	}
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	*value = val;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	return 0;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
set_Vcc_value(u_char Vcc)292*4882a593Smuzhiyun static inline uint8_t set_Vcc_value(u_char Vcc)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	switch (Vcc) {
295*4882a593Smuzhiyun 	case 33:
296*4882a593Smuzhiyun 		return VCC_3V;
297*4882a593Smuzhiyun 	case 50:
298*4882a593Smuzhiyun 		return VCC_5V;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	/* Small voltage is chosen for safety. */
302*4882a593Smuzhiyun 	return VCC_3V;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun 
pccard_set_socket(struct pcmcia_socket * sock,socket_state_t * state)305*4882a593Smuzhiyun static int pccard_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	struct vrc4171_socket *socket;
308*4882a593Smuzhiyun 	unsigned int slot;
309*4882a593Smuzhiyun 	uint8_t voltage, power, control, cscint;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	if (sock == NULL || sock->sock >= CARD_MAX_SLOTS ||
312*4882a593Smuzhiyun 	    (state->Vpp != state->Vcc && state->Vpp != 0) ||
313*4882a593Smuzhiyun 	    (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0))
314*4882a593Smuzhiyun 		return -EINVAL;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	slot = sock->sock;
317*4882a593Smuzhiyun 	socket = &vrc4171_sockets[slot];
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	spin_lock_irq(&socket->lock);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	voltage = set_Vcc_value(state->Vcc);
322*4882a593Smuzhiyun 	exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	power = POWER_ENABLE;
325*4882a593Smuzhiyun 	if (state->Vpp == state->Vcc)
326*4882a593Smuzhiyun 		power |= VPP_GET_VCC;
327*4882a593Smuzhiyun 	if (state->flags & SS_OUTPUT_ENA)
328*4882a593Smuzhiyun 		power |= I365_PWR_OUT;
329*4882a593Smuzhiyun 	exca_write_byte(slot, I365_POWER, power);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	control = 0;
332*4882a593Smuzhiyun 	if (state->io_irq != 0)
333*4882a593Smuzhiyun 		control |= socket->io_irq;
334*4882a593Smuzhiyun 	if (state->flags & SS_IOCARD)
335*4882a593Smuzhiyun 		control |= I365_PC_IOCARD;
336*4882a593Smuzhiyun 	if (state->flags & SS_RESET)
337*4882a593Smuzhiyun 		control	&= ~I365_PC_RESET;
338*4882a593Smuzhiyun 	else
339*4882a593Smuzhiyun 		control |= I365_PC_RESET;
340*4882a593Smuzhiyun 	exca_write_byte(slot, I365_INTCTL, control);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun         cscint = 0;
343*4882a593Smuzhiyun         exca_write_byte(slot, I365_CSCINT, cscint);
344*4882a593Smuzhiyun 	exca_read_byte(slot, I365_CSC);	/* clear CardStatus change */
345*4882a593Smuzhiyun 	if (state->csc_mask != 0)
346*4882a593Smuzhiyun 		cscint |= socket->csc_irq << 8;
347*4882a593Smuzhiyun 	if (state->flags & SS_IOCARD) {
348*4882a593Smuzhiyun 		if (state->csc_mask & SS_STSCHG)
349*4882a593Smuzhiyun 			cscint |= I365_CSC_STSCHG;
350*4882a593Smuzhiyun 	} else {
351*4882a593Smuzhiyun 		if (state->csc_mask & SS_BATDEAD)
352*4882a593Smuzhiyun 			cscint |= I365_CSC_BVD1;
353*4882a593Smuzhiyun 		if (state->csc_mask & SS_BATWARN)
354*4882a593Smuzhiyun 			cscint |= I365_CSC_BVD2;
355*4882a593Smuzhiyun 	}
356*4882a593Smuzhiyun 	if (state->csc_mask & SS_READY)
357*4882a593Smuzhiyun 		cscint |= I365_CSC_READY;
358*4882a593Smuzhiyun 	if (state->csc_mask & SS_DETECT)
359*4882a593Smuzhiyun 		cscint |= I365_CSC_DETECT;
360*4882a593Smuzhiyun         exca_write_byte(slot, I365_CSCINT, cscint);
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	spin_unlock_irq(&socket->lock);
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
pccard_set_io_map(struct pcmcia_socket * sock,struct pccard_io_map * io)367*4882a593Smuzhiyun static int pccard_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun 	unsigned int slot;
370*4882a593Smuzhiyun 	uint8_t ioctl, addrwin;
371*4882a593Smuzhiyun 	u_char map;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	if (sock == NULL || sock->sock >= CARD_MAX_SLOTS ||
374*4882a593Smuzhiyun 	    io == NULL || io->map >= IO_MAX_MAPS ||
375*4882a593Smuzhiyun 	    io->start > 0xffff || io->stop > 0xffff || io->start > io->stop)
376*4882a593Smuzhiyun 		return -EINVAL;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	slot = sock->sock;
379*4882a593Smuzhiyun 	map = io->map;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	addrwin = exca_read_byte(slot, I365_ADDRWIN);
382*4882a593Smuzhiyun 	if (addrwin & I365_ENA_IO(map)) {
383*4882a593Smuzhiyun 		addrwin &= ~I365_ENA_IO(map);
384*4882a593Smuzhiyun 		exca_write_byte(slot, I365_ADDRWIN, addrwin);
385*4882a593Smuzhiyun 	}
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	exca_write_word(slot, I365_IO(map)+I365_W_START, io->start);
388*4882a593Smuzhiyun 	exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop);
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	ioctl = 0;
391*4882a593Smuzhiyun 	if (io->speed > 0)
392*4882a593Smuzhiyun 		ioctl |= I365_IOCTL_WAIT(map);
393*4882a593Smuzhiyun 	if (io->flags & MAP_16BIT)
394*4882a593Smuzhiyun 		ioctl |= I365_IOCTL_16BIT(map);
395*4882a593Smuzhiyun 	if (io->flags & MAP_AUTOSZ)
396*4882a593Smuzhiyun 		ioctl |= I365_IOCTL_IOCS16(map);
397*4882a593Smuzhiyun 	if (io->flags & MAP_0WS)
398*4882a593Smuzhiyun 		ioctl |= I365_IOCTL_0WS(map);
399*4882a593Smuzhiyun 	exca_write_byte(slot, I365_IOCTL, ioctl);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	if (io->flags & MAP_ACTIVE) {
402*4882a593Smuzhiyun 		addrwin |= I365_ENA_IO(map);
403*4882a593Smuzhiyun 		exca_write_byte(slot, I365_ADDRWIN, addrwin);
404*4882a593Smuzhiyun 	}
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	return 0;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun 
pccard_set_mem_map(struct pcmcia_socket * sock,struct pccard_mem_map * mem)409*4882a593Smuzhiyun static int pccard_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun 	unsigned int slot;
412*4882a593Smuzhiyun 	uint16_t start, stop, offset;
413*4882a593Smuzhiyun 	uint8_t addrwin;
414*4882a593Smuzhiyun 	u_char map;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	if (sock == NULL || sock->sock >= CARD_MAX_SLOTS ||
417*4882a593Smuzhiyun 	    mem == NULL || mem->map >= MEM_MAX_MAPS ||
418*4882a593Smuzhiyun 	    mem->res->start < CARD_MEM_START || mem->res->start > CARD_MEM_END ||
419*4882a593Smuzhiyun 	    mem->res->end < CARD_MEM_START || mem->res->end > CARD_MEM_END ||
420*4882a593Smuzhiyun 	    mem->res->start > mem->res->end ||
421*4882a593Smuzhiyun 	    mem->card_start > CARD_MAX_MEM_OFFSET ||
422*4882a593Smuzhiyun 	    mem->speed > CARD_MAX_MEM_SPEED)
423*4882a593Smuzhiyun 		return -EINVAL;
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	slot = sock->sock;
426*4882a593Smuzhiyun 	map = mem->map;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	addrwin = exca_read_byte(slot, I365_ADDRWIN);
429*4882a593Smuzhiyun 	if (addrwin & I365_ENA_MEM(map)) {
430*4882a593Smuzhiyun 		addrwin &= ~I365_ENA_MEM(map);
431*4882a593Smuzhiyun 		exca_write_byte(slot, I365_ADDRWIN, addrwin);
432*4882a593Smuzhiyun 	}
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	start = (mem->res->start >> 12) & 0x3fff;
435*4882a593Smuzhiyun 	if (mem->flags & MAP_16BIT)
436*4882a593Smuzhiyun 		start |= I365_MEM_16BIT;
437*4882a593Smuzhiyun 	exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	stop = (mem->res->end >> 12) & 0x3fff;
440*4882a593Smuzhiyun 	switch (mem->speed) {
441*4882a593Smuzhiyun 	case 0:
442*4882a593Smuzhiyun 		break;
443*4882a593Smuzhiyun 	case 1:
444*4882a593Smuzhiyun 		stop |= I365_MEM_WS0;
445*4882a593Smuzhiyun 		break;
446*4882a593Smuzhiyun 	case 2:
447*4882a593Smuzhiyun 		stop |= I365_MEM_WS1;
448*4882a593Smuzhiyun 		break;
449*4882a593Smuzhiyun 	default:
450*4882a593Smuzhiyun 		stop |= I365_MEM_WS0 | I365_MEM_WS1;
451*4882a593Smuzhiyun 		break;
452*4882a593Smuzhiyun 	}
453*4882a593Smuzhiyun 	exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop);
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	offset = (mem->card_start >> 12) & 0x3fff;
456*4882a593Smuzhiyun 	if (mem->flags & MAP_ATTRIB)
457*4882a593Smuzhiyun 		offset |= I365_MEM_REG;
458*4882a593Smuzhiyun 	if (mem->flags & MAP_WRPROT)
459*4882a593Smuzhiyun 		offset |= I365_MEM_WRPROT;
460*4882a593Smuzhiyun 	exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset);
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	if (mem->flags & MAP_ACTIVE) {
463*4882a593Smuzhiyun 		addrwin |= I365_ENA_MEM(map);
464*4882a593Smuzhiyun 		exca_write_byte(slot, I365_ADDRWIN, addrwin);
465*4882a593Smuzhiyun 	}
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	return 0;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun static struct pccard_operations vrc4171_pccard_operations = {
471*4882a593Smuzhiyun 	.init			= pccard_init,
472*4882a593Smuzhiyun 	.get_status		= pccard_get_status,
473*4882a593Smuzhiyun 	.set_socket		= pccard_set_socket,
474*4882a593Smuzhiyun 	.set_io_map		= pccard_set_io_map,
475*4882a593Smuzhiyun 	.set_mem_map		= pccard_set_mem_map,
476*4882a593Smuzhiyun };
477*4882a593Smuzhiyun 
get_events(int slot)478*4882a593Smuzhiyun static inline unsigned int get_events(int slot)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	unsigned int events = 0;
481*4882a593Smuzhiyun 	uint8_t status, csc;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	status = exca_read_byte(slot, I365_STATUS);
484*4882a593Smuzhiyun 	csc = exca_read_byte(slot, I365_CSC);
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
487*4882a593Smuzhiyun 		if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG))
488*4882a593Smuzhiyun 			events |= SS_STSCHG;
489*4882a593Smuzhiyun 	} else {
490*4882a593Smuzhiyun 		if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) {
491*4882a593Smuzhiyun 			if (!(status & I365_CS_BVD1))
492*4882a593Smuzhiyun 				events |= SS_BATDEAD;
493*4882a593Smuzhiyun 			else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
494*4882a593Smuzhiyun 				events |= SS_BATWARN;
495*4882a593Smuzhiyun 		}
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 	if ((csc & I365_CSC_READY) && (status & I365_CS_READY))
498*4882a593Smuzhiyun 		events |= SS_READY;
499*4882a593Smuzhiyun 	if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT))
500*4882a593Smuzhiyun 		events |= SS_DETECT;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	return events;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun 
pccard_interrupt(int irq,void * dev_id)505*4882a593Smuzhiyun static irqreturn_t pccard_interrupt(int irq, void *dev_id)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun 	struct vrc4171_socket *socket;
508*4882a593Smuzhiyun 	unsigned int events;
509*4882a593Smuzhiyun 	irqreturn_t retval = IRQ_NONE;
510*4882a593Smuzhiyun 	uint16_t status;
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	status = vrc4171_get_irq_status();
513*4882a593Smuzhiyun 	if (status & IRQ_A) {
514*4882a593Smuzhiyun 		socket = &vrc4171_sockets[CARD_SLOTA];
515*4882a593Smuzhiyun 		if (socket->slot == SLOT_INITIALIZED) {
516*4882a593Smuzhiyun 			if (status & (1 << socket->csc_irq)) {
517*4882a593Smuzhiyun 				events = get_events(CARD_SLOTA);
518*4882a593Smuzhiyun 				if (events != 0) {
519*4882a593Smuzhiyun 					pcmcia_parse_events(&socket->pcmcia_socket, events);
520*4882a593Smuzhiyun 					retval = IRQ_HANDLED;
521*4882a593Smuzhiyun 				}
522*4882a593Smuzhiyun 			}
523*4882a593Smuzhiyun 		}
524*4882a593Smuzhiyun 	}
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	if (status & IRQ_B) {
527*4882a593Smuzhiyun 		socket = &vrc4171_sockets[CARD_SLOTB];
528*4882a593Smuzhiyun 		if (socket->slot == SLOT_INITIALIZED) {
529*4882a593Smuzhiyun 			if (status & (1 << socket->csc_irq)) {
530*4882a593Smuzhiyun 				events = get_events(CARD_SLOTB);
531*4882a593Smuzhiyun 				if (events != 0) {
532*4882a593Smuzhiyun 					pcmcia_parse_events(&socket->pcmcia_socket, events);
533*4882a593Smuzhiyun 					retval = IRQ_HANDLED;
534*4882a593Smuzhiyun 				}
535*4882a593Smuzhiyun 			}
536*4882a593Smuzhiyun 		}
537*4882a593Smuzhiyun 	}
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	return retval;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun 
reserve_using_irq(int slot)542*4882a593Smuzhiyun static inline void reserve_using_irq(int slot)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun 	unsigned int irq;
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	irq = exca_read_byte(slot, I365_INTCTL);
547*4882a593Smuzhiyun 	irq &= 0x0f;
548*4882a593Smuzhiyun 	vrc4171_irq_mask &= ~(1 << irq);
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	irq = exca_read_byte(slot, I365_CSCINT);
551*4882a593Smuzhiyun 	irq = (irq & 0xf0) >> 4;
552*4882a593Smuzhiyun 	vrc4171_irq_mask &= ~(1 << irq);
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun 
vrc4171_add_sockets(void)555*4882a593Smuzhiyun static int vrc4171_add_sockets(void)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun 	struct vrc4171_socket *socket;
558*4882a593Smuzhiyun 	int slot, retval;
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
561*4882a593Smuzhiyun 		if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
562*4882a593Smuzhiyun 			continue;
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 		socket = &vrc4171_sockets[slot];
565*4882a593Smuzhiyun 		if (socket->slot != SLOT_PROBE) {
566*4882a593Smuzhiyun 			uint8_t addrwin;
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 			switch (socket->slot) {
569*4882a593Smuzhiyun 			case SLOT_NOPROBE_MEM:
570*4882a593Smuzhiyun 				addrwin = exca_read_byte(slot, I365_ADDRWIN);
571*4882a593Smuzhiyun 				addrwin &= 0x1f;
572*4882a593Smuzhiyun 				exca_write_byte(slot, I365_ADDRWIN, addrwin);
573*4882a593Smuzhiyun 				break;
574*4882a593Smuzhiyun 			case SLOT_NOPROBE_IO:
575*4882a593Smuzhiyun 				addrwin = exca_read_byte(slot, I365_ADDRWIN);
576*4882a593Smuzhiyun 				addrwin &= 0xc0;
577*4882a593Smuzhiyun 				exca_write_byte(slot, I365_ADDRWIN, addrwin);
578*4882a593Smuzhiyun 				break;
579*4882a593Smuzhiyun 			default:
580*4882a593Smuzhiyun 				break;
581*4882a593Smuzhiyun 			}
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 			reserve_using_irq(slot);
584*4882a593Smuzhiyun 			continue;
585*4882a593Smuzhiyun 		}
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 		sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
588*4882a593Smuzhiyun 		socket->pcmcia_socket.dev.parent = &vrc4171_card_device.dev;
589*4882a593Smuzhiyun 		socket->pcmcia_socket.ops = &vrc4171_pccard_operations;
590*4882a593Smuzhiyun 		socket->pcmcia_socket.owner = THIS_MODULE;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 		retval = pcmcia_register_socket(&socket->pcmcia_socket);
593*4882a593Smuzhiyun 		if (retval < 0)
594*4882a593Smuzhiyun 			return retval;
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 		exca_write_byte(slot, I365_ADDRWIN, 0);
597*4882a593Smuzhiyun 		exca_write_byte(slot, GLOBAL_CONTROL, 0);
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 		socket->slot = SLOT_INITIALIZED;
600*4882a593Smuzhiyun 	}
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	return 0;
603*4882a593Smuzhiyun }
604*4882a593Smuzhiyun 
vrc4171_remove_sockets(void)605*4882a593Smuzhiyun static void vrc4171_remove_sockets(void)
606*4882a593Smuzhiyun {
607*4882a593Smuzhiyun 	struct vrc4171_socket *socket;
608*4882a593Smuzhiyun 	int slot;
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
611*4882a593Smuzhiyun 		if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
612*4882a593Smuzhiyun 			continue;
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 		socket = &vrc4171_sockets[slot];
615*4882a593Smuzhiyun 		if (socket->slot == SLOT_INITIALIZED)
616*4882a593Smuzhiyun 			pcmcia_unregister_socket(&socket->pcmcia_socket);
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 		socket->slot = SLOT_PROBE;
619*4882a593Smuzhiyun 	}
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun 
vrc4171_card_setup(char * options)622*4882a593Smuzhiyun static int vrc4171_card_setup(char *options)
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun 	if (options == NULL || *options == '\0')
625*4882a593Smuzhiyun 		return 1;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	if (strncmp(options, "irq:", 4) == 0) {
628*4882a593Smuzhiyun 		int irq;
629*4882a593Smuzhiyun 		options += 4;
630*4882a593Smuzhiyun 		irq = simple_strtoul(options, &options, 0);
631*4882a593Smuzhiyun 		if (irq >= 0 && irq < nr_irqs)
632*4882a593Smuzhiyun 			vrc4171_irq = irq;
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 		if (*options != ',')
635*4882a593Smuzhiyun 			return 1;
636*4882a593Smuzhiyun 		options++;
637*4882a593Smuzhiyun 	}
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	if (strncmp(options, "slota:", 6) == 0) {
640*4882a593Smuzhiyun 		options += 6;
641*4882a593Smuzhiyun 		if (*options != '\0') {
642*4882a593Smuzhiyun 			if (strncmp(options, "memnoprobe", 10) == 0) {
643*4882a593Smuzhiyun 				vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_MEM;
644*4882a593Smuzhiyun 				options += 10;
645*4882a593Smuzhiyun 			} else if (strncmp(options, "ionoprobe", 9) == 0) {
646*4882a593Smuzhiyun 				vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_IO;
647*4882a593Smuzhiyun 				options += 9;
648*4882a593Smuzhiyun 			} else if ( strncmp(options, "noprobe", 7) == 0) {
649*4882a593Smuzhiyun 				vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_ALL;
650*4882a593Smuzhiyun 				options += 7;
651*4882a593Smuzhiyun 			}
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 			if (*options != ',')
654*4882a593Smuzhiyun 				return 1;
655*4882a593Smuzhiyun 			options++;
656*4882a593Smuzhiyun 		} else
657*4882a593Smuzhiyun 			return 1;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	}
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	if (strncmp(options, "slotb:", 6) == 0) {
662*4882a593Smuzhiyun 		options += 6;
663*4882a593Smuzhiyun 		if (*options != '\0') {
664*4882a593Smuzhiyun 			if (strncmp(options, "pccard", 6) == 0) {
665*4882a593Smuzhiyun 				vrc4171_slotb = SLOTB_IS_PCCARD;
666*4882a593Smuzhiyun 				options += 6;
667*4882a593Smuzhiyun 			} else if (strncmp(options, "cf", 2) == 0) {
668*4882a593Smuzhiyun 				vrc4171_slotb = SLOTB_IS_CF;
669*4882a593Smuzhiyun 				options += 2;
670*4882a593Smuzhiyun 			} else if (strncmp(options, "flashrom", 8) == 0) {
671*4882a593Smuzhiyun 				vrc4171_slotb = SLOTB_IS_FLASHROM;
672*4882a593Smuzhiyun 				options += 8;
673*4882a593Smuzhiyun 			} else if (strncmp(options, "none", 4) == 0) {
674*4882a593Smuzhiyun 				vrc4171_slotb = SLOTB_IS_NONE;
675*4882a593Smuzhiyun 				options += 4;
676*4882a593Smuzhiyun 			}
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 			if (*options != ',')
679*4882a593Smuzhiyun 				return 1;
680*4882a593Smuzhiyun 			options++;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 			if (strncmp(options, "memnoprobe", 10) == 0)
683*4882a593Smuzhiyun 				vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_MEM;
684*4882a593Smuzhiyun 			if (strncmp(options, "ionoprobe", 9) == 0)
685*4882a593Smuzhiyun 				vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_IO;
686*4882a593Smuzhiyun 			if (strncmp(options, "noprobe", 7) == 0)
687*4882a593Smuzhiyun 				vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_ALL;
688*4882a593Smuzhiyun 		}
689*4882a593Smuzhiyun 	}
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	return 1;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun __setup("vrc4171_card=", vrc4171_card_setup);
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun static struct platform_driver vrc4171_card_driver = {
697*4882a593Smuzhiyun 	.driver = {
698*4882a593Smuzhiyun 		.name		= vrc4171_card_name,
699*4882a593Smuzhiyun 	},
700*4882a593Smuzhiyun };
701*4882a593Smuzhiyun 
vrc4171_card_init(void)702*4882a593Smuzhiyun static int vrc4171_card_init(void)
703*4882a593Smuzhiyun {
704*4882a593Smuzhiyun 	int retval;
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 	retval = platform_driver_register(&vrc4171_card_driver);
707*4882a593Smuzhiyun 	if (retval < 0)
708*4882a593Smuzhiyun 		return retval;
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun 	retval = platform_device_register(&vrc4171_card_device);
711*4882a593Smuzhiyun 	if (retval < 0) {
712*4882a593Smuzhiyun 		platform_driver_unregister(&vrc4171_card_driver);
713*4882a593Smuzhiyun 		return retval;
714*4882a593Smuzhiyun 	}
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun 	vrc4171_set_multifunction_pin(vrc4171_slotb);
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	retval = vrc4171_add_sockets();
719*4882a593Smuzhiyun 	if (retval == 0)
720*4882a593Smuzhiyun 		retval = request_irq(vrc4171_irq, pccard_interrupt, IRQF_SHARED,
721*4882a593Smuzhiyun 		                     vrc4171_card_name, vrc4171_sockets);
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	if (retval < 0) {
724*4882a593Smuzhiyun 		vrc4171_remove_sockets();
725*4882a593Smuzhiyun 		platform_device_unregister(&vrc4171_card_device);
726*4882a593Smuzhiyun 		platform_driver_unregister(&vrc4171_card_driver);
727*4882a593Smuzhiyun 		return retval;
728*4882a593Smuzhiyun 	}
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	printk(KERN_INFO "%s, connected to IRQ %d\n",
731*4882a593Smuzhiyun 		vrc4171_card_driver.driver.name, vrc4171_irq);
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	return 0;
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun 
vrc4171_card_exit(void)736*4882a593Smuzhiyun static void vrc4171_card_exit(void)
737*4882a593Smuzhiyun {
738*4882a593Smuzhiyun 	free_irq(vrc4171_irq, vrc4171_sockets);
739*4882a593Smuzhiyun 	vrc4171_remove_sockets();
740*4882a593Smuzhiyun 	platform_device_unregister(&vrc4171_card_device);
741*4882a593Smuzhiyun 	platform_driver_unregister(&vrc4171_card_driver);
742*4882a593Smuzhiyun }
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun module_init(vrc4171_card_init);
745*4882a593Smuzhiyun module_exit(vrc4171_card_exit);
746