1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * vg468.h 1.11 1999/10/25 20:03:34 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * The contents of this file are subject to the Mozilla Public License 5*4882a593Smuzhiyun * Version 1.1 (the "License"); you may not use this file except in 6*4882a593Smuzhiyun * compliance with the License. You may obtain a copy of the License 7*4882a593Smuzhiyun * at http://www.mozilla.org/MPL/ 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Software distributed under the License is distributed on an "AS IS" 10*4882a593Smuzhiyun * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 11*4882a593Smuzhiyun * the License for the specific language governing rights and 12*4882a593Smuzhiyun * limitations under the License. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * The initial developer of the original code is David A. Hinds 15*4882a593Smuzhiyun * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 16*4882a593Smuzhiyun * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * Alternatively, the contents of this file may be used under the 19*4882a593Smuzhiyun * terms of the GNU General Public License version 2 (the "GPL"), in which 20*4882a593Smuzhiyun * case the provisions of the GPL are applicable instead of the 21*4882a593Smuzhiyun * above. If you wish to allow the use of your version of this file 22*4882a593Smuzhiyun * only under the terms of the GPL and not to allow others to use 23*4882a593Smuzhiyun * your version of this file under the MPL, indicate your decision by 24*4882a593Smuzhiyun * deleting the provisions above and replace them with the notice and 25*4882a593Smuzhiyun * other provisions required by the GPL. If you do not delete the 26*4882a593Smuzhiyun * provisions above, a recipient may use your version of this file 27*4882a593Smuzhiyun * under either the MPL or the GPL. 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #ifndef _LINUX_VG468_H 31*4882a593Smuzhiyun #define _LINUX_VG468_H 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Special bit in I365_IDENT used for Vadem chip detection */ 34*4882a593Smuzhiyun #define I365_IDENT_VADEM 0x08 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* Special definitions in I365_POWER */ 37*4882a593Smuzhiyun #define VG468_VPP2_MASK 0x0c 38*4882a593Smuzhiyun #define VG468_VPP2_5V 0x04 39*4882a593Smuzhiyun #define VG468_VPP2_12V 0x08 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* Unique Vadem registers */ 42*4882a593Smuzhiyun #define VG469_VSENSE 0x1f /* Card voltage sense */ 43*4882a593Smuzhiyun #define VG469_VSELECT 0x2f /* Card voltage select */ 44*4882a593Smuzhiyun #define VG468_CTL 0x38 /* Control register */ 45*4882a593Smuzhiyun #define VG468_TIMER 0x39 /* Timer control */ 46*4882a593Smuzhiyun #define VG468_MISC 0x3a /* Miscellaneous */ 47*4882a593Smuzhiyun #define VG468_GPIO_CFG 0x3b /* GPIO configuration */ 48*4882a593Smuzhiyun #define VG469_EXT_MODE 0x3c /* Extended mode register */ 49*4882a593Smuzhiyun #define VG468_SELECT 0x3d /* Programmable chip select */ 50*4882a593Smuzhiyun #define VG468_SELECT_CFG 0x3e /* Chip select configuration */ 51*4882a593Smuzhiyun #define VG468_ATA 0x3f /* ATA control */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* Flags for VG469_VSENSE */ 54*4882a593Smuzhiyun #define VG469_VSENSE_A_VS1 0x01 55*4882a593Smuzhiyun #define VG469_VSENSE_A_VS2 0x02 56*4882a593Smuzhiyun #define VG469_VSENSE_B_VS1 0x04 57*4882a593Smuzhiyun #define VG469_VSENSE_B_VS2 0x08 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Flags for VG469_VSELECT */ 60*4882a593Smuzhiyun #define VG469_VSEL_VCC 0x03 61*4882a593Smuzhiyun #define VG469_VSEL_5V 0x00 62*4882a593Smuzhiyun #define VG469_VSEL_3V 0x03 63*4882a593Smuzhiyun #define VG469_VSEL_MAX 0x0c 64*4882a593Smuzhiyun #define VG469_VSEL_EXT_STAT 0x10 65*4882a593Smuzhiyun #define VG469_VSEL_EXT_BUS 0x20 66*4882a593Smuzhiyun #define VG469_VSEL_MIXED 0x40 67*4882a593Smuzhiyun #define VG469_VSEL_ISA 0x80 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* Flags for VG468_CTL */ 70*4882a593Smuzhiyun #define VG468_CTL_SLOW 0x01 /* 600ns memory timing */ 71*4882a593Smuzhiyun #define VG468_CTL_ASYNC 0x02 /* Asynchronous bus clocking */ 72*4882a593Smuzhiyun #define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */ 73*4882a593Smuzhiyun #define VG468_CTL_DELAY 0x10 /* Card detect debounce */ 74*4882a593Smuzhiyun #define VG468_CTL_INPACK 0x20 /* Obey INPACK signal? */ 75*4882a593Smuzhiyun #define VG468_CTL_POLARITY 0x40 /* VCCEN polarity */ 76*4882a593Smuzhiyun #define VG468_CTL_COMPAT 0x80 /* Compatibility stuff */ 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */ 79*4882a593Smuzhiyun #define VG469_CTL_STRETCH 0x10 /* LED stretch */ 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* Flags for VG468_TIMER */ 82*4882a593Smuzhiyun #define VG468_TIMER_ZEROPWR 0x10 /* Zero power control */ 83*4882a593Smuzhiyun #define VG468_TIMER_SIGEN 0x20 /* Power up */ 84*4882a593Smuzhiyun #define VG468_TIMER_STATUS 0x40 /* Activity timer status */ 85*4882a593Smuzhiyun #define VG468_TIMER_RES 0x80 /* Timer resolution */ 86*4882a593Smuzhiyun #define VG468_TIMER_MASK 0x0f /* Activity timer timeout */ 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* Flags for VG468_MISC */ 89*4882a593Smuzhiyun #define VG468_MISC_GPIO 0x04 /* General-purpose IO */ 90*4882a593Smuzhiyun #define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */ 91*4882a593Smuzhiyun #define VG469_MISC_LEDENA 0x10 /* LED enable */ 92*4882a593Smuzhiyun #define VG468_MISC_VADEMREV 0x40 /* Vadem revision control */ 93*4882a593Smuzhiyun #define VG468_MISC_UNLOCK 0x80 /* Unique register lock */ 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* Flags for VG469_EXT_MODE_A */ 96*4882a593Smuzhiyun #define VG469_MODE_VPPST 0x03 /* Vpp steering control */ 97*4882a593Smuzhiyun #define VG469_MODE_INT_SENSE 0x04 /* Internal voltage sense */ 98*4882a593Smuzhiyun #define VG469_MODE_CABLE 0x08 99*4882a593Smuzhiyun #define VG469_MODE_COMPAT 0x10 /* i82365sl B or DF step */ 100*4882a593Smuzhiyun #define VG469_MODE_TEST 0x20 101*4882a593Smuzhiyun #define VG469_MODE_RIO 0x40 /* Steer RIO to INTR? */ 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* Flags for VG469_EXT_MODE_B */ 104*4882a593Smuzhiyun #define VG469_MODE_B_3V 0x01 /* 3.3v for socket B */ 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #endif /* _LINUX_VG468_H */ 107