1*4882a593Smuzhiyun /*======================================================================
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun Device driver for Databook TCIC-2 PCMCIA controller
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun tcic.c 1.111 2000/02/15 04:13:12
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun The contents of this file are subject to the Mozilla Public
8*4882a593Smuzhiyun License Version 1.1 (the "License"); you may not use this file
9*4882a593Smuzhiyun except in compliance with the License. You may obtain a copy of
10*4882a593Smuzhiyun the License at http://www.mozilla.org/MPL/
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun Software distributed under the License is distributed on an "AS
13*4882a593Smuzhiyun IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
14*4882a593Smuzhiyun implied. See the License for the specific language governing
15*4882a593Smuzhiyun rights and limitations under the License.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun The initial developer of the original code is David A. Hinds
18*4882a593Smuzhiyun <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
19*4882a593Smuzhiyun are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun Alternatively, the contents of this file may be used under the
22*4882a593Smuzhiyun terms of the GNU General Public License version 2 (the "GPL"), in which
23*4882a593Smuzhiyun case the provisions of the GPL are applicable instead of the
24*4882a593Smuzhiyun above. If you wish to allow the use of your version of this file
25*4882a593Smuzhiyun only under the terms of the GPL and not to allow others to use
26*4882a593Smuzhiyun your version of this file under the MPL, indicate your decision
27*4882a593Smuzhiyun by deleting the provisions above and replace them with the notice
28*4882a593Smuzhiyun and other provisions required by the GPL. If you do not delete
29*4882a593Smuzhiyun the provisions above, a recipient may use your version of this
30*4882a593Smuzhiyun file under either the MPL or the GPL.
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun ======================================================================*/
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <linux/module.h>
35*4882a593Smuzhiyun #include <linux/moduleparam.h>
36*4882a593Smuzhiyun #include <linux/init.h>
37*4882a593Smuzhiyun #include <linux/types.h>
38*4882a593Smuzhiyun #include <linux/fcntl.h>
39*4882a593Smuzhiyun #include <linux/string.h>
40*4882a593Smuzhiyun #include <linux/errno.h>
41*4882a593Smuzhiyun #include <linux/interrupt.h>
42*4882a593Smuzhiyun #include <linux/timer.h>
43*4882a593Smuzhiyun #include <linux/ioport.h>
44*4882a593Smuzhiyun #include <linux/delay.h>
45*4882a593Smuzhiyun #include <linux/workqueue.h>
46*4882a593Smuzhiyun #include <linux/platform_device.h>
47*4882a593Smuzhiyun #include <linux/bitops.h>
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #include <asm/io.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #include <pcmcia/ss.h>
52*4882a593Smuzhiyun #include "tcic.h"
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun MODULE_AUTHOR("David Hinds <dahinds@users.sourceforge.net>");
55*4882a593Smuzhiyun MODULE_DESCRIPTION("Databook TCIC-2 PCMCIA socket driver");
56*4882a593Smuzhiyun MODULE_LICENSE("Dual MPL/GPL");
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /*====================================================================*/
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Parameters that can be set with 'insmod' */
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* The base port address of the TCIC-2 chip */
63*4882a593Smuzhiyun static unsigned long tcic_base = TCIC_BASE;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* Specify a socket number to ignore */
66*4882a593Smuzhiyun static int ignore = -1;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Probe for safe interrupts? */
69*4882a593Smuzhiyun static int do_scan = 1;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Bit map of interrupts to choose from */
72*4882a593Smuzhiyun static u_int irq_mask = 0xffff;
73*4882a593Smuzhiyun static int irq_list[16];
74*4882a593Smuzhiyun static unsigned int irq_list_count;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* The card status change interrupt -- 0 means autoselect */
77*4882a593Smuzhiyun static int cs_irq;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* Poll status interval -- 0 means default to interrupt */
80*4882a593Smuzhiyun static int poll_interval;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* Delay for card status double-checking */
83*4882a593Smuzhiyun static int poll_quick = HZ/20;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /* CCLK external clock time, in nanoseconds. 70 ns = 14.31818 MHz */
86*4882a593Smuzhiyun static int cycle_time = 70;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun module_param_hw(tcic_base, ulong, ioport, 0444);
89*4882a593Smuzhiyun module_param(ignore, int, 0444);
90*4882a593Smuzhiyun module_param(do_scan, int, 0444);
91*4882a593Smuzhiyun module_param_hw(irq_mask, int, other, 0444);
92*4882a593Smuzhiyun module_param_hw_array(irq_list, int, irq, &irq_list_count, 0444);
93*4882a593Smuzhiyun module_param_hw(cs_irq, int, irq, 0444);
94*4882a593Smuzhiyun module_param(poll_interval, int, 0444);
95*4882a593Smuzhiyun module_param(poll_quick, int, 0444);
96*4882a593Smuzhiyun module_param(cycle_time, int, 0444);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /*====================================================================*/
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static irqreturn_t tcic_interrupt(int irq, void *dev);
101*4882a593Smuzhiyun static void tcic_timer(struct timer_list *unused);
102*4882a593Smuzhiyun static struct pccard_operations tcic_operations;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun struct tcic_socket {
105*4882a593Smuzhiyun u_short psock;
106*4882a593Smuzhiyun u_char last_sstat;
107*4882a593Smuzhiyun u_char id;
108*4882a593Smuzhiyun struct pcmcia_socket socket;
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static struct timer_list poll_timer;
112*4882a593Smuzhiyun static int tcic_timer_pending;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static int sockets;
115*4882a593Smuzhiyun static struct tcic_socket socket_table[2];
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /*====================================================================*/
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* Trick when selecting interrupts: the TCIC sktirq pin is supposed
120*4882a593Smuzhiyun to map to irq 11, but is coded as 0 or 1 in the irq registers. */
121*4882a593Smuzhiyun #define TCIC_IRQ(x) ((x) ? (((x) == 11) ? 1 : (x)) : 15)
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun #ifdef DEBUG_X
tcic_getb(u_char reg)124*4882a593Smuzhiyun static u_char tcic_getb(u_char reg)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun u_char val = inb(tcic_base+reg);
127*4882a593Smuzhiyun printk(KERN_DEBUG "tcic_getb(%#lx) = %#x\n", tcic_base+reg, val);
128*4882a593Smuzhiyun return val;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
tcic_getw(u_char reg)131*4882a593Smuzhiyun static u_short tcic_getw(u_char reg)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun u_short val = inw(tcic_base+reg);
134*4882a593Smuzhiyun printk(KERN_DEBUG "tcic_getw(%#lx) = %#x\n", tcic_base+reg, val);
135*4882a593Smuzhiyun return val;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
tcic_setb(u_char reg,u_char data)138*4882a593Smuzhiyun static void tcic_setb(u_char reg, u_char data)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun printk(KERN_DEBUG "tcic_setb(%#lx, %#x)\n", tcic_base+reg, data);
141*4882a593Smuzhiyun outb(data, tcic_base+reg);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
tcic_setw(u_char reg,u_short data)144*4882a593Smuzhiyun static void tcic_setw(u_char reg, u_short data)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun printk(KERN_DEBUG "tcic_setw(%#lx, %#x)\n", tcic_base+reg, data);
147*4882a593Smuzhiyun outw(data, tcic_base+reg);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun #else
150*4882a593Smuzhiyun #define tcic_getb(reg) inb(tcic_base+reg)
151*4882a593Smuzhiyun #define tcic_getw(reg) inw(tcic_base+reg)
152*4882a593Smuzhiyun #define tcic_setb(reg, data) outb(data, tcic_base+reg)
153*4882a593Smuzhiyun #define tcic_setw(reg, data) outw(data, tcic_base+reg)
154*4882a593Smuzhiyun #endif
155*4882a593Smuzhiyun
tcic_setl(u_char reg,u_int data)156*4882a593Smuzhiyun static void tcic_setl(u_char reg, u_int data)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun #ifdef DEBUG_X
159*4882a593Smuzhiyun printk(KERN_DEBUG "tcic_setl(%#x, %#lx)\n", tcic_base+reg, data);
160*4882a593Smuzhiyun #endif
161*4882a593Smuzhiyun outw(data & 0xffff, tcic_base+reg);
162*4882a593Smuzhiyun outw(data >> 16, tcic_base+reg+2);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
tcic_aux_setb(u_short reg,u_char data)165*4882a593Smuzhiyun static void tcic_aux_setb(u_short reg, u_char data)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun u_char mode = (tcic_getb(TCIC_MODE) & TCIC_MODE_PGMMASK) | reg;
168*4882a593Smuzhiyun tcic_setb(TCIC_MODE, mode);
169*4882a593Smuzhiyun tcic_setb(TCIC_AUX, data);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
tcic_aux_getw(u_short reg)172*4882a593Smuzhiyun static u_short tcic_aux_getw(u_short reg)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun u_char mode = (tcic_getb(TCIC_MODE) & TCIC_MODE_PGMMASK) | reg;
175*4882a593Smuzhiyun tcic_setb(TCIC_MODE, mode);
176*4882a593Smuzhiyun return tcic_getw(TCIC_AUX);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
tcic_aux_setw(u_short reg,u_short data)179*4882a593Smuzhiyun static void tcic_aux_setw(u_short reg, u_short data)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun u_char mode = (tcic_getb(TCIC_MODE) & TCIC_MODE_PGMMASK) | reg;
182*4882a593Smuzhiyun tcic_setb(TCIC_MODE, mode);
183*4882a593Smuzhiyun tcic_setw(TCIC_AUX, data);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /*====================================================================*/
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /* Time conversion functions */
189*4882a593Smuzhiyun
to_cycles(int ns)190*4882a593Smuzhiyun static int to_cycles(int ns)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun if (ns < 14)
193*4882a593Smuzhiyun return 0;
194*4882a593Smuzhiyun else
195*4882a593Smuzhiyun return 2*(ns-14)/cycle_time;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /*====================================================================*/
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static volatile u_int irq_hits;
201*4882a593Smuzhiyun
tcic_irq_count(int irq,void * dev)202*4882a593Smuzhiyun static irqreturn_t __init tcic_irq_count(int irq, void *dev)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun irq_hits++;
205*4882a593Smuzhiyun return IRQ_HANDLED;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
try_irq(int irq)208*4882a593Smuzhiyun static u_int __init try_irq(int irq)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun u_short cfg;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun irq_hits = 0;
213*4882a593Smuzhiyun if (request_irq(irq, tcic_irq_count, 0, "irq scan", tcic_irq_count) != 0)
214*4882a593Smuzhiyun return -1;
215*4882a593Smuzhiyun mdelay(10);
216*4882a593Smuzhiyun if (irq_hits) {
217*4882a593Smuzhiyun free_irq(irq, tcic_irq_count);
218*4882a593Smuzhiyun return -1;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun /* Generate one interrupt */
222*4882a593Smuzhiyun cfg = TCIC_SYSCFG_AUTOBUSY | 0x0a00;
223*4882a593Smuzhiyun tcic_aux_setw(TCIC_AUX_SYSCFG, cfg | TCIC_IRQ(irq));
224*4882a593Smuzhiyun tcic_setb(TCIC_IENA, TCIC_IENA_ERR | TCIC_IENA_CFG_HIGH);
225*4882a593Smuzhiyun tcic_setb(TCIC_ICSR, TCIC_ICSR_ERR | TCIC_ICSR_JAM);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun udelay(1000);
228*4882a593Smuzhiyun free_irq(irq, tcic_irq_count);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun /* Turn off interrupts */
231*4882a593Smuzhiyun tcic_setb(TCIC_IENA, TCIC_IENA_CFG_OFF);
232*4882a593Smuzhiyun while (tcic_getb(TCIC_ICSR))
233*4882a593Smuzhiyun tcic_setb(TCIC_ICSR, TCIC_ICSR_JAM);
234*4882a593Smuzhiyun tcic_aux_setw(TCIC_AUX_SYSCFG, cfg);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun return (irq_hits != 1);
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
irq_scan(u_int mask0)239*4882a593Smuzhiyun static u_int __init irq_scan(u_int mask0)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun u_int mask1;
242*4882a593Smuzhiyun int i;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun #ifdef __alpha__
245*4882a593Smuzhiyun #define PIC 0x4d0
246*4882a593Smuzhiyun /* Don't probe level-triggered interrupts -- reserved for PCI */
247*4882a593Smuzhiyun int level_mask = inb_p(PIC) | (inb_p(PIC+1) << 8);
248*4882a593Smuzhiyun if (level_mask)
249*4882a593Smuzhiyun mask0 &= ~level_mask;
250*4882a593Smuzhiyun #endif
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun mask1 = 0;
253*4882a593Smuzhiyun if (do_scan) {
254*4882a593Smuzhiyun for (i = 0; i < 16; i++)
255*4882a593Smuzhiyun if ((mask0 & (1 << i)) && (try_irq(i) == 0))
256*4882a593Smuzhiyun mask1 |= (1 << i);
257*4882a593Smuzhiyun for (i = 0; i < 16; i++)
258*4882a593Smuzhiyun if ((mask1 & (1 << i)) && (try_irq(i) != 0)) {
259*4882a593Smuzhiyun mask1 ^= (1 << i);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (mask1) {
264*4882a593Smuzhiyun printk("scanned");
265*4882a593Smuzhiyun } else {
266*4882a593Smuzhiyun /* Fallback: just find interrupts that aren't in use */
267*4882a593Smuzhiyun for (i = 0; i < 16; i++)
268*4882a593Smuzhiyun if ((mask0 & (1 << i)) &&
269*4882a593Smuzhiyun (request_irq(i, tcic_irq_count, 0, "x", tcic_irq_count) == 0)) {
270*4882a593Smuzhiyun mask1 |= (1 << i);
271*4882a593Smuzhiyun free_irq(i, tcic_irq_count);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun printk("default");
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun printk(") = ");
277*4882a593Smuzhiyun for (i = 0; i < 16; i++)
278*4882a593Smuzhiyun if (mask1 & (1<<i))
279*4882a593Smuzhiyun printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i);
280*4882a593Smuzhiyun printk(" ");
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return mask1;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /*======================================================================
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun See if a card is present, powered up, in IO mode, and already
288*4882a593Smuzhiyun bound to a (non-PCMCIA) Linux driver.
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun We make an exception for cards that look like serial devices.
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun ======================================================================*/
293*4882a593Smuzhiyun
is_active(int s)294*4882a593Smuzhiyun static int __init is_active(int s)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun u_short scf1, ioctl, base, num;
297*4882a593Smuzhiyun u_char pwr, sstat;
298*4882a593Smuzhiyun u_int addr;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun tcic_setl(TCIC_ADDR, (s << TCIC_ADDR_SS_SHFT)
301*4882a593Smuzhiyun | TCIC_ADDR_INDREG | TCIC_SCF1(s));
302*4882a593Smuzhiyun scf1 = tcic_getw(TCIC_DATA);
303*4882a593Smuzhiyun pwr = tcic_getb(TCIC_PWR);
304*4882a593Smuzhiyun sstat = tcic_getb(TCIC_SSTAT);
305*4882a593Smuzhiyun addr = TCIC_IWIN(s, 0);
306*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, addr + TCIC_IBASE_X);
307*4882a593Smuzhiyun base = tcic_getw(TCIC_DATA);
308*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, addr + TCIC_ICTL_X);
309*4882a593Smuzhiyun ioctl = tcic_getw(TCIC_DATA);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun if (ioctl & TCIC_ICTL_TINY)
312*4882a593Smuzhiyun num = 1;
313*4882a593Smuzhiyun else {
314*4882a593Smuzhiyun num = (base ^ (base-1));
315*4882a593Smuzhiyun base = base & (base-1);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun if ((sstat & TCIC_SSTAT_CD) && (pwr & TCIC_PWR_VCC(s)) &&
319*4882a593Smuzhiyun (scf1 & TCIC_SCF1_IOSTS) && (ioctl & TCIC_ICTL_ENA) &&
320*4882a593Smuzhiyun ((base & 0xfeef) != 0x02e8)) {
321*4882a593Smuzhiyun struct resource *res = request_region(base, num, "tcic-2");
322*4882a593Smuzhiyun if (!res) /* region is busy */
323*4882a593Smuzhiyun return 1;
324*4882a593Smuzhiyun release_region(base, num);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun return 0;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /*======================================================================
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun This returns the revision code for the specified socket.
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun ======================================================================*/
335*4882a593Smuzhiyun
get_tcic_id(void)336*4882a593Smuzhiyun static int __init get_tcic_id(void)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun u_short id;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun tcic_aux_setw(TCIC_AUX_TEST, TCIC_TEST_DIAG);
341*4882a593Smuzhiyun id = tcic_aux_getw(TCIC_AUX_ILOCK);
342*4882a593Smuzhiyun id = (id & TCIC_ILOCKTEST_ID_MASK) >> TCIC_ILOCKTEST_ID_SH;
343*4882a593Smuzhiyun tcic_aux_setw(TCIC_AUX_TEST, 0);
344*4882a593Smuzhiyun return id;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /*====================================================================*/
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun static struct platform_driver tcic_driver = {
350*4882a593Smuzhiyun .driver = {
351*4882a593Smuzhiyun .name = "tcic-pcmcia",
352*4882a593Smuzhiyun },
353*4882a593Smuzhiyun };
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun static struct platform_device tcic_device = {
356*4882a593Smuzhiyun .name = "tcic-pcmcia",
357*4882a593Smuzhiyun .id = 0,
358*4882a593Smuzhiyun };
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun
init_tcic(void)361*4882a593Smuzhiyun static int __init init_tcic(void)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun int i, sock, ret = 0;
364*4882a593Smuzhiyun u_int mask, scan;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun if (platform_driver_register(&tcic_driver))
367*4882a593Smuzhiyun return -1;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun printk(KERN_INFO "Databook TCIC-2 PCMCIA probe: ");
370*4882a593Smuzhiyun sock = 0;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun if (!request_region(tcic_base, 16, "tcic-2")) {
373*4882a593Smuzhiyun printk("could not allocate ports,\n ");
374*4882a593Smuzhiyun platform_driver_unregister(&tcic_driver);
375*4882a593Smuzhiyun return -ENODEV;
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun else {
378*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, 0);
379*4882a593Smuzhiyun if (tcic_getw(TCIC_ADDR) == 0) {
380*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, 0xc3a5);
381*4882a593Smuzhiyun if (tcic_getw(TCIC_ADDR) == 0xc3a5) sock = 2;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun if (sock == 0) {
384*4882a593Smuzhiyun /* See if resetting the controller does any good */
385*4882a593Smuzhiyun tcic_setb(TCIC_SCTRL, TCIC_SCTRL_RESET);
386*4882a593Smuzhiyun tcic_setb(TCIC_SCTRL, 0);
387*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, 0);
388*4882a593Smuzhiyun if (tcic_getw(TCIC_ADDR) == 0) {
389*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, 0xc3a5);
390*4882a593Smuzhiyun if (tcic_getw(TCIC_ADDR) == 0xc3a5) sock = 2;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun if (sock == 0) {
395*4882a593Smuzhiyun printk("not found.\n");
396*4882a593Smuzhiyun release_region(tcic_base, 16);
397*4882a593Smuzhiyun platform_driver_unregister(&tcic_driver);
398*4882a593Smuzhiyun return -ENODEV;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun sockets = 0;
402*4882a593Smuzhiyun for (i = 0; i < sock; i++) {
403*4882a593Smuzhiyun if ((i == ignore) || is_active(i)) continue;
404*4882a593Smuzhiyun socket_table[sockets].psock = i;
405*4882a593Smuzhiyun socket_table[sockets].id = get_tcic_id();
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun socket_table[sockets].socket.owner = THIS_MODULE;
408*4882a593Smuzhiyun /* only 16-bit cards, memory windows must be size-aligned */
409*4882a593Smuzhiyun /* No PCI or CardBus support */
410*4882a593Smuzhiyun socket_table[sockets].socket.features = SS_CAP_PCCARD | SS_CAP_MEM_ALIGN;
411*4882a593Smuzhiyun /* irq 14, 11, 10, 7, 6, 5, 4, 3 */
412*4882a593Smuzhiyun socket_table[sockets].socket.irq_mask = 0x4cf8;
413*4882a593Smuzhiyun /* 4K minimum window size */
414*4882a593Smuzhiyun socket_table[sockets].socket.map_size = 0x1000;
415*4882a593Smuzhiyun sockets++;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun switch (socket_table[0].id) {
419*4882a593Smuzhiyun case TCIC_ID_DB86082:
420*4882a593Smuzhiyun printk("DB86082"); break;
421*4882a593Smuzhiyun case TCIC_ID_DB86082A:
422*4882a593Smuzhiyun printk("DB86082A"); break;
423*4882a593Smuzhiyun case TCIC_ID_DB86084:
424*4882a593Smuzhiyun printk("DB86084"); break;
425*4882a593Smuzhiyun case TCIC_ID_DB86084A:
426*4882a593Smuzhiyun printk("DB86084A"); break;
427*4882a593Smuzhiyun case TCIC_ID_DB86072:
428*4882a593Smuzhiyun printk("DB86072"); break;
429*4882a593Smuzhiyun case TCIC_ID_DB86184:
430*4882a593Smuzhiyun printk("DB86184"); break;
431*4882a593Smuzhiyun case TCIC_ID_DB86082B:
432*4882a593Smuzhiyun printk("DB86082B"); break;
433*4882a593Smuzhiyun default:
434*4882a593Smuzhiyun printk("Unknown ID 0x%02x", socket_table[0].id);
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* Set up polling */
438*4882a593Smuzhiyun timer_setup(&poll_timer, &tcic_timer, 0);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /* Build interrupt mask */
441*4882a593Smuzhiyun printk(KERN_CONT ", %d sockets\n", sockets);
442*4882a593Smuzhiyun printk(KERN_INFO " irq list (");
443*4882a593Smuzhiyun if (irq_list_count == 0)
444*4882a593Smuzhiyun mask = irq_mask;
445*4882a593Smuzhiyun else
446*4882a593Smuzhiyun for (i = mask = 0; i < irq_list_count; i++)
447*4882a593Smuzhiyun mask |= (1<<irq_list[i]);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /* irq 14, 11, 10, 7, 6, 5, 4, 3 */
450*4882a593Smuzhiyun mask &= 0x4cf8;
451*4882a593Smuzhiyun /* Scan interrupts */
452*4882a593Smuzhiyun mask = irq_scan(mask);
453*4882a593Smuzhiyun for (i=0;i<sockets;i++)
454*4882a593Smuzhiyun socket_table[i].socket.irq_mask = mask;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun /* Check for only two interrupts available */
457*4882a593Smuzhiyun scan = (mask & (mask-1));
458*4882a593Smuzhiyun if (((scan & (scan-1)) == 0) && (poll_interval == 0))
459*4882a593Smuzhiyun poll_interval = HZ;
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun if (poll_interval == 0) {
462*4882a593Smuzhiyun /* Avoid irq 12 unless it is explicitly requested */
463*4882a593Smuzhiyun u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12));
464*4882a593Smuzhiyun for (i = 15; i > 0; i--)
465*4882a593Smuzhiyun if ((cs_mask & (1 << i)) &&
466*4882a593Smuzhiyun (request_irq(i, tcic_interrupt, 0, "tcic",
467*4882a593Smuzhiyun tcic_interrupt) == 0))
468*4882a593Smuzhiyun break;
469*4882a593Smuzhiyun cs_irq = i;
470*4882a593Smuzhiyun if (cs_irq == 0) poll_interval = HZ;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun if (socket_table[0].socket.irq_mask & (1 << 11))
474*4882a593Smuzhiyun printk("sktirq is irq 11, ");
475*4882a593Smuzhiyun if (cs_irq != 0)
476*4882a593Smuzhiyun printk("status change on irq %d\n", cs_irq);
477*4882a593Smuzhiyun else
478*4882a593Smuzhiyun printk("polled status, interval = %d ms\n",
479*4882a593Smuzhiyun poll_interval * 1000 / HZ);
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun for (i = 0; i < sockets; i++) {
482*4882a593Smuzhiyun tcic_setw(TCIC_ADDR+2, socket_table[i].psock << TCIC_SS_SHFT);
483*4882a593Smuzhiyun socket_table[i].last_sstat = tcic_getb(TCIC_SSTAT);
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun /* jump start interrupt handler, if needed */
487*4882a593Smuzhiyun tcic_interrupt(0, NULL);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun platform_device_register(&tcic_device);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun for (i = 0; i < sockets; i++) {
492*4882a593Smuzhiyun socket_table[i].socket.ops = &tcic_operations;
493*4882a593Smuzhiyun socket_table[i].socket.resource_ops = &pccard_nonstatic_ops;
494*4882a593Smuzhiyun socket_table[i].socket.dev.parent = &tcic_device.dev;
495*4882a593Smuzhiyun ret = pcmcia_register_socket(&socket_table[i].socket);
496*4882a593Smuzhiyun if (ret && i)
497*4882a593Smuzhiyun pcmcia_unregister_socket(&socket_table[0].socket);
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun return ret;
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun return 0;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun } /* init_tcic */
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun /*====================================================================*/
507*4882a593Smuzhiyun
exit_tcic(void)508*4882a593Smuzhiyun static void __exit exit_tcic(void)
509*4882a593Smuzhiyun {
510*4882a593Smuzhiyun int i;
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun del_timer_sync(&poll_timer);
513*4882a593Smuzhiyun if (cs_irq != 0) {
514*4882a593Smuzhiyun tcic_aux_setw(TCIC_AUX_SYSCFG, TCIC_SYSCFG_AUTOBUSY|0x0a00);
515*4882a593Smuzhiyun free_irq(cs_irq, tcic_interrupt);
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun release_region(tcic_base, 16);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun for (i = 0; i < sockets; i++) {
520*4882a593Smuzhiyun pcmcia_unregister_socket(&socket_table[i].socket);
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun platform_device_unregister(&tcic_device);
524*4882a593Smuzhiyun platform_driver_unregister(&tcic_driver);
525*4882a593Smuzhiyun } /* exit_tcic */
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun /*====================================================================*/
528*4882a593Smuzhiyun
tcic_interrupt(int irq,void * dev)529*4882a593Smuzhiyun static irqreturn_t tcic_interrupt(int irq, void *dev)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun int i, quick = 0;
532*4882a593Smuzhiyun u_char latch, sstat;
533*4882a593Smuzhiyun u_short psock;
534*4882a593Smuzhiyun u_int events;
535*4882a593Smuzhiyun static volatile int active = 0;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun if (active) {
538*4882a593Smuzhiyun printk(KERN_NOTICE "tcic: reentered interrupt handler!\n");
539*4882a593Smuzhiyun return IRQ_NONE;
540*4882a593Smuzhiyun } else
541*4882a593Smuzhiyun active = 1;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun pr_debug("tcic_interrupt()\n");
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun for (i = 0; i < sockets; i++) {
546*4882a593Smuzhiyun psock = socket_table[i].psock;
547*4882a593Smuzhiyun tcic_setl(TCIC_ADDR, (psock << TCIC_ADDR_SS_SHFT)
548*4882a593Smuzhiyun | TCIC_ADDR_INDREG | TCIC_SCF1(psock));
549*4882a593Smuzhiyun sstat = tcic_getb(TCIC_SSTAT);
550*4882a593Smuzhiyun latch = sstat ^ socket_table[psock].last_sstat;
551*4882a593Smuzhiyun socket_table[i].last_sstat = sstat;
552*4882a593Smuzhiyun if (tcic_getb(TCIC_ICSR) & TCIC_ICSR_CDCHG) {
553*4882a593Smuzhiyun tcic_setb(TCIC_ICSR, TCIC_ICSR_CLEAR);
554*4882a593Smuzhiyun quick = 1;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun if (latch == 0)
557*4882a593Smuzhiyun continue;
558*4882a593Smuzhiyun events = (latch & TCIC_SSTAT_CD) ? SS_DETECT : 0;
559*4882a593Smuzhiyun events |= (latch & TCIC_SSTAT_WP) ? SS_WRPROT : 0;
560*4882a593Smuzhiyun if (tcic_getw(TCIC_DATA) & TCIC_SCF1_IOSTS) {
561*4882a593Smuzhiyun events |= (latch & TCIC_SSTAT_LBAT1) ? SS_STSCHG : 0;
562*4882a593Smuzhiyun } else {
563*4882a593Smuzhiyun events |= (latch & TCIC_SSTAT_RDY) ? SS_READY : 0;
564*4882a593Smuzhiyun events |= (latch & TCIC_SSTAT_LBAT1) ? SS_BATDEAD : 0;
565*4882a593Smuzhiyun events |= (latch & TCIC_SSTAT_LBAT2) ? SS_BATWARN : 0;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun if (events) {
568*4882a593Smuzhiyun pcmcia_parse_events(&socket_table[i].socket, events);
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun /* Schedule next poll, if needed */
573*4882a593Smuzhiyun if (((cs_irq == 0) || quick) && (!tcic_timer_pending)) {
574*4882a593Smuzhiyun poll_timer.expires = jiffies + (quick ? poll_quick : poll_interval);
575*4882a593Smuzhiyun add_timer(&poll_timer);
576*4882a593Smuzhiyun tcic_timer_pending = 1;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun active = 0;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun pr_debug("interrupt done\n");
581*4882a593Smuzhiyun return IRQ_HANDLED;
582*4882a593Smuzhiyun } /* tcic_interrupt */
583*4882a593Smuzhiyun
tcic_timer(struct timer_list * unused)584*4882a593Smuzhiyun static void tcic_timer(struct timer_list *unused)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun pr_debug("tcic_timer()\n");
587*4882a593Smuzhiyun tcic_timer_pending = 0;
588*4882a593Smuzhiyun tcic_interrupt(0, NULL);
589*4882a593Smuzhiyun } /* tcic_timer */
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun /*====================================================================*/
592*4882a593Smuzhiyun
tcic_get_status(struct pcmcia_socket * sock,u_int * value)593*4882a593Smuzhiyun static int tcic_get_status(struct pcmcia_socket *sock, u_int *value)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun u_short psock = container_of(sock, struct tcic_socket, socket)->psock;
596*4882a593Smuzhiyun u_char reg;
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun tcic_setl(TCIC_ADDR, (psock << TCIC_ADDR_SS_SHFT)
599*4882a593Smuzhiyun | TCIC_ADDR_INDREG | TCIC_SCF1(psock));
600*4882a593Smuzhiyun reg = tcic_getb(TCIC_SSTAT);
601*4882a593Smuzhiyun *value = (reg & TCIC_SSTAT_CD) ? SS_DETECT : 0;
602*4882a593Smuzhiyun *value |= (reg & TCIC_SSTAT_WP) ? SS_WRPROT : 0;
603*4882a593Smuzhiyun if (tcic_getw(TCIC_DATA) & TCIC_SCF1_IOSTS) {
604*4882a593Smuzhiyun *value |= (reg & TCIC_SSTAT_LBAT1) ? SS_STSCHG : 0;
605*4882a593Smuzhiyun } else {
606*4882a593Smuzhiyun *value |= (reg & TCIC_SSTAT_RDY) ? SS_READY : 0;
607*4882a593Smuzhiyun *value |= (reg & TCIC_SSTAT_LBAT1) ? SS_BATDEAD : 0;
608*4882a593Smuzhiyun *value |= (reg & TCIC_SSTAT_LBAT2) ? SS_BATWARN : 0;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun reg = tcic_getb(TCIC_PWR);
611*4882a593Smuzhiyun if (reg & (TCIC_PWR_VCC(psock)|TCIC_PWR_VPP(psock)))
612*4882a593Smuzhiyun *value |= SS_POWERON;
613*4882a593Smuzhiyun dev_dbg(&sock->dev, "GetStatus(%d) = %#2.2x\n", psock, *value);
614*4882a593Smuzhiyun return 0;
615*4882a593Smuzhiyun } /* tcic_get_status */
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun /*====================================================================*/
618*4882a593Smuzhiyun
tcic_set_socket(struct pcmcia_socket * sock,socket_state_t * state)619*4882a593Smuzhiyun static int tcic_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun u_short psock = container_of(sock, struct tcic_socket, socket)->psock;
622*4882a593Smuzhiyun u_char reg;
623*4882a593Smuzhiyun u_short scf1, scf2;
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun dev_dbg(&sock->dev, "SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
626*4882a593Smuzhiyun "io_irq %d, csc_mask %#2.2x)\n", psock, state->flags,
627*4882a593Smuzhiyun state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
628*4882a593Smuzhiyun tcic_setw(TCIC_ADDR+2, (psock << TCIC_SS_SHFT) | TCIC_ADR2_INDREG);
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun reg = tcic_getb(TCIC_PWR);
631*4882a593Smuzhiyun reg &= ~(TCIC_PWR_VCC(psock) | TCIC_PWR_VPP(psock));
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun if (state->Vcc == 50) {
634*4882a593Smuzhiyun switch (state->Vpp) {
635*4882a593Smuzhiyun case 0: reg |= TCIC_PWR_VCC(psock) | TCIC_PWR_VPP(psock); break;
636*4882a593Smuzhiyun case 50: reg |= TCIC_PWR_VCC(psock); break;
637*4882a593Smuzhiyun case 120: reg |= TCIC_PWR_VPP(psock); break;
638*4882a593Smuzhiyun default: return -EINVAL;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun } else if (state->Vcc != 0)
641*4882a593Smuzhiyun return -EINVAL;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun if (reg != tcic_getb(TCIC_PWR))
644*4882a593Smuzhiyun tcic_setb(TCIC_PWR, reg);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun reg = TCIC_ILOCK_HOLD_CCLK | TCIC_ILOCK_CWAIT;
647*4882a593Smuzhiyun if (state->flags & SS_OUTPUT_ENA) {
648*4882a593Smuzhiyun tcic_setb(TCIC_SCTRL, TCIC_SCTRL_ENA);
649*4882a593Smuzhiyun reg |= TCIC_ILOCK_CRESENA;
650*4882a593Smuzhiyun } else
651*4882a593Smuzhiyun tcic_setb(TCIC_SCTRL, 0);
652*4882a593Smuzhiyun if (state->flags & SS_RESET)
653*4882a593Smuzhiyun reg |= TCIC_ILOCK_CRESET;
654*4882a593Smuzhiyun tcic_aux_setb(TCIC_AUX_ILOCK, reg);
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, TCIC_SCF1(psock));
657*4882a593Smuzhiyun scf1 = TCIC_SCF1_FINPACK;
658*4882a593Smuzhiyun scf1 |= TCIC_IRQ(state->io_irq);
659*4882a593Smuzhiyun if (state->flags & SS_IOCARD) {
660*4882a593Smuzhiyun scf1 |= TCIC_SCF1_IOSTS;
661*4882a593Smuzhiyun if (state->flags & SS_SPKR_ENA)
662*4882a593Smuzhiyun scf1 |= TCIC_SCF1_SPKR;
663*4882a593Smuzhiyun if (state->flags & SS_DMA_MODE)
664*4882a593Smuzhiyun scf1 |= TCIC_SCF1_DREQ2 << TCIC_SCF1_DMA_SHIFT;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun tcic_setw(TCIC_DATA, scf1);
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun /* Some general setup stuff, and configure status interrupt */
669*4882a593Smuzhiyun reg = TCIC_WAIT_ASYNC | TCIC_WAIT_SENSE | to_cycles(250);
670*4882a593Smuzhiyun tcic_aux_setb(TCIC_AUX_WCTL, reg);
671*4882a593Smuzhiyun tcic_aux_setw(TCIC_AUX_SYSCFG, TCIC_SYSCFG_AUTOBUSY|0x0a00|
672*4882a593Smuzhiyun TCIC_IRQ(cs_irq));
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun /* Card status change interrupt mask */
675*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, TCIC_SCF2(psock));
676*4882a593Smuzhiyun scf2 = TCIC_SCF2_MALL;
677*4882a593Smuzhiyun if (state->csc_mask & SS_DETECT) scf2 &= ~TCIC_SCF2_MCD;
678*4882a593Smuzhiyun if (state->flags & SS_IOCARD) {
679*4882a593Smuzhiyun if (state->csc_mask & SS_STSCHG) reg &= ~TCIC_SCF2_MLBAT1;
680*4882a593Smuzhiyun } else {
681*4882a593Smuzhiyun if (state->csc_mask & SS_BATDEAD) reg &= ~TCIC_SCF2_MLBAT1;
682*4882a593Smuzhiyun if (state->csc_mask & SS_BATWARN) reg &= ~TCIC_SCF2_MLBAT2;
683*4882a593Smuzhiyun if (state->csc_mask & SS_READY) reg &= ~TCIC_SCF2_MRDY;
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun tcic_setw(TCIC_DATA, scf2);
686*4882a593Smuzhiyun /* For the ISA bus, the irq should be active-high totem-pole */
687*4882a593Smuzhiyun tcic_setb(TCIC_IENA, TCIC_IENA_CDCHG | TCIC_IENA_CFG_HIGH);
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun return 0;
690*4882a593Smuzhiyun } /* tcic_set_socket */
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun /*====================================================================*/
693*4882a593Smuzhiyun
tcic_set_io_map(struct pcmcia_socket * sock,struct pccard_io_map * io)694*4882a593Smuzhiyun static int tcic_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun u_short psock = container_of(sock, struct tcic_socket, socket)->psock;
697*4882a593Smuzhiyun u_int addr;
698*4882a593Smuzhiyun u_short base, len, ioctl;
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun dev_dbg(&sock->dev, "SetIOMap(%d, %d, %#2.2x, %d ns, "
701*4882a593Smuzhiyun "%#llx-%#llx)\n", psock, io->map, io->flags, io->speed,
702*4882a593Smuzhiyun (unsigned long long)io->start, (unsigned long long)io->stop);
703*4882a593Smuzhiyun if ((io->map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
704*4882a593Smuzhiyun (io->stop < io->start)) return -EINVAL;
705*4882a593Smuzhiyun tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT));
706*4882a593Smuzhiyun addr = TCIC_IWIN(psock, io->map);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun base = io->start; len = io->stop - io->start;
709*4882a593Smuzhiyun /* Check to see that len+1 is power of two, etc */
710*4882a593Smuzhiyun if ((len & (len+1)) || (base & len)) return -EINVAL;
711*4882a593Smuzhiyun base |= (len+1)>>1;
712*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, addr + TCIC_IBASE_X);
713*4882a593Smuzhiyun tcic_setw(TCIC_DATA, base);
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun ioctl = (psock << TCIC_ICTL_SS_SHFT);
716*4882a593Smuzhiyun ioctl |= (len == 0) ? TCIC_ICTL_TINY : 0;
717*4882a593Smuzhiyun ioctl |= (io->flags & MAP_ACTIVE) ? TCIC_ICTL_ENA : 0;
718*4882a593Smuzhiyun ioctl |= to_cycles(io->speed) & TCIC_ICTL_WSCNT_MASK;
719*4882a593Smuzhiyun if (!(io->flags & MAP_AUTOSZ)) {
720*4882a593Smuzhiyun ioctl |= TCIC_ICTL_QUIET;
721*4882a593Smuzhiyun ioctl |= (io->flags & MAP_16BIT) ? TCIC_ICTL_BW_16 : TCIC_ICTL_BW_8;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, addr + TCIC_ICTL_X);
724*4882a593Smuzhiyun tcic_setw(TCIC_DATA, ioctl);
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun return 0;
727*4882a593Smuzhiyun } /* tcic_set_io_map */
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun /*====================================================================*/
730*4882a593Smuzhiyun
tcic_set_mem_map(struct pcmcia_socket * sock,struct pccard_mem_map * mem)731*4882a593Smuzhiyun static int tcic_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
732*4882a593Smuzhiyun {
733*4882a593Smuzhiyun u_short psock = container_of(sock, struct tcic_socket, socket)->psock;
734*4882a593Smuzhiyun u_short addr, ctl;
735*4882a593Smuzhiyun u_long base, len, mmap;
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun dev_dbg(&sock->dev, "SetMemMap(%d, %d, %#2.2x, %d ns, "
738*4882a593Smuzhiyun "%#llx-%#llx, %#x)\n", psock, mem->map, mem->flags,
739*4882a593Smuzhiyun mem->speed, (unsigned long long)mem->res->start,
740*4882a593Smuzhiyun (unsigned long long)mem->res->end, mem->card_start);
741*4882a593Smuzhiyun if ((mem->map > 3) || (mem->card_start > 0x3ffffff) ||
742*4882a593Smuzhiyun (mem->res->start > 0xffffff) || (mem->res->end > 0xffffff) ||
743*4882a593Smuzhiyun (mem->res->start > mem->res->end) || (mem->speed > 1000))
744*4882a593Smuzhiyun return -EINVAL;
745*4882a593Smuzhiyun tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT));
746*4882a593Smuzhiyun addr = TCIC_MWIN(psock, mem->map);
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun base = mem->res->start; len = mem->res->end - mem->res->start;
749*4882a593Smuzhiyun if ((len & (len+1)) || (base & len)) return -EINVAL;
750*4882a593Smuzhiyun if (len == 0x0fff)
751*4882a593Smuzhiyun base = (base >> TCIC_MBASE_HA_SHFT) | TCIC_MBASE_4K_BIT;
752*4882a593Smuzhiyun else
753*4882a593Smuzhiyun base = (base | (len+1)>>1) >> TCIC_MBASE_HA_SHFT;
754*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, addr + TCIC_MBASE_X);
755*4882a593Smuzhiyun tcic_setw(TCIC_DATA, base);
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun mmap = mem->card_start - mem->res->start;
758*4882a593Smuzhiyun mmap = (mmap >> TCIC_MMAP_CA_SHFT) & TCIC_MMAP_CA_MASK;
759*4882a593Smuzhiyun if (mem->flags & MAP_ATTRIB) mmap |= TCIC_MMAP_REG;
760*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, addr + TCIC_MMAP_X);
761*4882a593Smuzhiyun tcic_setw(TCIC_DATA, mmap);
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun ctl = TCIC_MCTL_QUIET | (psock << TCIC_MCTL_SS_SHFT);
764*4882a593Smuzhiyun ctl |= to_cycles(mem->speed) & TCIC_MCTL_WSCNT_MASK;
765*4882a593Smuzhiyun ctl |= (mem->flags & MAP_16BIT) ? 0 : TCIC_MCTL_B8;
766*4882a593Smuzhiyun ctl |= (mem->flags & MAP_WRPROT) ? TCIC_MCTL_WP : 0;
767*4882a593Smuzhiyun ctl |= (mem->flags & MAP_ACTIVE) ? TCIC_MCTL_ENA : 0;
768*4882a593Smuzhiyun tcic_setw(TCIC_ADDR, addr + TCIC_MCTL_X);
769*4882a593Smuzhiyun tcic_setw(TCIC_DATA, ctl);
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun return 0;
772*4882a593Smuzhiyun } /* tcic_set_mem_map */
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun /*====================================================================*/
775*4882a593Smuzhiyun
tcic_init(struct pcmcia_socket * s)776*4882a593Smuzhiyun static int tcic_init(struct pcmcia_socket *s)
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun int i;
779*4882a593Smuzhiyun struct resource res = { .start = 0, .end = 0x1000 };
780*4882a593Smuzhiyun pccard_io_map io = { 0, 0, 0, 0, 1 };
781*4882a593Smuzhiyun pccard_mem_map mem = { .res = &res, };
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun for (i = 0; i < 2; i++) {
784*4882a593Smuzhiyun io.map = i;
785*4882a593Smuzhiyun tcic_set_io_map(s, &io);
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun for (i = 0; i < 5; i++) {
788*4882a593Smuzhiyun mem.map = i;
789*4882a593Smuzhiyun tcic_set_mem_map(s, &mem);
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun return 0;
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun static struct pccard_operations tcic_operations = {
795*4882a593Smuzhiyun .init = tcic_init,
796*4882a593Smuzhiyun .get_status = tcic_get_status,
797*4882a593Smuzhiyun .set_socket = tcic_set_socket,
798*4882a593Smuzhiyun .set_io_map = tcic_set_io_map,
799*4882a593Smuzhiyun .set_mem_map = tcic_set_mem_map,
800*4882a593Smuzhiyun };
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun /*====================================================================*/
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun module_init(init_tcic);
805*4882a593Smuzhiyun module_exit(exit_tcic);
806