1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Procfs interface for the PCI bus
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/pci.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/proc_fs.h>
13*4882a593Smuzhiyun #include <linux/seq_file.h>
14*4882a593Smuzhiyun #include <linux/capability.h>
15*4882a593Smuzhiyun #include <linux/uaccess.h>
16*4882a593Smuzhiyun #include <linux/security.h>
17*4882a593Smuzhiyun #include <asm/byteorder.h>
18*4882a593Smuzhiyun #include "pci.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static int proc_initialized; /* = 0 */
21*4882a593Smuzhiyun
proc_bus_pci_lseek(struct file * file,loff_t off,int whence)22*4882a593Smuzhiyun static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun struct pci_dev *dev = PDE_DATA(file_inode(file));
25*4882a593Smuzhiyun return fixed_size_llseek(file, off, whence, dev->cfg_size);
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
proc_bus_pci_read(struct file * file,char __user * buf,size_t nbytes,loff_t * ppos)28*4882a593Smuzhiyun static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
29*4882a593Smuzhiyun size_t nbytes, loff_t *ppos)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun struct pci_dev *dev = PDE_DATA(file_inode(file));
32*4882a593Smuzhiyun unsigned int pos = *ppos;
33*4882a593Smuzhiyun unsigned int cnt, size;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /*
36*4882a593Smuzhiyun * Normal users can read only the standardized portion of the
37*4882a593Smuzhiyun * configuration space as several chips lock up when trying to read
38*4882a593Smuzhiyun * undefined locations (think of Intel PIIX4 as a typical example).
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun if (capable(CAP_SYS_ADMIN))
42*4882a593Smuzhiyun size = dev->cfg_size;
43*4882a593Smuzhiyun else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
44*4882a593Smuzhiyun size = 128;
45*4882a593Smuzhiyun else
46*4882a593Smuzhiyun size = 64;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (pos >= size)
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun if (nbytes >= size)
51*4882a593Smuzhiyun nbytes = size;
52*4882a593Smuzhiyun if (pos + nbytes > size)
53*4882a593Smuzhiyun nbytes = size - pos;
54*4882a593Smuzhiyun cnt = nbytes;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun if (!access_ok(buf, cnt))
57*4882a593Smuzhiyun return -EINVAL;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun pci_config_pm_runtime_get(dev);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun if ((pos & 1) && cnt) {
62*4882a593Smuzhiyun unsigned char val;
63*4882a593Smuzhiyun pci_user_read_config_byte(dev, pos, &val);
64*4882a593Smuzhiyun __put_user(val, buf);
65*4882a593Smuzhiyun buf++;
66*4882a593Smuzhiyun pos++;
67*4882a593Smuzhiyun cnt--;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun if ((pos & 3) && cnt > 2) {
71*4882a593Smuzhiyun unsigned short val;
72*4882a593Smuzhiyun pci_user_read_config_word(dev, pos, &val);
73*4882a593Smuzhiyun __put_user(cpu_to_le16(val), (__le16 __user *) buf);
74*4882a593Smuzhiyun buf += 2;
75*4882a593Smuzhiyun pos += 2;
76*4882a593Smuzhiyun cnt -= 2;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun while (cnt >= 4) {
80*4882a593Smuzhiyun unsigned int val;
81*4882a593Smuzhiyun pci_user_read_config_dword(dev, pos, &val);
82*4882a593Smuzhiyun __put_user(cpu_to_le32(val), (__le32 __user *) buf);
83*4882a593Smuzhiyun buf += 4;
84*4882a593Smuzhiyun pos += 4;
85*4882a593Smuzhiyun cnt -= 4;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun if (cnt >= 2) {
89*4882a593Smuzhiyun unsigned short val;
90*4882a593Smuzhiyun pci_user_read_config_word(dev, pos, &val);
91*4882a593Smuzhiyun __put_user(cpu_to_le16(val), (__le16 __user *) buf);
92*4882a593Smuzhiyun buf += 2;
93*4882a593Smuzhiyun pos += 2;
94*4882a593Smuzhiyun cnt -= 2;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun if (cnt) {
98*4882a593Smuzhiyun unsigned char val;
99*4882a593Smuzhiyun pci_user_read_config_byte(dev, pos, &val);
100*4882a593Smuzhiyun __put_user(val, buf);
101*4882a593Smuzhiyun buf++;
102*4882a593Smuzhiyun pos++;
103*4882a593Smuzhiyun cnt--;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun pci_config_pm_runtime_put(dev);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun *ppos = pos;
109*4882a593Smuzhiyun return nbytes;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
proc_bus_pci_write(struct file * file,const char __user * buf,size_t nbytes,loff_t * ppos)112*4882a593Smuzhiyun static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
113*4882a593Smuzhiyun size_t nbytes, loff_t *ppos)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun struct inode *ino = file_inode(file);
116*4882a593Smuzhiyun struct pci_dev *dev = PDE_DATA(ino);
117*4882a593Smuzhiyun int pos = *ppos;
118*4882a593Smuzhiyun int size = dev->cfg_size;
119*4882a593Smuzhiyun int cnt, ret;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
122*4882a593Smuzhiyun if (ret)
123*4882a593Smuzhiyun return ret;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (pos >= size)
126*4882a593Smuzhiyun return 0;
127*4882a593Smuzhiyun if (nbytes >= size)
128*4882a593Smuzhiyun nbytes = size;
129*4882a593Smuzhiyun if (pos + nbytes > size)
130*4882a593Smuzhiyun nbytes = size - pos;
131*4882a593Smuzhiyun cnt = nbytes;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun if (!access_ok(buf, cnt))
134*4882a593Smuzhiyun return -EINVAL;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun pci_config_pm_runtime_get(dev);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if ((pos & 1) && cnt) {
139*4882a593Smuzhiyun unsigned char val;
140*4882a593Smuzhiyun __get_user(val, buf);
141*4882a593Smuzhiyun pci_user_write_config_byte(dev, pos, val);
142*4882a593Smuzhiyun buf++;
143*4882a593Smuzhiyun pos++;
144*4882a593Smuzhiyun cnt--;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if ((pos & 3) && cnt > 2) {
148*4882a593Smuzhiyun __le16 val;
149*4882a593Smuzhiyun __get_user(val, (__le16 __user *) buf);
150*4882a593Smuzhiyun pci_user_write_config_word(dev, pos, le16_to_cpu(val));
151*4882a593Smuzhiyun buf += 2;
152*4882a593Smuzhiyun pos += 2;
153*4882a593Smuzhiyun cnt -= 2;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun while (cnt >= 4) {
157*4882a593Smuzhiyun __le32 val;
158*4882a593Smuzhiyun __get_user(val, (__le32 __user *) buf);
159*4882a593Smuzhiyun pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
160*4882a593Smuzhiyun buf += 4;
161*4882a593Smuzhiyun pos += 4;
162*4882a593Smuzhiyun cnt -= 4;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun if (cnt >= 2) {
166*4882a593Smuzhiyun __le16 val;
167*4882a593Smuzhiyun __get_user(val, (__le16 __user *) buf);
168*4882a593Smuzhiyun pci_user_write_config_word(dev, pos, le16_to_cpu(val));
169*4882a593Smuzhiyun buf += 2;
170*4882a593Smuzhiyun pos += 2;
171*4882a593Smuzhiyun cnt -= 2;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun if (cnt) {
175*4882a593Smuzhiyun unsigned char val;
176*4882a593Smuzhiyun __get_user(val, buf);
177*4882a593Smuzhiyun pci_user_write_config_byte(dev, pos, val);
178*4882a593Smuzhiyun buf++;
179*4882a593Smuzhiyun pos++;
180*4882a593Smuzhiyun cnt--;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun pci_config_pm_runtime_put(dev);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun *ppos = pos;
186*4882a593Smuzhiyun i_size_write(ino, dev->cfg_size);
187*4882a593Smuzhiyun return nbytes;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun struct pci_filp_private {
191*4882a593Smuzhiyun enum pci_mmap_state mmap_state;
192*4882a593Smuzhiyun int write_combine;
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
proc_bus_pci_ioctl(struct file * file,unsigned int cmd,unsigned long arg)195*4882a593Smuzhiyun static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
196*4882a593Smuzhiyun unsigned long arg)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct pci_dev *dev = PDE_DATA(file_inode(file));
199*4882a593Smuzhiyun #ifdef HAVE_PCI_MMAP
200*4882a593Smuzhiyun struct pci_filp_private *fpriv = file->private_data;
201*4882a593Smuzhiyun #endif /* HAVE_PCI_MMAP */
202*4882a593Smuzhiyun int ret = 0;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
205*4882a593Smuzhiyun if (ret)
206*4882a593Smuzhiyun return ret;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun switch (cmd) {
209*4882a593Smuzhiyun case PCIIOC_CONTROLLER:
210*4882a593Smuzhiyun ret = pci_domain_nr(dev->bus);
211*4882a593Smuzhiyun break;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun #ifdef HAVE_PCI_MMAP
214*4882a593Smuzhiyun case PCIIOC_MMAP_IS_IO:
215*4882a593Smuzhiyun if (!arch_can_pci_mmap_io())
216*4882a593Smuzhiyun return -EINVAL;
217*4882a593Smuzhiyun fpriv->mmap_state = pci_mmap_io;
218*4882a593Smuzhiyun break;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun case PCIIOC_MMAP_IS_MEM:
221*4882a593Smuzhiyun fpriv->mmap_state = pci_mmap_mem;
222*4882a593Smuzhiyun break;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun case PCIIOC_WRITE_COMBINE:
225*4882a593Smuzhiyun if (arch_can_pci_mmap_wc()) {
226*4882a593Smuzhiyun if (arg)
227*4882a593Smuzhiyun fpriv->write_combine = 1;
228*4882a593Smuzhiyun else
229*4882a593Smuzhiyun fpriv->write_combine = 0;
230*4882a593Smuzhiyun break;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun /* If arch decided it can't, fall through... */
233*4882a593Smuzhiyun #endif /* HAVE_PCI_MMAP */
234*4882a593Smuzhiyun fallthrough;
235*4882a593Smuzhiyun default:
236*4882a593Smuzhiyun ret = -EINVAL;
237*4882a593Smuzhiyun break;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun return ret;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun #ifdef HAVE_PCI_MMAP
proc_bus_pci_mmap(struct file * file,struct vm_area_struct * vma)244*4882a593Smuzhiyun static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun struct pci_dev *dev = PDE_DATA(file_inode(file));
247*4882a593Smuzhiyun struct pci_filp_private *fpriv = file->private_data;
248*4882a593Smuzhiyun int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun if (!capable(CAP_SYS_RAWIO) ||
251*4882a593Smuzhiyun security_locked_down(LOCKDOWN_PCI_ACCESS))
252*4882a593Smuzhiyun return -EPERM;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun if (fpriv->mmap_state == pci_mmap_io) {
255*4882a593Smuzhiyun if (!arch_can_pci_mmap_io())
256*4882a593Smuzhiyun return -EINVAL;
257*4882a593Smuzhiyun res_bit = IORESOURCE_IO;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /* Make sure the caller is mapping a real resource for this device */
261*4882a593Smuzhiyun for (i = 0; i < PCI_STD_NUM_BARS; i++) {
262*4882a593Smuzhiyun if (dev->resource[i].flags & res_bit &&
263*4882a593Smuzhiyun pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
264*4882a593Smuzhiyun break;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (i >= PCI_STD_NUM_BARS)
268*4882a593Smuzhiyun return -ENODEV;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (fpriv->mmap_state == pci_mmap_mem &&
271*4882a593Smuzhiyun fpriv->write_combine) {
272*4882a593Smuzhiyun if (dev->resource[i].flags & IORESOURCE_PREFETCH)
273*4882a593Smuzhiyun write_combine = 1;
274*4882a593Smuzhiyun else
275*4882a593Smuzhiyun return -EINVAL;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun ret = pci_mmap_page_range(dev, i, vma,
278*4882a593Smuzhiyun fpriv->mmap_state, write_combine);
279*4882a593Smuzhiyun if (ret < 0)
280*4882a593Smuzhiyun return ret;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return 0;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
proc_bus_pci_open(struct inode * inode,struct file * file)285*4882a593Smuzhiyun static int proc_bus_pci_open(struct inode *inode, struct file *file)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun if (!fpriv)
290*4882a593Smuzhiyun return -ENOMEM;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun fpriv->mmap_state = pci_mmap_io;
293*4882a593Smuzhiyun fpriv->write_combine = 0;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun file->private_data = fpriv;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
proc_bus_pci_release(struct inode * inode,struct file * file)300*4882a593Smuzhiyun static int proc_bus_pci_release(struct inode *inode, struct file *file)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun kfree(file->private_data);
303*4882a593Smuzhiyun file->private_data = NULL;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun return 0;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun #endif /* HAVE_PCI_MMAP */
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun static const struct proc_ops proc_bus_pci_ops = {
310*4882a593Smuzhiyun .proc_lseek = proc_bus_pci_lseek,
311*4882a593Smuzhiyun .proc_read = proc_bus_pci_read,
312*4882a593Smuzhiyun .proc_write = proc_bus_pci_write,
313*4882a593Smuzhiyun .proc_ioctl = proc_bus_pci_ioctl,
314*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
315*4882a593Smuzhiyun .proc_compat_ioctl = proc_bus_pci_ioctl,
316*4882a593Smuzhiyun #endif
317*4882a593Smuzhiyun #ifdef HAVE_PCI_MMAP
318*4882a593Smuzhiyun .proc_open = proc_bus_pci_open,
319*4882a593Smuzhiyun .proc_release = proc_bus_pci_release,
320*4882a593Smuzhiyun .proc_mmap = proc_bus_pci_mmap,
321*4882a593Smuzhiyun #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
322*4882a593Smuzhiyun .proc_get_unmapped_area = get_pci_unmapped_area,
323*4882a593Smuzhiyun #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
324*4882a593Smuzhiyun #endif /* HAVE_PCI_MMAP */
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* iterator */
pci_seq_start(struct seq_file * m,loff_t * pos)328*4882a593Smuzhiyun static void *pci_seq_start(struct seq_file *m, loff_t *pos)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun struct pci_dev *dev = NULL;
331*4882a593Smuzhiyun loff_t n = *pos;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun for_each_pci_dev(dev) {
334*4882a593Smuzhiyun if (!n--)
335*4882a593Smuzhiyun break;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun return dev;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
pci_seq_next(struct seq_file * m,void * v,loff_t * pos)340*4882a593Smuzhiyun static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun struct pci_dev *dev = v;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun (*pos)++;
345*4882a593Smuzhiyun dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
346*4882a593Smuzhiyun return dev;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
pci_seq_stop(struct seq_file * m,void * v)349*4882a593Smuzhiyun static void pci_seq_stop(struct seq_file *m, void *v)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun if (v) {
352*4882a593Smuzhiyun struct pci_dev *dev = v;
353*4882a593Smuzhiyun pci_dev_put(dev);
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
show_device(struct seq_file * m,void * v)357*4882a593Smuzhiyun static int show_device(struct seq_file *m, void *v)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun const struct pci_dev *dev = v;
360*4882a593Smuzhiyun const struct pci_driver *drv;
361*4882a593Smuzhiyun int i;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun if (dev == NULL)
364*4882a593Smuzhiyun return 0;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun drv = pci_dev_driver(dev);
367*4882a593Smuzhiyun seq_printf(m, "%02x%02x\t%04x%04x\t%x",
368*4882a593Smuzhiyun dev->bus->number,
369*4882a593Smuzhiyun dev->devfn,
370*4882a593Smuzhiyun dev->vendor,
371*4882a593Smuzhiyun dev->device,
372*4882a593Smuzhiyun dev->irq);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun /* only print standard and ROM resources to preserve compatibility */
375*4882a593Smuzhiyun for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
376*4882a593Smuzhiyun resource_size_t start, end;
377*4882a593Smuzhiyun pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
378*4882a593Smuzhiyun seq_printf(m, "\t%16llx",
379*4882a593Smuzhiyun (unsigned long long)(start |
380*4882a593Smuzhiyun (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
383*4882a593Smuzhiyun resource_size_t start, end;
384*4882a593Smuzhiyun pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
385*4882a593Smuzhiyun seq_printf(m, "\t%16llx",
386*4882a593Smuzhiyun dev->resource[i].start < dev->resource[i].end ?
387*4882a593Smuzhiyun (unsigned long long)(end - start) + 1 : 0);
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun seq_putc(m, '\t');
390*4882a593Smuzhiyun if (drv)
391*4882a593Smuzhiyun seq_puts(m, drv->name);
392*4882a593Smuzhiyun seq_putc(m, '\n');
393*4882a593Smuzhiyun return 0;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun static const struct seq_operations proc_bus_pci_devices_op = {
397*4882a593Smuzhiyun .start = pci_seq_start,
398*4882a593Smuzhiyun .next = pci_seq_next,
399*4882a593Smuzhiyun .stop = pci_seq_stop,
400*4882a593Smuzhiyun .show = show_device
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun static struct proc_dir_entry *proc_bus_pci_dir;
404*4882a593Smuzhiyun
pci_proc_attach_device(struct pci_dev * dev)405*4882a593Smuzhiyun int pci_proc_attach_device(struct pci_dev *dev)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun struct pci_bus *bus = dev->bus;
408*4882a593Smuzhiyun struct proc_dir_entry *e;
409*4882a593Smuzhiyun char name[16];
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun if (!proc_initialized)
412*4882a593Smuzhiyun return -EACCES;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun if (!bus->procdir) {
415*4882a593Smuzhiyun if (pci_proc_domain(bus)) {
416*4882a593Smuzhiyun sprintf(name, "%04x:%02x", pci_domain_nr(bus),
417*4882a593Smuzhiyun bus->number);
418*4882a593Smuzhiyun } else {
419*4882a593Smuzhiyun sprintf(name, "%02x", bus->number);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
422*4882a593Smuzhiyun if (!bus->procdir)
423*4882a593Smuzhiyun return -ENOMEM;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
427*4882a593Smuzhiyun e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
428*4882a593Smuzhiyun &proc_bus_pci_ops, dev);
429*4882a593Smuzhiyun if (!e)
430*4882a593Smuzhiyun return -ENOMEM;
431*4882a593Smuzhiyun proc_set_size(e, dev->cfg_size);
432*4882a593Smuzhiyun dev->procent = e;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun return 0;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
pci_proc_detach_device(struct pci_dev * dev)437*4882a593Smuzhiyun int pci_proc_detach_device(struct pci_dev *dev)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun proc_remove(dev->procent);
440*4882a593Smuzhiyun dev->procent = NULL;
441*4882a593Smuzhiyun return 0;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
pci_proc_detach_bus(struct pci_bus * bus)444*4882a593Smuzhiyun int pci_proc_detach_bus(struct pci_bus *bus)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun proc_remove(bus->procdir);
447*4882a593Smuzhiyun return 0;
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun
pci_proc_init(void)450*4882a593Smuzhiyun static int __init pci_proc_init(void)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun struct pci_dev *dev = NULL;
453*4882a593Smuzhiyun proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
454*4882a593Smuzhiyun proc_create_seq("devices", 0, proc_bus_pci_dir,
455*4882a593Smuzhiyun &proc_bus_pci_devices_op);
456*4882a593Smuzhiyun proc_initialized = 1;
457*4882a593Smuzhiyun for_each_pci_dev(dev)
458*4882a593Smuzhiyun pci_proc_attach_device(dev);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun return 0;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun device_initcall(pci_proc_init);
463