1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * PCI Express Hot Plug Controller Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 1995,2001 Compaq Computer Corporation
6*4882a593Smuzhiyun * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
7*4882a593Smuzhiyun * Copyright (C) 2001 IBM Corp.
8*4882a593Smuzhiyun * Copyright (C) 2003-2004 Intel Corporation
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * All rights reserved.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun #ifndef _PCIEHP_H
16*4882a593Smuzhiyun #define _PCIEHP_H
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/types.h>
19*4882a593Smuzhiyun #include <linux/pci.h>
20*4882a593Smuzhiyun #include <linux/pci_hotplug.h>
21*4882a593Smuzhiyun #include <linux/delay.h>
22*4882a593Smuzhiyun #include <linux/mutex.h>
23*4882a593Smuzhiyun #include <linux/rwsem.h>
24*4882a593Smuzhiyun #include <linux/workqueue.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include "../pcie/portdrv.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun extern bool pciehp_poll_mode;
29*4882a593Smuzhiyun extern int pciehp_poll_time;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * Set CONFIG_DYNAMIC_DEBUG=y and boot with 'dyndbg="file pciehp* +p"' to
33*4882a593Smuzhiyun * enable debug messages.
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun #define ctrl_dbg(ctrl, format, arg...) \
36*4882a593Smuzhiyun pci_dbg(ctrl->pcie->port, format, ## arg)
37*4882a593Smuzhiyun #define ctrl_err(ctrl, format, arg...) \
38*4882a593Smuzhiyun pci_err(ctrl->pcie->port, format, ## arg)
39*4882a593Smuzhiyun #define ctrl_info(ctrl, format, arg...) \
40*4882a593Smuzhiyun pci_info(ctrl->pcie->port, format, ## arg)
41*4882a593Smuzhiyun #define ctrl_warn(ctrl, format, arg...) \
42*4882a593Smuzhiyun pci_warn(ctrl->pcie->port, format, ## arg)
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define SLOT_NAME_SIZE 10
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /**
47*4882a593Smuzhiyun * struct controller - PCIe hotplug controller
48*4882a593Smuzhiyun * @pcie: pointer to the controller's PCIe port service device
49*4882a593Smuzhiyun * @slot_cap: cached copy of the Slot Capabilities register
50*4882a593Smuzhiyun * @slot_ctrl: cached copy of the Slot Control register
51*4882a593Smuzhiyun * @ctrl_lock: serializes writes to the Slot Control register
52*4882a593Smuzhiyun * @cmd_started: jiffies when the Slot Control register was last written;
53*4882a593Smuzhiyun * the next write is allowed 1 second later, absent a Command Completed
54*4882a593Smuzhiyun * interrupt (PCIe r4.0, sec 6.7.3.2)
55*4882a593Smuzhiyun * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler
56*4882a593Smuzhiyun * on reception of a Command Completed event
57*4882a593Smuzhiyun * @queue: wait queue to wake up on reception of a Command Completed event,
58*4882a593Smuzhiyun * used for synchronous writes to the Slot Control register
59*4882a593Smuzhiyun * @pending_events: used by the IRQ handler to save events retrieved from the
60*4882a593Smuzhiyun * Slot Status register for later consumption by the IRQ thread
61*4882a593Smuzhiyun * @notification_enabled: whether the IRQ was requested successfully
62*4882a593Smuzhiyun * @power_fault_detected: whether a power fault was detected by the hardware
63*4882a593Smuzhiyun * that has not yet been cleared by the user
64*4882a593Smuzhiyun * @poll_thread: thread to poll for slot events if no IRQ is available,
65*4882a593Smuzhiyun * enabled with pciehp_poll_mode module parameter
66*4882a593Smuzhiyun * @state: current state machine position
67*4882a593Smuzhiyun * @state_lock: protects reads and writes of @state;
68*4882a593Smuzhiyun * protects scheduling, execution and cancellation of @button_work
69*4882a593Smuzhiyun * @button_work: work item to turn the slot on or off after 5 seconds
70*4882a593Smuzhiyun * in response to an Attention Button press
71*4882a593Smuzhiyun * @hotplug_slot: structure registered with the PCI hotplug core
72*4882a593Smuzhiyun * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
73*4882a593Smuzhiyun * Link Status register and to the Presence Detect State bit in the Slot
74*4882a593Smuzhiyun * Status register during a slot reset which may cause them to flap
75*4882a593Smuzhiyun * @depth: Number of additional hotplug ports in the path to the root bus,
76*4882a593Smuzhiyun * used as lock subclass for @reset_lock
77*4882a593Smuzhiyun * @ist_running: flag to keep user request waiting while IRQ thread is running
78*4882a593Smuzhiyun * @request_result: result of last user request submitted to the IRQ thread
79*4882a593Smuzhiyun * @requester: wait queue to wake up on completion of user request,
80*4882a593Smuzhiyun * used for synchronous slot enable/disable request via sysfs
81*4882a593Smuzhiyun *
82*4882a593Smuzhiyun * PCIe hotplug has a 1:1 relationship between controller and slot, hence
83*4882a593Smuzhiyun * unlike other drivers, the two aren't represented by separate structures.
84*4882a593Smuzhiyun */
85*4882a593Smuzhiyun struct controller {
86*4882a593Smuzhiyun struct pcie_device *pcie;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun u32 slot_cap; /* capabilities and quirks */
89*4882a593Smuzhiyun unsigned int inband_presence_disabled:1;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun u16 slot_ctrl; /* control register access */
92*4882a593Smuzhiyun struct mutex ctrl_lock;
93*4882a593Smuzhiyun unsigned long cmd_started;
94*4882a593Smuzhiyun unsigned int cmd_busy:1;
95*4882a593Smuzhiyun wait_queue_head_t queue;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun atomic_t pending_events; /* event handling */
98*4882a593Smuzhiyun unsigned int notification_enabled:1;
99*4882a593Smuzhiyun unsigned int power_fault_detected;
100*4882a593Smuzhiyun struct task_struct *poll_thread;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun u8 state; /* state machine */
103*4882a593Smuzhiyun struct mutex state_lock;
104*4882a593Smuzhiyun struct delayed_work button_work;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun struct hotplug_slot hotplug_slot; /* hotplug core interface */
107*4882a593Smuzhiyun struct rw_semaphore reset_lock;
108*4882a593Smuzhiyun unsigned int depth;
109*4882a593Smuzhiyun unsigned int ist_running;
110*4882a593Smuzhiyun int request_result;
111*4882a593Smuzhiyun wait_queue_head_t requester;
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun /**
115*4882a593Smuzhiyun * DOC: Slot state
116*4882a593Smuzhiyun *
117*4882a593Smuzhiyun * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
118*4882a593Smuzhiyun * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
119*4882a593Smuzhiyun * Power Indicator is blinking
120*4882a593Smuzhiyun * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
121*4882a593Smuzhiyun * Power Indicator is blinking
122*4882a593Smuzhiyun * @POWERON_STATE: slot is currently powering on
123*4882a593Smuzhiyun * @POWEROFF_STATE: slot is currently powering off
124*4882a593Smuzhiyun * @ON_STATE: slot is powered on, subordinate devices have been enumerated
125*4882a593Smuzhiyun */
126*4882a593Smuzhiyun #define OFF_STATE 0
127*4882a593Smuzhiyun #define BLINKINGON_STATE 1
128*4882a593Smuzhiyun #define BLINKINGOFF_STATE 2
129*4882a593Smuzhiyun #define POWERON_STATE 3
130*4882a593Smuzhiyun #define POWEROFF_STATE 4
131*4882a593Smuzhiyun #define ON_STATE 5
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /**
134*4882a593Smuzhiyun * DOC: Flags to request an action from the IRQ thread
135*4882a593Smuzhiyun *
136*4882a593Smuzhiyun * These are stored together with events read from the Slot Status register,
137*4882a593Smuzhiyun * hence must be greater than its 16-bit width.
138*4882a593Smuzhiyun *
139*4882a593Smuzhiyun * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or
140*4882a593Smuzhiyun * an Attention Button press after the 5 second delay
141*4882a593Smuzhiyun * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the
142*4882a593Smuzhiyun * hotplug port was inaccessible when the interrupt occurred, requiring
143*4882a593Smuzhiyun * that the IRQ handler is rerun by the IRQ thread after it has made the
144*4882a593Smuzhiyun * hotplug port accessible by runtime resuming its parents to D0
145*4882a593Smuzhiyun */
146*4882a593Smuzhiyun #define DISABLE_SLOT (1 << 16)
147*4882a593Smuzhiyun #define RERUN_ISR (1 << 17)
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
150*4882a593Smuzhiyun #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
151*4882a593Smuzhiyun #define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
152*4882a593Smuzhiyun #define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
153*4882a593Smuzhiyun #define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
154*4882a593Smuzhiyun #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
155*4882a593Smuzhiyun #define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun void pciehp_request(struct controller *ctrl, int action);
158*4882a593Smuzhiyun void pciehp_handle_button_press(struct controller *ctrl);
159*4882a593Smuzhiyun void pciehp_handle_disable_request(struct controller *ctrl);
160*4882a593Smuzhiyun void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events);
161*4882a593Smuzhiyun int pciehp_configure_device(struct controller *ctrl);
162*4882a593Smuzhiyun void pciehp_unconfigure_device(struct controller *ctrl, bool presence);
163*4882a593Smuzhiyun void pciehp_queue_pushbutton_work(struct work_struct *work);
164*4882a593Smuzhiyun struct controller *pcie_init(struct pcie_device *dev);
165*4882a593Smuzhiyun int pcie_init_notification(struct controller *ctrl);
166*4882a593Smuzhiyun void pcie_shutdown_notification(struct controller *ctrl);
167*4882a593Smuzhiyun void pcie_clear_hotplug_events(struct controller *ctrl);
168*4882a593Smuzhiyun void pcie_enable_interrupt(struct controller *ctrl);
169*4882a593Smuzhiyun void pcie_disable_interrupt(struct controller *ctrl);
170*4882a593Smuzhiyun int pciehp_power_on_slot(struct controller *ctrl);
171*4882a593Smuzhiyun void pciehp_power_off_slot(struct controller *ctrl);
172*4882a593Smuzhiyun void pciehp_get_power_status(struct controller *ctrl, u8 *status);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun #define INDICATOR_NOOP -1 /* Leave indicator unchanged */
175*4882a593Smuzhiyun void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
178*4882a593Smuzhiyun int pciehp_query_power_fault(struct controller *ctrl);
179*4882a593Smuzhiyun int pciehp_card_present(struct controller *ctrl);
180*4882a593Smuzhiyun int pciehp_card_present_or_link_active(struct controller *ctrl);
181*4882a593Smuzhiyun int pciehp_check_link_status(struct controller *ctrl);
182*4882a593Smuzhiyun int pciehp_check_link_active(struct controller *ctrl);
183*4882a593Smuzhiyun void pciehp_release_ctrl(struct controller *ctrl);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot);
186*4882a593Smuzhiyun int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot);
187*4882a593Smuzhiyun int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe);
188*4882a593Smuzhiyun int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status);
189*4882a593Smuzhiyun int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
190*4882a593Smuzhiyun int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
191*4882a593Smuzhiyun
slot_name(struct controller * ctrl)192*4882a593Smuzhiyun static inline const char *slot_name(struct controller *ctrl)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun return hotplug_slot_name(&ctrl->hotplug_slot);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
to_ctrl(struct hotplug_slot * hotplug_slot)197*4882a593Smuzhiyun static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun return container_of(hotplug_slot, struct controller, hotplug_slot);
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun #endif /* _PCIEHP_H */
203