1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2004 Koninklijke Philips Electronics NV
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Conversion to platform driver and DT:
6*4882a593Smuzhiyun * Copyright 2014 Linaro Ltd.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * 14/04/2005 Initial version, colin.king@philips.com
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of_address.h>
13*4882a593Smuzhiyun #include <linux/of_pci.h>
14*4882a593Smuzhiyun #include <linux/of_platform.h>
15*4882a593Smuzhiyun #include <linux/pci.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "../pci.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static void __iomem *versatile_pci_base;
21*4882a593Smuzhiyun static void __iomem *versatile_cfg_base[2];
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
24*4882a593Smuzhiyun #define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
25*4882a593Smuzhiyun #define PCI_SELFID (versatile_pci_base + 0xc)
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define VP_PCI_DEVICE_ID 0x030010ee
28*4882a593Smuzhiyun #define VP_PCI_CLASS_ID 0x0b400000
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun static u32 pci_slot_ignore;
31*4882a593Smuzhiyun
versatile_pci_slot_ignore(char * str)32*4882a593Smuzhiyun static int __init versatile_pci_slot_ignore(char *str)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun int retval;
35*4882a593Smuzhiyun int slot;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun while ((retval = get_option(&str, &slot))) {
38*4882a593Smuzhiyun if ((slot < 0) || (slot > 31))
39*4882a593Smuzhiyun pr_err("Illegal slot value: %d\n", slot);
40*4882a593Smuzhiyun else
41*4882a593Smuzhiyun pci_slot_ignore |= (1 << slot);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun return 1;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun __setup("pci_slot_ignore=", versatile_pci_slot_ignore);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun
versatile_map_bus(struct pci_bus * bus,unsigned int devfn,int offset)48*4882a593Smuzhiyun static void __iomem *versatile_map_bus(struct pci_bus *bus,
49*4882a593Smuzhiyun unsigned int devfn, int offset)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun unsigned int busnr = bus->number;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
54*4882a593Smuzhiyun return NULL;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static struct pci_ops pci_versatile_ops = {
60*4882a593Smuzhiyun .map_bus = versatile_map_bus,
61*4882a593Smuzhiyun .read = pci_generic_config_read32,
62*4882a593Smuzhiyun .write = pci_generic_config_write,
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
versatile_pci_probe(struct platform_device * pdev)65*4882a593Smuzhiyun static int versatile_pci_probe(struct platform_device *pdev)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun struct device *dev = &pdev->dev;
68*4882a593Smuzhiyun struct resource *res;
69*4882a593Smuzhiyun struct resource_entry *entry;
70*4882a593Smuzhiyun int i, myslot = -1, mem = 1;
71*4882a593Smuzhiyun u32 val;
72*4882a593Smuzhiyun void __iomem *local_pci_cfg_base;
73*4882a593Smuzhiyun struct pci_host_bridge *bridge;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun bridge = devm_pci_alloc_host_bridge(dev, 0);
76*4882a593Smuzhiyun if (!bridge)
77*4882a593Smuzhiyun return -ENOMEM;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun versatile_pci_base = devm_platform_ioremap_resource(pdev, 0);
80*4882a593Smuzhiyun if (IS_ERR(versatile_pci_base))
81*4882a593Smuzhiyun return PTR_ERR(versatile_pci_base);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun versatile_cfg_base[0] = devm_platform_ioremap_resource(pdev, 1);
84*4882a593Smuzhiyun if (IS_ERR(versatile_cfg_base[0]))
85*4882a593Smuzhiyun return PTR_ERR(versatile_cfg_base[0]);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
88*4882a593Smuzhiyun versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
89*4882a593Smuzhiyun if (IS_ERR(versatile_cfg_base[1]))
90*4882a593Smuzhiyun return PTR_ERR(versatile_cfg_base[1]);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun resource_list_for_each_entry(entry, &bridge->windows) {
93*4882a593Smuzhiyun if (resource_type(entry->res) == IORESOURCE_MEM) {
94*4882a593Smuzhiyun writel(entry->res->start >> 28, PCI_IMAP(mem));
95*4882a593Smuzhiyun writel(__pa(PAGE_OFFSET) >> 28, PCI_SMAP(mem));
96*4882a593Smuzhiyun mem++;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*
101*4882a593Smuzhiyun * We need to discover the PCI core first to configure itself
102*4882a593Smuzhiyun * before the main PCI probing is performed
103*4882a593Smuzhiyun */
104*4882a593Smuzhiyun for (i = 0; i < 32; i++) {
105*4882a593Smuzhiyun if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
106*4882a593Smuzhiyun (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
107*4882a593Smuzhiyun myslot = i;
108*4882a593Smuzhiyun break;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun if (myslot == -1) {
112*4882a593Smuzhiyun dev_err(dev, "Cannot find PCI core!\n");
113*4882a593Smuzhiyun return -EIO;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun /*
116*4882a593Smuzhiyun * Do not to map Versatile FPGA PCI device into memory space
117*4882a593Smuzhiyun */
118*4882a593Smuzhiyun pci_slot_ignore |= (1 << myslot);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun dev_info(dev, "PCI core found (slot %d)\n", myslot);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun writel(myslot, PCI_SELFID);
123*4882a593Smuzhiyun local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun val = readl(local_pci_cfg_base + PCI_COMMAND);
126*4882a593Smuzhiyun val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
127*4882a593Smuzhiyun writel(val, local_pci_cfg_base + PCI_COMMAND);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_0);
133*4882a593Smuzhiyun writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_1);
134*4882a593Smuzhiyun writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_2);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /*
137*4882a593Smuzhiyun * For many years the kernel and QEMU were symbiotically buggy
138*4882a593Smuzhiyun * in that they both assumed the same broken IRQ mapping.
139*4882a593Smuzhiyun * QEMU therefore attempts to auto-detect old broken kernels
140*4882a593Smuzhiyun * so that they still work on newer QEMU as they did on old
141*4882a593Smuzhiyun * QEMU. Since we now use the correct (ie matching-hardware)
142*4882a593Smuzhiyun * IRQ mapping we write a definitely different value to a
143*4882a593Smuzhiyun * PCI_INTERRUPT_LINE register to tell QEMU that we expect
144*4882a593Smuzhiyun * real hardware behaviour and it need not be backwards
145*4882a593Smuzhiyun * compatible for us. This write is harmless on real hardware.
146*4882a593Smuzhiyun */
147*4882a593Smuzhiyun writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun pci_add_flags(PCI_REASSIGN_ALL_BUS);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun bridge->ops = &pci_versatile_ops;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return pci_host_probe(bridge);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun static const struct of_device_id versatile_pci_of_match[] = {
157*4882a593Smuzhiyun { .compatible = "arm,versatile-pci", },
158*4882a593Smuzhiyun { },
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun static struct platform_driver versatile_pci_driver = {
163*4882a593Smuzhiyun .driver = {
164*4882a593Smuzhiyun .name = "versatile-pci",
165*4882a593Smuzhiyun .of_match_table = versatile_pci_of_match,
166*4882a593Smuzhiyun .suppress_bind_attrs = true,
167*4882a593Smuzhiyun },
168*4882a593Smuzhiyun .probe = versatile_pci_probe,
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun module_platform_driver(versatile_pci_driver);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun MODULE_DESCRIPTION("Versatile PCI driver");
173*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
174