xref: /OK3568_Linux_fs/kernel/drivers/parport/parport_sunbpp.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* parport_sunbpp.c: Parallel-port routines for SBUS
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Author: Derrick J. Brashear <shadow@dementia.org>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * based on work by:
7*4882a593Smuzhiyun  *          Phil Blundell <philb@gnu.org>
8*4882a593Smuzhiyun  *          Tim Waugh <tim@cyberelk.demon.co.uk>
9*4882a593Smuzhiyun  *	    Jose Renau <renau@acm.org>
10*4882a593Smuzhiyun  *          David Campbell <campbell@tirian.che.curtin.edu.au>
11*4882a593Smuzhiyun  *          Grant Guenther <grant@torque.net>
12*4882a593Smuzhiyun  *          Eddie C. Dost <ecd@skynet.be>
13*4882a593Smuzhiyun  *          Stephen Williams (steve@icarus.com)
14*4882a593Smuzhiyun  *          Gus Baldauf (gbaldauf@ix.netcom.com)
15*4882a593Smuzhiyun  *          Peter Zaitcev
16*4882a593Smuzhiyun  *          Tom Dyas
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * Updated to new SBUS device framework: David S. Miller <davem@davemloft.net>
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <linux/string.h>
23*4882a593Smuzhiyun #include <linux/module.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/errno.h>
26*4882a593Smuzhiyun #include <linux/ioport.h>
27*4882a593Smuzhiyun #include <linux/kernel.h>
28*4882a593Smuzhiyun #include <linux/slab.h>
29*4882a593Smuzhiyun #include <linux/init.h>
30*4882a593Smuzhiyun #include <linux/of.h>
31*4882a593Smuzhiyun #include <linux/of_device.h>
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include <linux/parport.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include <asm/ptrace.h>
36*4882a593Smuzhiyun #include <linux/interrupt.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #include <asm/io.h>
39*4882a593Smuzhiyun #include <asm/oplib.h>           /* OpenProm Library */
40*4882a593Smuzhiyun #include <asm/dma.h>             /* BPP uses LSI 64854 for DMA */
41*4882a593Smuzhiyun #include <asm/irq.h>
42*4882a593Smuzhiyun #include <asm/sunbpp.h>
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #undef __SUNBPP_DEBUG
45*4882a593Smuzhiyun #ifdef __SUNBPP_DEBUG
46*4882a593Smuzhiyun #define dprintk(x) printk x
47*4882a593Smuzhiyun #else
48*4882a593Smuzhiyun #define dprintk(x)
49*4882a593Smuzhiyun #endif
50*4882a593Smuzhiyun 
parport_sunbpp_disable_irq(struct parport * p)51*4882a593Smuzhiyun static void parport_sunbpp_disable_irq(struct parport *p)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
54*4882a593Smuzhiyun 	u32 tmp;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	tmp = sbus_readl(&regs->p_csr);
57*4882a593Smuzhiyun 	tmp &= ~DMA_INT_ENAB;
58*4882a593Smuzhiyun 	sbus_writel(tmp, &regs->p_csr);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
parport_sunbpp_enable_irq(struct parport * p)61*4882a593Smuzhiyun static void parport_sunbpp_enable_irq(struct parport *p)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
64*4882a593Smuzhiyun 	u32 tmp;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	tmp = sbus_readl(&regs->p_csr);
67*4882a593Smuzhiyun 	tmp |= DMA_INT_ENAB;
68*4882a593Smuzhiyun 	sbus_writel(tmp, &regs->p_csr);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
parport_sunbpp_write_data(struct parport * p,unsigned char d)71*4882a593Smuzhiyun static void parport_sunbpp_write_data(struct parport *p, unsigned char d)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	sbus_writeb(d, &regs->p_dr);
76*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "wrote 0x%x\n", d));
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
parport_sunbpp_read_data(struct parport * p)79*4882a593Smuzhiyun static unsigned char parport_sunbpp_read_data(struct parport *p)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return sbus_readb(&regs->p_dr);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
status_sunbpp_to_pc(struct parport * p)86*4882a593Smuzhiyun static unsigned char status_sunbpp_to_pc(struct parport *p)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
89*4882a593Smuzhiyun 	unsigned char bits = 0;
90*4882a593Smuzhiyun 	unsigned char value_tcr = sbus_readb(&regs->p_tcr);
91*4882a593Smuzhiyun 	unsigned char value_ir = sbus_readb(&regs->p_ir);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	if (!(value_ir & P_IR_ERR))
94*4882a593Smuzhiyun 		bits |= PARPORT_STATUS_ERROR;
95*4882a593Smuzhiyun 	if (!(value_ir & P_IR_SLCT))
96*4882a593Smuzhiyun 		bits |= PARPORT_STATUS_SELECT;
97*4882a593Smuzhiyun 	if (!(value_ir & P_IR_PE))
98*4882a593Smuzhiyun 		bits |= PARPORT_STATUS_PAPEROUT;
99*4882a593Smuzhiyun 	if (value_tcr & P_TCR_ACK)
100*4882a593Smuzhiyun 		bits |= PARPORT_STATUS_ACK;
101*4882a593Smuzhiyun 	if (!(value_tcr & P_TCR_BUSY))
102*4882a593Smuzhiyun 		bits |= PARPORT_STATUS_BUSY;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "tcr 0x%x ir 0x%x\n", value_tcr, value_ir));
105*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "read status 0x%x\n", bits));
106*4882a593Smuzhiyun 	return bits;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
control_sunbpp_to_pc(struct parport * p)109*4882a593Smuzhiyun static unsigned char control_sunbpp_to_pc(struct parport *p)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
112*4882a593Smuzhiyun 	unsigned char bits = 0;
113*4882a593Smuzhiyun 	unsigned char value_tcr = sbus_readb(&regs->p_tcr);
114*4882a593Smuzhiyun 	unsigned char value_or = sbus_readb(&regs->p_or);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	if (!(value_tcr & P_TCR_DS))
117*4882a593Smuzhiyun 		bits |= PARPORT_CONTROL_STROBE;
118*4882a593Smuzhiyun 	if (!(value_or & P_OR_AFXN))
119*4882a593Smuzhiyun 		bits |= PARPORT_CONTROL_AUTOFD;
120*4882a593Smuzhiyun 	if (!(value_or & P_OR_INIT))
121*4882a593Smuzhiyun 		bits |= PARPORT_CONTROL_INIT;
122*4882a593Smuzhiyun 	if (value_or & P_OR_SLCT_IN)
123*4882a593Smuzhiyun 		bits |= PARPORT_CONTROL_SELECT;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "tcr 0x%x or 0x%x\n", value_tcr, value_or));
126*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "read control 0x%x\n", bits));
127*4882a593Smuzhiyun 	return bits;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
parport_sunbpp_read_control(struct parport * p)130*4882a593Smuzhiyun static unsigned char parport_sunbpp_read_control(struct parport *p)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	return control_sunbpp_to_pc(p);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
parport_sunbpp_frob_control(struct parport * p,unsigned char mask,unsigned char val)135*4882a593Smuzhiyun static unsigned char parport_sunbpp_frob_control(struct parport *p,
136*4882a593Smuzhiyun 						 unsigned char mask,
137*4882a593Smuzhiyun 						 unsigned char val)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
140*4882a593Smuzhiyun 	unsigned char value_tcr = sbus_readb(&regs->p_tcr);
141*4882a593Smuzhiyun 	unsigned char value_or = sbus_readb(&regs->p_or);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "frob1: tcr 0x%x or 0x%x\n",
144*4882a593Smuzhiyun 		 value_tcr, value_or));
145*4882a593Smuzhiyun 	if (mask & PARPORT_CONTROL_STROBE) {
146*4882a593Smuzhiyun 		if (val & PARPORT_CONTROL_STROBE) {
147*4882a593Smuzhiyun 			value_tcr &= ~P_TCR_DS;
148*4882a593Smuzhiyun 		} else {
149*4882a593Smuzhiyun 			value_tcr |= P_TCR_DS;
150*4882a593Smuzhiyun 		}
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 	if (mask & PARPORT_CONTROL_AUTOFD) {
153*4882a593Smuzhiyun 		if (val & PARPORT_CONTROL_AUTOFD) {
154*4882a593Smuzhiyun 			value_or &= ~P_OR_AFXN;
155*4882a593Smuzhiyun 		} else {
156*4882a593Smuzhiyun 			value_or |= P_OR_AFXN;
157*4882a593Smuzhiyun 		}
158*4882a593Smuzhiyun 	}
159*4882a593Smuzhiyun 	if (mask & PARPORT_CONTROL_INIT) {
160*4882a593Smuzhiyun 		if (val & PARPORT_CONTROL_INIT) {
161*4882a593Smuzhiyun 			value_or &= ~P_OR_INIT;
162*4882a593Smuzhiyun 		} else {
163*4882a593Smuzhiyun 			value_or |= P_OR_INIT;
164*4882a593Smuzhiyun 		}
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 	if (mask & PARPORT_CONTROL_SELECT) {
167*4882a593Smuzhiyun 		if (val & PARPORT_CONTROL_SELECT) {
168*4882a593Smuzhiyun 			value_or |= P_OR_SLCT_IN;
169*4882a593Smuzhiyun 		} else {
170*4882a593Smuzhiyun 			value_or &= ~P_OR_SLCT_IN;
171*4882a593Smuzhiyun 		}
172*4882a593Smuzhiyun 	}
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	sbus_writeb(value_or, &regs->p_or);
175*4882a593Smuzhiyun 	sbus_writeb(value_tcr, &regs->p_tcr);
176*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "frob2: tcr 0x%x or 0x%x\n",
177*4882a593Smuzhiyun 		 value_tcr, value_or));
178*4882a593Smuzhiyun 	return parport_sunbpp_read_control(p);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
parport_sunbpp_write_control(struct parport * p,unsigned char d)181*4882a593Smuzhiyun static void parport_sunbpp_write_control(struct parport *p, unsigned char d)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	const unsigned char wm = (PARPORT_CONTROL_STROBE |
184*4882a593Smuzhiyun 				  PARPORT_CONTROL_AUTOFD |
185*4882a593Smuzhiyun 				  PARPORT_CONTROL_INIT |
186*4882a593Smuzhiyun 				  PARPORT_CONTROL_SELECT);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	parport_sunbpp_frob_control (p, wm, d & wm);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun 
parport_sunbpp_read_status(struct parport * p)191*4882a593Smuzhiyun static unsigned char parport_sunbpp_read_status(struct parport *p)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	return status_sunbpp_to_pc(p);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
parport_sunbpp_data_forward(struct parport * p)196*4882a593Smuzhiyun static void parport_sunbpp_data_forward (struct parport *p)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
199*4882a593Smuzhiyun 	unsigned char value_tcr = sbus_readb(&regs->p_tcr);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "forward\n"));
202*4882a593Smuzhiyun 	value_tcr &= ~P_TCR_DIR;
203*4882a593Smuzhiyun 	sbus_writeb(value_tcr, &regs->p_tcr);
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
parport_sunbpp_data_reverse(struct parport * p)206*4882a593Smuzhiyun static void parport_sunbpp_data_reverse (struct parport *p)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
209*4882a593Smuzhiyun 	u8 val = sbus_readb(&regs->p_tcr);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	dprintk((KERN_DEBUG "reverse\n"));
212*4882a593Smuzhiyun 	val |= P_TCR_DIR;
213*4882a593Smuzhiyun 	sbus_writeb(val, &regs->p_tcr);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
parport_sunbpp_init_state(struct pardevice * dev,struct parport_state * s)216*4882a593Smuzhiyun static void parport_sunbpp_init_state(struct pardevice *dev, struct parport_state *s)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	s->u.pc.ctr = 0xc;
219*4882a593Smuzhiyun 	s->u.pc.ecr = 0x0;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
parport_sunbpp_save_state(struct parport * p,struct parport_state * s)222*4882a593Smuzhiyun static void parport_sunbpp_save_state(struct parport *p, struct parport_state *s)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	s->u.pc.ctr = parport_sunbpp_read_control(p);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
parport_sunbpp_restore_state(struct parport * p,struct parport_state * s)227*4882a593Smuzhiyun static void parport_sunbpp_restore_state(struct parport *p, struct parport_state *s)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	parport_sunbpp_write_control(p, s->u.pc.ctr);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun static struct parport_operations parport_sunbpp_ops =
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun 	.write_data	= parport_sunbpp_write_data,
235*4882a593Smuzhiyun 	.read_data	= parport_sunbpp_read_data,
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	.write_control	= parport_sunbpp_write_control,
238*4882a593Smuzhiyun 	.read_control	= parport_sunbpp_read_control,
239*4882a593Smuzhiyun 	.frob_control	= parport_sunbpp_frob_control,
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	.read_status	= parport_sunbpp_read_status,
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	.enable_irq	= parport_sunbpp_enable_irq,
244*4882a593Smuzhiyun 	.disable_irq	= parport_sunbpp_disable_irq,
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	.data_forward	= parport_sunbpp_data_forward,
247*4882a593Smuzhiyun 	.data_reverse	= parport_sunbpp_data_reverse,
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	.init_state	= parport_sunbpp_init_state,
250*4882a593Smuzhiyun 	.save_state	= parport_sunbpp_save_state,
251*4882a593Smuzhiyun 	.restore_state	= parport_sunbpp_restore_state,
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	.epp_write_data	= parport_ieee1284_epp_write_data,
254*4882a593Smuzhiyun 	.epp_read_data	= parport_ieee1284_epp_read_data,
255*4882a593Smuzhiyun 	.epp_write_addr	= parport_ieee1284_epp_write_addr,
256*4882a593Smuzhiyun 	.epp_read_addr	= parport_ieee1284_epp_read_addr,
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	.ecp_write_data	= parport_ieee1284_ecp_write_data,
259*4882a593Smuzhiyun 	.ecp_read_data	= parport_ieee1284_ecp_read_data,
260*4882a593Smuzhiyun 	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	.compat_write_data	= parport_ieee1284_write_compat,
263*4882a593Smuzhiyun 	.nibble_read_data	= parport_ieee1284_read_nibble,
264*4882a593Smuzhiyun 	.byte_read_data		= parport_ieee1284_read_byte,
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun 
bpp_probe(struct platform_device * op)269*4882a593Smuzhiyun static int bpp_probe(struct platform_device *op)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	struct parport_operations *ops;
272*4882a593Smuzhiyun 	struct bpp_regs __iomem *regs;
273*4882a593Smuzhiyun 	int irq, dma, err = 0, size;
274*4882a593Smuzhiyun 	unsigned char value_tcr;
275*4882a593Smuzhiyun 	void __iomem *base;
276*4882a593Smuzhiyun 	struct parport *p;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	irq = op->archdata.irqs[0];
279*4882a593Smuzhiyun 	base = of_ioremap(&op->resource[0], 0,
280*4882a593Smuzhiyun 			  resource_size(&op->resource[0]),
281*4882a593Smuzhiyun 			  "sunbpp");
282*4882a593Smuzhiyun 	if (!base)
283*4882a593Smuzhiyun 		return -ENODEV;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	size = resource_size(&op->resource[0]);
286*4882a593Smuzhiyun 	dma = PARPORT_DMA_NONE;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	ops = kmemdup(&parport_sunbpp_ops, sizeof(struct parport_operations),
289*4882a593Smuzhiyun 		      GFP_KERNEL);
290*4882a593Smuzhiyun 	if (!ops) {
291*4882a593Smuzhiyun 		err = -ENOMEM;
292*4882a593Smuzhiyun 		goto out_unmap;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	dprintk(("register_port\n"));
296*4882a593Smuzhiyun 	if (!(p = parport_register_port((unsigned long)base, irq, dma, ops))) {
297*4882a593Smuzhiyun 		err = -ENOMEM;
298*4882a593Smuzhiyun 		goto out_free_ops;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	p->size = size;
302*4882a593Smuzhiyun 	p->dev = &op->dev;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	if ((err = request_irq(p->irq, parport_irq_handler,
305*4882a593Smuzhiyun 			       IRQF_SHARED, p->name, p)) != 0) {
306*4882a593Smuzhiyun 		goto out_put_port;
307*4882a593Smuzhiyun 	}
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	parport_sunbpp_enable_irq(p);
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	regs = (struct bpp_regs __iomem *)p->base;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	value_tcr = sbus_readb(&regs->p_tcr);
314*4882a593Smuzhiyun 	value_tcr &= ~P_TCR_DIR;
315*4882a593Smuzhiyun 	sbus_writeb(value_tcr, &regs->p_tcr);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	pr_info("%s: sunbpp at 0x%lx\n", p->name, p->base);
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	dev_set_drvdata(&op->dev, p);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	parport_announce_port(p);
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	return 0;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun out_put_port:
326*4882a593Smuzhiyun 	parport_put_port(p);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun out_free_ops:
329*4882a593Smuzhiyun 	kfree(ops);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun out_unmap:
332*4882a593Smuzhiyun 	of_iounmap(&op->resource[0], base, size);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	return err;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
bpp_remove(struct platform_device * op)337*4882a593Smuzhiyun static int bpp_remove(struct platform_device *op)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun 	struct parport *p = dev_get_drvdata(&op->dev);
340*4882a593Smuzhiyun 	struct parport_operations *ops = p->ops;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	parport_remove_port(p);
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	if (p->irq != PARPORT_IRQ_NONE) {
345*4882a593Smuzhiyun 		parport_sunbpp_disable_irq(p);
346*4882a593Smuzhiyun 		free_irq(p->irq, p);
347*4882a593Smuzhiyun 	}
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	of_iounmap(&op->resource[0], (void __iomem *) p->base, p->size);
350*4882a593Smuzhiyun 	parport_put_port(p);
351*4882a593Smuzhiyun 	kfree(ops);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	dev_set_drvdata(&op->dev, NULL);
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	return 0;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun static const struct of_device_id bpp_match[] = {
359*4882a593Smuzhiyun 	{
360*4882a593Smuzhiyun 		.name = "SUNW,bpp",
361*4882a593Smuzhiyun 	},
362*4882a593Smuzhiyun 	{},
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, bpp_match);
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun static struct platform_driver bpp_sbus_driver = {
368*4882a593Smuzhiyun 	.driver = {
369*4882a593Smuzhiyun 		.name = "bpp",
370*4882a593Smuzhiyun 		.of_match_table = bpp_match,
371*4882a593Smuzhiyun 	},
372*4882a593Smuzhiyun 	.probe		= bpp_probe,
373*4882a593Smuzhiyun 	.remove		= bpp_remove,
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun module_platform_driver(bpp_sbus_driver);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun MODULE_AUTHOR("Derrick J Brashear");
379*4882a593Smuzhiyun MODULE_DESCRIPTION("Parport Driver for Sparc bidirectional Port");
380*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("Sparc Bidirectional Parallel Port");
381*4882a593Smuzhiyun MODULE_VERSION("2.0");
382*4882a593Smuzhiyun MODULE_LICENSE("GPL");
383