1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /* National Semiconductor NS87560UBD Super I/O controller used in
3*4882a593Smuzhiyun * HP [BCJ]x000 workstations.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This chip is a horrid piece of engineering, and National
6*4882a593Smuzhiyun * denies any knowledge of its existence. Thus no datasheet is
7*4882a593Smuzhiyun * available off www.national.com.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * (C) Copyright 2000 Linuxcare, Inc.
10*4882a593Smuzhiyun * (C) Copyright 2000 Linuxcare Canada, Inc.
11*4882a593Smuzhiyun * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
12*4882a593Smuzhiyun * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
13*4882a593Smuzhiyun * (C) Copyright 2001 John Marvin <jsm fc hp com>
14*4882a593Smuzhiyun * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
15*4882a593Smuzhiyun * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
16*4882a593Smuzhiyun * (C) Copyright 2006 Helge Deller <deller@gmx.de>
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * The initial version of this is by Martin Peterson. Alex deVries
19*4882a593Smuzhiyun * has spent a bit of time trying to coax it into working.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * Major changes to get basic interrupt infrastructure working to
22*4882a593Smuzhiyun * hopefully be able to support all SuperIO devices. Currently
23*4882a593Smuzhiyun * works with serial. -- John Marvin <jsm@fc.hp.com>
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * Converted superio_init() to be a PCI_FIXUP_FINAL callee.
26*4882a593Smuzhiyun * -- Kyle McMartin <kyle@parisc-linux.org>
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* NOTES:
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * Function 0 is an IDE controller. It is identical to a PC87415 IDE
33*4882a593Smuzhiyun * controller (and identifies itself as such).
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * Function 1 is a "Legacy I/O" controller. Under this function is a
36*4882a593Smuzhiyun * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
37*4882a593Smuzhiyun * all the functionality in hardware, but the following is available:
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * Two 16550A compatible serial controllers
40*4882a593Smuzhiyun * An IEEE 1284 compatible parallel port
41*4882a593Smuzhiyun * A floppy disk controller
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * Function 2 is a USB controller.
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * We must be incredibly careful during initialization. Since all
46*4882a593Smuzhiyun * interrupts are routed through function 1 (which is not allowed by
47*4882a593Smuzhiyun * the PCI spec), we need to program the PICs on the legacy I/O port
48*4882a593Smuzhiyun * *before* we attempt to set up IDE and USB. @#$!&
49*4882a593Smuzhiyun *
50*4882a593Smuzhiyun * According to HP, devices are only enabled by firmware if they have
51*4882a593Smuzhiyun * a physical device connected.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * Configuration register bits:
54*4882a593Smuzhiyun * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
55*4882a593Smuzhiyun * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
56*4882a593Smuzhiyun *
57*4882a593Smuzhiyun */
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #include <linux/errno.h>
60*4882a593Smuzhiyun #include <linux/init.h>
61*4882a593Smuzhiyun #include <linux/module.h>
62*4882a593Smuzhiyun #include <linux/types.h>
63*4882a593Smuzhiyun #include <linux/interrupt.h>
64*4882a593Smuzhiyun #include <linux/ioport.h>
65*4882a593Smuzhiyun #include <linux/serial.h>
66*4882a593Smuzhiyun #include <linux/pci.h>
67*4882a593Smuzhiyun #include <linux/parport.h>
68*4882a593Smuzhiyun #include <linux/parport_pc.h>
69*4882a593Smuzhiyun #include <linux/termios.h>
70*4882a593Smuzhiyun #include <linux/tty.h>
71*4882a593Smuzhiyun #include <linux/serial_core.h>
72*4882a593Smuzhiyun #include <linux/serial_8250.h>
73*4882a593Smuzhiyun #include <linux/delay.h>
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #include <asm/io.h>
76*4882a593Smuzhiyun #include <asm/hardware.h>
77*4882a593Smuzhiyun #include <asm/superio.h>
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun static struct superio_device sio_dev;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #undef DEBUG_SUPERIO_INIT
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun #ifdef DEBUG_SUPERIO_INIT
85*4882a593Smuzhiyun #define DBG_INIT(x...) printk(x)
86*4882a593Smuzhiyun #else
87*4882a593Smuzhiyun #define DBG_INIT(x...)
88*4882a593Smuzhiyun #endif
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #define SUPERIO "SuperIO"
91*4882a593Smuzhiyun #define PFX SUPERIO ": "
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun static irqreturn_t
superio_interrupt(int parent_irq,void * devp)94*4882a593Smuzhiyun superio_interrupt(int parent_irq, void *devp)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun u8 results;
97*4882a593Smuzhiyun u8 local_irq;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* Poll the 8259 to see if there's an interrupt. */
100*4882a593Smuzhiyun outb (OCW3_POLL,IC_PIC1+0);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun results = inb(IC_PIC1+0);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /*
105*4882a593Smuzhiyun * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
106*4882a593Smuzhiyun * Bits 6-3: zero
107*4882a593Smuzhiyun * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
108*4882a593Smuzhiyun */
109*4882a593Smuzhiyun if ((results & 0x80) == 0) {
110*4882a593Smuzhiyun /* I suspect "spurious" interrupts are from unmasking an IRQ.
111*4882a593Smuzhiyun * We don't know if an interrupt was/is pending and thus
112*4882a593Smuzhiyun * just call the handler for that IRQ as if it were pending.
113*4882a593Smuzhiyun */
114*4882a593Smuzhiyun return IRQ_NONE;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* Check to see which device is interrupting */
118*4882a593Smuzhiyun local_irq = results & 0x0f;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if (local_irq == 2 || local_irq > 7) {
121*4882a593Smuzhiyun printk(KERN_ERR PFX "slave interrupted!\n");
122*4882a593Smuzhiyun return IRQ_HANDLED;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (local_irq == 7) {
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* Could be spurious. Check in service bits */
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun outb(OCW3_ISR,IC_PIC1+0);
130*4882a593Smuzhiyun results = inb(IC_PIC1+0);
131*4882a593Smuzhiyun if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
132*4882a593Smuzhiyun printk(KERN_WARNING PFX "spurious interrupt!\n");
133*4882a593Smuzhiyun return IRQ_HANDLED;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Call the appropriate device's interrupt */
138*4882a593Smuzhiyun generic_handle_irq(local_irq);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* set EOI - forces a new interrupt if a lower priority device
141*4882a593Smuzhiyun * still needs service.
142*4882a593Smuzhiyun */
143*4882a593Smuzhiyun outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
144*4882a593Smuzhiyun return IRQ_HANDLED;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* Initialize Super I/O device */
148*4882a593Smuzhiyun static void
superio_init(struct pci_dev * pcidev)149*4882a593Smuzhiyun superio_init(struct pci_dev *pcidev)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun struct superio_device *sio = &sio_dev;
152*4882a593Smuzhiyun struct pci_dev *pdev = sio->lio_pdev;
153*4882a593Smuzhiyun u16 word;
154*4882a593Smuzhiyun int ret;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun if (sio->suckyio_irq_enabled)
157*4882a593Smuzhiyun return;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun BUG_ON(!pdev);
160*4882a593Smuzhiyun BUG_ON(!sio->usb_pdev);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun /* use the IRQ iosapic found for USB INT D... */
163*4882a593Smuzhiyun pdev->irq = sio->usb_pdev->irq;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* ...then properly fixup the USB to point at suckyio PIC */
166*4882a593Smuzhiyun sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i)\n",
169*4882a593Smuzhiyun pci_name(pdev), pdev->irq);
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
172*4882a593Smuzhiyun sio->sp1_base &= ~1;
173*4882a593Smuzhiyun printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
176*4882a593Smuzhiyun sio->sp2_base &= ~1;
177*4882a593Smuzhiyun printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
180*4882a593Smuzhiyun sio->pp_base &= ~1;
181*4882a593Smuzhiyun printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
184*4882a593Smuzhiyun sio->fdc_base &= ~1;
185*4882a593Smuzhiyun printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
186*4882a593Smuzhiyun pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
187*4882a593Smuzhiyun sio->acpi_base &= ~1;
188*4882a593Smuzhiyun printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun request_region (IC_PIC1, 0x1f, "pic1");
191*4882a593Smuzhiyun request_region (IC_PIC2, 0x1f, "pic2");
192*4882a593Smuzhiyun request_region (sio->acpi_base, 0x1f, "acpi");
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /* Enable the legacy I/O function */
195*4882a593Smuzhiyun pci_read_config_word (pdev, PCI_COMMAND, &word);
196*4882a593Smuzhiyun word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
197*4882a593Smuzhiyun pci_write_config_word (pdev, PCI_COMMAND, word);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun pci_set_master (pdev);
200*4882a593Smuzhiyun ret = pci_enable_device(pdev);
201*4882a593Smuzhiyun BUG_ON(ret < 0); /* not too much we can do about this... */
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /*
204*4882a593Smuzhiyun * Next project is programming the onboard interrupt controllers.
205*4882a593Smuzhiyun * PDC hasn't done this for us, since it's using polled I/O.
206*4882a593Smuzhiyun *
207*4882a593Smuzhiyun * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
208*4882a593Smuzhiyun * space access. PCI is by nature a 32-bit bus and config
209*4882a593Smuzhiyun * space can be sensitive to that.
210*4882a593Smuzhiyun */
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* 0x64 - 0x67 :
213*4882a593Smuzhiyun DMA Rtg 2
214*4882a593Smuzhiyun DMA Rtg 3
215*4882a593Smuzhiyun DMA Chan Ctl
216*4882a593Smuzhiyun TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
217*4882a593Smuzhiyun */
218*4882a593Smuzhiyun pci_write_config_dword (pdev, 0x64, 0x82000000U);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /* 0x68 - 0x6b :
221*4882a593Smuzhiyun TRIGGER_2 == 0x00 all edge triggered (not used)
222*4882a593Smuzhiyun CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
223*4882a593Smuzhiyun CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
224*4882a593Smuzhiyun CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
225*4882a593Smuzhiyun */
226*4882a593Smuzhiyun pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* 0x6c - 0x6f :
229*4882a593Smuzhiyun CFG_IR_INTAB == 0x00
230*4882a593Smuzhiyun CFG_IR_INTCD == 0x10 USB = IRQ1
231*4882a593Smuzhiyun CFG_IR_PS2 == 0x00
232*4882a593Smuzhiyun CFG_IR_FXBUS == 0x00
233*4882a593Smuzhiyun */
234*4882a593Smuzhiyun pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /* 0x70 - 0x73 :
237*4882a593Smuzhiyun CFG_IR_USB == 0x00 not used. USB is connected to INTD.
238*4882a593Smuzhiyun CFG_IR_ACPI == 0x00 not used.
239*4882a593Smuzhiyun DMA Priority == 0x4c88 Power on default value. NFC.
240*4882a593Smuzhiyun */
241*4882a593Smuzhiyun pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /* PIC1 Initialization Command Word register programming */
244*4882a593Smuzhiyun outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
245*4882a593Smuzhiyun outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
246*4882a593Smuzhiyun outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
247*4882a593Smuzhiyun outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun /* PIC1 Program Operational Control Words */
250*4882a593Smuzhiyun outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
251*4882a593Smuzhiyun outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /* PIC2 Initialization Command Word register programming */
254*4882a593Smuzhiyun outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
255*4882a593Smuzhiyun outb (0x00,IC_PIC2+1); /* ICW2: N/A */
256*4882a593Smuzhiyun outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
257*4882a593Smuzhiyun outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* Program Operational Control Words */
260*4882a593Smuzhiyun outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
261*4882a593Smuzhiyun outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* Write master mask reg */
264*4882a593Smuzhiyun outb (0xff,IC_PIC1+1);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun /* Setup USB power regulation */
267*4882a593Smuzhiyun outb(1, sio->acpi_base + USB_REG_CR);
268*4882a593Smuzhiyun if (inb(sio->acpi_base + USB_REG_CR) & 1)
269*4882a593Smuzhiyun printk(KERN_INFO PFX "USB regulator enabled\n");
270*4882a593Smuzhiyun else
271*4882a593Smuzhiyun printk(KERN_ERR PFX "USB regulator not initialized!\n");
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun if (request_irq(pdev->irq, superio_interrupt, 0,
274*4882a593Smuzhiyun SUPERIO, (void *)sio)) {
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun printk(KERN_ERR PFX "could not get irq\n");
277*4882a593Smuzhiyun BUG();
278*4882a593Smuzhiyun return;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun sio->suckyio_irq_enabled = 1;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
284*4882a593Smuzhiyun
superio_mask_irq(struct irq_data * d)285*4882a593Smuzhiyun static void superio_mask_irq(struct irq_data *d)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun unsigned int irq = d->irq;
288*4882a593Smuzhiyun u8 r8;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun if ((irq < 1) || (irq == 2) || (irq > 7)) {
291*4882a593Smuzhiyun printk(KERN_ERR PFX "Illegal irq number.\n");
292*4882a593Smuzhiyun BUG();
293*4882a593Smuzhiyun return;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /* Mask interrupt */
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun r8 = inb(IC_PIC1+1);
299*4882a593Smuzhiyun r8 |= (1 << irq);
300*4882a593Smuzhiyun outb (r8,IC_PIC1+1);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
superio_unmask_irq(struct irq_data * d)303*4882a593Smuzhiyun static void superio_unmask_irq(struct irq_data *d)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun unsigned int irq = d->irq;
306*4882a593Smuzhiyun u8 r8;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun if ((irq < 1) || (irq == 2) || (irq > 7)) {
309*4882a593Smuzhiyun printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
310*4882a593Smuzhiyun BUG();
311*4882a593Smuzhiyun return;
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /* Unmask interrupt */
315*4882a593Smuzhiyun r8 = inb(IC_PIC1+1);
316*4882a593Smuzhiyun r8 &= ~(1 << irq);
317*4882a593Smuzhiyun outb (r8,IC_PIC1+1);
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun static struct irq_chip superio_interrupt_type = {
321*4882a593Smuzhiyun .name = SUPERIO,
322*4882a593Smuzhiyun .irq_unmask = superio_unmask_irq,
323*4882a593Smuzhiyun .irq_mask = superio_mask_irq,
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun #ifdef DEBUG_SUPERIO_INIT
327*4882a593Smuzhiyun static unsigned short expected_device[3] = {
328*4882a593Smuzhiyun PCI_DEVICE_ID_NS_87415,
329*4882a593Smuzhiyun PCI_DEVICE_ID_NS_87560_LIO,
330*4882a593Smuzhiyun PCI_DEVICE_ID_NS_87560_USB
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun #endif
333*4882a593Smuzhiyun
superio_fixup_irq(struct pci_dev * pcidev)334*4882a593Smuzhiyun int superio_fixup_irq(struct pci_dev *pcidev)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun int local_irq, i;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun #ifdef DEBUG_SUPERIO_INIT
339*4882a593Smuzhiyun int fn;
340*4882a593Smuzhiyun fn = PCI_FUNC(pcidev->devfn);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun /* Verify the function number matches the expected device id. */
343*4882a593Smuzhiyun if (expected_device[fn] != pcidev->device) {
344*4882a593Smuzhiyun BUG();
345*4882a593Smuzhiyun return -1;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun printk(KERN_DEBUG "superio_fixup_irq(%s) ven 0x%x dev 0x%x from %ps\n",
348*4882a593Smuzhiyun pci_name(pcidev),
349*4882a593Smuzhiyun pcidev->vendor, pcidev->device,
350*4882a593Smuzhiyun __builtin_return_address(0));
351*4882a593Smuzhiyun #endif
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun for (i = 0; i < 16; i++) {
354*4882a593Smuzhiyun irq_set_chip_and_handler(i, &superio_interrupt_type,
355*4882a593Smuzhiyun handle_simple_irq);
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun /*
359*4882a593Smuzhiyun * We don't allocate a SuperIO irq for the legacy IO function,
360*4882a593Smuzhiyun * since it is a "bridge". Instead, we will allocate irq's for
361*4882a593Smuzhiyun * each legacy device as they are initialized.
362*4882a593Smuzhiyun */
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun switch(pcidev->device) {
365*4882a593Smuzhiyun case PCI_DEVICE_ID_NS_87415: /* Function 0 */
366*4882a593Smuzhiyun local_irq = IDE_IRQ;
367*4882a593Smuzhiyun break;
368*4882a593Smuzhiyun case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
369*4882a593Smuzhiyun sio_dev.lio_pdev = pcidev; /* save for superio_init() */
370*4882a593Smuzhiyun return -1;
371*4882a593Smuzhiyun case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
372*4882a593Smuzhiyun sio_dev.usb_pdev = pcidev; /* save for superio_init() */
373*4882a593Smuzhiyun local_irq = USB_IRQ;
374*4882a593Smuzhiyun break;
375*4882a593Smuzhiyun default:
376*4882a593Smuzhiyun local_irq = -1;
377*4882a593Smuzhiyun BUG();
378*4882a593Smuzhiyun break;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun return local_irq;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
superio_serial_init(void)384*4882a593Smuzhiyun static void __init superio_serial_init(void)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun #ifdef CONFIG_SERIAL_8250
387*4882a593Smuzhiyun int retval;
388*4882a593Smuzhiyun struct uart_port serial_port;
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun memset(&serial_port, 0, sizeof(serial_port));
391*4882a593Smuzhiyun serial_port.iotype = UPIO_PORT;
392*4882a593Smuzhiyun serial_port.type = PORT_16550A;
393*4882a593Smuzhiyun serial_port.uartclk = 115200*16;
394*4882a593Smuzhiyun serial_port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE |
395*4882a593Smuzhiyun UPF_BOOT_AUTOCONF;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /* serial port #1 */
398*4882a593Smuzhiyun serial_port.iobase = sio_dev.sp1_base;
399*4882a593Smuzhiyun serial_port.irq = SP1_IRQ;
400*4882a593Smuzhiyun serial_port.line = 0;
401*4882a593Smuzhiyun retval = early_serial_setup(&serial_port);
402*4882a593Smuzhiyun if (retval < 0) {
403*4882a593Smuzhiyun printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
404*4882a593Smuzhiyun return;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /* serial port #2 */
408*4882a593Smuzhiyun serial_port.iobase = sio_dev.sp2_base;
409*4882a593Smuzhiyun serial_port.irq = SP2_IRQ;
410*4882a593Smuzhiyun serial_port.line = 1;
411*4882a593Smuzhiyun retval = early_serial_setup(&serial_port);
412*4882a593Smuzhiyun if (retval < 0)
413*4882a593Smuzhiyun printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
414*4882a593Smuzhiyun #endif /* CONFIG_SERIAL_8250 */
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun
superio_parport_init(void)418*4882a593Smuzhiyun static void __init superio_parport_init(void)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun #ifdef CONFIG_PARPORT_PC
421*4882a593Smuzhiyun if (!parport_pc_probe_port(sio_dev.pp_base,
422*4882a593Smuzhiyun 0 /*base_hi*/,
423*4882a593Smuzhiyun PAR_IRQ,
424*4882a593Smuzhiyun PARPORT_DMA_NONE /* dma */,
425*4882a593Smuzhiyun NULL /*struct pci_dev* */,
426*4882a593Smuzhiyun 0 /* shared irq flags */))
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun printk(KERN_WARNING PFX "Probing parallel port failed.\n");
429*4882a593Smuzhiyun #endif /* CONFIG_PARPORT_PC */
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun
superio_fixup_pci(struct pci_dev * pdev)433*4882a593Smuzhiyun static void superio_fixup_pci(struct pci_dev *pdev)
434*4882a593Smuzhiyun {
435*4882a593Smuzhiyun u8 prog;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun pdev->class |= 0x5;
438*4882a593Smuzhiyun pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
441*4882a593Smuzhiyun printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun static int __init
superio_probe(struct pci_dev * dev,const struct pci_device_id * id)447*4882a593Smuzhiyun superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct superio_device *sio = &sio_dev;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /*
452*4882a593Smuzhiyun ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
453*4882a593Smuzhiyun ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
454*4882a593Smuzhiyun ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
455*4882a593Smuzhiyun */
456*4882a593Smuzhiyun DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
457*4882a593Smuzhiyun pci_name(dev),
458*4882a593Smuzhiyun dev->vendor, dev->device,
459*4882a593Smuzhiyun dev->subsystem_vendor, dev->subsystem_device,
460*4882a593Smuzhiyun dev->class);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun BUG_ON(!sio->suckyio_irq_enabled); /* Enabled by PCI_FIXUP_FINAL */
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
465*4882a593Smuzhiyun superio_parport_init();
466*4882a593Smuzhiyun superio_serial_init();
467*4882a593Smuzhiyun /* REVISIT XXX : superio_fdc_init() ? */
468*4882a593Smuzhiyun return 0;
469*4882a593Smuzhiyun } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
470*4882a593Smuzhiyun DBG_INIT("superio_probe: ignoring IDE 87415\n");
471*4882a593Smuzhiyun } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
472*4882a593Smuzhiyun DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
473*4882a593Smuzhiyun } else {
474*4882a593Smuzhiyun DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun /* Let appropriate other driver claim this device. */
478*4882a593Smuzhiyun return -ENODEV;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun static const struct pci_device_id superio_tbl[] __initconst = {
482*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
483*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
484*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
485*4882a593Smuzhiyun { 0, }
486*4882a593Smuzhiyun };
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun static struct pci_driver superio_driver __refdata = {
489*4882a593Smuzhiyun .name = SUPERIO,
490*4882a593Smuzhiyun .id_table = superio_tbl,
491*4882a593Smuzhiyun .probe = superio_probe,
492*4882a593Smuzhiyun };
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun module_pci_driver(superio_driver);
495