1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Interrupt management for most GSC and related devices.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (c) Copyright 1999 Alex deVries for The Puffin Group
6*4882a593Smuzhiyun * (c) Copyright 1999 Grant Grundler for Hewlett-Packard
7*4882a593Smuzhiyun * (c) Copyright 1999 Matthew Wilcox
8*4882a593Smuzhiyun * (c) Copyright 2000 Helge Deller
9*4882a593Smuzhiyun * (c) Copyright 2001 Matthew Wilcox for Hewlett-Packard
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/bitops.h>
13*4882a593Smuzhiyun #include <linux/errno.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/ioport.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/types.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <asm/hardware.h>
21*4882a593Smuzhiyun #include <asm/io.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include "gsc.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #undef DEBUG
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #ifdef DEBUG
28*4882a593Smuzhiyun #define DEBPRINTK printk
29*4882a593Smuzhiyun #else
30*4882a593Smuzhiyun #define DEBPRINTK(x,...)
31*4882a593Smuzhiyun #endif
32*4882a593Smuzhiyun
gsc_alloc_irq(struct gsc_irq * i)33*4882a593Smuzhiyun int gsc_alloc_irq(struct gsc_irq *i)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun int irq = txn_alloc_irq(GSC_EIM_WIDTH);
36*4882a593Smuzhiyun if (irq < 0) {
37*4882a593Smuzhiyun printk("cannot get irq\n");
38*4882a593Smuzhiyun return irq;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun i->txn_addr = txn_alloc_addr(irq);
42*4882a593Smuzhiyun i->txn_data = txn_alloc_data(irq);
43*4882a593Smuzhiyun i->irq = irq;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun return irq;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
gsc_claim_irq(struct gsc_irq * i,int irq)48*4882a593Smuzhiyun int gsc_claim_irq(struct gsc_irq *i, int irq)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun int c = irq;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun irq += CPU_IRQ_BASE; /* virtualize the IRQ first */
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun irq = txn_claim_irq(irq);
55*4882a593Smuzhiyun if (irq < 0) {
56*4882a593Smuzhiyun printk("cannot claim irq %d\n", c);
57*4882a593Smuzhiyun return irq;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun i->txn_addr = txn_alloc_addr(irq);
61*4882a593Smuzhiyun i->txn_data = txn_alloc_data(irq);
62*4882a593Smuzhiyun i->irq = irq;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return irq;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun EXPORT_SYMBOL(gsc_alloc_irq);
68*4882a593Smuzhiyun EXPORT_SYMBOL(gsc_claim_irq);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* Common interrupt demultiplexer used by Asp, Lasi & Wax. */
gsc_asic_intr(int gsc_asic_irq,void * dev)71*4882a593Smuzhiyun irqreturn_t gsc_asic_intr(int gsc_asic_irq, void *dev)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun unsigned long irr;
74*4882a593Smuzhiyun struct gsc_asic *gsc_asic = dev;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun irr = gsc_readl(gsc_asic->hpa + OFFSET_IRR);
77*4882a593Smuzhiyun if (irr == 0)
78*4882a593Smuzhiyun return IRQ_NONE;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun DEBPRINTK("%s intr, mask=0x%x\n", gsc_asic->name, irr);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun do {
83*4882a593Smuzhiyun int local_irq = __ffs(irr);
84*4882a593Smuzhiyun unsigned int irq = gsc_asic->global_irq[local_irq];
85*4882a593Smuzhiyun generic_handle_irq(irq);
86*4882a593Smuzhiyun irr &= ~(1 << local_irq);
87*4882a593Smuzhiyun } while (irr);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun return IRQ_HANDLED;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
gsc_find_local_irq(unsigned int irq,int * global_irqs,int limit)92*4882a593Smuzhiyun int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun int local_irq;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun for (local_irq = 0; local_irq < limit; local_irq++) {
97*4882a593Smuzhiyun if (global_irqs[local_irq] == irq)
98*4882a593Smuzhiyun return local_irq;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return NO_IRQ;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
gsc_asic_mask_irq(struct irq_data * d)104*4882a593Smuzhiyun static void gsc_asic_mask_irq(struct irq_data *d)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
107*4882a593Smuzhiyun int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
108*4882a593Smuzhiyun u32 imr;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
111*4882a593Smuzhiyun irq_dev->name, imr);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* Disable the IRQ line by clearing the bit in the IMR */
114*4882a593Smuzhiyun imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
115*4882a593Smuzhiyun imr &= ~(1 << local_irq);
116*4882a593Smuzhiyun gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
gsc_asic_unmask_irq(struct irq_data * d)119*4882a593Smuzhiyun static void gsc_asic_unmask_irq(struct irq_data *d)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct gsc_asic *irq_dev = irq_data_get_irq_chip_data(d);
122*4882a593Smuzhiyun int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32);
123*4882a593Smuzhiyun u32 imr;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq,
126*4882a593Smuzhiyun irq_dev->name, imr);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /* Enable the IRQ line by setting the bit in the IMR */
129*4882a593Smuzhiyun imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
130*4882a593Smuzhiyun imr |= 1 << local_irq;
131*4882a593Smuzhiyun gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
132*4882a593Smuzhiyun /*
133*4882a593Smuzhiyun * FIXME: read IPR to make sure the IRQ isn't already pending.
134*4882a593Smuzhiyun * If so, we need to read IRR and manually call do_irq().
135*4882a593Smuzhiyun */
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun #ifdef CONFIG_SMP
gsc_set_affinity_irq(struct irq_data * d,const struct cpumask * dest,bool force)139*4882a593Smuzhiyun static int gsc_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
140*4882a593Smuzhiyun bool force)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun struct gsc_asic *gsc_dev = irq_data_get_irq_chip_data(d);
143*4882a593Smuzhiyun struct cpumask tmask;
144*4882a593Smuzhiyun int cpu_irq;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun if (!cpumask_and(&tmask, dest, cpu_online_mask))
147*4882a593Smuzhiyun return -EINVAL;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun cpu_irq = cpu_check_affinity(d, &tmask);
150*4882a593Smuzhiyun if (cpu_irq < 0)
151*4882a593Smuzhiyun return cpu_irq;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun gsc_dev->gsc_irq.txn_addr = txn_affinity_addr(d->irq, cpu_irq);
154*4882a593Smuzhiyun gsc_dev->eim = ((u32) gsc_dev->gsc_irq.txn_addr) | gsc_dev->gsc_irq.txn_data;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* switch IRQ's for devices below LASI/WAX to other CPU */
157*4882a593Smuzhiyun gsc_writel(gsc_dev->eim, gsc_dev->hpa + OFFSET_IAR);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun irq_data_update_effective_affinity(d, &tmask);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun return IRQ_SET_MASK_OK;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun #endif
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun static struct irq_chip gsc_asic_interrupt_type = {
167*4882a593Smuzhiyun .name = "GSC-ASIC",
168*4882a593Smuzhiyun .irq_unmask = gsc_asic_unmask_irq,
169*4882a593Smuzhiyun .irq_mask = gsc_asic_mask_irq,
170*4882a593Smuzhiyun #ifdef CONFIG_SMP
171*4882a593Smuzhiyun .irq_set_affinity = gsc_set_affinity_irq,
172*4882a593Smuzhiyun #endif
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
gsc_assign_irq(struct irq_chip * type,void * data)175*4882a593Smuzhiyun int gsc_assign_irq(struct irq_chip *type, void *data)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun static int irq = GSC_IRQ_BASE;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun if (irq > GSC_IRQ_MAX)
180*4882a593Smuzhiyun return NO_IRQ;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun irq_set_chip_and_handler(irq, type, handle_simple_irq);
183*4882a593Smuzhiyun irq_set_chip_data(irq, data);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return irq++;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
gsc_asic_assign_irq(struct gsc_asic * asic,int local_irq,int * irqp)188*4882a593Smuzhiyun void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun int irq = asic->global_irq[local_irq];
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun if (irq <= 0) {
193*4882a593Smuzhiyun irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic);
194*4882a593Smuzhiyun if (irq == NO_IRQ)
195*4882a593Smuzhiyun return;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun asic->global_irq[local_irq] = irq;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun *irqp = irq;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun struct gsc_fixup_struct {
203*4882a593Smuzhiyun void (*choose_irq)(struct parisc_device *, void *);
204*4882a593Smuzhiyun void *ctrl;
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun
gsc_fixup_irqs_callback(struct device * dev,void * data)207*4882a593Smuzhiyun static int gsc_fixup_irqs_callback(struct device *dev, void *data)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun struct parisc_device *padev = to_parisc_device(dev);
210*4882a593Smuzhiyun struct gsc_fixup_struct *gf = data;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* work-around for 715/64 and others which have parent
213*4882a593Smuzhiyun at path [5] and children at path [5/0/x] */
214*4882a593Smuzhiyun if (padev->id.hw_type == HPHW_FAULTY)
215*4882a593Smuzhiyun gsc_fixup_irqs(padev, gf->ctrl, gf->choose_irq);
216*4882a593Smuzhiyun gf->choose_irq(padev, gf->ctrl);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun return 0;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
gsc_fixup_irqs(struct parisc_device * parent,void * ctrl,void (* choose_irq)(struct parisc_device *,void *))221*4882a593Smuzhiyun void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
222*4882a593Smuzhiyun void (*choose_irq)(struct parisc_device *, void *))
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun struct gsc_fixup_struct data = {
225*4882a593Smuzhiyun .choose_irq = choose_irq,
226*4882a593Smuzhiyun .ctrl = ctrl,
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun device_for_each_child(&parent->dev, &data, gsc_fixup_irqs_callback);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
gsc_common_setup(struct parisc_device * parent,struct gsc_asic * gsc_asic)232*4882a593Smuzhiyun int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct resource *res;
235*4882a593Smuzhiyun int i;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun gsc_asic->gsc = parent;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* Initialise local irq -> global irq mapping */
240*4882a593Smuzhiyun for (i = 0; i < 32; i++) {
241*4882a593Smuzhiyun gsc_asic->global_irq[i] = NO_IRQ;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun /* allocate resource region */
245*4882a593Smuzhiyun res = request_mem_region(gsc_asic->hpa, 0x100000, gsc_asic->name);
246*4882a593Smuzhiyun if (res) {
247*4882a593Smuzhiyun res->flags = IORESOURCE_MEM; /* do not mark it busy ! */
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun #if 0
251*4882a593Smuzhiyun printk(KERN_WARNING "%s IRQ %d EIM 0x%x", gsc_asic->name,
252*4882a593Smuzhiyun parent->irq, gsc_asic->eim);
253*4882a593Smuzhiyun if (gsc_readl(gsc_asic->hpa + OFFSET_IMR))
254*4882a593Smuzhiyun printk(" IMR is non-zero! (0x%x)",
255*4882a593Smuzhiyun gsc_readl(gsc_asic->hpa + OFFSET_IMR));
256*4882a593Smuzhiyun printk("\n");
257*4882a593Smuzhiyun #endif
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun return 0;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun extern struct parisc_driver lasi_driver;
263*4882a593Smuzhiyun extern struct parisc_driver asp_driver;
264*4882a593Smuzhiyun extern struct parisc_driver wax_driver;
265*4882a593Smuzhiyun
gsc_init(void)266*4882a593Smuzhiyun void __init gsc_init(void)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun #ifdef CONFIG_GSC_LASI
269*4882a593Smuzhiyun register_parisc_driver(&lasi_driver);
270*4882a593Smuzhiyun register_parisc_driver(&asp_driver);
271*4882a593Smuzhiyun #endif
272*4882a593Smuzhiyun #ifdef CONFIG_GSC_WAX
273*4882a593Smuzhiyun register_parisc_driver(&wax_driver);
274*4882a593Smuzhiyun #endif
275*4882a593Smuzhiyun }
276