1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2015 MediaTek Inc.
4*4882a593Smuzhiyun * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/device.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/nvmem-provider.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun struct mtk_efuse_priv {
15*4882a593Smuzhiyun void __iomem *base;
16*4882a593Smuzhiyun };
17*4882a593Smuzhiyun
mtk_reg_read(void * context,unsigned int reg,void * _val,size_t bytes)18*4882a593Smuzhiyun static int mtk_reg_read(void *context,
19*4882a593Smuzhiyun unsigned int reg, void *_val, size_t bytes)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun struct mtk_efuse_priv *priv = context;
22*4882a593Smuzhiyun u32 *val = _val;
23*4882a593Smuzhiyun int i = 0, words = bytes / 4;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun while (words--)
26*4882a593Smuzhiyun *val++ = readl(priv->base + reg + (i++ * 4));
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun return 0;
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
mtk_efuse_probe(struct platform_device * pdev)31*4882a593Smuzhiyun static int mtk_efuse_probe(struct platform_device *pdev)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun struct device *dev = &pdev->dev;
34*4882a593Smuzhiyun struct resource *res;
35*4882a593Smuzhiyun struct nvmem_device *nvmem;
36*4882a593Smuzhiyun struct nvmem_config econfig = {};
37*4882a593Smuzhiyun struct mtk_efuse_priv *priv;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
40*4882a593Smuzhiyun if (!priv)
41*4882a593Smuzhiyun return -ENOMEM;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
44*4882a593Smuzhiyun priv->base = devm_ioremap_resource(dev, res);
45*4882a593Smuzhiyun if (IS_ERR(priv->base))
46*4882a593Smuzhiyun return PTR_ERR(priv->base);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun econfig.stride = 4;
49*4882a593Smuzhiyun econfig.word_size = 4;
50*4882a593Smuzhiyun econfig.reg_read = mtk_reg_read;
51*4882a593Smuzhiyun econfig.size = resource_size(res);
52*4882a593Smuzhiyun econfig.priv = priv;
53*4882a593Smuzhiyun econfig.dev = dev;
54*4882a593Smuzhiyun nvmem = devm_nvmem_register(dev, &econfig);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(nvmem);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static const struct of_device_id mtk_efuse_of_match[] = {
60*4882a593Smuzhiyun { .compatible = "mediatek,mt8173-efuse",},
61*4882a593Smuzhiyun { .compatible = "mediatek,efuse",},
62*4882a593Smuzhiyun {/* sentinel */},
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mtk_efuse_of_match);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static struct platform_driver mtk_efuse_driver = {
67*4882a593Smuzhiyun .probe = mtk_efuse_probe,
68*4882a593Smuzhiyun .driver = {
69*4882a593Smuzhiyun .name = "mediatek,efuse",
70*4882a593Smuzhiyun .of_match_table = mtk_efuse_of_match,
71*4882a593Smuzhiyun },
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
mtk_efuse_init(void)74*4882a593Smuzhiyun static int __init mtk_efuse_init(void)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun int ret;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun ret = platform_driver_register(&mtk_efuse_driver);
79*4882a593Smuzhiyun if (ret) {
80*4882a593Smuzhiyun pr_err("Failed to register efuse driver\n");
81*4882a593Smuzhiyun return ret;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
mtk_efuse_exit(void)87*4882a593Smuzhiyun static void __exit mtk_efuse_exit(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun return platform_driver_unregister(&mtk_efuse_driver);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun subsys_initcall(mtk_efuse_init);
93*4882a593Smuzhiyun module_exit(mtk_efuse_exit);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun MODULE_AUTHOR("Andrew-CT Chen <andrew-ct.chen@mediatek.com>");
96*4882a593Smuzhiyun MODULE_DESCRIPTION("Mediatek EFUSE driver");
97*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
98