1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * nvme-lightnvm.c - LightNVM NVMe device
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014-2015 IT University of Copenhagen
6*4882a593Smuzhiyun * Initial release: Matias Bjorling <mb@lightnvm.io>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include "nvme.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/nvme.h>
12*4882a593Smuzhiyun #include <linux/bitops.h>
13*4882a593Smuzhiyun #include <linux/lightnvm.h>
14*4882a593Smuzhiyun #include <linux/vmalloc.h>
15*4882a593Smuzhiyun #include <linux/sched/sysctl.h>
16*4882a593Smuzhiyun #include <uapi/linux/lightnvm.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun enum nvme_nvm_admin_opcode {
19*4882a593Smuzhiyun nvme_nvm_admin_identity = 0xe2,
20*4882a593Smuzhiyun nvme_nvm_admin_get_bb_tbl = 0xf2,
21*4882a593Smuzhiyun nvme_nvm_admin_set_bb_tbl = 0xf1,
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun enum nvme_nvm_log_page {
25*4882a593Smuzhiyun NVME_NVM_LOG_REPORT_CHUNK = 0xca,
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct nvme_nvm_ph_rw {
29*4882a593Smuzhiyun __u8 opcode;
30*4882a593Smuzhiyun __u8 flags;
31*4882a593Smuzhiyun __u16 command_id;
32*4882a593Smuzhiyun __le32 nsid;
33*4882a593Smuzhiyun __u64 rsvd2;
34*4882a593Smuzhiyun __le64 metadata;
35*4882a593Smuzhiyun __le64 prp1;
36*4882a593Smuzhiyun __le64 prp2;
37*4882a593Smuzhiyun __le64 spba;
38*4882a593Smuzhiyun __le16 length;
39*4882a593Smuzhiyun __le16 control;
40*4882a593Smuzhiyun __le32 dsmgmt;
41*4882a593Smuzhiyun __le64 resv;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun struct nvme_nvm_erase_blk {
45*4882a593Smuzhiyun __u8 opcode;
46*4882a593Smuzhiyun __u8 flags;
47*4882a593Smuzhiyun __u16 command_id;
48*4882a593Smuzhiyun __le32 nsid;
49*4882a593Smuzhiyun __u64 rsvd[2];
50*4882a593Smuzhiyun __le64 prp1;
51*4882a593Smuzhiyun __le64 prp2;
52*4882a593Smuzhiyun __le64 spba;
53*4882a593Smuzhiyun __le16 length;
54*4882a593Smuzhiyun __le16 control;
55*4882a593Smuzhiyun __le32 dsmgmt;
56*4882a593Smuzhiyun __le64 resv;
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun struct nvme_nvm_identity {
60*4882a593Smuzhiyun __u8 opcode;
61*4882a593Smuzhiyun __u8 flags;
62*4882a593Smuzhiyun __u16 command_id;
63*4882a593Smuzhiyun __le32 nsid;
64*4882a593Smuzhiyun __u64 rsvd[2];
65*4882a593Smuzhiyun __le64 prp1;
66*4882a593Smuzhiyun __le64 prp2;
67*4882a593Smuzhiyun __u32 rsvd11[6];
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun struct nvme_nvm_getbbtbl {
71*4882a593Smuzhiyun __u8 opcode;
72*4882a593Smuzhiyun __u8 flags;
73*4882a593Smuzhiyun __u16 command_id;
74*4882a593Smuzhiyun __le32 nsid;
75*4882a593Smuzhiyun __u64 rsvd[2];
76*4882a593Smuzhiyun __le64 prp1;
77*4882a593Smuzhiyun __le64 prp2;
78*4882a593Smuzhiyun __le64 spba;
79*4882a593Smuzhiyun __u32 rsvd4[4];
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun struct nvme_nvm_setbbtbl {
83*4882a593Smuzhiyun __u8 opcode;
84*4882a593Smuzhiyun __u8 flags;
85*4882a593Smuzhiyun __u16 command_id;
86*4882a593Smuzhiyun __le32 nsid;
87*4882a593Smuzhiyun __le64 rsvd[2];
88*4882a593Smuzhiyun __le64 prp1;
89*4882a593Smuzhiyun __le64 prp2;
90*4882a593Smuzhiyun __le64 spba;
91*4882a593Smuzhiyun __le16 nlb;
92*4882a593Smuzhiyun __u8 value;
93*4882a593Smuzhiyun __u8 rsvd3;
94*4882a593Smuzhiyun __u32 rsvd4[3];
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun struct nvme_nvm_command {
98*4882a593Smuzhiyun union {
99*4882a593Smuzhiyun struct nvme_common_command common;
100*4882a593Smuzhiyun struct nvme_nvm_ph_rw ph_rw;
101*4882a593Smuzhiyun struct nvme_nvm_erase_blk erase;
102*4882a593Smuzhiyun struct nvme_nvm_identity identity;
103*4882a593Smuzhiyun struct nvme_nvm_getbbtbl get_bb;
104*4882a593Smuzhiyun struct nvme_nvm_setbbtbl set_bb;
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun struct nvme_nvm_id12_grp {
109*4882a593Smuzhiyun __u8 mtype;
110*4882a593Smuzhiyun __u8 fmtype;
111*4882a593Smuzhiyun __le16 res16;
112*4882a593Smuzhiyun __u8 num_ch;
113*4882a593Smuzhiyun __u8 num_lun;
114*4882a593Smuzhiyun __u8 num_pln;
115*4882a593Smuzhiyun __u8 rsvd1;
116*4882a593Smuzhiyun __le16 num_chk;
117*4882a593Smuzhiyun __le16 num_pg;
118*4882a593Smuzhiyun __le16 fpg_sz;
119*4882a593Smuzhiyun __le16 csecs;
120*4882a593Smuzhiyun __le16 sos;
121*4882a593Smuzhiyun __le16 rsvd2;
122*4882a593Smuzhiyun __le32 trdt;
123*4882a593Smuzhiyun __le32 trdm;
124*4882a593Smuzhiyun __le32 tprt;
125*4882a593Smuzhiyun __le32 tprm;
126*4882a593Smuzhiyun __le32 tbet;
127*4882a593Smuzhiyun __le32 tbem;
128*4882a593Smuzhiyun __le32 mpos;
129*4882a593Smuzhiyun __le32 mccap;
130*4882a593Smuzhiyun __le16 cpar;
131*4882a593Smuzhiyun __u8 reserved[906];
132*4882a593Smuzhiyun } __packed;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun struct nvme_nvm_id12_addrf {
135*4882a593Smuzhiyun __u8 ch_offset;
136*4882a593Smuzhiyun __u8 ch_len;
137*4882a593Smuzhiyun __u8 lun_offset;
138*4882a593Smuzhiyun __u8 lun_len;
139*4882a593Smuzhiyun __u8 pln_offset;
140*4882a593Smuzhiyun __u8 pln_len;
141*4882a593Smuzhiyun __u8 blk_offset;
142*4882a593Smuzhiyun __u8 blk_len;
143*4882a593Smuzhiyun __u8 pg_offset;
144*4882a593Smuzhiyun __u8 pg_len;
145*4882a593Smuzhiyun __u8 sec_offset;
146*4882a593Smuzhiyun __u8 sec_len;
147*4882a593Smuzhiyun __u8 res[4];
148*4882a593Smuzhiyun } __packed;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun struct nvme_nvm_id12 {
151*4882a593Smuzhiyun __u8 ver_id;
152*4882a593Smuzhiyun __u8 vmnt;
153*4882a593Smuzhiyun __u8 cgrps;
154*4882a593Smuzhiyun __u8 res;
155*4882a593Smuzhiyun __le32 cap;
156*4882a593Smuzhiyun __le32 dom;
157*4882a593Smuzhiyun struct nvme_nvm_id12_addrf ppaf;
158*4882a593Smuzhiyun __u8 resv[228];
159*4882a593Smuzhiyun struct nvme_nvm_id12_grp grp;
160*4882a593Smuzhiyun __u8 resv2[2880];
161*4882a593Smuzhiyun } __packed;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun struct nvme_nvm_bb_tbl {
164*4882a593Smuzhiyun __u8 tblid[4];
165*4882a593Smuzhiyun __le16 verid;
166*4882a593Smuzhiyun __le16 revid;
167*4882a593Smuzhiyun __le32 rvsd1;
168*4882a593Smuzhiyun __le32 tblks;
169*4882a593Smuzhiyun __le32 tfact;
170*4882a593Smuzhiyun __le32 tgrown;
171*4882a593Smuzhiyun __le32 tdresv;
172*4882a593Smuzhiyun __le32 thresv;
173*4882a593Smuzhiyun __le32 rsvd2[8];
174*4882a593Smuzhiyun __u8 blk[];
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun struct nvme_nvm_id20_addrf {
178*4882a593Smuzhiyun __u8 grp_len;
179*4882a593Smuzhiyun __u8 pu_len;
180*4882a593Smuzhiyun __u8 chk_len;
181*4882a593Smuzhiyun __u8 lba_len;
182*4882a593Smuzhiyun __u8 resv[4];
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun struct nvme_nvm_id20 {
186*4882a593Smuzhiyun __u8 mjr;
187*4882a593Smuzhiyun __u8 mnr;
188*4882a593Smuzhiyun __u8 resv[6];
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun struct nvme_nvm_id20_addrf lbaf;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun __le32 mccap;
193*4882a593Smuzhiyun __u8 resv2[12];
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun __u8 wit;
196*4882a593Smuzhiyun __u8 resv3[31];
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /* Geometry */
199*4882a593Smuzhiyun __le16 num_grp;
200*4882a593Smuzhiyun __le16 num_pu;
201*4882a593Smuzhiyun __le32 num_chk;
202*4882a593Smuzhiyun __le32 clba;
203*4882a593Smuzhiyun __u8 resv4[52];
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* Write data requirements */
206*4882a593Smuzhiyun __le32 ws_min;
207*4882a593Smuzhiyun __le32 ws_opt;
208*4882a593Smuzhiyun __le32 mw_cunits;
209*4882a593Smuzhiyun __le32 maxoc;
210*4882a593Smuzhiyun __le32 maxocpu;
211*4882a593Smuzhiyun __u8 resv5[44];
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /* Performance related metrics */
214*4882a593Smuzhiyun __le32 trdt;
215*4882a593Smuzhiyun __le32 trdm;
216*4882a593Smuzhiyun __le32 twrt;
217*4882a593Smuzhiyun __le32 twrm;
218*4882a593Smuzhiyun __le32 tcrst;
219*4882a593Smuzhiyun __le32 tcrsm;
220*4882a593Smuzhiyun __u8 resv6[40];
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* Reserved area */
223*4882a593Smuzhiyun __u8 resv7[2816];
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* Vendor specific */
226*4882a593Smuzhiyun __u8 vs[1024];
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun struct nvme_nvm_chk_meta {
230*4882a593Smuzhiyun __u8 state;
231*4882a593Smuzhiyun __u8 type;
232*4882a593Smuzhiyun __u8 wi;
233*4882a593Smuzhiyun __u8 rsvd[5];
234*4882a593Smuzhiyun __le64 slba;
235*4882a593Smuzhiyun __le64 cnlb;
236*4882a593Smuzhiyun __le64 wp;
237*4882a593Smuzhiyun };
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /*
240*4882a593Smuzhiyun * Check we didn't inadvertently grow the command struct
241*4882a593Smuzhiyun */
_nvme_nvm_check_size(void)242*4882a593Smuzhiyun static inline void _nvme_nvm_check_size(void)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_identity) != 64);
245*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_ph_rw) != 64);
246*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_erase_blk) != 64);
247*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_getbbtbl) != 64);
248*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_setbbtbl) != 64);
249*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_id12_grp) != 960);
250*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_id12_addrf) != 16);
251*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_id12) != NVME_IDENTIFY_DATA_SIZE);
252*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_bb_tbl) != 64);
253*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_id20_addrf) != 8);
254*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_id20) != NVME_IDENTIFY_DATA_SIZE);
255*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_chk_meta) != 32);
256*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct nvme_nvm_chk_meta) !=
257*4882a593Smuzhiyun sizeof(struct nvm_chk_meta));
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
nvme_nvm_set_addr_12(struct nvm_addrf_12 * dst,struct nvme_nvm_id12_addrf * src)260*4882a593Smuzhiyun static void nvme_nvm_set_addr_12(struct nvm_addrf_12 *dst,
261*4882a593Smuzhiyun struct nvme_nvm_id12_addrf *src)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun dst->ch_len = src->ch_len;
264*4882a593Smuzhiyun dst->lun_len = src->lun_len;
265*4882a593Smuzhiyun dst->blk_len = src->blk_len;
266*4882a593Smuzhiyun dst->pg_len = src->pg_len;
267*4882a593Smuzhiyun dst->pln_len = src->pln_len;
268*4882a593Smuzhiyun dst->sec_len = src->sec_len;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun dst->ch_offset = src->ch_offset;
271*4882a593Smuzhiyun dst->lun_offset = src->lun_offset;
272*4882a593Smuzhiyun dst->blk_offset = src->blk_offset;
273*4882a593Smuzhiyun dst->pg_offset = src->pg_offset;
274*4882a593Smuzhiyun dst->pln_offset = src->pln_offset;
275*4882a593Smuzhiyun dst->sec_offset = src->sec_offset;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun dst->ch_mask = ((1ULL << dst->ch_len) - 1) << dst->ch_offset;
278*4882a593Smuzhiyun dst->lun_mask = ((1ULL << dst->lun_len) - 1) << dst->lun_offset;
279*4882a593Smuzhiyun dst->blk_mask = ((1ULL << dst->blk_len) - 1) << dst->blk_offset;
280*4882a593Smuzhiyun dst->pg_mask = ((1ULL << dst->pg_len) - 1) << dst->pg_offset;
281*4882a593Smuzhiyun dst->pln_mask = ((1ULL << dst->pln_len) - 1) << dst->pln_offset;
282*4882a593Smuzhiyun dst->sec_mask = ((1ULL << dst->sec_len) - 1) << dst->sec_offset;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
nvme_nvm_setup_12(struct nvme_nvm_id12 * id,struct nvm_geo * geo)285*4882a593Smuzhiyun static int nvme_nvm_setup_12(struct nvme_nvm_id12 *id,
286*4882a593Smuzhiyun struct nvm_geo *geo)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun struct nvme_nvm_id12_grp *src;
289*4882a593Smuzhiyun int sec_per_pg, sec_per_pl, pg_per_blk;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (id->cgrps != 1)
292*4882a593Smuzhiyun return -EINVAL;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun src = &id->grp;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun if (src->mtype != 0) {
297*4882a593Smuzhiyun pr_err("nvm: memory type not supported\n");
298*4882a593Smuzhiyun return -EINVAL;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun /* 1.2 spec. only reports a single version id - unfold */
302*4882a593Smuzhiyun geo->major_ver_id = id->ver_id;
303*4882a593Smuzhiyun geo->minor_ver_id = 2;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun /* Set compacted version for upper layers */
306*4882a593Smuzhiyun geo->version = NVM_OCSSD_SPEC_12;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun geo->num_ch = src->num_ch;
309*4882a593Smuzhiyun geo->num_lun = src->num_lun;
310*4882a593Smuzhiyun geo->all_luns = geo->num_ch * geo->num_lun;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun geo->num_chk = le16_to_cpu(src->num_chk);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun geo->csecs = le16_to_cpu(src->csecs);
315*4882a593Smuzhiyun geo->sos = le16_to_cpu(src->sos);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun pg_per_blk = le16_to_cpu(src->num_pg);
318*4882a593Smuzhiyun sec_per_pg = le16_to_cpu(src->fpg_sz) / geo->csecs;
319*4882a593Smuzhiyun sec_per_pl = sec_per_pg * src->num_pln;
320*4882a593Smuzhiyun geo->clba = sec_per_pl * pg_per_blk;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun geo->all_chunks = geo->all_luns * geo->num_chk;
323*4882a593Smuzhiyun geo->total_secs = geo->clba * geo->all_chunks;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun geo->ws_min = sec_per_pg;
326*4882a593Smuzhiyun geo->ws_opt = sec_per_pg;
327*4882a593Smuzhiyun geo->mw_cunits = geo->ws_opt << 3; /* default to MLC safe values */
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun /* Do not impose values for maximum number of open blocks as it is
330*4882a593Smuzhiyun * unspecified in 1.2. Users of 1.2 must be aware of this and eventually
331*4882a593Smuzhiyun * specify these values through a quirk if restrictions apply.
332*4882a593Smuzhiyun */
333*4882a593Smuzhiyun geo->maxoc = geo->all_luns * geo->num_chk;
334*4882a593Smuzhiyun geo->maxocpu = geo->num_chk;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun geo->mccap = le32_to_cpu(src->mccap);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun geo->trdt = le32_to_cpu(src->trdt);
339*4882a593Smuzhiyun geo->trdm = le32_to_cpu(src->trdm);
340*4882a593Smuzhiyun geo->tprt = le32_to_cpu(src->tprt);
341*4882a593Smuzhiyun geo->tprm = le32_to_cpu(src->tprm);
342*4882a593Smuzhiyun geo->tbet = le32_to_cpu(src->tbet);
343*4882a593Smuzhiyun geo->tbem = le32_to_cpu(src->tbem);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* 1.2 compatibility */
346*4882a593Smuzhiyun geo->vmnt = id->vmnt;
347*4882a593Smuzhiyun geo->cap = le32_to_cpu(id->cap);
348*4882a593Smuzhiyun geo->dom = le32_to_cpu(id->dom);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun geo->mtype = src->mtype;
351*4882a593Smuzhiyun geo->fmtype = src->fmtype;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun geo->cpar = le16_to_cpu(src->cpar);
354*4882a593Smuzhiyun geo->mpos = le32_to_cpu(src->mpos);
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun geo->pln_mode = NVM_PLANE_SINGLE;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun if (geo->mpos & 0x020202) {
359*4882a593Smuzhiyun geo->pln_mode = NVM_PLANE_DOUBLE;
360*4882a593Smuzhiyun geo->ws_opt <<= 1;
361*4882a593Smuzhiyun } else if (geo->mpos & 0x040404) {
362*4882a593Smuzhiyun geo->pln_mode = NVM_PLANE_QUAD;
363*4882a593Smuzhiyun geo->ws_opt <<= 2;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun geo->num_pln = src->num_pln;
367*4882a593Smuzhiyun geo->num_pg = le16_to_cpu(src->num_pg);
368*4882a593Smuzhiyun geo->fpg_sz = le16_to_cpu(src->fpg_sz);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun nvme_nvm_set_addr_12((struct nvm_addrf_12 *)&geo->addrf, &id->ppaf);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun return 0;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
nvme_nvm_set_addr_20(struct nvm_addrf * dst,struct nvme_nvm_id20_addrf * src)375*4882a593Smuzhiyun static void nvme_nvm_set_addr_20(struct nvm_addrf *dst,
376*4882a593Smuzhiyun struct nvme_nvm_id20_addrf *src)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun dst->ch_len = src->grp_len;
379*4882a593Smuzhiyun dst->lun_len = src->pu_len;
380*4882a593Smuzhiyun dst->chk_len = src->chk_len;
381*4882a593Smuzhiyun dst->sec_len = src->lba_len;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun dst->sec_offset = 0;
384*4882a593Smuzhiyun dst->chk_offset = dst->sec_len;
385*4882a593Smuzhiyun dst->lun_offset = dst->chk_offset + dst->chk_len;
386*4882a593Smuzhiyun dst->ch_offset = dst->lun_offset + dst->lun_len;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun dst->ch_mask = ((1ULL << dst->ch_len) - 1) << dst->ch_offset;
389*4882a593Smuzhiyun dst->lun_mask = ((1ULL << dst->lun_len) - 1) << dst->lun_offset;
390*4882a593Smuzhiyun dst->chk_mask = ((1ULL << dst->chk_len) - 1) << dst->chk_offset;
391*4882a593Smuzhiyun dst->sec_mask = ((1ULL << dst->sec_len) - 1) << dst->sec_offset;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
nvme_nvm_setup_20(struct nvme_nvm_id20 * id,struct nvm_geo * geo)394*4882a593Smuzhiyun static int nvme_nvm_setup_20(struct nvme_nvm_id20 *id,
395*4882a593Smuzhiyun struct nvm_geo *geo)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun geo->major_ver_id = id->mjr;
398*4882a593Smuzhiyun geo->minor_ver_id = id->mnr;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun /* Set compacted version for upper layers */
401*4882a593Smuzhiyun geo->version = NVM_OCSSD_SPEC_20;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun geo->num_ch = le16_to_cpu(id->num_grp);
404*4882a593Smuzhiyun geo->num_lun = le16_to_cpu(id->num_pu);
405*4882a593Smuzhiyun geo->all_luns = geo->num_ch * geo->num_lun;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun geo->num_chk = le32_to_cpu(id->num_chk);
408*4882a593Smuzhiyun geo->clba = le32_to_cpu(id->clba);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun geo->all_chunks = geo->all_luns * geo->num_chk;
411*4882a593Smuzhiyun geo->total_secs = geo->clba * geo->all_chunks;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun geo->ws_min = le32_to_cpu(id->ws_min);
414*4882a593Smuzhiyun geo->ws_opt = le32_to_cpu(id->ws_opt);
415*4882a593Smuzhiyun geo->mw_cunits = le32_to_cpu(id->mw_cunits);
416*4882a593Smuzhiyun geo->maxoc = le32_to_cpu(id->maxoc);
417*4882a593Smuzhiyun geo->maxocpu = le32_to_cpu(id->maxocpu);
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun geo->trdt = le32_to_cpu(id->trdt);
420*4882a593Smuzhiyun geo->trdm = le32_to_cpu(id->trdm);
421*4882a593Smuzhiyun geo->tprt = le32_to_cpu(id->twrt);
422*4882a593Smuzhiyun geo->tprm = le32_to_cpu(id->twrm);
423*4882a593Smuzhiyun geo->tbet = le32_to_cpu(id->tcrst);
424*4882a593Smuzhiyun geo->tbem = le32_to_cpu(id->tcrsm);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun nvme_nvm_set_addr_20(&geo->addrf, &id->lbaf);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun return 0;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun
nvme_nvm_identity(struct nvm_dev * nvmdev)431*4882a593Smuzhiyun static int nvme_nvm_identity(struct nvm_dev *nvmdev)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun struct nvme_ns *ns = nvmdev->q->queuedata;
434*4882a593Smuzhiyun struct nvme_nvm_id12 *id;
435*4882a593Smuzhiyun struct nvme_nvm_command c = {};
436*4882a593Smuzhiyun int ret;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun c.identity.opcode = nvme_nvm_admin_identity;
439*4882a593Smuzhiyun c.identity.nsid = cpu_to_le32(ns->head->ns_id);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun id = kmalloc(sizeof(struct nvme_nvm_id12), GFP_KERNEL);
442*4882a593Smuzhiyun if (!id)
443*4882a593Smuzhiyun return -ENOMEM;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, (struct nvme_command *)&c,
446*4882a593Smuzhiyun id, sizeof(struct nvme_nvm_id12));
447*4882a593Smuzhiyun if (ret) {
448*4882a593Smuzhiyun ret = -EIO;
449*4882a593Smuzhiyun goto out;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /*
453*4882a593Smuzhiyun * The 1.2 and 2.0 specifications share the first byte in their geometry
454*4882a593Smuzhiyun * command to make it possible to know what version a device implements.
455*4882a593Smuzhiyun */
456*4882a593Smuzhiyun switch (id->ver_id) {
457*4882a593Smuzhiyun case 1:
458*4882a593Smuzhiyun ret = nvme_nvm_setup_12(id, &nvmdev->geo);
459*4882a593Smuzhiyun break;
460*4882a593Smuzhiyun case 2:
461*4882a593Smuzhiyun ret = nvme_nvm_setup_20((struct nvme_nvm_id20 *)id,
462*4882a593Smuzhiyun &nvmdev->geo);
463*4882a593Smuzhiyun break;
464*4882a593Smuzhiyun default:
465*4882a593Smuzhiyun dev_err(ns->ctrl->device, "OCSSD revision not supported (%d)\n",
466*4882a593Smuzhiyun id->ver_id);
467*4882a593Smuzhiyun ret = -EINVAL;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun out:
471*4882a593Smuzhiyun kfree(id);
472*4882a593Smuzhiyun return ret;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
nvme_nvm_get_bb_tbl(struct nvm_dev * nvmdev,struct ppa_addr ppa,u8 * blks)475*4882a593Smuzhiyun static int nvme_nvm_get_bb_tbl(struct nvm_dev *nvmdev, struct ppa_addr ppa,
476*4882a593Smuzhiyun u8 *blks)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun struct request_queue *q = nvmdev->q;
479*4882a593Smuzhiyun struct nvm_geo *geo = &nvmdev->geo;
480*4882a593Smuzhiyun struct nvme_ns *ns = q->queuedata;
481*4882a593Smuzhiyun struct nvme_ctrl *ctrl = ns->ctrl;
482*4882a593Smuzhiyun struct nvme_nvm_command c = {};
483*4882a593Smuzhiyun struct nvme_nvm_bb_tbl *bb_tbl;
484*4882a593Smuzhiyun int nr_blks = geo->num_chk * geo->num_pln;
485*4882a593Smuzhiyun int tblsz = sizeof(struct nvme_nvm_bb_tbl) + nr_blks;
486*4882a593Smuzhiyun int ret = 0;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun c.get_bb.opcode = nvme_nvm_admin_get_bb_tbl;
489*4882a593Smuzhiyun c.get_bb.nsid = cpu_to_le32(ns->head->ns_id);
490*4882a593Smuzhiyun c.get_bb.spba = cpu_to_le64(ppa.ppa);
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun bb_tbl = kzalloc(tblsz, GFP_KERNEL);
493*4882a593Smuzhiyun if (!bb_tbl)
494*4882a593Smuzhiyun return -ENOMEM;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun ret = nvme_submit_sync_cmd(ctrl->admin_q, (struct nvme_command *)&c,
497*4882a593Smuzhiyun bb_tbl, tblsz);
498*4882a593Smuzhiyun if (ret) {
499*4882a593Smuzhiyun dev_err(ctrl->device, "get bad block table failed (%d)\n", ret);
500*4882a593Smuzhiyun ret = -EIO;
501*4882a593Smuzhiyun goto out;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun if (bb_tbl->tblid[0] != 'B' || bb_tbl->tblid[1] != 'B' ||
505*4882a593Smuzhiyun bb_tbl->tblid[2] != 'L' || bb_tbl->tblid[3] != 'T') {
506*4882a593Smuzhiyun dev_err(ctrl->device, "bbt format mismatch\n");
507*4882a593Smuzhiyun ret = -EINVAL;
508*4882a593Smuzhiyun goto out;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun if (le16_to_cpu(bb_tbl->verid) != 1) {
512*4882a593Smuzhiyun ret = -EINVAL;
513*4882a593Smuzhiyun dev_err(ctrl->device, "bbt version not supported\n");
514*4882a593Smuzhiyun goto out;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun if (le32_to_cpu(bb_tbl->tblks) != nr_blks) {
518*4882a593Smuzhiyun ret = -EINVAL;
519*4882a593Smuzhiyun dev_err(ctrl->device,
520*4882a593Smuzhiyun "bbt unsuspected blocks returned (%u!=%u)",
521*4882a593Smuzhiyun le32_to_cpu(bb_tbl->tblks), nr_blks);
522*4882a593Smuzhiyun goto out;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun memcpy(blks, bb_tbl->blk, geo->num_chk * geo->num_pln);
526*4882a593Smuzhiyun out:
527*4882a593Smuzhiyun kfree(bb_tbl);
528*4882a593Smuzhiyun return ret;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun
nvme_nvm_set_bb_tbl(struct nvm_dev * nvmdev,struct ppa_addr * ppas,int nr_ppas,int type)531*4882a593Smuzhiyun static int nvme_nvm_set_bb_tbl(struct nvm_dev *nvmdev, struct ppa_addr *ppas,
532*4882a593Smuzhiyun int nr_ppas, int type)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun struct nvme_ns *ns = nvmdev->q->queuedata;
535*4882a593Smuzhiyun struct nvme_nvm_command c = {};
536*4882a593Smuzhiyun int ret = 0;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun c.set_bb.opcode = nvme_nvm_admin_set_bb_tbl;
539*4882a593Smuzhiyun c.set_bb.nsid = cpu_to_le32(ns->head->ns_id);
540*4882a593Smuzhiyun c.set_bb.spba = cpu_to_le64(ppas->ppa);
541*4882a593Smuzhiyun c.set_bb.nlb = cpu_to_le16(nr_ppas - 1);
542*4882a593Smuzhiyun c.set_bb.value = type;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, (struct nvme_command *)&c,
545*4882a593Smuzhiyun NULL, 0);
546*4882a593Smuzhiyun if (ret)
547*4882a593Smuzhiyun dev_err(ns->ctrl->device, "set bad block table failed (%d)\n",
548*4882a593Smuzhiyun ret);
549*4882a593Smuzhiyun return ret;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun /*
553*4882a593Smuzhiyun * Expect the lba in device format
554*4882a593Smuzhiyun */
nvme_nvm_get_chk_meta(struct nvm_dev * ndev,sector_t slba,int nchks,struct nvm_chk_meta * meta)555*4882a593Smuzhiyun static int nvme_nvm_get_chk_meta(struct nvm_dev *ndev,
556*4882a593Smuzhiyun sector_t slba, int nchks,
557*4882a593Smuzhiyun struct nvm_chk_meta *meta)
558*4882a593Smuzhiyun {
559*4882a593Smuzhiyun struct nvm_geo *geo = &ndev->geo;
560*4882a593Smuzhiyun struct nvme_ns *ns = ndev->q->queuedata;
561*4882a593Smuzhiyun struct nvme_ctrl *ctrl = ns->ctrl;
562*4882a593Smuzhiyun struct nvme_nvm_chk_meta *dev_meta, *dev_meta_off;
563*4882a593Smuzhiyun struct ppa_addr ppa;
564*4882a593Smuzhiyun size_t left = nchks * sizeof(struct nvme_nvm_chk_meta);
565*4882a593Smuzhiyun size_t log_pos, offset, len;
566*4882a593Smuzhiyun int i, max_len;
567*4882a593Smuzhiyun int ret = 0;
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun /*
570*4882a593Smuzhiyun * limit requests to maximum 256K to avoid issuing arbitrary large
571*4882a593Smuzhiyun * requests when the device does not specific a maximum transfer size.
572*4882a593Smuzhiyun */
573*4882a593Smuzhiyun max_len = min_t(unsigned int, ctrl->max_hw_sectors << 9, 256 * 1024);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun dev_meta = kmalloc(max_len, GFP_KERNEL);
576*4882a593Smuzhiyun if (!dev_meta)
577*4882a593Smuzhiyun return -ENOMEM;
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun /* Normalize lba address space to obtain log offset */
580*4882a593Smuzhiyun ppa.ppa = slba;
581*4882a593Smuzhiyun ppa = dev_to_generic_addr(ndev, ppa);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun log_pos = ppa.m.chk;
584*4882a593Smuzhiyun log_pos += ppa.m.pu * geo->num_chk;
585*4882a593Smuzhiyun log_pos += ppa.m.grp * geo->num_lun * geo->num_chk;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun offset = log_pos * sizeof(struct nvme_nvm_chk_meta);
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun while (left) {
590*4882a593Smuzhiyun len = min_t(unsigned int, left, max_len);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun memset(dev_meta, 0, max_len);
593*4882a593Smuzhiyun dev_meta_off = dev_meta;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun ret = nvme_get_log(ctrl, ns->head->ns_id,
596*4882a593Smuzhiyun NVME_NVM_LOG_REPORT_CHUNK, 0, NVME_CSI_NVM,
597*4882a593Smuzhiyun dev_meta, len, offset);
598*4882a593Smuzhiyun if (ret) {
599*4882a593Smuzhiyun dev_err(ctrl->device, "Get REPORT CHUNK log error\n");
600*4882a593Smuzhiyun break;
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun for (i = 0; i < len; i += sizeof(struct nvme_nvm_chk_meta)) {
604*4882a593Smuzhiyun meta->state = dev_meta_off->state;
605*4882a593Smuzhiyun meta->type = dev_meta_off->type;
606*4882a593Smuzhiyun meta->wi = dev_meta_off->wi;
607*4882a593Smuzhiyun meta->slba = le64_to_cpu(dev_meta_off->slba);
608*4882a593Smuzhiyun meta->cnlb = le64_to_cpu(dev_meta_off->cnlb);
609*4882a593Smuzhiyun meta->wp = le64_to_cpu(dev_meta_off->wp);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun meta++;
612*4882a593Smuzhiyun dev_meta_off++;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun offset += len;
616*4882a593Smuzhiyun left -= len;
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun kfree(dev_meta);
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun return ret;
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun
nvme_nvm_rqtocmd(struct nvm_rq * rqd,struct nvme_ns * ns,struct nvme_nvm_command * c)624*4882a593Smuzhiyun static inline void nvme_nvm_rqtocmd(struct nvm_rq *rqd, struct nvme_ns *ns,
625*4882a593Smuzhiyun struct nvme_nvm_command *c)
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun c->ph_rw.opcode = rqd->opcode;
628*4882a593Smuzhiyun c->ph_rw.nsid = cpu_to_le32(ns->head->ns_id);
629*4882a593Smuzhiyun c->ph_rw.spba = cpu_to_le64(rqd->ppa_addr.ppa);
630*4882a593Smuzhiyun c->ph_rw.metadata = cpu_to_le64(rqd->dma_meta_list);
631*4882a593Smuzhiyun c->ph_rw.control = cpu_to_le16(rqd->flags);
632*4882a593Smuzhiyun c->ph_rw.length = cpu_to_le16(rqd->nr_ppas - 1);
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
nvme_nvm_end_io(struct request * rq,blk_status_t status)635*4882a593Smuzhiyun static void nvme_nvm_end_io(struct request *rq, blk_status_t status)
636*4882a593Smuzhiyun {
637*4882a593Smuzhiyun struct nvm_rq *rqd = rq->end_io_data;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun rqd->ppa_status = le64_to_cpu(nvme_req(rq)->result.u64);
640*4882a593Smuzhiyun rqd->error = nvme_req(rq)->status;
641*4882a593Smuzhiyun nvm_end_io(rqd);
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun kfree(nvme_req(rq)->cmd);
644*4882a593Smuzhiyun blk_mq_free_request(rq);
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
nvme_nvm_alloc_request(struct request_queue * q,struct nvm_rq * rqd,struct nvme_nvm_command * cmd)647*4882a593Smuzhiyun static struct request *nvme_nvm_alloc_request(struct request_queue *q,
648*4882a593Smuzhiyun struct nvm_rq *rqd,
649*4882a593Smuzhiyun struct nvme_nvm_command *cmd)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun struct nvme_ns *ns = q->queuedata;
652*4882a593Smuzhiyun struct request *rq;
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun nvme_nvm_rqtocmd(rqd, ns, cmd);
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun rq = nvme_alloc_request(q, (struct nvme_command *)cmd, 0);
657*4882a593Smuzhiyun if (IS_ERR(rq))
658*4882a593Smuzhiyun return rq;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun rq->cmd_flags &= ~REQ_FAILFAST_DRIVER;
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun if (rqd->bio)
663*4882a593Smuzhiyun blk_rq_append_bio(rq, &rqd->bio);
664*4882a593Smuzhiyun else
665*4882a593Smuzhiyun rq->ioprio = IOPRIO_PRIO_VALUE(IOPRIO_CLASS_BE, IOPRIO_NORM);
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun return rq;
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun
nvme_nvm_submit_io(struct nvm_dev * dev,struct nvm_rq * rqd,void * buf)670*4882a593Smuzhiyun static int nvme_nvm_submit_io(struct nvm_dev *dev, struct nvm_rq *rqd,
671*4882a593Smuzhiyun void *buf)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun struct nvm_geo *geo = &dev->geo;
674*4882a593Smuzhiyun struct request_queue *q = dev->q;
675*4882a593Smuzhiyun struct nvme_nvm_command *cmd;
676*4882a593Smuzhiyun struct request *rq;
677*4882a593Smuzhiyun int ret;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun cmd = kzalloc(sizeof(struct nvme_nvm_command), GFP_KERNEL);
680*4882a593Smuzhiyun if (!cmd)
681*4882a593Smuzhiyun return -ENOMEM;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun rq = nvme_nvm_alloc_request(q, rqd, cmd);
684*4882a593Smuzhiyun if (IS_ERR(rq)) {
685*4882a593Smuzhiyun ret = PTR_ERR(rq);
686*4882a593Smuzhiyun goto err_free_cmd;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun if (buf) {
690*4882a593Smuzhiyun ret = blk_rq_map_kern(q, rq, buf, geo->csecs * rqd->nr_ppas,
691*4882a593Smuzhiyun GFP_KERNEL);
692*4882a593Smuzhiyun if (ret)
693*4882a593Smuzhiyun goto err_free_cmd;
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun rq->end_io_data = rqd;
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun blk_execute_rq_nowait(q, NULL, rq, 0, nvme_nvm_end_io);
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun return 0;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun err_free_cmd:
703*4882a593Smuzhiyun kfree(cmd);
704*4882a593Smuzhiyun return ret;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun
nvme_nvm_create_dma_pool(struct nvm_dev * nvmdev,char * name,int size)707*4882a593Smuzhiyun static void *nvme_nvm_create_dma_pool(struct nvm_dev *nvmdev, char *name,
708*4882a593Smuzhiyun int size)
709*4882a593Smuzhiyun {
710*4882a593Smuzhiyun struct nvme_ns *ns = nvmdev->q->queuedata;
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun return dma_pool_create(name, ns->ctrl->dev, size, PAGE_SIZE, 0);
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun
nvme_nvm_destroy_dma_pool(void * pool)715*4882a593Smuzhiyun static void nvme_nvm_destroy_dma_pool(void *pool)
716*4882a593Smuzhiyun {
717*4882a593Smuzhiyun struct dma_pool *dma_pool = pool;
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun dma_pool_destroy(dma_pool);
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun
nvme_nvm_dev_dma_alloc(struct nvm_dev * dev,void * pool,gfp_t mem_flags,dma_addr_t * dma_handler)722*4882a593Smuzhiyun static void *nvme_nvm_dev_dma_alloc(struct nvm_dev *dev, void *pool,
723*4882a593Smuzhiyun gfp_t mem_flags, dma_addr_t *dma_handler)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun return dma_pool_alloc(pool, mem_flags, dma_handler);
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
nvme_nvm_dev_dma_free(void * pool,void * addr,dma_addr_t dma_handler)728*4882a593Smuzhiyun static void nvme_nvm_dev_dma_free(void *pool, void *addr,
729*4882a593Smuzhiyun dma_addr_t dma_handler)
730*4882a593Smuzhiyun {
731*4882a593Smuzhiyun dma_pool_free(pool, addr, dma_handler);
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun static struct nvm_dev_ops nvme_nvm_dev_ops = {
735*4882a593Smuzhiyun .identity = nvme_nvm_identity,
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun .get_bb_tbl = nvme_nvm_get_bb_tbl,
738*4882a593Smuzhiyun .set_bb_tbl = nvme_nvm_set_bb_tbl,
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun .get_chk_meta = nvme_nvm_get_chk_meta,
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun .submit_io = nvme_nvm_submit_io,
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun .create_dma_pool = nvme_nvm_create_dma_pool,
745*4882a593Smuzhiyun .destroy_dma_pool = nvme_nvm_destroy_dma_pool,
746*4882a593Smuzhiyun .dev_dma_alloc = nvme_nvm_dev_dma_alloc,
747*4882a593Smuzhiyun .dev_dma_free = nvme_nvm_dev_dma_free,
748*4882a593Smuzhiyun };
749*4882a593Smuzhiyun
nvme_nvm_submit_user_cmd(struct request_queue * q,struct nvme_ns * ns,struct nvme_nvm_command * vcmd,void __user * ubuf,unsigned int bufflen,void __user * meta_buf,unsigned int meta_len,void __user * ppa_buf,unsigned int ppa_len,u32 * result,u64 * status,unsigned int timeout)750*4882a593Smuzhiyun static int nvme_nvm_submit_user_cmd(struct request_queue *q,
751*4882a593Smuzhiyun struct nvme_ns *ns,
752*4882a593Smuzhiyun struct nvme_nvm_command *vcmd,
753*4882a593Smuzhiyun void __user *ubuf, unsigned int bufflen,
754*4882a593Smuzhiyun void __user *meta_buf, unsigned int meta_len,
755*4882a593Smuzhiyun void __user *ppa_buf, unsigned int ppa_len,
756*4882a593Smuzhiyun u32 *result, u64 *status, unsigned int timeout)
757*4882a593Smuzhiyun {
758*4882a593Smuzhiyun bool write = nvme_is_write((struct nvme_command *)vcmd);
759*4882a593Smuzhiyun struct nvm_dev *dev = ns->ndev;
760*4882a593Smuzhiyun struct gendisk *disk = ns->disk;
761*4882a593Smuzhiyun struct request *rq;
762*4882a593Smuzhiyun struct bio *bio = NULL;
763*4882a593Smuzhiyun __le64 *ppa_list = NULL;
764*4882a593Smuzhiyun dma_addr_t ppa_dma;
765*4882a593Smuzhiyun __le64 *metadata = NULL;
766*4882a593Smuzhiyun dma_addr_t metadata_dma;
767*4882a593Smuzhiyun DECLARE_COMPLETION_ONSTACK(wait);
768*4882a593Smuzhiyun int ret = 0;
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun rq = nvme_alloc_request(q, (struct nvme_command *)vcmd, 0);
771*4882a593Smuzhiyun if (IS_ERR(rq)) {
772*4882a593Smuzhiyun ret = -ENOMEM;
773*4882a593Smuzhiyun goto err_cmd;
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun if (timeout)
777*4882a593Smuzhiyun rq->timeout = timeout;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun if (ppa_buf && ppa_len) {
780*4882a593Smuzhiyun ppa_list = dma_pool_alloc(dev->dma_pool, GFP_KERNEL, &ppa_dma);
781*4882a593Smuzhiyun if (!ppa_list) {
782*4882a593Smuzhiyun ret = -ENOMEM;
783*4882a593Smuzhiyun goto err_rq;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun if (copy_from_user(ppa_list, (void __user *)ppa_buf,
786*4882a593Smuzhiyun sizeof(u64) * (ppa_len + 1))) {
787*4882a593Smuzhiyun ret = -EFAULT;
788*4882a593Smuzhiyun goto err_ppa;
789*4882a593Smuzhiyun }
790*4882a593Smuzhiyun vcmd->ph_rw.spba = cpu_to_le64(ppa_dma);
791*4882a593Smuzhiyun } else {
792*4882a593Smuzhiyun vcmd->ph_rw.spba = cpu_to_le64((uintptr_t)ppa_buf);
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun if (ubuf && bufflen) {
796*4882a593Smuzhiyun ret = blk_rq_map_user(q, rq, NULL, ubuf, bufflen, GFP_KERNEL);
797*4882a593Smuzhiyun if (ret)
798*4882a593Smuzhiyun goto err_ppa;
799*4882a593Smuzhiyun bio = rq->bio;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun if (meta_buf && meta_len) {
802*4882a593Smuzhiyun metadata = dma_pool_alloc(dev->dma_pool, GFP_KERNEL,
803*4882a593Smuzhiyun &metadata_dma);
804*4882a593Smuzhiyun if (!metadata) {
805*4882a593Smuzhiyun ret = -ENOMEM;
806*4882a593Smuzhiyun goto err_map;
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun if (write) {
810*4882a593Smuzhiyun if (copy_from_user(metadata,
811*4882a593Smuzhiyun (void __user *)meta_buf,
812*4882a593Smuzhiyun meta_len)) {
813*4882a593Smuzhiyun ret = -EFAULT;
814*4882a593Smuzhiyun goto err_meta;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun vcmd->ph_rw.metadata = cpu_to_le64(metadata_dma);
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun bio->bi_disk = disk;
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun blk_execute_rq(q, NULL, rq, 0);
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
826*4882a593Smuzhiyun ret = -EINTR;
827*4882a593Smuzhiyun else if (nvme_req(rq)->status & 0x7ff)
828*4882a593Smuzhiyun ret = -EIO;
829*4882a593Smuzhiyun if (result)
830*4882a593Smuzhiyun *result = nvme_req(rq)->status & 0x7ff;
831*4882a593Smuzhiyun if (status)
832*4882a593Smuzhiyun *status = le64_to_cpu(nvme_req(rq)->result.u64);
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun if (metadata && !ret && !write) {
835*4882a593Smuzhiyun if (copy_to_user(meta_buf, (void *)metadata, meta_len))
836*4882a593Smuzhiyun ret = -EFAULT;
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun err_meta:
839*4882a593Smuzhiyun if (meta_buf && meta_len)
840*4882a593Smuzhiyun dma_pool_free(dev->dma_pool, metadata, metadata_dma);
841*4882a593Smuzhiyun err_map:
842*4882a593Smuzhiyun if (bio)
843*4882a593Smuzhiyun blk_rq_unmap_user(bio);
844*4882a593Smuzhiyun err_ppa:
845*4882a593Smuzhiyun if (ppa_buf && ppa_len)
846*4882a593Smuzhiyun dma_pool_free(dev->dma_pool, ppa_list, ppa_dma);
847*4882a593Smuzhiyun err_rq:
848*4882a593Smuzhiyun blk_mq_free_request(rq);
849*4882a593Smuzhiyun err_cmd:
850*4882a593Smuzhiyun return ret;
851*4882a593Smuzhiyun }
852*4882a593Smuzhiyun
nvme_nvm_submit_vio(struct nvme_ns * ns,struct nvm_user_vio __user * uvio)853*4882a593Smuzhiyun static int nvme_nvm_submit_vio(struct nvme_ns *ns,
854*4882a593Smuzhiyun struct nvm_user_vio __user *uvio)
855*4882a593Smuzhiyun {
856*4882a593Smuzhiyun struct nvm_user_vio vio;
857*4882a593Smuzhiyun struct nvme_nvm_command c;
858*4882a593Smuzhiyun unsigned int length;
859*4882a593Smuzhiyun int ret;
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun if (copy_from_user(&vio, uvio, sizeof(vio)))
862*4882a593Smuzhiyun return -EFAULT;
863*4882a593Smuzhiyun if (vio.flags)
864*4882a593Smuzhiyun return -EINVAL;
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun memset(&c, 0, sizeof(c));
867*4882a593Smuzhiyun c.ph_rw.opcode = vio.opcode;
868*4882a593Smuzhiyun c.ph_rw.nsid = cpu_to_le32(ns->head->ns_id);
869*4882a593Smuzhiyun c.ph_rw.control = cpu_to_le16(vio.control);
870*4882a593Smuzhiyun c.ph_rw.length = cpu_to_le16(vio.nppas);
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun length = (vio.nppas + 1) << ns->lba_shift;
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun ret = nvme_nvm_submit_user_cmd(ns->queue, ns, &c,
875*4882a593Smuzhiyun (void __user *)(uintptr_t)vio.addr, length,
876*4882a593Smuzhiyun (void __user *)(uintptr_t)vio.metadata,
877*4882a593Smuzhiyun vio.metadata_len,
878*4882a593Smuzhiyun (void __user *)(uintptr_t)vio.ppa_list, vio.nppas,
879*4882a593Smuzhiyun &vio.result, &vio.status, 0);
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun if (ret && copy_to_user(uvio, &vio, sizeof(vio)))
882*4882a593Smuzhiyun return -EFAULT;
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun return ret;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun
nvme_nvm_user_vcmd(struct nvme_ns * ns,int admin,struct nvm_passthru_vio __user * uvcmd)887*4882a593Smuzhiyun static int nvme_nvm_user_vcmd(struct nvme_ns *ns, int admin,
888*4882a593Smuzhiyun struct nvm_passthru_vio __user *uvcmd)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun struct nvm_passthru_vio vcmd;
891*4882a593Smuzhiyun struct nvme_nvm_command c;
892*4882a593Smuzhiyun struct request_queue *q;
893*4882a593Smuzhiyun unsigned int timeout = 0;
894*4882a593Smuzhiyun int ret;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun if (copy_from_user(&vcmd, uvcmd, sizeof(vcmd)))
897*4882a593Smuzhiyun return -EFAULT;
898*4882a593Smuzhiyun if ((vcmd.opcode != 0xF2) && (!capable(CAP_SYS_ADMIN)))
899*4882a593Smuzhiyun return -EACCES;
900*4882a593Smuzhiyun if (vcmd.flags)
901*4882a593Smuzhiyun return -EINVAL;
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun memset(&c, 0, sizeof(c));
904*4882a593Smuzhiyun c.common.opcode = vcmd.opcode;
905*4882a593Smuzhiyun c.common.nsid = cpu_to_le32(ns->head->ns_id);
906*4882a593Smuzhiyun c.common.cdw2[0] = cpu_to_le32(vcmd.cdw2);
907*4882a593Smuzhiyun c.common.cdw2[1] = cpu_to_le32(vcmd.cdw3);
908*4882a593Smuzhiyun /* cdw11-12 */
909*4882a593Smuzhiyun c.ph_rw.length = cpu_to_le16(vcmd.nppas);
910*4882a593Smuzhiyun c.ph_rw.control = cpu_to_le16(vcmd.control);
911*4882a593Smuzhiyun c.common.cdw13 = cpu_to_le32(vcmd.cdw13);
912*4882a593Smuzhiyun c.common.cdw14 = cpu_to_le32(vcmd.cdw14);
913*4882a593Smuzhiyun c.common.cdw15 = cpu_to_le32(vcmd.cdw15);
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun if (vcmd.timeout_ms)
916*4882a593Smuzhiyun timeout = msecs_to_jiffies(vcmd.timeout_ms);
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun q = admin ? ns->ctrl->admin_q : ns->queue;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun ret = nvme_nvm_submit_user_cmd(q, ns,
921*4882a593Smuzhiyun (struct nvme_nvm_command *)&c,
922*4882a593Smuzhiyun (void __user *)(uintptr_t)vcmd.addr, vcmd.data_len,
923*4882a593Smuzhiyun (void __user *)(uintptr_t)vcmd.metadata,
924*4882a593Smuzhiyun vcmd.metadata_len,
925*4882a593Smuzhiyun (void __user *)(uintptr_t)vcmd.ppa_list, vcmd.nppas,
926*4882a593Smuzhiyun &vcmd.result, &vcmd.status, timeout);
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun if (ret && copy_to_user(uvcmd, &vcmd, sizeof(vcmd)))
929*4882a593Smuzhiyun return -EFAULT;
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun return ret;
932*4882a593Smuzhiyun }
933*4882a593Smuzhiyun
nvme_nvm_ioctl(struct nvme_ns * ns,unsigned int cmd,unsigned long arg)934*4882a593Smuzhiyun int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg)
935*4882a593Smuzhiyun {
936*4882a593Smuzhiyun switch (cmd) {
937*4882a593Smuzhiyun case NVME_NVM_IOCTL_ADMIN_VIO:
938*4882a593Smuzhiyun return nvme_nvm_user_vcmd(ns, 1, (void __user *)arg);
939*4882a593Smuzhiyun case NVME_NVM_IOCTL_IO_VIO:
940*4882a593Smuzhiyun return nvme_nvm_user_vcmd(ns, 0, (void __user *)arg);
941*4882a593Smuzhiyun case NVME_NVM_IOCTL_SUBMIT_VIO:
942*4882a593Smuzhiyun return nvme_nvm_submit_vio(ns, (void __user *)arg);
943*4882a593Smuzhiyun default:
944*4882a593Smuzhiyun return -ENOTTY;
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun
nvme_nvm_register(struct nvme_ns * ns,char * disk_name,int node)948*4882a593Smuzhiyun int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node)
949*4882a593Smuzhiyun {
950*4882a593Smuzhiyun struct request_queue *q = ns->queue;
951*4882a593Smuzhiyun struct nvm_dev *dev;
952*4882a593Smuzhiyun struct nvm_geo *geo;
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun _nvme_nvm_check_size();
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun dev = nvm_alloc_dev(node);
957*4882a593Smuzhiyun if (!dev)
958*4882a593Smuzhiyun return -ENOMEM;
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun /* Note that csecs and sos will be overridden if it is a 1.2 drive. */
961*4882a593Smuzhiyun geo = &dev->geo;
962*4882a593Smuzhiyun geo->csecs = 1 << ns->lba_shift;
963*4882a593Smuzhiyun geo->sos = ns->ms;
964*4882a593Smuzhiyun if (ns->features & NVME_NS_EXT_LBAS)
965*4882a593Smuzhiyun geo->ext = true;
966*4882a593Smuzhiyun else
967*4882a593Smuzhiyun geo->ext = false;
968*4882a593Smuzhiyun geo->mdts = ns->ctrl->max_hw_sectors;
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun dev->q = q;
971*4882a593Smuzhiyun memcpy(dev->name, disk_name, DISK_NAME_LEN);
972*4882a593Smuzhiyun dev->ops = &nvme_nvm_dev_ops;
973*4882a593Smuzhiyun dev->private_data = ns;
974*4882a593Smuzhiyun ns->ndev = dev;
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun return nvm_register(dev);
977*4882a593Smuzhiyun }
978*4882a593Smuzhiyun
nvme_nvm_unregister(struct nvme_ns * ns)979*4882a593Smuzhiyun void nvme_nvm_unregister(struct nvme_ns *ns)
980*4882a593Smuzhiyun {
981*4882a593Smuzhiyun nvm_unregister(ns->ndev);
982*4882a593Smuzhiyun }
983*4882a593Smuzhiyun
nvm_dev_attr_show(struct device * dev,struct device_attribute * dattr,char * page)984*4882a593Smuzhiyun static ssize_t nvm_dev_attr_show(struct device *dev,
985*4882a593Smuzhiyun struct device_attribute *dattr, char *page)
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
988*4882a593Smuzhiyun struct nvm_dev *ndev = ns->ndev;
989*4882a593Smuzhiyun struct nvm_geo *geo = &ndev->geo;
990*4882a593Smuzhiyun struct attribute *attr;
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun if (!ndev)
993*4882a593Smuzhiyun return 0;
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun attr = &dattr->attr;
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun if (strcmp(attr->name, "version") == 0) {
998*4882a593Smuzhiyun if (geo->major_ver_id == 1)
999*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n",
1000*4882a593Smuzhiyun geo->major_ver_id);
1001*4882a593Smuzhiyun else
1002*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u.%u\n",
1003*4882a593Smuzhiyun geo->major_ver_id,
1004*4882a593Smuzhiyun geo->minor_ver_id);
1005*4882a593Smuzhiyun } else if (strcmp(attr->name, "capabilities") == 0) {
1006*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->cap);
1007*4882a593Smuzhiyun } else if (strcmp(attr->name, "read_typ") == 0) {
1008*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->trdt);
1009*4882a593Smuzhiyun } else if (strcmp(attr->name, "read_max") == 0) {
1010*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->trdm);
1011*4882a593Smuzhiyun } else {
1012*4882a593Smuzhiyun return scnprintf(page,
1013*4882a593Smuzhiyun PAGE_SIZE,
1014*4882a593Smuzhiyun "Unhandled attr(%s) in `%s`\n",
1015*4882a593Smuzhiyun attr->name, __func__);
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun
nvm_dev_attr_show_ppaf(struct nvm_addrf_12 * ppaf,char * page)1019*4882a593Smuzhiyun static ssize_t nvm_dev_attr_show_ppaf(struct nvm_addrf_12 *ppaf, char *page)
1020*4882a593Smuzhiyun {
1021*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE,
1022*4882a593Smuzhiyun "0x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
1023*4882a593Smuzhiyun ppaf->ch_offset, ppaf->ch_len,
1024*4882a593Smuzhiyun ppaf->lun_offset, ppaf->lun_len,
1025*4882a593Smuzhiyun ppaf->pln_offset, ppaf->pln_len,
1026*4882a593Smuzhiyun ppaf->blk_offset, ppaf->blk_len,
1027*4882a593Smuzhiyun ppaf->pg_offset, ppaf->pg_len,
1028*4882a593Smuzhiyun ppaf->sec_offset, ppaf->sec_len);
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
nvm_dev_attr_show_12(struct device * dev,struct device_attribute * dattr,char * page)1031*4882a593Smuzhiyun static ssize_t nvm_dev_attr_show_12(struct device *dev,
1032*4882a593Smuzhiyun struct device_attribute *dattr, char *page)
1033*4882a593Smuzhiyun {
1034*4882a593Smuzhiyun struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
1035*4882a593Smuzhiyun struct nvm_dev *ndev = ns->ndev;
1036*4882a593Smuzhiyun struct nvm_geo *geo = &ndev->geo;
1037*4882a593Smuzhiyun struct attribute *attr;
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun if (!ndev)
1040*4882a593Smuzhiyun return 0;
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun attr = &dattr->attr;
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun if (strcmp(attr->name, "vendor_opcode") == 0) {
1045*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->vmnt);
1046*4882a593Smuzhiyun } else if (strcmp(attr->name, "device_mode") == 0) {
1047*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->dom);
1048*4882a593Smuzhiyun /* kept for compatibility */
1049*4882a593Smuzhiyun } else if (strcmp(attr->name, "media_manager") == 0) {
1050*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%s\n", "gennvm");
1051*4882a593Smuzhiyun } else if (strcmp(attr->name, "ppa_format") == 0) {
1052*4882a593Smuzhiyun return nvm_dev_attr_show_ppaf((void *)&geo->addrf, page);
1053*4882a593Smuzhiyun } else if (strcmp(attr->name, "media_type") == 0) { /* u8 */
1054*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->mtype);
1055*4882a593Smuzhiyun } else if (strcmp(attr->name, "flash_media_type") == 0) {
1056*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->fmtype);
1057*4882a593Smuzhiyun } else if (strcmp(attr->name, "num_channels") == 0) {
1058*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_ch);
1059*4882a593Smuzhiyun } else if (strcmp(attr->name, "num_luns") == 0) {
1060*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_lun);
1061*4882a593Smuzhiyun } else if (strcmp(attr->name, "num_planes") == 0) {
1062*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_pln);
1063*4882a593Smuzhiyun } else if (strcmp(attr->name, "num_blocks") == 0) { /* u16 */
1064*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_chk);
1065*4882a593Smuzhiyun } else if (strcmp(attr->name, "num_pages") == 0) {
1066*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_pg);
1067*4882a593Smuzhiyun } else if (strcmp(attr->name, "page_size") == 0) {
1068*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->fpg_sz);
1069*4882a593Smuzhiyun } else if (strcmp(attr->name, "hw_sector_size") == 0) {
1070*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->csecs);
1071*4882a593Smuzhiyun } else if (strcmp(attr->name, "oob_sector_size") == 0) {/* u32 */
1072*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->sos);
1073*4882a593Smuzhiyun } else if (strcmp(attr->name, "prog_typ") == 0) {
1074*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tprt);
1075*4882a593Smuzhiyun } else if (strcmp(attr->name, "prog_max") == 0) {
1076*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tprm);
1077*4882a593Smuzhiyun } else if (strcmp(attr->name, "erase_typ") == 0) {
1078*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tbet);
1079*4882a593Smuzhiyun } else if (strcmp(attr->name, "erase_max") == 0) {
1080*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tbem);
1081*4882a593Smuzhiyun } else if (strcmp(attr->name, "multiplane_modes") == 0) {
1082*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "0x%08x\n", geo->mpos);
1083*4882a593Smuzhiyun } else if (strcmp(attr->name, "media_capabilities") == 0) {
1084*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "0x%08x\n", geo->mccap);
1085*4882a593Smuzhiyun } else if (strcmp(attr->name, "max_phys_secs") == 0) {
1086*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", NVM_MAX_VLBA);
1087*4882a593Smuzhiyun } else {
1088*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE,
1089*4882a593Smuzhiyun "Unhandled attr(%s) in `%s`\n",
1090*4882a593Smuzhiyun attr->name, __func__);
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
nvm_dev_attr_show_20(struct device * dev,struct device_attribute * dattr,char * page)1094*4882a593Smuzhiyun static ssize_t nvm_dev_attr_show_20(struct device *dev,
1095*4882a593Smuzhiyun struct device_attribute *dattr, char *page)
1096*4882a593Smuzhiyun {
1097*4882a593Smuzhiyun struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
1098*4882a593Smuzhiyun struct nvm_dev *ndev = ns->ndev;
1099*4882a593Smuzhiyun struct nvm_geo *geo = &ndev->geo;
1100*4882a593Smuzhiyun struct attribute *attr;
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun if (!ndev)
1103*4882a593Smuzhiyun return 0;
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun attr = &dattr->attr;
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun if (strcmp(attr->name, "groups") == 0) {
1108*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_ch);
1109*4882a593Smuzhiyun } else if (strcmp(attr->name, "punits") == 0) {
1110*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_lun);
1111*4882a593Smuzhiyun } else if (strcmp(attr->name, "chunks") == 0) {
1112*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->num_chk);
1113*4882a593Smuzhiyun } else if (strcmp(attr->name, "clba") == 0) {
1114*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->clba);
1115*4882a593Smuzhiyun } else if (strcmp(attr->name, "ws_min") == 0) {
1116*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->ws_min);
1117*4882a593Smuzhiyun } else if (strcmp(attr->name, "ws_opt") == 0) {
1118*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->ws_opt);
1119*4882a593Smuzhiyun } else if (strcmp(attr->name, "maxoc") == 0) {
1120*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->maxoc);
1121*4882a593Smuzhiyun } else if (strcmp(attr->name, "maxocpu") == 0) {
1122*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->maxocpu);
1123*4882a593Smuzhiyun } else if (strcmp(attr->name, "mw_cunits") == 0) {
1124*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->mw_cunits);
1125*4882a593Smuzhiyun } else if (strcmp(attr->name, "write_typ") == 0) {
1126*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tprt);
1127*4882a593Smuzhiyun } else if (strcmp(attr->name, "write_max") == 0) {
1128*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tprm);
1129*4882a593Smuzhiyun } else if (strcmp(attr->name, "reset_typ") == 0) {
1130*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tbet);
1131*4882a593Smuzhiyun } else if (strcmp(attr->name, "reset_max") == 0) {
1132*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE, "%u\n", geo->tbem);
1133*4882a593Smuzhiyun } else {
1134*4882a593Smuzhiyun return scnprintf(page, PAGE_SIZE,
1135*4882a593Smuzhiyun "Unhandled attr(%s) in `%s`\n",
1136*4882a593Smuzhiyun attr->name, __func__);
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun }
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun #define NVM_DEV_ATTR_RO(_name) \
1141*4882a593Smuzhiyun DEVICE_ATTR(_name, S_IRUGO, nvm_dev_attr_show, NULL)
1142*4882a593Smuzhiyun #define NVM_DEV_ATTR_12_RO(_name) \
1143*4882a593Smuzhiyun DEVICE_ATTR(_name, S_IRUGO, nvm_dev_attr_show_12, NULL)
1144*4882a593Smuzhiyun #define NVM_DEV_ATTR_20_RO(_name) \
1145*4882a593Smuzhiyun DEVICE_ATTR(_name, S_IRUGO, nvm_dev_attr_show_20, NULL)
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun /* general attributes */
1148*4882a593Smuzhiyun static NVM_DEV_ATTR_RO(version);
1149*4882a593Smuzhiyun static NVM_DEV_ATTR_RO(capabilities);
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun static NVM_DEV_ATTR_RO(read_typ);
1152*4882a593Smuzhiyun static NVM_DEV_ATTR_RO(read_max);
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun /* 1.2 values */
1155*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(vendor_opcode);
1156*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(device_mode);
1157*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(ppa_format);
1158*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(media_manager);
1159*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(media_type);
1160*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(flash_media_type);
1161*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(num_channels);
1162*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(num_luns);
1163*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(num_planes);
1164*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(num_blocks);
1165*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(num_pages);
1166*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(page_size);
1167*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(hw_sector_size);
1168*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(oob_sector_size);
1169*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(prog_typ);
1170*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(prog_max);
1171*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(erase_typ);
1172*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(erase_max);
1173*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(multiplane_modes);
1174*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(media_capabilities);
1175*4882a593Smuzhiyun static NVM_DEV_ATTR_12_RO(max_phys_secs);
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun /* 2.0 values */
1178*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(groups);
1179*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(punits);
1180*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(chunks);
1181*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(clba);
1182*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(ws_min);
1183*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(ws_opt);
1184*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(maxoc);
1185*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(maxocpu);
1186*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(mw_cunits);
1187*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(write_typ);
1188*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(write_max);
1189*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(reset_typ);
1190*4882a593Smuzhiyun static NVM_DEV_ATTR_20_RO(reset_max);
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun static struct attribute *nvm_dev_attrs[] = {
1193*4882a593Smuzhiyun /* version agnostic attrs */
1194*4882a593Smuzhiyun &dev_attr_version.attr,
1195*4882a593Smuzhiyun &dev_attr_capabilities.attr,
1196*4882a593Smuzhiyun &dev_attr_read_typ.attr,
1197*4882a593Smuzhiyun &dev_attr_read_max.attr,
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun /* 1.2 attrs */
1200*4882a593Smuzhiyun &dev_attr_vendor_opcode.attr,
1201*4882a593Smuzhiyun &dev_attr_device_mode.attr,
1202*4882a593Smuzhiyun &dev_attr_media_manager.attr,
1203*4882a593Smuzhiyun &dev_attr_ppa_format.attr,
1204*4882a593Smuzhiyun &dev_attr_media_type.attr,
1205*4882a593Smuzhiyun &dev_attr_flash_media_type.attr,
1206*4882a593Smuzhiyun &dev_attr_num_channels.attr,
1207*4882a593Smuzhiyun &dev_attr_num_luns.attr,
1208*4882a593Smuzhiyun &dev_attr_num_planes.attr,
1209*4882a593Smuzhiyun &dev_attr_num_blocks.attr,
1210*4882a593Smuzhiyun &dev_attr_num_pages.attr,
1211*4882a593Smuzhiyun &dev_attr_page_size.attr,
1212*4882a593Smuzhiyun &dev_attr_hw_sector_size.attr,
1213*4882a593Smuzhiyun &dev_attr_oob_sector_size.attr,
1214*4882a593Smuzhiyun &dev_attr_prog_typ.attr,
1215*4882a593Smuzhiyun &dev_attr_prog_max.attr,
1216*4882a593Smuzhiyun &dev_attr_erase_typ.attr,
1217*4882a593Smuzhiyun &dev_attr_erase_max.attr,
1218*4882a593Smuzhiyun &dev_attr_multiplane_modes.attr,
1219*4882a593Smuzhiyun &dev_attr_media_capabilities.attr,
1220*4882a593Smuzhiyun &dev_attr_max_phys_secs.attr,
1221*4882a593Smuzhiyun
1222*4882a593Smuzhiyun /* 2.0 attrs */
1223*4882a593Smuzhiyun &dev_attr_groups.attr,
1224*4882a593Smuzhiyun &dev_attr_punits.attr,
1225*4882a593Smuzhiyun &dev_attr_chunks.attr,
1226*4882a593Smuzhiyun &dev_attr_clba.attr,
1227*4882a593Smuzhiyun &dev_attr_ws_min.attr,
1228*4882a593Smuzhiyun &dev_attr_ws_opt.attr,
1229*4882a593Smuzhiyun &dev_attr_maxoc.attr,
1230*4882a593Smuzhiyun &dev_attr_maxocpu.attr,
1231*4882a593Smuzhiyun &dev_attr_mw_cunits.attr,
1232*4882a593Smuzhiyun
1233*4882a593Smuzhiyun &dev_attr_write_typ.attr,
1234*4882a593Smuzhiyun &dev_attr_write_max.attr,
1235*4882a593Smuzhiyun &dev_attr_reset_typ.attr,
1236*4882a593Smuzhiyun &dev_attr_reset_max.attr,
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun NULL,
1239*4882a593Smuzhiyun };
1240*4882a593Smuzhiyun
nvm_dev_attrs_visible(struct kobject * kobj,struct attribute * attr,int index)1241*4882a593Smuzhiyun static umode_t nvm_dev_attrs_visible(struct kobject *kobj,
1242*4882a593Smuzhiyun struct attribute *attr, int index)
1243*4882a593Smuzhiyun {
1244*4882a593Smuzhiyun struct device *dev = container_of(kobj, struct device, kobj);
1245*4882a593Smuzhiyun struct gendisk *disk = dev_to_disk(dev);
1246*4882a593Smuzhiyun struct nvme_ns *ns = disk->private_data;
1247*4882a593Smuzhiyun struct nvm_dev *ndev = ns->ndev;
1248*4882a593Smuzhiyun struct device_attribute *dev_attr =
1249*4882a593Smuzhiyun container_of(attr, typeof(*dev_attr), attr);
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun if (!ndev)
1252*4882a593Smuzhiyun return 0;
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun if (dev_attr->show == nvm_dev_attr_show)
1255*4882a593Smuzhiyun return attr->mode;
1256*4882a593Smuzhiyun
1257*4882a593Smuzhiyun switch (ndev->geo.major_ver_id) {
1258*4882a593Smuzhiyun case 1:
1259*4882a593Smuzhiyun if (dev_attr->show == nvm_dev_attr_show_12)
1260*4882a593Smuzhiyun return attr->mode;
1261*4882a593Smuzhiyun break;
1262*4882a593Smuzhiyun case 2:
1263*4882a593Smuzhiyun if (dev_attr->show == nvm_dev_attr_show_20)
1264*4882a593Smuzhiyun return attr->mode;
1265*4882a593Smuzhiyun break;
1266*4882a593Smuzhiyun }
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun return 0;
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun
1271*4882a593Smuzhiyun const struct attribute_group nvme_nvm_attr_group = {
1272*4882a593Smuzhiyun .name = "lightnvm",
1273*4882a593Smuzhiyun .attrs = nvm_dev_attrs,
1274*4882a593Smuzhiyun .is_visible = nvm_dev_attrs_visible,
1275*4882a593Smuzhiyun };
1276