1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Driver for NXP PN533 NFC Chip 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2011 Instituto Nokia de Tecnologia 6*4882a593Smuzhiyun * Copyright (C) 2012-2013 Tieto Poland 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define PN533_DEVICE_STD 0x1 10*4882a593Smuzhiyun #define PN533_DEVICE_PASORI 0x2 11*4882a593Smuzhiyun #define PN533_DEVICE_ACR122U 0x3 12*4882a593Smuzhiyun #define PN533_DEVICE_PN532 0x4 13*4882a593Smuzhiyun #define PN533_DEVICE_PN532_AUTOPOLL 0x5 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define PN533_ALL_PROTOCOLS (NFC_PROTO_JEWEL_MASK | NFC_PROTO_MIFARE_MASK |\ 16*4882a593Smuzhiyun NFC_PROTO_FELICA_MASK | NFC_PROTO_ISO14443_MASK |\ 17*4882a593Smuzhiyun NFC_PROTO_NFC_DEP_MASK |\ 18*4882a593Smuzhiyun NFC_PROTO_ISO14443_B_MASK) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define PN533_NO_TYPE_B_PROTOCOLS (NFC_PROTO_JEWEL_MASK | \ 21*4882a593Smuzhiyun NFC_PROTO_MIFARE_MASK | \ 22*4882a593Smuzhiyun NFC_PROTO_FELICA_MASK | \ 23*4882a593Smuzhiyun NFC_PROTO_ISO14443_MASK | \ 24*4882a593Smuzhiyun NFC_PROTO_NFC_DEP_MASK) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Standard pn533 frame definitions (standard and extended)*/ 27*4882a593Smuzhiyun #define PN533_STD_FRAME_HEADER_LEN (sizeof(struct pn533_std_frame) \ 28*4882a593Smuzhiyun + 2) /* data[0] TFI, data[1] CC */ 29*4882a593Smuzhiyun #define PN533_STD_FRAME_TAIL_LEN 2 /* data[len] DCS, data[len + 1] postamble*/ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define PN533_EXT_FRAME_HEADER_LEN (sizeof(struct pn533_ext_frame) \ 32*4882a593Smuzhiyun + 2) /* data[0] TFI, data[1] CC */ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define PN533_CMD_DATAEXCH_HEAD_LEN 1 35*4882a593Smuzhiyun #define PN533_CMD_DATAEXCH_DATA_MAXLEN 262 36*4882a593Smuzhiyun #define PN533_CMD_DATAFRAME_MAXLEN 240 /* max data length (send) */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* 39*4882a593Smuzhiyun * Max extended frame payload len, excluding TFI and CC 40*4882a593Smuzhiyun * which are already in PN533_FRAME_HEADER_LEN. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun #define PN533_STD_FRAME_MAX_PAYLOAD_LEN 263 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* Preamble (1), SoPC (2), ACK Code (2), Postamble (1) */ 46*4882a593Smuzhiyun #define PN533_STD_FRAME_ACK_SIZE 6 47*4882a593Smuzhiyun /* 48*4882a593Smuzhiyun * Preamble (1), SoPC (2), Packet Length (1), Packet Length Checksum (1), 49*4882a593Smuzhiyun * Specific Application Level Error Code (1) , Postamble (1) 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun #define PN533_STD_ERROR_FRAME_SIZE 8 52*4882a593Smuzhiyun #define PN533_STD_FRAME_CHECKSUM(f) (f->data[f->datalen]) 53*4882a593Smuzhiyun #define PN533_STD_FRAME_POSTAMBLE(f) (f->data[f->datalen + 1]) 54*4882a593Smuzhiyun /* Half start code (3), LEN (4) should be 0xffff for extended frame */ 55*4882a593Smuzhiyun #define PN533_STD_IS_EXTENDED(hdr) ((hdr)->datalen == 0xFF \ 56*4882a593Smuzhiyun && (hdr)->datalen_checksum == 0xFF) 57*4882a593Smuzhiyun #define PN533_EXT_FRAME_CHECKSUM(f) (f->data[be16_to_cpu(f->datalen)]) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* start of frame */ 60*4882a593Smuzhiyun #define PN533_STD_FRAME_SOF 0x00FF 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* standard frame identifier: in/out/error */ 63*4882a593Smuzhiyun #define PN533_STD_FRAME_IDENTIFIER(f) (f->data[0]) /* TFI */ 64*4882a593Smuzhiyun #define PN533_STD_FRAME_DIR_OUT 0xD4 65*4882a593Smuzhiyun #define PN533_STD_FRAME_DIR_IN 0xD5 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* PN533 Commands */ 68*4882a593Smuzhiyun #define PN533_FRAME_CMD(f) (f->data[1]) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define PN533_CMD_GET_FIRMWARE_VERSION 0x02 71*4882a593Smuzhiyun #define PN533_CMD_SAM_CONFIGURATION 0x14 72*4882a593Smuzhiyun #define PN533_CMD_RF_CONFIGURATION 0x32 73*4882a593Smuzhiyun #define PN533_CMD_IN_DATA_EXCHANGE 0x40 74*4882a593Smuzhiyun #define PN533_CMD_IN_COMM_THRU 0x42 75*4882a593Smuzhiyun #define PN533_CMD_IN_LIST_PASSIVE_TARGET 0x4A 76*4882a593Smuzhiyun #define PN533_CMD_IN_ATR 0x50 77*4882a593Smuzhiyun #define PN533_CMD_IN_RELEASE 0x52 78*4882a593Smuzhiyun #define PN533_CMD_IN_JUMP_FOR_DEP 0x56 79*4882a593Smuzhiyun #define PN533_CMD_IN_AUTOPOLL 0x60 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define PN533_CMD_TG_INIT_AS_TARGET 0x8c 82*4882a593Smuzhiyun #define PN533_CMD_TG_GET_DATA 0x86 83*4882a593Smuzhiyun #define PN533_CMD_TG_SET_DATA 0x8e 84*4882a593Smuzhiyun #define PN533_CMD_TG_SET_META_DATA 0x94 85*4882a593Smuzhiyun #define PN533_CMD_UNDEF 0xff 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define PN533_CMD_RESPONSE(cmd) (cmd + 1) 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* PN533 Return codes */ 90*4882a593Smuzhiyun #define PN533_CMD_RET_MASK 0x3F 91*4882a593Smuzhiyun #define PN533_CMD_MI_MASK 0x40 92*4882a593Smuzhiyun #define PN533_CMD_RET_SUCCESS 0x00 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define PN533_FRAME_DATALEN_ACK 0x00 95*4882a593Smuzhiyun #define PN533_FRAME_DATALEN_ERROR 0x01 96*4882a593Smuzhiyun #define PN533_FRAME_DATALEN_EXTENDED 0xFF 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun enum pn533_protocol_type { 99*4882a593Smuzhiyun PN533_PROTO_REQ_ACK_RESP = 0, 100*4882a593Smuzhiyun PN533_PROTO_REQ_RESP 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* Poll modulations */ 104*4882a593Smuzhiyun enum { 105*4882a593Smuzhiyun PN533_POLL_MOD_106KBPS_A, 106*4882a593Smuzhiyun PN533_POLL_MOD_212KBPS_FELICA, 107*4882a593Smuzhiyun PN533_POLL_MOD_424KBPS_FELICA, 108*4882a593Smuzhiyun PN533_POLL_MOD_106KBPS_JEWEL, 109*4882a593Smuzhiyun PN533_POLL_MOD_847KBPS_B, 110*4882a593Smuzhiyun PN533_LISTEN_MOD, 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun __PN533_POLL_MOD_AFTER_LAST, 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun #define PN533_POLL_MOD_MAX (__PN533_POLL_MOD_AFTER_LAST - 1) 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun struct pn533_std_frame { 117*4882a593Smuzhiyun u8 preamble; 118*4882a593Smuzhiyun __be16 start_frame; 119*4882a593Smuzhiyun u8 datalen; 120*4882a593Smuzhiyun u8 datalen_checksum; 121*4882a593Smuzhiyun u8 data[]; 122*4882a593Smuzhiyun } __packed; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun struct pn533_ext_frame { /* Extended Information frame */ 125*4882a593Smuzhiyun u8 preamble; 126*4882a593Smuzhiyun __be16 start_frame; 127*4882a593Smuzhiyun __be16 eif_flag; /* fixed to 0xFFFF */ 128*4882a593Smuzhiyun __be16 datalen; 129*4882a593Smuzhiyun u8 datalen_checksum; 130*4882a593Smuzhiyun u8 data[]; 131*4882a593Smuzhiyun } __packed; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun struct pn533 { 134*4882a593Smuzhiyun struct nfc_dev *nfc_dev; 135*4882a593Smuzhiyun u32 device_type; 136*4882a593Smuzhiyun enum pn533_protocol_type protocol_type; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun struct sk_buff_head resp_q; 139*4882a593Smuzhiyun struct sk_buff_head fragment_skb; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun struct workqueue_struct *wq; 142*4882a593Smuzhiyun struct work_struct cmd_work; 143*4882a593Smuzhiyun struct work_struct cmd_complete_work; 144*4882a593Smuzhiyun struct delayed_work poll_work; 145*4882a593Smuzhiyun struct work_struct mi_rx_work; 146*4882a593Smuzhiyun struct work_struct mi_tx_work; 147*4882a593Smuzhiyun struct work_struct mi_tm_rx_work; 148*4882a593Smuzhiyun struct work_struct mi_tm_tx_work; 149*4882a593Smuzhiyun struct work_struct tg_work; 150*4882a593Smuzhiyun struct work_struct rf_work; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun struct list_head cmd_queue; 153*4882a593Smuzhiyun struct pn533_cmd *cmd; 154*4882a593Smuzhiyun u8 cmd_pending; 155*4882a593Smuzhiyun struct mutex cmd_lock; /* protects cmd queue */ 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun void *cmd_complete_mi_arg; 158*4882a593Smuzhiyun void *cmd_complete_dep_arg; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun struct pn533_poll_modulations *poll_mod_active[PN533_POLL_MOD_MAX + 1]; 161*4882a593Smuzhiyun u8 poll_mod_count; 162*4882a593Smuzhiyun u8 poll_mod_curr; 163*4882a593Smuzhiyun u8 poll_dep; 164*4882a593Smuzhiyun u32 poll_protocols; 165*4882a593Smuzhiyun u32 listen_protocols; 166*4882a593Smuzhiyun struct timer_list listen_timer; 167*4882a593Smuzhiyun int cancel_listen; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun u8 *gb; 170*4882a593Smuzhiyun size_t gb_len; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun u8 tgt_available_prots; 173*4882a593Smuzhiyun u8 tgt_active_prot; 174*4882a593Smuzhiyun u8 tgt_mode; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun struct pn533_frame_ops *ops; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun struct device *dev; 179*4882a593Smuzhiyun void *phy; 180*4882a593Smuzhiyun struct pn533_phy_ops *phy_ops; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun typedef int (*pn533_send_async_complete_t) (struct pn533 *dev, void *arg, 184*4882a593Smuzhiyun struct sk_buff *resp); 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun struct pn533_cmd { 187*4882a593Smuzhiyun struct list_head queue; 188*4882a593Smuzhiyun u8 code; 189*4882a593Smuzhiyun int status; 190*4882a593Smuzhiyun struct sk_buff *req; 191*4882a593Smuzhiyun struct sk_buff *resp; 192*4882a593Smuzhiyun pn533_send_async_complete_t complete_cb; 193*4882a593Smuzhiyun void *complete_cb_context; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun struct pn533_frame_ops { 198*4882a593Smuzhiyun void (*tx_frame_init)(void *frame, u8 cmd_code); 199*4882a593Smuzhiyun void (*tx_frame_finish)(void *frame); 200*4882a593Smuzhiyun void (*tx_update_payload_len)(void *frame, int len); 201*4882a593Smuzhiyun int tx_header_len; 202*4882a593Smuzhiyun int tx_tail_len; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun bool (*rx_is_frame_valid)(void *frame, struct pn533 *dev); 205*4882a593Smuzhiyun bool (*rx_frame_is_ack)(void *frame); 206*4882a593Smuzhiyun int (*rx_frame_size)(void *frame); 207*4882a593Smuzhiyun int rx_header_len; 208*4882a593Smuzhiyun int rx_tail_len; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun int max_payload_len; 211*4882a593Smuzhiyun u8 (*get_cmd_code)(void *frame); 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun struct pn533_phy_ops { 216*4882a593Smuzhiyun int (*send_frame)(struct pn533 *priv, 217*4882a593Smuzhiyun struct sk_buff *out); 218*4882a593Smuzhiyun int (*send_ack)(struct pn533 *dev, gfp_t flags); 219*4882a593Smuzhiyun void (*abort_cmd)(struct pn533 *priv, gfp_t flags); 220*4882a593Smuzhiyun /* 221*4882a593Smuzhiyun * dev_up and dev_down are optional. 222*4882a593Smuzhiyun * They are used to inform the phy layer that the nfc chip 223*4882a593Smuzhiyun * is going to be really used very soon. The phy layer can then 224*4882a593Smuzhiyun * bring up it's interface to the chip and have it suspended for power 225*4882a593Smuzhiyun * saving reasons otherwise. 226*4882a593Smuzhiyun */ 227*4882a593Smuzhiyun int (*dev_up)(struct pn533 *priv); 228*4882a593Smuzhiyun int (*dev_down)(struct pn533 *priv); 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun struct pn533 *pn53x_common_init(u32 device_type, 233*4882a593Smuzhiyun enum pn533_protocol_type protocol_type, 234*4882a593Smuzhiyun void *phy, 235*4882a593Smuzhiyun struct pn533_phy_ops *phy_ops, 236*4882a593Smuzhiyun struct pn533_frame_ops *fops, 237*4882a593Smuzhiyun struct device *dev); 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun int pn533_finalize_setup(struct pn533 *dev); 240*4882a593Smuzhiyun void pn53x_common_clean(struct pn533 *priv); 241*4882a593Smuzhiyun void pn533_recv_frame(struct pn533 *dev, struct sk_buff *skb, int status); 242*4882a593Smuzhiyun int pn532_i2c_nfc_alloc(struct pn533 *priv, u32 protocols, 243*4882a593Smuzhiyun struct device *parent); 244*4882a593Smuzhiyun int pn53x_register_nfc(struct pn533 *priv, u32 protocols, 245*4882a593Smuzhiyun struct device *parent); 246*4882a593Smuzhiyun void pn53x_unregister_nfc(struct pn533 *priv); 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun bool pn533_rx_frame_is_cmd_response(struct pn533 *dev, void *frame); 249*4882a593Smuzhiyun bool pn533_rx_frame_is_ack(void *_frame); 250