1*4882a593Smuzhiyun /** 2*4882a593Smuzhiyun * Marvell NFC driver 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2014-2015, Marvell International Ltd. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This software file (the "File") is distributed by Marvell International 7*4882a593Smuzhiyun * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8*4882a593Smuzhiyun * (the "License"). You may use, redistribute and/or modify this File in 9*4882a593Smuzhiyun * accordance with the terms and conditions of the License, a copy of which 10*4882a593Smuzhiyun * is available on the worldwide web at 11*4882a593Smuzhiyun * http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 14*4882a593Smuzhiyun * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 15*4882a593Smuzhiyun * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 16*4882a593Smuzhiyun * this warranty disclaimer. 17*4882a593Smuzhiyun **/ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #ifndef _NFCMRVL_H_ 20*4882a593Smuzhiyun #define _NFCMRVL_H_ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #include <linux/platform_data/nfcmrvl.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #include "fw_dnld.h" 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Define private flags: */ 27*4882a593Smuzhiyun #define NFCMRVL_NCI_RUNNING 1 28*4882a593Smuzhiyun #define NFCMRVL_PHY_ERROR 2 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define NFCMRVL_EXT_COEX_ID 0xE0 31*4882a593Smuzhiyun #define NFCMRVL_NOT_ALLOWED_ID 0xE1 32*4882a593Smuzhiyun #define NFCMRVL_ACTIVE_ID 0xE2 33*4882a593Smuzhiyun #define NFCMRVL_EXT_COEX_ENABLE 1 34*4882a593Smuzhiyun #define NFCMRVL_GPIO_PIN_NFC_NOT_ALLOWED 0xA 35*4882a593Smuzhiyun #define NFCMRVL_GPIO_PIN_NFC_ACTIVE 0xB 36*4882a593Smuzhiyun #define NFCMRVL_NCI_MAX_EVENT_SIZE 260 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* 39*4882a593Smuzhiyun ** NCI FW Parmaters 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define NFCMRVL_PB_BAIL_OUT 0x11 43*4882a593Smuzhiyun #define NFCMRVL_PROP_REF_CLOCK 0xF0 44*4882a593Smuzhiyun #define NFCMRVL_PROP_SET_HI_CONFIG 0xF1 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* 47*4882a593Smuzhiyun ** HCI defines 48*4882a593Smuzhiyun */ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define NFCMRVL_HCI_EVENT_HEADER_SIZE 0x04 51*4882a593Smuzhiyun #define NFCMRVL_HCI_EVENT_CODE 0x04 52*4882a593Smuzhiyun #define NFCMRVL_HCI_NFC_EVENT_CODE 0xFF 53*4882a593Smuzhiyun #define NFCMRVL_HCI_COMMAND_CODE 0x01 54*4882a593Smuzhiyun #define NFCMRVL_HCI_OGF 0x81 55*4882a593Smuzhiyun #define NFCMRVL_HCI_OCF 0xFE 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun enum nfcmrvl_phy { 58*4882a593Smuzhiyun NFCMRVL_PHY_USB = 0, 59*4882a593Smuzhiyun NFCMRVL_PHY_UART = 1, 60*4882a593Smuzhiyun NFCMRVL_PHY_I2C = 2, 61*4882a593Smuzhiyun NFCMRVL_PHY_SPI = 3, 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun struct nfcmrvl_private { 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun unsigned long flags; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* Platform configuration */ 69*4882a593Smuzhiyun struct nfcmrvl_platform_data config; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* Parent dev */ 72*4882a593Smuzhiyun struct nci_dev *ndev; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* FW download context */ 75*4882a593Smuzhiyun struct nfcmrvl_fw_dnld fw_dnld; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* FW download support */ 78*4882a593Smuzhiyun bool support_fw_dnld; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* 81*4882a593Smuzhiyun ** PHY related information 82*4882a593Smuzhiyun */ 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* PHY driver context */ 85*4882a593Smuzhiyun void *drv_data; 86*4882a593Smuzhiyun /* PHY device */ 87*4882a593Smuzhiyun struct device *dev; 88*4882a593Smuzhiyun /* PHY type */ 89*4882a593Smuzhiyun enum nfcmrvl_phy phy; 90*4882a593Smuzhiyun /* Low level driver ops */ 91*4882a593Smuzhiyun struct nfcmrvl_if_ops *if_ops; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun struct nfcmrvl_if_ops { 95*4882a593Smuzhiyun int (*nci_open) (struct nfcmrvl_private *priv); 96*4882a593Smuzhiyun int (*nci_close) (struct nfcmrvl_private *priv); 97*4882a593Smuzhiyun int (*nci_send) (struct nfcmrvl_private *priv, struct sk_buff *skb); 98*4882a593Smuzhiyun void (*nci_update_config)(struct nfcmrvl_private *priv, 99*4882a593Smuzhiyun const void *param); 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv); 103*4882a593Smuzhiyun int nfcmrvl_nci_recv_frame(struct nfcmrvl_private *priv, struct sk_buff *skb); 104*4882a593Smuzhiyun struct nfcmrvl_private *nfcmrvl_nci_register_dev(enum nfcmrvl_phy phy, 105*4882a593Smuzhiyun void *drv_data, 106*4882a593Smuzhiyun struct nfcmrvl_if_ops *ops, 107*4882a593Smuzhiyun struct device *dev, 108*4882a593Smuzhiyun struct nfcmrvl_platform_data *pdata); 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun void nfcmrvl_chip_reset(struct nfcmrvl_private *priv); 112*4882a593Smuzhiyun void nfcmrvl_chip_halt(struct nfcmrvl_private *priv); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun int nfcmrvl_parse_dt(struct device_node *node, 115*4882a593Smuzhiyun struct nfcmrvl_platform_data *pdata); 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #endif 118