xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/ti/wl18xx/wl18xx.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * This file is part of wl18xx
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2011 Texas Instruments Inc.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef __WL18XX_PRIV_H__
9*4882a593Smuzhiyun #define __WL18XX_PRIV_H__
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include "conf.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /* minimum FW required for driver */
14*4882a593Smuzhiyun #define WL18XX_CHIP_VER		8
15*4882a593Smuzhiyun #define WL18XX_IFTYPE_VER	9
16*4882a593Smuzhiyun #define WL18XX_MAJOR_VER	WLCORE_FW_VER_IGNORE
17*4882a593Smuzhiyun #define WL18XX_SUBTYPE_VER	WLCORE_FW_VER_IGNORE
18*4882a593Smuzhiyun #define WL18XX_MINOR_VER	58
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define WL18XX_CMD_MAX_SIZE          740
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define WL18XX_AGGR_BUFFER_SIZE		(13 * PAGE_SIZE)
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define WL18XX_NUM_TX_DESCRIPTORS 32
25*4882a593Smuzhiyun #define WL18XX_NUM_RX_DESCRIPTORS 32
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define WL18XX_NUM_MAC_ADDRESSES 2
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define WL18XX_RX_BA_MAX_SESSIONS 13
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define WL18XX_MAX_AP_STATIONS 10
32*4882a593Smuzhiyun #define WL18XX_MAX_LINKS 16
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun struct wl18xx_priv {
35*4882a593Smuzhiyun 	/* buffer for sending commands to FW */
36*4882a593Smuzhiyun 	u8 cmd_buf[WL18XX_CMD_MAX_SIZE];
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	struct wl18xx_priv_conf conf;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	/* Index of last released Tx desc in FW */
41*4882a593Smuzhiyun 	u8 last_fw_rls_idx;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	/* number of keys requiring extra spare mem-blocks */
44*4882a593Smuzhiyun 	int extra_spare_key_count;
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define WL18XX_FW_MAX_TX_STATUS_DESC 33
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun struct wl18xx_fw_status_priv {
50*4882a593Smuzhiyun 	/*
51*4882a593Smuzhiyun 	 * Index in released_tx_desc for first byte that holds
52*4882a593Smuzhiyun 	 * released tx host desc
53*4882a593Smuzhiyun 	 */
54*4882a593Smuzhiyun 	u8 fw_release_idx;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	/*
57*4882a593Smuzhiyun 	 * Array of host Tx descriptors, where fw_release_idx
58*4882a593Smuzhiyun 	 * indicated the first released idx.
59*4882a593Smuzhiyun 	 */
60*4882a593Smuzhiyun 	u8 released_tx_desc[WL18XX_FW_MAX_TX_STATUS_DESC];
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	/* A bitmap representing the currently suspended links. The suspend
63*4882a593Smuzhiyun 	 * is short lived, for multi-channel Tx requirements.
64*4882a593Smuzhiyun 	 */
65*4882a593Smuzhiyun 	__le32 link_suspend_bitmap;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	/* packet threshold for an "almost empty" AC,
68*4882a593Smuzhiyun 	 * for Tx schedulng purposes
69*4882a593Smuzhiyun 	 */
70*4882a593Smuzhiyun 	u8 tx_ac_threshold;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	/* number of packets to queue up for a link in PS */
73*4882a593Smuzhiyun 	u8 tx_ps_threshold;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	/* number of packet to queue up for a suspended link */
76*4882a593Smuzhiyun 	u8 tx_suspend_threshold;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	/* Should have less than this number of packets in queue of a slow
79*4882a593Smuzhiyun 	 * link to qualify as high priority link
80*4882a593Smuzhiyun 	 */
81*4882a593Smuzhiyun 	u8 tx_slow_link_prio_threshold;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/* Should have less than this number of packets in queue of a fast
84*4882a593Smuzhiyun 	 * link to qualify as high priority link
85*4882a593Smuzhiyun 	 */
86*4882a593Smuzhiyun 	u8 tx_fast_link_prio_threshold;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	/* Should have less than this number of packets in queue of a slow
89*4882a593Smuzhiyun 	 * link before we stop queuing up packets for it.
90*4882a593Smuzhiyun 	 */
91*4882a593Smuzhiyun 	u8 tx_slow_stop_threshold;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/* Should have less than this number of packets in queue of a fast
94*4882a593Smuzhiyun 	 * link before we stop queuing up packets for it.
95*4882a593Smuzhiyun 	 */
96*4882a593Smuzhiyun 	u8 tx_fast_stop_threshold;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	u8 padding[3];
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun struct wl18xx_fw_packet_counters {
102*4882a593Smuzhiyun 	/* Cumulative counter of released packets per AC */
103*4882a593Smuzhiyun 	u8 tx_released_pkts[NUM_TX_QUEUES];
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	/* Cumulative counter of freed packets per HLID */
106*4882a593Smuzhiyun 	u8 tx_lnk_free_pkts[WL18XX_MAX_LINKS];
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	/* Cumulative counter of released Voice memory blocks */
109*4882a593Smuzhiyun 	u8 tx_voice_released_blks;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	/* Tx rate of the last transmitted packet */
112*4882a593Smuzhiyun 	u8 tx_last_rate;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	/* Tx rate or Tx rate estimate pre-calculated by fw in mbps units */
115*4882a593Smuzhiyun 	u8 tx_last_rate_mbps;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	/* hlid for which the rates were reported */
118*4882a593Smuzhiyun 	u8 hlid;
119*4882a593Smuzhiyun } __packed;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun /* FW status registers */
122*4882a593Smuzhiyun struct wl18xx_fw_status {
123*4882a593Smuzhiyun 	__le32 intr;
124*4882a593Smuzhiyun 	u8  fw_rx_counter;
125*4882a593Smuzhiyun 	u8  drv_rx_counter;
126*4882a593Smuzhiyun 	u8  reserved;
127*4882a593Smuzhiyun 	u8  tx_results_counter;
128*4882a593Smuzhiyun 	__le32 rx_pkt_descs[WL18XX_NUM_RX_DESCRIPTORS];
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	__le32 fw_localtime;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	/*
133*4882a593Smuzhiyun 	 * A bitmap (where each bit represents a single HLID)
134*4882a593Smuzhiyun 	 * to indicate if the station is in PS mode.
135*4882a593Smuzhiyun 	 */
136*4882a593Smuzhiyun 	__le32 link_ps_bitmap;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	/*
139*4882a593Smuzhiyun 	 * A bitmap (where each bit represents a single HLID) to indicate
140*4882a593Smuzhiyun 	 * if the station is in Fast mode
141*4882a593Smuzhiyun 	 */
142*4882a593Smuzhiyun 	__le32 link_fast_bitmap;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	/* Cumulative counter of total released mem blocks since FW-reset */
145*4882a593Smuzhiyun 	__le32 total_released_blks;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	/* Size (in Memory Blocks) of TX pool */
148*4882a593Smuzhiyun 	__le32 tx_total;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	struct wl18xx_fw_packet_counters counters;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	__le32 log_start_addr;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	/* Private status to be used by the lower drivers */
155*4882a593Smuzhiyun 	struct wl18xx_fw_status_priv priv;
156*4882a593Smuzhiyun } __packed;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #define WL18XX_PHY_VERSION_MAX_LEN 20
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun struct wl18xx_static_data_priv {
161*4882a593Smuzhiyun 	char phy_version[WL18XX_PHY_VERSION_MAX_LEN];
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun struct wl18xx_clk_cfg {
165*4882a593Smuzhiyun 	u32 n;
166*4882a593Smuzhiyun 	u32 m;
167*4882a593Smuzhiyun 	u32 p;
168*4882a593Smuzhiyun 	u32 q;
169*4882a593Smuzhiyun 	bool swallow;
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun enum {
173*4882a593Smuzhiyun 	CLOCK_CONFIG_16_2_M	= 1,
174*4882a593Smuzhiyun 	CLOCK_CONFIG_16_368_M,
175*4882a593Smuzhiyun 	CLOCK_CONFIG_16_8_M,
176*4882a593Smuzhiyun 	CLOCK_CONFIG_19_2_M,
177*4882a593Smuzhiyun 	CLOCK_CONFIG_26_M,
178*4882a593Smuzhiyun 	CLOCK_CONFIG_32_736_M,
179*4882a593Smuzhiyun 	CLOCK_CONFIG_33_6_M,
180*4882a593Smuzhiyun 	CLOCK_CONFIG_38_468_M,
181*4882a593Smuzhiyun 	CLOCK_CONFIG_52_M,
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	NUM_CLOCK_CONFIGS,
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun #endif /* __WL18XX_PRIV_H__ */
187