xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/ti/wl12xx/acx.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * This file is part of wl12xx
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 1998-2009, 2011 Texas Instruments. All rights reserved.
6*4882a593Smuzhiyun  * Copyright (C) 2008-2010 Nokia Corporation
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __WL12XX_ACX_H__
10*4882a593Smuzhiyun #define __WL12XX_ACX_H__
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include "../wlcore/wlcore.h"
13*4882a593Smuzhiyun #include "../wlcore/acx.h"
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define WL12XX_ACX_ALL_EVENTS_VECTOR	(WL1271_ACX_INTR_WATCHDOG      | \
16*4882a593Smuzhiyun 					WL1271_ACX_INTR_INIT_COMPLETE | \
17*4882a593Smuzhiyun 					WL1271_ACX_INTR_EVENT_A       | \
18*4882a593Smuzhiyun 					WL1271_ACX_INTR_EVENT_B       | \
19*4882a593Smuzhiyun 					WL1271_ACX_INTR_CMD_COMPLETE  | \
20*4882a593Smuzhiyun 					WL1271_ACX_INTR_HW_AVAILABLE  | \
21*4882a593Smuzhiyun 					WL1271_ACX_INTR_DATA)
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define WL12XX_INTR_MASK		(WL1271_ACX_INTR_WATCHDOG      | \
24*4882a593Smuzhiyun 					WL1271_ACX_INTR_EVENT_A       | \
25*4882a593Smuzhiyun 					WL1271_ACX_INTR_EVENT_B       | \
26*4882a593Smuzhiyun 					WL1271_ACX_INTR_HW_AVAILABLE  | \
27*4882a593Smuzhiyun 					WL1271_ACX_INTR_DATA)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun struct wl1271_acx_host_config_bitmap {
30*4882a593Smuzhiyun 	struct acx_header header;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	__le32 host_cfg_bitmap;
33*4882a593Smuzhiyun } __packed;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct wl12xx_acx_tx_statistics {
36*4882a593Smuzhiyun 	__le32 internal_desc_overflow;
37*4882a593Smuzhiyun }  __packed;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct wl12xx_acx_rx_statistics {
40*4882a593Smuzhiyun 	__le32 out_of_mem;
41*4882a593Smuzhiyun 	__le32 hdr_overflow;
42*4882a593Smuzhiyun 	__le32 hw_stuck;
43*4882a593Smuzhiyun 	__le32 dropped;
44*4882a593Smuzhiyun 	__le32 fcs_err;
45*4882a593Smuzhiyun 	__le32 xfr_hint_trig;
46*4882a593Smuzhiyun 	__le32 path_reset;
47*4882a593Smuzhiyun 	__le32 reset_counter;
48*4882a593Smuzhiyun } __packed;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun struct wl12xx_acx_dma_statistics {
51*4882a593Smuzhiyun 	__le32 rx_requested;
52*4882a593Smuzhiyun 	__le32 rx_errors;
53*4882a593Smuzhiyun 	__le32 tx_requested;
54*4882a593Smuzhiyun 	__le32 tx_errors;
55*4882a593Smuzhiyun }  __packed;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun struct wl12xx_acx_isr_statistics {
58*4882a593Smuzhiyun 	/* host command complete */
59*4882a593Smuzhiyun 	__le32 cmd_cmplt;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	/* fiqisr() */
62*4882a593Smuzhiyun 	__le32 fiqs;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_RX_HEADER) */
65*4882a593Smuzhiyun 	__le32 rx_headers;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
68*4882a593Smuzhiyun 	__le32 rx_completes;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
71*4882a593Smuzhiyun 	__le32 rx_mem_overflow;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
74*4882a593Smuzhiyun 	__le32 rx_rdys;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	/* irqisr() */
77*4882a593Smuzhiyun 	__le32 irqs;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_TX_PROC) */
80*4882a593Smuzhiyun 	__le32 tx_procs;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
83*4882a593Smuzhiyun 	__le32 decrypt_done;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_DMA0) */
86*4882a593Smuzhiyun 	__le32 dma0_done;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_DMA1) */
89*4882a593Smuzhiyun 	__le32 dma1_done;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
92*4882a593Smuzhiyun 	__le32 tx_exch_complete;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_COMMAND) */
95*4882a593Smuzhiyun 	__le32 commands;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_RX_PROC) */
98*4882a593Smuzhiyun 	__le32 rx_procs;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_PM_802) */
101*4882a593Smuzhiyun 	__le32 hw_pm_mode_changes;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
104*4882a593Smuzhiyun 	__le32 host_acknowledges;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_PM_PCI) */
107*4882a593Smuzhiyun 	__le32 pci_pm;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
110*4882a593Smuzhiyun 	__le32 wakeups;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	/* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
113*4882a593Smuzhiyun 	__le32 low_rssi;
114*4882a593Smuzhiyun } __packed;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun struct wl12xx_acx_wep_statistics {
117*4882a593Smuzhiyun 	/* WEP address keys configured */
118*4882a593Smuzhiyun 	__le32 addr_key_count;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	/* default keys configured */
121*4882a593Smuzhiyun 	__le32 default_key_count;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	__le32 reserved;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	/* number of times that WEP key not found on lookup */
126*4882a593Smuzhiyun 	__le32 key_not_found;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	/* number of times that WEP key decryption failed */
129*4882a593Smuzhiyun 	__le32 decrypt_fail;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	/* WEP packets decrypted */
132*4882a593Smuzhiyun 	__le32 packets;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	/* WEP decrypt interrupts */
135*4882a593Smuzhiyun 	__le32 interrupt;
136*4882a593Smuzhiyun } __packed;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #define ACX_MISSED_BEACONS_SPREAD 10
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun struct wl12xx_acx_pwr_statistics {
141*4882a593Smuzhiyun 	/* the amount of enters into power save mode (both PD & ELP) */
142*4882a593Smuzhiyun 	__le32 ps_enter;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	/* the amount of enters into ELP mode */
145*4882a593Smuzhiyun 	__le32 elp_enter;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	/* the amount of missing beacon interrupts to the host */
148*4882a593Smuzhiyun 	__le32 missing_bcns;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	/* the amount of wake on host-access times */
151*4882a593Smuzhiyun 	__le32 wake_on_host;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	/* the amount of wake on timer-expire */
154*4882a593Smuzhiyun 	__le32 wake_on_timer_exp;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	/* the number of packets that were transmitted with PS bit set */
157*4882a593Smuzhiyun 	__le32 tx_with_ps;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	/* the number of packets that were transmitted with PS bit clear */
160*4882a593Smuzhiyun 	__le32 tx_without_ps;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/* the number of received beacons */
163*4882a593Smuzhiyun 	__le32 rcvd_beacons;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/* the number of entering into PowerOn (power save off) */
166*4882a593Smuzhiyun 	__le32 power_save_off;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* the number of entries into power save mode */
169*4882a593Smuzhiyun 	__le16 enable_ps;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	/*
172*4882a593Smuzhiyun 	 * the number of exits from power save, not including failed PS
173*4882a593Smuzhiyun 	 * transitions
174*4882a593Smuzhiyun 	 */
175*4882a593Smuzhiyun 	__le16 disable_ps;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	/*
178*4882a593Smuzhiyun 	 * the number of times the TSF counter was adjusted because
179*4882a593Smuzhiyun 	 * of drift
180*4882a593Smuzhiyun 	 */
181*4882a593Smuzhiyun 	__le32 fix_tsf_ps;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	/* Gives statistics about the spread continuous missed beacons.
184*4882a593Smuzhiyun 	 * The 16 LSB are dedicated for the PS mode.
185*4882a593Smuzhiyun 	 * The 16 MSB are dedicated for the PS mode.
186*4882a593Smuzhiyun 	 * cont_miss_bcns_spread[0] - single missed beacon.
187*4882a593Smuzhiyun 	 * cont_miss_bcns_spread[1] - two continuous missed beacons.
188*4882a593Smuzhiyun 	 * cont_miss_bcns_spread[2] - three continuous missed beacons.
189*4882a593Smuzhiyun 	 * ...
190*4882a593Smuzhiyun 	 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
191*4882a593Smuzhiyun 	*/
192*4882a593Smuzhiyun 	__le32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	/* the number of beacons in awake mode */
195*4882a593Smuzhiyun 	__le32 rcvd_awake_beacons;
196*4882a593Smuzhiyun } __packed;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun struct wl12xx_acx_mic_statistics {
199*4882a593Smuzhiyun 	__le32 rx_pkts;
200*4882a593Smuzhiyun 	__le32 calc_failure;
201*4882a593Smuzhiyun } __packed;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun struct wl12xx_acx_aes_statistics {
204*4882a593Smuzhiyun 	__le32 encrypt_fail;
205*4882a593Smuzhiyun 	__le32 decrypt_fail;
206*4882a593Smuzhiyun 	__le32 encrypt_packets;
207*4882a593Smuzhiyun 	__le32 decrypt_packets;
208*4882a593Smuzhiyun 	__le32 encrypt_interrupt;
209*4882a593Smuzhiyun 	__le32 decrypt_interrupt;
210*4882a593Smuzhiyun } __packed;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun struct wl12xx_acx_event_statistics {
213*4882a593Smuzhiyun 	__le32 heart_beat;
214*4882a593Smuzhiyun 	__le32 calibration;
215*4882a593Smuzhiyun 	__le32 rx_mismatch;
216*4882a593Smuzhiyun 	__le32 rx_mem_empty;
217*4882a593Smuzhiyun 	__le32 rx_pool;
218*4882a593Smuzhiyun 	__le32 oom_late;
219*4882a593Smuzhiyun 	__le32 phy_transmit_error;
220*4882a593Smuzhiyun 	__le32 tx_stuck;
221*4882a593Smuzhiyun } __packed;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun struct wl12xx_acx_ps_statistics {
224*4882a593Smuzhiyun 	__le32 pspoll_timeouts;
225*4882a593Smuzhiyun 	__le32 upsd_timeouts;
226*4882a593Smuzhiyun 	__le32 upsd_max_sptime;
227*4882a593Smuzhiyun 	__le32 upsd_max_apturn;
228*4882a593Smuzhiyun 	__le32 pspoll_max_apturn;
229*4882a593Smuzhiyun 	__le32 pspoll_utilization;
230*4882a593Smuzhiyun 	__le32 upsd_utilization;
231*4882a593Smuzhiyun } __packed;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun struct wl12xx_acx_rxpipe_statistics {
234*4882a593Smuzhiyun 	__le32 rx_prep_beacon_drop;
235*4882a593Smuzhiyun 	__le32 descr_host_int_trig_rx_data;
236*4882a593Smuzhiyun 	__le32 beacon_buffer_thres_host_int_trig_rx_data;
237*4882a593Smuzhiyun 	__le32 missed_beacon_host_int_trig_rx_data;
238*4882a593Smuzhiyun 	__le32 tx_xfr_host_int_trig_rx_data;
239*4882a593Smuzhiyun } __packed;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun struct wl12xx_acx_statistics {
242*4882a593Smuzhiyun 	struct acx_header header;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	struct wl12xx_acx_tx_statistics tx;
245*4882a593Smuzhiyun 	struct wl12xx_acx_rx_statistics rx;
246*4882a593Smuzhiyun 	struct wl12xx_acx_dma_statistics dma;
247*4882a593Smuzhiyun 	struct wl12xx_acx_isr_statistics isr;
248*4882a593Smuzhiyun 	struct wl12xx_acx_wep_statistics wep;
249*4882a593Smuzhiyun 	struct wl12xx_acx_pwr_statistics pwr;
250*4882a593Smuzhiyun 	struct wl12xx_acx_aes_statistics aes;
251*4882a593Smuzhiyun 	struct wl12xx_acx_mic_statistics mic;
252*4882a593Smuzhiyun 	struct wl12xx_acx_event_statistics event;
253*4882a593Smuzhiyun 	struct wl12xx_acx_ps_statistics ps;
254*4882a593Smuzhiyun 	struct wl12xx_acx_rxpipe_statistics rxpipe;
255*4882a593Smuzhiyun } __packed;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun int wl1271_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap);
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun #endif /* __WL12XX_ACX_H__ */
260