1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * This file is part of wl1251 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 1998-2007 Texas Instruments Incorporated 6*4882a593Smuzhiyun * Copyright (C) 2008 Nokia Corporation 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __WL1251_RX_H__ 10*4882a593Smuzhiyun #define __WL1251_RX_H__ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/bitops.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include "wl1251.h" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * RX PATH 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * The Rx path uses a double buffer and an rx_contro structure, each located 20*4882a593Smuzhiyun * at a fixed address in the device memory. The host keeps track of which 21*4882a593Smuzhiyun * buffer is available and alternates between them on a per packet basis. 22*4882a593Smuzhiyun * The size of each of the two buffers is large enough to hold the longest 23*4882a593Smuzhiyun * 802.3 packet. 24*4882a593Smuzhiyun * The RX path goes like that: 25*4882a593Smuzhiyun * 1) The target generates an interrupt each time a new packet is received. 26*4882a593Smuzhiyun * There are 2 RX interrupts, one for each buffer. 27*4882a593Smuzhiyun * 2) The host reads the received packet from one of the double buffers. 28*4882a593Smuzhiyun * 3) The host triggers a target interrupt. 29*4882a593Smuzhiyun * 4) The target prepares the next RX packet. 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define WL1251_RX_MAX_RSSI -30 33*4882a593Smuzhiyun #define WL1251_RX_MIN_RSSI -95 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define WL1251_RX_ALIGN_TO 4 36*4882a593Smuzhiyun #define WL1251_RX_ALIGN(len) (((len) + WL1251_RX_ALIGN_TO - 1) & \ 37*4882a593Smuzhiyun ~(WL1251_RX_ALIGN_TO - 1)) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define SHORT_PREAMBLE_BIT BIT(0) 40*4882a593Smuzhiyun #define OFDM_RATE_BIT BIT(6) 41*4882a593Smuzhiyun #define PBCC_RATE_BIT BIT(7) 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define PLCP_HEADER_LENGTH 8 44*4882a593Smuzhiyun #define RX_DESC_PACKETID_SHIFT 11 45*4882a593Smuzhiyun #define RX_MAX_PACKET_ID 3 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define RX_DESC_VALID_FCS 0x0001 48*4882a593Smuzhiyun #define RX_DESC_MATCH_RXADDR1 0x0002 49*4882a593Smuzhiyun #define RX_DESC_MCAST 0x0004 50*4882a593Smuzhiyun #define RX_DESC_STAINTIM 0x0008 51*4882a593Smuzhiyun #define RX_DESC_VIRTUAL_BM 0x0010 52*4882a593Smuzhiyun #define RX_DESC_BCAST 0x0020 53*4882a593Smuzhiyun #define RX_DESC_MATCH_SSID 0x0040 54*4882a593Smuzhiyun #define RX_DESC_MATCH_BSSID 0x0080 55*4882a593Smuzhiyun #define RX_DESC_ENCRYPTION_MASK 0x0300 56*4882a593Smuzhiyun #define RX_DESC_MEASURMENT 0x0400 57*4882a593Smuzhiyun #define RX_DESC_SEQNUM_MASK 0x1800 58*4882a593Smuzhiyun #define RX_DESC_MIC_FAIL 0x2000 59*4882a593Smuzhiyun #define RX_DESC_DECRYPT_FAIL 0x4000 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun struct wl1251_rx_descriptor { 62*4882a593Smuzhiyun u32 timestamp; /* In microseconds */ 63*4882a593Smuzhiyun u16 length; /* Paylod length, including headers */ 64*4882a593Smuzhiyun u16 flags; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* 67*4882a593Smuzhiyun * 0 - 802.11 68*4882a593Smuzhiyun * 1 - 802.3 69*4882a593Smuzhiyun * 2 - IP 70*4882a593Smuzhiyun * 3 - Raw Codec 71*4882a593Smuzhiyun */ 72*4882a593Smuzhiyun u8 type; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* 75*4882a593Smuzhiyun * Received Rate: 76*4882a593Smuzhiyun * 0x0A - 1MBPS 77*4882a593Smuzhiyun * 0x14 - 2MBPS 78*4882a593Smuzhiyun * 0x37 - 5_5MBPS 79*4882a593Smuzhiyun * 0x0B - 6MBPS 80*4882a593Smuzhiyun * 0x0F - 9MBPS 81*4882a593Smuzhiyun * 0x6E - 11MBPS 82*4882a593Smuzhiyun * 0x0A - 12MBPS 83*4882a593Smuzhiyun * 0x0E - 18MBPS 84*4882a593Smuzhiyun * 0xDC - 22MBPS 85*4882a593Smuzhiyun * 0x09 - 24MBPS 86*4882a593Smuzhiyun * 0x0D - 36MBPS 87*4882a593Smuzhiyun * 0x08 - 48MBPS 88*4882a593Smuzhiyun * 0x0C - 54MBPS 89*4882a593Smuzhiyun */ 90*4882a593Smuzhiyun u8 rate; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun u8 mod_pre; /* Modulation and preamble */ 93*4882a593Smuzhiyun u8 channel; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* 96*4882a593Smuzhiyun * 0 - 2.4 Ghz 97*4882a593Smuzhiyun * 1 - 5 Ghz 98*4882a593Smuzhiyun */ 99*4882a593Smuzhiyun u8 band; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun s8 rssi; /* in dB */ 102*4882a593Smuzhiyun u8 rcpi; /* in dB */ 103*4882a593Smuzhiyun u8 snr; /* in dB */ 104*4882a593Smuzhiyun } __packed; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun void wl1251_rx(struct wl1251 *wl); 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #endif 109