1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * This file is part of wl1251
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2008-2009 Nokia Corporation
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/firmware.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/irq.h>
13*4882a593Smuzhiyun #include <linux/crc32.h>
14*4882a593Smuzhiyun #include <linux/etherdevice.h>
15*4882a593Smuzhiyun #include <linux/vmalloc.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/netdevice.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "wl1251.h"
20*4882a593Smuzhiyun #include "wl12xx_80211.h"
21*4882a593Smuzhiyun #include "reg.h"
22*4882a593Smuzhiyun #include "io.h"
23*4882a593Smuzhiyun #include "cmd.h"
24*4882a593Smuzhiyun #include "event.h"
25*4882a593Smuzhiyun #include "tx.h"
26*4882a593Smuzhiyun #include "rx.h"
27*4882a593Smuzhiyun #include "ps.h"
28*4882a593Smuzhiyun #include "init.h"
29*4882a593Smuzhiyun #include "debugfs.h"
30*4882a593Smuzhiyun #include "boot.h"
31*4882a593Smuzhiyun
wl1251_enable_interrupts(struct wl1251 * wl)32*4882a593Smuzhiyun void wl1251_enable_interrupts(struct wl1251 *wl)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun wl->if_ops->enable_irq(wl);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
wl1251_disable_interrupts(struct wl1251 * wl)37*4882a593Smuzhiyun void wl1251_disable_interrupts(struct wl1251 *wl)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun wl->if_ops->disable_irq(wl);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
wl1251_power_off(struct wl1251 * wl)42*4882a593Smuzhiyun static int wl1251_power_off(struct wl1251 *wl)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun return wl->if_ops->power(wl, false);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
wl1251_power_on(struct wl1251 * wl)47*4882a593Smuzhiyun static int wl1251_power_on(struct wl1251 *wl)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun return wl->if_ops->power(wl, true);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
wl1251_fetch_firmware(struct wl1251 * wl)52*4882a593Smuzhiyun static int wl1251_fetch_firmware(struct wl1251 *wl)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun const struct firmware *fw;
55*4882a593Smuzhiyun struct device *dev = wiphy_dev(wl->hw->wiphy);
56*4882a593Smuzhiyun int ret;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun ret = request_firmware(&fw, WL1251_FW_NAME, dev);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun if (ret < 0) {
61*4882a593Smuzhiyun wl1251_error("could not get firmware: %d", ret);
62*4882a593Smuzhiyun return ret;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if (fw->size % 4) {
66*4882a593Smuzhiyun wl1251_error("firmware size is not multiple of 32 bits: %zu",
67*4882a593Smuzhiyun fw->size);
68*4882a593Smuzhiyun ret = -EILSEQ;
69*4882a593Smuzhiyun goto out;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun wl->fw_len = fw->size;
73*4882a593Smuzhiyun wl->fw = vmalloc(wl->fw_len);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (!wl->fw) {
76*4882a593Smuzhiyun wl1251_error("could not allocate memory for the firmware");
77*4882a593Smuzhiyun ret = -ENOMEM;
78*4882a593Smuzhiyun goto out;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun memcpy(wl->fw, fw->data, wl->fw_len);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun ret = 0;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun out:
86*4882a593Smuzhiyun release_firmware(fw);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return ret;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
wl1251_fetch_nvs(struct wl1251 * wl)91*4882a593Smuzhiyun static int wl1251_fetch_nvs(struct wl1251 *wl)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun const struct firmware *fw;
94*4882a593Smuzhiyun struct device *dev = wiphy_dev(wl->hw->wiphy);
95*4882a593Smuzhiyun int ret;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun ret = request_firmware(&fw, WL1251_NVS_NAME, dev);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (ret < 0) {
100*4882a593Smuzhiyun wl1251_error("could not get nvs file: %d", ret);
101*4882a593Smuzhiyun return ret;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun if (fw->size % 4) {
105*4882a593Smuzhiyun wl1251_error("nvs size is not multiple of 32 bits: %zu",
106*4882a593Smuzhiyun fw->size);
107*4882a593Smuzhiyun ret = -EILSEQ;
108*4882a593Smuzhiyun goto out;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun wl->nvs = kmemdup(fw->data, fw->size, GFP_KERNEL);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun if (!wl->nvs) {
114*4882a593Smuzhiyun wl1251_error("could not allocate memory for the nvs file");
115*4882a593Smuzhiyun ret = -ENOMEM;
116*4882a593Smuzhiyun goto out;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun wl->nvs_len = fw->size;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun ret = 0;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun out:
124*4882a593Smuzhiyun release_firmware(fw);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return ret;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
wl1251_fw_wakeup(struct wl1251 * wl)129*4882a593Smuzhiyun static void wl1251_fw_wakeup(struct wl1251 *wl)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun u32 elp_reg;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun elp_reg = ELPCTRL_WAKE_UP;
134*4882a593Smuzhiyun wl1251_write_elp(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, elp_reg);
135*4882a593Smuzhiyun elp_reg = wl1251_read_elp(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (!(elp_reg & ELPCTRL_WLAN_READY))
138*4882a593Smuzhiyun wl1251_warning("WLAN not ready");
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
wl1251_chip_wakeup(struct wl1251 * wl)141*4882a593Smuzhiyun static int wl1251_chip_wakeup(struct wl1251 *wl)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun int ret;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun ret = wl1251_power_on(wl);
146*4882a593Smuzhiyun if (ret < 0)
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun msleep(WL1251_POWER_ON_SLEEP);
150*4882a593Smuzhiyun wl->if_ops->reset(wl);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* We don't need a real memory partition here, because we only want
153*4882a593Smuzhiyun * to use the registers at this point. */
154*4882a593Smuzhiyun wl1251_set_partition(wl,
155*4882a593Smuzhiyun 0x00000000,
156*4882a593Smuzhiyun 0x00000000,
157*4882a593Smuzhiyun REGISTERS_BASE,
158*4882a593Smuzhiyun REGISTERS_DOWN_SIZE);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* ELP module wake up */
161*4882a593Smuzhiyun wl1251_fw_wakeup(wl);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* whal_FwCtrl_BootSm() */
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* 0. read chip id from CHIP_ID */
166*4882a593Smuzhiyun wl->chip_id = wl1251_reg_read32(wl, CHIP_ID_B);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* 1. check if chip id is valid */
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun switch (wl->chip_id) {
171*4882a593Smuzhiyun case CHIP_ID_1251_PG12:
172*4882a593Smuzhiyun wl1251_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG12)",
173*4882a593Smuzhiyun wl->chip_id);
174*4882a593Smuzhiyun break;
175*4882a593Smuzhiyun case CHIP_ID_1251_PG11:
176*4882a593Smuzhiyun wl1251_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG11)",
177*4882a593Smuzhiyun wl->chip_id);
178*4882a593Smuzhiyun break;
179*4882a593Smuzhiyun case CHIP_ID_1251_PG10:
180*4882a593Smuzhiyun default:
181*4882a593Smuzhiyun wl1251_error("unsupported chip id: 0x%x", wl->chip_id);
182*4882a593Smuzhiyun ret = -ENODEV;
183*4882a593Smuzhiyun goto out;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun if (wl->fw == NULL) {
187*4882a593Smuzhiyun ret = wl1251_fetch_firmware(wl);
188*4882a593Smuzhiyun if (ret < 0)
189*4882a593Smuzhiyun goto out;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun out:
193*4882a593Smuzhiyun return ret;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #define WL1251_IRQ_LOOP_COUNT 10
wl1251_irq_work(struct work_struct * work)197*4882a593Smuzhiyun static void wl1251_irq_work(struct work_struct *work)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun u32 intr, ctr = WL1251_IRQ_LOOP_COUNT;
200*4882a593Smuzhiyun struct wl1251 *wl =
201*4882a593Smuzhiyun container_of(work, struct wl1251, irq_work);
202*4882a593Smuzhiyun int ret;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun mutex_lock(&wl->mutex);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "IRQ work");
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun if (wl->state == WL1251_STATE_OFF)
209*4882a593Smuzhiyun goto out;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
212*4882a593Smuzhiyun if (ret < 0)
213*4882a593Smuzhiyun goto out;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, WL1251_ACX_INTR_ALL);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);
218*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "intr: 0x%x", intr);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun do {
221*4882a593Smuzhiyun if (wl->data_path) {
222*4882a593Smuzhiyun wl->rx_counter = wl1251_mem_read32(
223*4882a593Smuzhiyun wl, wl->data_path->rx_control_addr);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* We handle a frmware bug here */
226*4882a593Smuzhiyun switch ((wl->rx_counter - wl->rx_handled) & 0xf) {
227*4882a593Smuzhiyun case 0:
228*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ,
229*4882a593Smuzhiyun "RX: FW and host in sync");
230*4882a593Smuzhiyun intr &= ~WL1251_ACX_INTR_RX0_DATA;
231*4882a593Smuzhiyun intr &= ~WL1251_ACX_INTR_RX1_DATA;
232*4882a593Smuzhiyun break;
233*4882a593Smuzhiyun case 1:
234*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "RX: FW +1");
235*4882a593Smuzhiyun intr |= WL1251_ACX_INTR_RX0_DATA;
236*4882a593Smuzhiyun intr &= ~WL1251_ACX_INTR_RX1_DATA;
237*4882a593Smuzhiyun break;
238*4882a593Smuzhiyun case 2:
239*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "RX: FW +2");
240*4882a593Smuzhiyun intr |= WL1251_ACX_INTR_RX0_DATA;
241*4882a593Smuzhiyun intr |= WL1251_ACX_INTR_RX1_DATA;
242*4882a593Smuzhiyun break;
243*4882a593Smuzhiyun default:
244*4882a593Smuzhiyun wl1251_warning(
245*4882a593Smuzhiyun "RX: FW and host out of sync: %d",
246*4882a593Smuzhiyun wl->rx_counter - wl->rx_handled);
247*4882a593Smuzhiyun break;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun wl->rx_handled = wl->rx_counter;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "RX counter: %d",
253*4882a593Smuzhiyun wl->rx_counter);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun intr &= wl->intr_mask;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun if (intr == 0) {
259*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "INTR is 0");
260*4882a593Smuzhiyun goto out_sleep;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (intr & WL1251_ACX_INTR_RX0_DATA) {
264*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX0_DATA");
265*4882a593Smuzhiyun wl1251_rx(wl);
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun if (intr & WL1251_ACX_INTR_RX1_DATA) {
269*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX1_DATA");
270*4882a593Smuzhiyun wl1251_rx(wl);
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun if (intr & WL1251_ACX_INTR_TX_RESULT) {
274*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_TX_RESULT");
275*4882a593Smuzhiyun wl1251_tx_complete(wl);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun if (intr & WL1251_ACX_INTR_EVENT_A) {
279*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_EVENT_A");
280*4882a593Smuzhiyun wl1251_event_handle(wl, 0);
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun if (intr & WL1251_ACX_INTR_EVENT_B) {
284*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_EVENT_B");
285*4882a593Smuzhiyun wl1251_event_handle(wl, 1);
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (intr & WL1251_ACX_INTR_INIT_COMPLETE)
289*4882a593Smuzhiyun wl1251_debug(DEBUG_IRQ,
290*4882a593Smuzhiyun "WL1251_ACX_INTR_INIT_COMPLETE");
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun if (--ctr == 0)
293*4882a593Smuzhiyun break;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);
296*4882a593Smuzhiyun } while (intr);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun out_sleep:
299*4882a593Smuzhiyun wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
300*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun out:
303*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
wl1251_join(struct wl1251 * wl,u8 bss_type,u8 channel,u16 beacon_interval,u8 dtim_period)306*4882a593Smuzhiyun static int wl1251_join(struct wl1251 *wl, u8 bss_type, u8 channel,
307*4882a593Smuzhiyun u16 beacon_interval, u8 dtim_period)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun int ret;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun ret = wl1251_acx_frame_rates(wl, DEFAULT_HW_GEN_TX_RATE,
312*4882a593Smuzhiyun DEFAULT_HW_GEN_MODULATION_TYPE,
313*4882a593Smuzhiyun wl->tx_mgmt_frm_rate,
314*4882a593Smuzhiyun wl->tx_mgmt_frm_mod);
315*4882a593Smuzhiyun if (ret < 0)
316*4882a593Smuzhiyun goto out;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /*
319*4882a593Smuzhiyun * Join command applies filters, and if we are not associated,
320*4882a593Smuzhiyun * BSSID filter must be disabled for association to work.
321*4882a593Smuzhiyun */
322*4882a593Smuzhiyun if (is_zero_ether_addr(wl->bssid))
323*4882a593Smuzhiyun wl->rx_config &= ~CFG_BSSID_FILTER_EN;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun ret = wl1251_cmd_join(wl, bss_type, channel, beacon_interval,
326*4882a593Smuzhiyun dtim_period);
327*4882a593Smuzhiyun if (ret < 0)
328*4882a593Smuzhiyun goto out;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun ret = wl1251_event_wait(wl, JOIN_EVENT_COMPLETE_ID, 100);
331*4882a593Smuzhiyun if (ret < 0)
332*4882a593Smuzhiyun wl1251_warning("join timeout");
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun out:
335*4882a593Smuzhiyun return ret;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
wl1251_op_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)338*4882a593Smuzhiyun static void wl1251_op_tx(struct ieee80211_hw *hw,
339*4882a593Smuzhiyun struct ieee80211_tx_control *control,
340*4882a593Smuzhiyun struct sk_buff *skb)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
343*4882a593Smuzhiyun unsigned long flags;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun skb_queue_tail(&wl->tx_queue, skb);
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /*
348*4882a593Smuzhiyun * The chip specific setup must run before the first TX packet -
349*4882a593Smuzhiyun * before that, the tx_work will not be initialized!
350*4882a593Smuzhiyun */
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun ieee80211_queue_work(wl->hw, &wl->tx_work);
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /*
355*4882a593Smuzhiyun * The workqueue is slow to process the tx_queue and we need stop
356*4882a593Smuzhiyun * the queue here, otherwise the queue will get too long.
357*4882a593Smuzhiyun */
358*4882a593Smuzhiyun if (skb_queue_len(&wl->tx_queue) >= WL1251_TX_QUEUE_HIGH_WATERMARK) {
359*4882a593Smuzhiyun wl1251_debug(DEBUG_TX, "op_tx: tx_queue full, stop queues");
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun spin_lock_irqsave(&wl->wl_lock, flags);
362*4882a593Smuzhiyun ieee80211_stop_queues(wl->hw);
363*4882a593Smuzhiyun wl->tx_queue_stopped = true;
364*4882a593Smuzhiyun spin_unlock_irqrestore(&wl->wl_lock, flags);
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
wl1251_op_start(struct ieee80211_hw * hw)368*4882a593Smuzhiyun static int wl1251_op_start(struct ieee80211_hw *hw)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
371*4882a593Smuzhiyun struct wiphy *wiphy = hw->wiphy;
372*4882a593Smuzhiyun int ret = 0;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 start");
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun mutex_lock(&wl->mutex);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun if (wl->state != WL1251_STATE_OFF) {
379*4882a593Smuzhiyun wl1251_error("cannot start because not in off state: %d",
380*4882a593Smuzhiyun wl->state);
381*4882a593Smuzhiyun ret = -EBUSY;
382*4882a593Smuzhiyun goto out;
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun ret = wl1251_chip_wakeup(wl);
386*4882a593Smuzhiyun if (ret < 0)
387*4882a593Smuzhiyun goto out;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun ret = wl1251_boot(wl);
390*4882a593Smuzhiyun if (ret < 0)
391*4882a593Smuzhiyun goto out;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun ret = wl1251_hw_init(wl);
394*4882a593Smuzhiyun if (ret < 0)
395*4882a593Smuzhiyun goto out;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun ret = wl1251_acx_station_id(wl);
398*4882a593Smuzhiyun if (ret < 0)
399*4882a593Smuzhiyun goto out;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun wl->state = WL1251_STATE_ON;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun wl1251_info("firmware booted (%s)", wl->fw_ver);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun /* update hw/fw version info in wiphy struct */
406*4882a593Smuzhiyun wiphy->hw_version = wl->chip_id;
407*4882a593Smuzhiyun strncpy(wiphy->fw_version, wl->fw_ver, sizeof(wiphy->fw_version));
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun out:
410*4882a593Smuzhiyun if (ret < 0)
411*4882a593Smuzhiyun wl1251_power_off(wl);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun return ret;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
wl1251_op_stop(struct ieee80211_hw * hw)418*4882a593Smuzhiyun static void wl1251_op_stop(struct ieee80211_hw *hw)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun wl1251_info("down");
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 stop");
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun mutex_lock(&wl->mutex);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun WARN_ON(wl->state != WL1251_STATE_ON);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun if (wl->scanning) {
431*4882a593Smuzhiyun struct cfg80211_scan_info info = {
432*4882a593Smuzhiyun .aborted = true,
433*4882a593Smuzhiyun };
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun ieee80211_scan_completed(wl->hw, &info);
436*4882a593Smuzhiyun wl->scanning = false;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun wl->state = WL1251_STATE_OFF;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun wl1251_disable_interrupts(wl);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun cancel_work_sync(&wl->irq_work);
446*4882a593Smuzhiyun cancel_work_sync(&wl->tx_work);
447*4882a593Smuzhiyun cancel_delayed_work_sync(&wl->elp_work);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun mutex_lock(&wl->mutex);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* let's notify MAC80211 about the remaining pending TX frames */
452*4882a593Smuzhiyun wl1251_tx_flush(wl);
453*4882a593Smuzhiyun wl1251_power_off(wl);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun eth_zero_addr(wl->bssid);
456*4882a593Smuzhiyun wl->listen_int = 1;
457*4882a593Smuzhiyun wl->bss_type = MAX_BSS_TYPE;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun wl->data_in_count = 0;
460*4882a593Smuzhiyun wl->rx_counter = 0;
461*4882a593Smuzhiyun wl->rx_handled = 0;
462*4882a593Smuzhiyun wl->rx_current_buffer = 0;
463*4882a593Smuzhiyun wl->rx_last_id = 0;
464*4882a593Smuzhiyun wl->next_tx_complete = 0;
465*4882a593Smuzhiyun wl->elp = false;
466*4882a593Smuzhiyun wl->station_mode = STATION_ACTIVE_MODE;
467*4882a593Smuzhiyun wl->psm_entry_retry = 0;
468*4882a593Smuzhiyun wl->tx_queue_stopped = false;
469*4882a593Smuzhiyun wl->power_level = WL1251_DEFAULT_POWER_LEVEL;
470*4882a593Smuzhiyun wl->rssi_thold = 0;
471*4882a593Smuzhiyun wl->channel = WL1251_DEFAULT_CHANNEL;
472*4882a593Smuzhiyun wl->monitor_present = false;
473*4882a593Smuzhiyun wl->joined = false;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun wl1251_debugfs_reset(wl);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
wl1251_op_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)480*4882a593Smuzhiyun static int wl1251_op_add_interface(struct ieee80211_hw *hw,
481*4882a593Smuzhiyun struct ieee80211_vif *vif)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
484*4882a593Smuzhiyun int ret = 0;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER |
487*4882a593Smuzhiyun IEEE80211_VIF_SUPPORTS_UAPSD |
488*4882a593Smuzhiyun IEEE80211_VIF_SUPPORTS_CQM_RSSI;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %pM",
491*4882a593Smuzhiyun vif->type, vif->addr);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun mutex_lock(&wl->mutex);
494*4882a593Smuzhiyun if (wl->vif) {
495*4882a593Smuzhiyun ret = -EBUSY;
496*4882a593Smuzhiyun goto out;
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun wl->vif = vif;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun switch (vif->type) {
502*4882a593Smuzhiyun case NL80211_IFTYPE_STATION:
503*4882a593Smuzhiyun wl->bss_type = BSS_TYPE_STA_BSS;
504*4882a593Smuzhiyun break;
505*4882a593Smuzhiyun case NL80211_IFTYPE_ADHOC:
506*4882a593Smuzhiyun wl->bss_type = BSS_TYPE_IBSS;
507*4882a593Smuzhiyun break;
508*4882a593Smuzhiyun default:
509*4882a593Smuzhiyun ret = -EOPNOTSUPP;
510*4882a593Smuzhiyun goto out;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun if (!ether_addr_equal_unaligned(wl->mac_addr, vif->addr)) {
514*4882a593Smuzhiyun memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
515*4882a593Smuzhiyun SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr);
516*4882a593Smuzhiyun ret = wl1251_acx_station_id(wl);
517*4882a593Smuzhiyun if (ret < 0)
518*4882a593Smuzhiyun goto out;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun out:
522*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
523*4882a593Smuzhiyun return ret;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
wl1251_op_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)526*4882a593Smuzhiyun static void wl1251_op_remove_interface(struct ieee80211_hw *hw,
527*4882a593Smuzhiyun struct ieee80211_vif *vif)
528*4882a593Smuzhiyun {
529*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun mutex_lock(&wl->mutex);
532*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 remove interface");
533*4882a593Smuzhiyun wl->vif = NULL;
534*4882a593Smuzhiyun eth_zero_addr(wl->bssid);
535*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun
wl1251_build_null_data(struct wl1251 * wl)538*4882a593Smuzhiyun static int wl1251_build_null_data(struct wl1251 *wl)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun struct sk_buff *skb = NULL;
541*4882a593Smuzhiyun int size;
542*4882a593Smuzhiyun void *ptr;
543*4882a593Smuzhiyun int ret = -ENOMEM;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun if (wl->bss_type == BSS_TYPE_IBSS) {
546*4882a593Smuzhiyun size = sizeof(struct wl12xx_null_data_template);
547*4882a593Smuzhiyun ptr = NULL;
548*4882a593Smuzhiyun } else {
549*4882a593Smuzhiyun skb = ieee80211_nullfunc_get(wl->hw, wl->vif, false);
550*4882a593Smuzhiyun if (!skb)
551*4882a593Smuzhiyun goto out;
552*4882a593Smuzhiyun size = skb->len;
553*4882a593Smuzhiyun ptr = skb->data;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun ret = wl1251_cmd_template_set(wl, CMD_NULL_DATA, ptr, size);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun out:
559*4882a593Smuzhiyun dev_kfree_skb(skb);
560*4882a593Smuzhiyun if (ret)
561*4882a593Smuzhiyun wl1251_warning("cmd build null data failed: %d", ret);
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun return ret;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
wl1251_build_qos_null_data(struct wl1251 * wl)566*4882a593Smuzhiyun static int wl1251_build_qos_null_data(struct wl1251 *wl)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun struct ieee80211_qos_hdr template;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun memset(&template, 0, sizeof(template));
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun memcpy(template.addr1, wl->bssid, ETH_ALEN);
573*4882a593Smuzhiyun memcpy(template.addr2, wl->mac_addr, ETH_ALEN);
574*4882a593Smuzhiyun memcpy(template.addr3, wl->bssid, ETH_ALEN);
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun template.frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA |
577*4882a593Smuzhiyun IEEE80211_STYPE_QOS_NULLFUNC |
578*4882a593Smuzhiyun IEEE80211_FCTL_TODS);
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun /* FIXME: not sure what priority to use here */
581*4882a593Smuzhiyun template.qos_ctrl = cpu_to_le16(0);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun return wl1251_cmd_template_set(wl, CMD_QOS_NULL_DATA, &template,
584*4882a593Smuzhiyun sizeof(template));
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun
wl1251_can_do_pm(struct ieee80211_conf * conf,struct wl1251 * wl)587*4882a593Smuzhiyun static bool wl1251_can_do_pm(struct ieee80211_conf *conf, struct wl1251 *wl)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun return (conf->flags & IEEE80211_CONF_PS) && !wl->monitor_present;
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun
wl1251_op_config(struct ieee80211_hw * hw,u32 changed)592*4882a593Smuzhiyun static int wl1251_op_config(struct ieee80211_hw *hw, u32 changed)
593*4882a593Smuzhiyun {
594*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
595*4882a593Smuzhiyun struct ieee80211_conf *conf = &hw->conf;
596*4882a593Smuzhiyun int channel, ret = 0;
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun channel = ieee80211_frequency_to_channel(
599*4882a593Smuzhiyun conf->chandef.chan->center_freq);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211,
602*4882a593Smuzhiyun "mac80211 config ch %d monitor %s psm %s power %d",
603*4882a593Smuzhiyun channel,
604*4882a593Smuzhiyun conf->flags & IEEE80211_CONF_MONITOR ? "on" : "off",
605*4882a593Smuzhiyun conf->flags & IEEE80211_CONF_PS ? "on" : "off",
606*4882a593Smuzhiyun conf->power_level);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun mutex_lock(&wl->mutex);
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
611*4882a593Smuzhiyun if (ret < 0)
612*4882a593Smuzhiyun goto out;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
615*4882a593Smuzhiyun u32 mode;
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun if (conf->flags & IEEE80211_CONF_MONITOR) {
618*4882a593Smuzhiyun wl->monitor_present = true;
619*4882a593Smuzhiyun mode = DF_SNIFF_MODE_ENABLE | DF_ENCRYPTION_DISABLE;
620*4882a593Smuzhiyun } else {
621*4882a593Smuzhiyun wl->monitor_present = false;
622*4882a593Smuzhiyun mode = 0;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun ret = wl1251_acx_feature_cfg(wl, mode);
626*4882a593Smuzhiyun if (ret < 0)
627*4882a593Smuzhiyun goto out_sleep;
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun if (channel != wl->channel) {
631*4882a593Smuzhiyun wl->channel = channel;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun /*
634*4882a593Smuzhiyun * Use ENABLE_RX command for channel switching when no
635*4882a593Smuzhiyun * interface is present (monitor mode only).
636*4882a593Smuzhiyun * This leaves the tx path disabled in firmware, whereas
637*4882a593Smuzhiyun * the usual JOIN command seems to transmit some frames
638*4882a593Smuzhiyun * at firmware level.
639*4882a593Smuzhiyun */
640*4882a593Smuzhiyun if (wl->vif == NULL) {
641*4882a593Smuzhiyun wl->joined = false;
642*4882a593Smuzhiyun ret = wl1251_cmd_data_path_rx(wl, wl->channel, 1);
643*4882a593Smuzhiyun } else {
644*4882a593Smuzhiyun ret = wl1251_join(wl, wl->bss_type, wl->channel,
645*4882a593Smuzhiyun wl->beacon_int, wl->dtim_period);
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun if (ret < 0)
648*4882a593Smuzhiyun goto out_sleep;
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun if (wl1251_can_do_pm(conf, wl) && !wl->psm_requested) {
652*4882a593Smuzhiyun wl1251_debug(DEBUG_PSM, "psm enabled");
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun wl->psm_requested = true;
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun wl->dtim_period = conf->ps_dtim_period;
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun ret = wl1251_acx_wr_tbtt_and_dtim(wl, wl->beacon_int,
659*4882a593Smuzhiyun wl->dtim_period);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun /*
662*4882a593Smuzhiyun * mac80211 enables PSM only if we're already associated.
663*4882a593Smuzhiyun */
664*4882a593Smuzhiyun ret = wl1251_ps_set_mode(wl, STATION_POWER_SAVE_MODE);
665*4882a593Smuzhiyun if (ret < 0)
666*4882a593Smuzhiyun goto out_sleep;
667*4882a593Smuzhiyun } else if (!wl1251_can_do_pm(conf, wl) && wl->psm_requested) {
668*4882a593Smuzhiyun wl1251_debug(DEBUG_PSM, "psm disabled");
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun wl->psm_requested = false;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun if (wl->station_mode != STATION_ACTIVE_MODE) {
673*4882a593Smuzhiyun ret = wl1251_ps_set_mode(wl, STATION_ACTIVE_MODE);
674*4882a593Smuzhiyun if (ret < 0)
675*4882a593Smuzhiyun goto out_sleep;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun if (changed & IEEE80211_CONF_CHANGE_IDLE && !wl->scanning) {
680*4882a593Smuzhiyun if (conf->flags & IEEE80211_CONF_IDLE) {
681*4882a593Smuzhiyun ret = wl1251_ps_set_mode(wl, STATION_IDLE);
682*4882a593Smuzhiyun if (ret < 0)
683*4882a593Smuzhiyun goto out_sleep;
684*4882a593Smuzhiyun } else {
685*4882a593Smuzhiyun ret = wl1251_ps_set_mode(wl, STATION_ACTIVE_MODE);
686*4882a593Smuzhiyun if (ret < 0)
687*4882a593Smuzhiyun goto out_sleep;
688*4882a593Smuzhiyun ret = wl1251_join(wl, wl->bss_type, wl->channel,
689*4882a593Smuzhiyun wl->beacon_int, wl->dtim_period);
690*4882a593Smuzhiyun if (ret < 0)
691*4882a593Smuzhiyun goto out_sleep;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun if (conf->power_level != wl->power_level) {
696*4882a593Smuzhiyun ret = wl1251_acx_tx_power(wl, conf->power_level);
697*4882a593Smuzhiyun if (ret < 0)
698*4882a593Smuzhiyun goto out_sleep;
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun wl->power_level = conf->power_level;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun out_sleep:
704*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun out:
707*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun return ret;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun struct wl1251_filter_params {
713*4882a593Smuzhiyun bool enabled;
714*4882a593Smuzhiyun int mc_list_length;
715*4882a593Smuzhiyun u8 mc_list[ACX_MC_ADDRESS_GROUP_MAX][ETH_ALEN];
716*4882a593Smuzhiyun };
717*4882a593Smuzhiyun
wl1251_op_prepare_multicast(struct ieee80211_hw * hw,struct netdev_hw_addr_list * mc_list)718*4882a593Smuzhiyun static u64 wl1251_op_prepare_multicast(struct ieee80211_hw *hw,
719*4882a593Smuzhiyun struct netdev_hw_addr_list *mc_list)
720*4882a593Smuzhiyun {
721*4882a593Smuzhiyun struct wl1251_filter_params *fp;
722*4882a593Smuzhiyun struct netdev_hw_addr *ha;
723*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun if (unlikely(wl->state == WL1251_STATE_OFF))
726*4882a593Smuzhiyun return 0;
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun fp = kzalloc(sizeof(*fp), GFP_ATOMIC);
729*4882a593Smuzhiyun if (!fp) {
730*4882a593Smuzhiyun wl1251_error("Out of memory setting filters.");
731*4882a593Smuzhiyun return 0;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun /* update multicast filtering parameters */
735*4882a593Smuzhiyun fp->mc_list_length = 0;
736*4882a593Smuzhiyun if (netdev_hw_addr_list_count(mc_list) > ACX_MC_ADDRESS_GROUP_MAX) {
737*4882a593Smuzhiyun fp->enabled = false;
738*4882a593Smuzhiyun } else {
739*4882a593Smuzhiyun fp->enabled = true;
740*4882a593Smuzhiyun netdev_hw_addr_list_for_each(ha, mc_list) {
741*4882a593Smuzhiyun memcpy(fp->mc_list[fp->mc_list_length],
742*4882a593Smuzhiyun ha->addr, ETH_ALEN);
743*4882a593Smuzhiyun fp->mc_list_length++;
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun return (u64)(unsigned long)fp;
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun #define WL1251_SUPPORTED_FILTERS (FIF_ALLMULTI | \
751*4882a593Smuzhiyun FIF_FCSFAIL | \
752*4882a593Smuzhiyun FIF_BCN_PRBRESP_PROMISC | \
753*4882a593Smuzhiyun FIF_CONTROL | \
754*4882a593Smuzhiyun FIF_OTHER_BSS | \
755*4882a593Smuzhiyun FIF_PROBE_REQ)
756*4882a593Smuzhiyun
wl1251_op_configure_filter(struct ieee80211_hw * hw,unsigned int changed,unsigned int * total,u64 multicast)757*4882a593Smuzhiyun static void wl1251_op_configure_filter(struct ieee80211_hw *hw,
758*4882a593Smuzhiyun unsigned int changed,
759*4882a593Smuzhiyun unsigned int *total, u64 multicast)
760*4882a593Smuzhiyun {
761*4882a593Smuzhiyun struct wl1251_filter_params *fp = (void *)(unsigned long)multicast;
762*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
763*4882a593Smuzhiyun int ret;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 configure filter");
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun *total &= WL1251_SUPPORTED_FILTERS;
768*4882a593Smuzhiyun changed &= WL1251_SUPPORTED_FILTERS;
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun if (changed == 0) {
771*4882a593Smuzhiyun /* no filters which we support changed */
772*4882a593Smuzhiyun kfree(fp);
773*4882a593Smuzhiyun return;
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun mutex_lock(&wl->mutex);
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun wl->rx_config = WL1251_DEFAULT_RX_CONFIG;
779*4882a593Smuzhiyun wl->rx_filter = WL1251_DEFAULT_RX_FILTER;
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun if (*total & FIF_ALLMULTI)
782*4882a593Smuzhiyun /*
783*4882a593Smuzhiyun * CFG_MC_FILTER_EN in rx_config needs to be 0 to receive
784*4882a593Smuzhiyun * all multicast frames
785*4882a593Smuzhiyun */
786*4882a593Smuzhiyun wl->rx_config &= ~CFG_MC_FILTER_EN;
787*4882a593Smuzhiyun if (*total & FIF_FCSFAIL)
788*4882a593Smuzhiyun wl->rx_filter |= CFG_RX_FCS_ERROR;
789*4882a593Smuzhiyun if (*total & FIF_BCN_PRBRESP_PROMISC) {
790*4882a593Smuzhiyun wl->rx_config &= ~CFG_BSSID_FILTER_EN;
791*4882a593Smuzhiyun wl->rx_config &= ~CFG_SSID_FILTER_EN;
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun if (*total & FIF_CONTROL)
794*4882a593Smuzhiyun wl->rx_filter |= CFG_RX_CTL_EN;
795*4882a593Smuzhiyun if (*total & FIF_OTHER_BSS || is_zero_ether_addr(wl->bssid))
796*4882a593Smuzhiyun wl->rx_config &= ~CFG_BSSID_FILTER_EN;
797*4882a593Smuzhiyun if (*total & FIF_PROBE_REQ)
798*4882a593Smuzhiyun wl->rx_filter |= CFG_RX_PREQ_EN;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun if (wl->state == WL1251_STATE_OFF)
801*4882a593Smuzhiyun goto out;
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
804*4882a593Smuzhiyun if (ret < 0)
805*4882a593Smuzhiyun goto out;
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun if (*total & FIF_ALLMULTI)
808*4882a593Smuzhiyun ret = wl1251_acx_group_address_tbl(wl, false, NULL, 0);
809*4882a593Smuzhiyun else if (fp)
810*4882a593Smuzhiyun ret = wl1251_acx_group_address_tbl(wl, fp->enabled,
811*4882a593Smuzhiyun fp->mc_list,
812*4882a593Smuzhiyun fp->mc_list_length);
813*4882a593Smuzhiyun if (ret < 0)
814*4882a593Smuzhiyun goto out;
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun /* send filters to firmware */
817*4882a593Smuzhiyun wl1251_acx_rx_config(wl, wl->rx_config, wl->rx_filter);
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun out:
822*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
823*4882a593Smuzhiyun kfree(fp);
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun /* HW encryption */
wl1251_set_key_type(struct wl1251 * wl,struct wl1251_cmd_set_keys * key,enum set_key_cmd cmd,struct ieee80211_key_conf * mac80211_key,const u8 * addr)827*4882a593Smuzhiyun static int wl1251_set_key_type(struct wl1251 *wl,
828*4882a593Smuzhiyun struct wl1251_cmd_set_keys *key,
829*4882a593Smuzhiyun enum set_key_cmd cmd,
830*4882a593Smuzhiyun struct ieee80211_key_conf *mac80211_key,
831*4882a593Smuzhiyun const u8 *addr)
832*4882a593Smuzhiyun {
833*4882a593Smuzhiyun switch (mac80211_key->cipher) {
834*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP40:
835*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP104:
836*4882a593Smuzhiyun if (is_broadcast_ether_addr(addr))
837*4882a593Smuzhiyun key->key_type = KEY_WEP_DEFAULT;
838*4882a593Smuzhiyun else
839*4882a593Smuzhiyun key->key_type = KEY_WEP_ADDR;
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun mac80211_key->hw_key_idx = mac80211_key->keyidx;
842*4882a593Smuzhiyun break;
843*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_TKIP:
844*4882a593Smuzhiyun if (is_broadcast_ether_addr(addr))
845*4882a593Smuzhiyun key->key_type = KEY_TKIP_MIC_GROUP;
846*4882a593Smuzhiyun else
847*4882a593Smuzhiyun key->key_type = KEY_TKIP_MIC_PAIRWISE;
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun mac80211_key->hw_key_idx = mac80211_key->keyidx;
850*4882a593Smuzhiyun break;
851*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_CCMP:
852*4882a593Smuzhiyun if (is_broadcast_ether_addr(addr))
853*4882a593Smuzhiyun key->key_type = KEY_AES_GROUP;
854*4882a593Smuzhiyun else
855*4882a593Smuzhiyun key->key_type = KEY_AES_PAIRWISE;
856*4882a593Smuzhiyun mac80211_key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
857*4882a593Smuzhiyun break;
858*4882a593Smuzhiyun default:
859*4882a593Smuzhiyun wl1251_error("Unknown key cipher 0x%x", mac80211_key->cipher);
860*4882a593Smuzhiyun return -EOPNOTSUPP;
861*4882a593Smuzhiyun }
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun return 0;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
wl1251_op_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)866*4882a593Smuzhiyun static int wl1251_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
867*4882a593Smuzhiyun struct ieee80211_vif *vif,
868*4882a593Smuzhiyun struct ieee80211_sta *sta,
869*4882a593Smuzhiyun struct ieee80211_key_conf *key)
870*4882a593Smuzhiyun {
871*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
872*4882a593Smuzhiyun struct wl1251_cmd_set_keys *wl_cmd;
873*4882a593Smuzhiyun const u8 *addr;
874*4882a593Smuzhiyun int ret;
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun static const u8 bcast_addr[ETH_ALEN] =
877*4882a593Smuzhiyun { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 set key");
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun wl_cmd = kzalloc(sizeof(*wl_cmd), GFP_KERNEL);
882*4882a593Smuzhiyun if (!wl_cmd) {
883*4882a593Smuzhiyun ret = -ENOMEM;
884*4882a593Smuzhiyun goto out;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun addr = sta ? sta->addr : bcast_addr;
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun wl1251_debug(DEBUG_CRYPT, "CMD: 0x%x", cmd);
890*4882a593Smuzhiyun wl1251_dump(DEBUG_CRYPT, "ADDR: ", addr, ETH_ALEN);
891*4882a593Smuzhiyun wl1251_debug(DEBUG_CRYPT, "Key: algo:0x%x, id:%d, len:%d flags 0x%x",
892*4882a593Smuzhiyun key->cipher, key->keyidx, key->keylen, key->flags);
893*4882a593Smuzhiyun wl1251_dump(DEBUG_CRYPT, "KEY: ", key->key, key->keylen);
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun if (is_zero_ether_addr(addr)) {
896*4882a593Smuzhiyun /* We dont support TX only encryption */
897*4882a593Smuzhiyun ret = -EOPNOTSUPP;
898*4882a593Smuzhiyun goto out;
899*4882a593Smuzhiyun }
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun mutex_lock(&wl->mutex);
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun switch (cmd) {
904*4882a593Smuzhiyun case SET_KEY:
905*4882a593Smuzhiyun if (wl->monitor_present) {
906*4882a593Smuzhiyun ret = -EOPNOTSUPP;
907*4882a593Smuzhiyun goto out_unlock;
908*4882a593Smuzhiyun }
909*4882a593Smuzhiyun wl_cmd->key_action = KEY_ADD_OR_REPLACE;
910*4882a593Smuzhiyun break;
911*4882a593Smuzhiyun case DISABLE_KEY:
912*4882a593Smuzhiyun wl_cmd->key_action = KEY_REMOVE;
913*4882a593Smuzhiyun break;
914*4882a593Smuzhiyun default:
915*4882a593Smuzhiyun wl1251_error("Unsupported key cmd 0x%x", cmd);
916*4882a593Smuzhiyun break;
917*4882a593Smuzhiyun }
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
920*4882a593Smuzhiyun if (ret < 0)
921*4882a593Smuzhiyun goto out_unlock;
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun ret = wl1251_set_key_type(wl, wl_cmd, cmd, key, addr);
924*4882a593Smuzhiyun if (ret < 0) {
925*4882a593Smuzhiyun wl1251_error("Set KEY type failed");
926*4882a593Smuzhiyun goto out_sleep;
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun if (wl_cmd->key_type != KEY_WEP_DEFAULT)
930*4882a593Smuzhiyun memcpy(wl_cmd->addr, addr, ETH_ALEN);
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun if ((wl_cmd->key_type == KEY_TKIP_MIC_GROUP) ||
933*4882a593Smuzhiyun (wl_cmd->key_type == KEY_TKIP_MIC_PAIRWISE)) {
934*4882a593Smuzhiyun /*
935*4882a593Smuzhiyun * We get the key in the following form:
936*4882a593Smuzhiyun * TKIP (16 bytes) - TX MIC (8 bytes) - RX MIC (8 bytes)
937*4882a593Smuzhiyun * but the target is expecting:
938*4882a593Smuzhiyun * TKIP - RX MIC - TX MIC
939*4882a593Smuzhiyun */
940*4882a593Smuzhiyun memcpy(wl_cmd->key, key->key, 16);
941*4882a593Smuzhiyun memcpy(wl_cmd->key + 16, key->key + 24, 8);
942*4882a593Smuzhiyun memcpy(wl_cmd->key + 24, key->key + 16, 8);
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun } else {
945*4882a593Smuzhiyun memcpy(wl_cmd->key, key->key, key->keylen);
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun wl_cmd->key_size = key->keylen;
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun wl_cmd->id = key->keyidx;
950*4882a593Smuzhiyun wl_cmd->ssid_profile = 0;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun wl1251_dump(DEBUG_CRYPT, "TARGET KEY: ", wl_cmd, sizeof(*wl_cmd));
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun ret = wl1251_cmd_send(wl, CMD_SET_KEYS, wl_cmd, sizeof(*wl_cmd));
955*4882a593Smuzhiyun if (ret < 0) {
956*4882a593Smuzhiyun wl1251_warning("could not set keys");
957*4882a593Smuzhiyun goto out_sleep;
958*4882a593Smuzhiyun }
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun out_sleep:
961*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun out_unlock:
964*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
965*4882a593Smuzhiyun
966*4882a593Smuzhiyun out:
967*4882a593Smuzhiyun kfree(wl_cmd);
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun return ret;
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun
wl1251_op_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_scan_request * hw_req)972*4882a593Smuzhiyun static int wl1251_op_hw_scan(struct ieee80211_hw *hw,
973*4882a593Smuzhiyun struct ieee80211_vif *vif,
974*4882a593Smuzhiyun struct ieee80211_scan_request *hw_req)
975*4882a593Smuzhiyun {
976*4882a593Smuzhiyun struct cfg80211_scan_request *req = &hw_req->req;
977*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
978*4882a593Smuzhiyun struct sk_buff *skb;
979*4882a593Smuzhiyun size_t ssid_len = 0;
980*4882a593Smuzhiyun u8 *ssid = NULL;
981*4882a593Smuzhiyun int ret;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 hw scan");
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun if (req->n_ssids) {
986*4882a593Smuzhiyun ssid = req->ssids[0].ssid;
987*4882a593Smuzhiyun ssid_len = req->ssids[0].ssid_len;
988*4882a593Smuzhiyun }
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun mutex_lock(&wl->mutex);
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun if (wl->scanning) {
993*4882a593Smuzhiyun wl1251_debug(DEBUG_SCAN, "scan already in progress");
994*4882a593Smuzhiyun ret = -EINVAL;
995*4882a593Smuzhiyun goto out;
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
999*4882a593Smuzhiyun if (ret < 0)
1000*4882a593Smuzhiyun goto out;
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun if (hw->conf.flags & IEEE80211_CONF_IDLE) {
1003*4882a593Smuzhiyun ret = wl1251_ps_set_mode(wl, STATION_ACTIVE_MODE);
1004*4882a593Smuzhiyun if (ret < 0)
1005*4882a593Smuzhiyun goto out_sleep;
1006*4882a593Smuzhiyun ret = wl1251_join(wl, wl->bss_type, wl->channel,
1007*4882a593Smuzhiyun wl->beacon_int, wl->dtim_period);
1008*4882a593Smuzhiyun if (ret < 0)
1009*4882a593Smuzhiyun goto out_sleep;
1010*4882a593Smuzhiyun }
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun skb = ieee80211_probereq_get(wl->hw, wl->vif->addr, ssid, ssid_len,
1013*4882a593Smuzhiyun req->ie_len);
1014*4882a593Smuzhiyun if (!skb) {
1015*4882a593Smuzhiyun ret = -ENOMEM;
1016*4882a593Smuzhiyun goto out_idle;
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun if (req->ie_len)
1019*4882a593Smuzhiyun skb_put_data(skb, req->ie, req->ie_len);
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun ret = wl1251_cmd_template_set(wl, CMD_PROBE_REQ, skb->data,
1022*4882a593Smuzhiyun skb->len);
1023*4882a593Smuzhiyun dev_kfree_skb(skb);
1024*4882a593Smuzhiyun if (ret < 0)
1025*4882a593Smuzhiyun goto out_idle;
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun ret = wl1251_cmd_trigger_scan_to(wl, 0);
1028*4882a593Smuzhiyun if (ret < 0)
1029*4882a593Smuzhiyun goto out_idle;
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun wl->scanning = true;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun ret = wl1251_cmd_scan(wl, ssid, ssid_len, req->channels,
1034*4882a593Smuzhiyun req->n_channels, WL1251_SCAN_NUM_PROBES);
1035*4882a593Smuzhiyun if (ret < 0) {
1036*4882a593Smuzhiyun wl1251_debug(DEBUG_SCAN, "scan failed %d", ret);
1037*4882a593Smuzhiyun wl->scanning = false;
1038*4882a593Smuzhiyun goto out_idle;
1039*4882a593Smuzhiyun }
1040*4882a593Smuzhiyun goto out_sleep;
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun out_idle:
1043*4882a593Smuzhiyun if (hw->conf.flags & IEEE80211_CONF_IDLE)
1044*4882a593Smuzhiyun ret = wl1251_ps_set_mode(wl, STATION_IDLE);
1045*4882a593Smuzhiyun out_sleep:
1046*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun out:
1049*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun return ret;
1052*4882a593Smuzhiyun }
1053*4882a593Smuzhiyun
wl1251_op_set_rts_threshold(struct ieee80211_hw * hw,u32 value)1054*4882a593Smuzhiyun static int wl1251_op_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
1055*4882a593Smuzhiyun {
1056*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
1057*4882a593Smuzhiyun int ret;
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun mutex_lock(&wl->mutex);
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
1062*4882a593Smuzhiyun if (ret < 0)
1063*4882a593Smuzhiyun goto out;
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun ret = wl1251_acx_rts_threshold(wl, (u16) value);
1066*4882a593Smuzhiyun if (ret < 0)
1067*4882a593Smuzhiyun wl1251_warning("wl1251_op_set_rts_threshold failed: %d", ret);
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun out:
1072*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun return ret;
1075*4882a593Smuzhiyun }
1076*4882a593Smuzhiyun
wl1251_op_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * bss_conf,u32 changed)1077*4882a593Smuzhiyun static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw,
1078*4882a593Smuzhiyun struct ieee80211_vif *vif,
1079*4882a593Smuzhiyun struct ieee80211_bss_conf *bss_conf,
1080*4882a593Smuzhiyun u32 changed)
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
1083*4882a593Smuzhiyun struct sk_buff *beacon, *skb;
1084*4882a593Smuzhiyun bool enable;
1085*4882a593Smuzhiyun int ret;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 bss info changed");
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun mutex_lock(&wl->mutex);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
1092*4882a593Smuzhiyun if (ret < 0)
1093*4882a593Smuzhiyun goto out;
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun if (changed & BSS_CHANGED_CQM) {
1096*4882a593Smuzhiyun ret = wl1251_acx_low_rssi(wl, bss_conf->cqm_rssi_thold,
1097*4882a593Smuzhiyun WL1251_DEFAULT_LOW_RSSI_WEIGHT,
1098*4882a593Smuzhiyun WL1251_DEFAULT_LOW_RSSI_DEPTH,
1099*4882a593Smuzhiyun WL1251_ACX_LOW_RSSI_TYPE_EDGE);
1100*4882a593Smuzhiyun if (ret < 0)
1101*4882a593Smuzhiyun goto out;
1102*4882a593Smuzhiyun wl->rssi_thold = bss_conf->cqm_rssi_thold;
1103*4882a593Smuzhiyun }
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun if ((changed & BSS_CHANGED_BSSID) &&
1106*4882a593Smuzhiyun memcmp(wl->bssid, bss_conf->bssid, ETH_ALEN)) {
1107*4882a593Smuzhiyun memcpy(wl->bssid, bss_conf->bssid, ETH_ALEN);
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun if (!is_zero_ether_addr(wl->bssid)) {
1110*4882a593Smuzhiyun ret = wl1251_build_null_data(wl);
1111*4882a593Smuzhiyun if (ret < 0)
1112*4882a593Smuzhiyun goto out_sleep;
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun ret = wl1251_build_qos_null_data(wl);
1115*4882a593Smuzhiyun if (ret < 0)
1116*4882a593Smuzhiyun goto out_sleep;
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun ret = wl1251_join(wl, wl->bss_type, wl->channel,
1119*4882a593Smuzhiyun wl->beacon_int, wl->dtim_period);
1120*4882a593Smuzhiyun if (ret < 0)
1121*4882a593Smuzhiyun goto out_sleep;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun if (changed & BSS_CHANGED_ASSOC) {
1126*4882a593Smuzhiyun if (bss_conf->assoc) {
1127*4882a593Smuzhiyun wl->beacon_int = bss_conf->beacon_int;
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun skb = ieee80211_pspoll_get(wl->hw, wl->vif);
1130*4882a593Smuzhiyun if (!skb)
1131*4882a593Smuzhiyun goto out_sleep;
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun ret = wl1251_cmd_template_set(wl, CMD_PS_POLL,
1134*4882a593Smuzhiyun skb->data,
1135*4882a593Smuzhiyun skb->len);
1136*4882a593Smuzhiyun dev_kfree_skb(skb);
1137*4882a593Smuzhiyun if (ret < 0)
1138*4882a593Smuzhiyun goto out_sleep;
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun ret = wl1251_acx_aid(wl, bss_conf->aid);
1141*4882a593Smuzhiyun if (ret < 0)
1142*4882a593Smuzhiyun goto out_sleep;
1143*4882a593Smuzhiyun } else {
1144*4882a593Smuzhiyun /* use defaults when not associated */
1145*4882a593Smuzhiyun wl->beacon_int = WL1251_DEFAULT_BEACON_INT;
1146*4882a593Smuzhiyun wl->dtim_period = WL1251_DEFAULT_DTIM_PERIOD;
1147*4882a593Smuzhiyun }
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun if (changed & BSS_CHANGED_ERP_SLOT) {
1150*4882a593Smuzhiyun if (bss_conf->use_short_slot)
1151*4882a593Smuzhiyun ret = wl1251_acx_slot(wl, SLOT_TIME_SHORT);
1152*4882a593Smuzhiyun else
1153*4882a593Smuzhiyun ret = wl1251_acx_slot(wl, SLOT_TIME_LONG);
1154*4882a593Smuzhiyun if (ret < 0) {
1155*4882a593Smuzhiyun wl1251_warning("Set slot time failed %d", ret);
1156*4882a593Smuzhiyun goto out_sleep;
1157*4882a593Smuzhiyun }
1158*4882a593Smuzhiyun }
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1161*4882a593Smuzhiyun if (bss_conf->use_short_preamble)
1162*4882a593Smuzhiyun wl1251_acx_set_preamble(wl, ACX_PREAMBLE_SHORT);
1163*4882a593Smuzhiyun else
1164*4882a593Smuzhiyun wl1251_acx_set_preamble(wl, ACX_PREAMBLE_LONG);
1165*4882a593Smuzhiyun }
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1168*4882a593Smuzhiyun if (bss_conf->use_cts_prot)
1169*4882a593Smuzhiyun ret = wl1251_acx_cts_protect(wl, CTSPROTECT_ENABLE);
1170*4882a593Smuzhiyun else
1171*4882a593Smuzhiyun ret = wl1251_acx_cts_protect(wl, CTSPROTECT_DISABLE);
1172*4882a593Smuzhiyun if (ret < 0) {
1173*4882a593Smuzhiyun wl1251_warning("Set ctsprotect failed %d", ret);
1174*4882a593Smuzhiyun goto out_sleep;
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun if (changed & BSS_CHANGED_ARP_FILTER) {
1179*4882a593Smuzhiyun __be32 addr = bss_conf->arp_addr_list[0];
1180*4882a593Smuzhiyun WARN_ON(wl->bss_type != BSS_TYPE_STA_BSS);
1181*4882a593Smuzhiyun
1182*4882a593Smuzhiyun enable = bss_conf->arp_addr_cnt == 1 && bss_conf->assoc;
1183*4882a593Smuzhiyun ret = wl1251_acx_arp_ip_filter(wl, enable, addr);
1184*4882a593Smuzhiyun if (ret < 0)
1185*4882a593Smuzhiyun goto out_sleep;
1186*4882a593Smuzhiyun }
1187*4882a593Smuzhiyun
1188*4882a593Smuzhiyun if (changed & BSS_CHANGED_BEACON) {
1189*4882a593Smuzhiyun beacon = ieee80211_beacon_get(hw, vif);
1190*4882a593Smuzhiyun if (!beacon)
1191*4882a593Smuzhiyun goto out_sleep;
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun ret = wl1251_cmd_template_set(wl, CMD_BEACON, beacon->data,
1194*4882a593Smuzhiyun beacon->len);
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun if (ret < 0) {
1197*4882a593Smuzhiyun dev_kfree_skb(beacon);
1198*4882a593Smuzhiyun goto out_sleep;
1199*4882a593Smuzhiyun }
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun ret = wl1251_cmd_template_set(wl, CMD_PROBE_RESP, beacon->data,
1202*4882a593Smuzhiyun beacon->len);
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun dev_kfree_skb(beacon);
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun if (ret < 0)
1207*4882a593Smuzhiyun goto out_sleep;
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun ret = wl1251_join(wl, wl->bss_type, wl->channel,
1210*4882a593Smuzhiyun wl->beacon_int, wl->dtim_period);
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun if (ret < 0)
1213*4882a593Smuzhiyun goto out_sleep;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun
1216*4882a593Smuzhiyun out_sleep:
1217*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun out:
1220*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun /* can't be const, mac80211 writes to this */
1225*4882a593Smuzhiyun static struct ieee80211_rate wl1251_rates[] = {
1226*4882a593Smuzhiyun { .bitrate = 10,
1227*4882a593Smuzhiyun .hw_value = 0x1,
1228*4882a593Smuzhiyun .hw_value_short = 0x1, },
1229*4882a593Smuzhiyun { .bitrate = 20,
1230*4882a593Smuzhiyun .hw_value = 0x2,
1231*4882a593Smuzhiyun .hw_value_short = 0x2,
1232*4882a593Smuzhiyun .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1233*4882a593Smuzhiyun { .bitrate = 55,
1234*4882a593Smuzhiyun .hw_value = 0x4,
1235*4882a593Smuzhiyun .hw_value_short = 0x4,
1236*4882a593Smuzhiyun .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1237*4882a593Smuzhiyun { .bitrate = 110,
1238*4882a593Smuzhiyun .hw_value = 0x20,
1239*4882a593Smuzhiyun .hw_value_short = 0x20,
1240*4882a593Smuzhiyun .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1241*4882a593Smuzhiyun { .bitrate = 60,
1242*4882a593Smuzhiyun .hw_value = 0x8,
1243*4882a593Smuzhiyun .hw_value_short = 0x8, },
1244*4882a593Smuzhiyun { .bitrate = 90,
1245*4882a593Smuzhiyun .hw_value = 0x10,
1246*4882a593Smuzhiyun .hw_value_short = 0x10, },
1247*4882a593Smuzhiyun { .bitrate = 120,
1248*4882a593Smuzhiyun .hw_value = 0x40,
1249*4882a593Smuzhiyun .hw_value_short = 0x40, },
1250*4882a593Smuzhiyun { .bitrate = 180,
1251*4882a593Smuzhiyun .hw_value = 0x80,
1252*4882a593Smuzhiyun .hw_value_short = 0x80, },
1253*4882a593Smuzhiyun { .bitrate = 240,
1254*4882a593Smuzhiyun .hw_value = 0x200,
1255*4882a593Smuzhiyun .hw_value_short = 0x200, },
1256*4882a593Smuzhiyun { .bitrate = 360,
1257*4882a593Smuzhiyun .hw_value = 0x400,
1258*4882a593Smuzhiyun .hw_value_short = 0x400, },
1259*4882a593Smuzhiyun { .bitrate = 480,
1260*4882a593Smuzhiyun .hw_value = 0x800,
1261*4882a593Smuzhiyun .hw_value_short = 0x800, },
1262*4882a593Smuzhiyun { .bitrate = 540,
1263*4882a593Smuzhiyun .hw_value = 0x1000,
1264*4882a593Smuzhiyun .hw_value_short = 0x1000, },
1265*4882a593Smuzhiyun };
1266*4882a593Smuzhiyun
1267*4882a593Smuzhiyun /* can't be const, mac80211 writes to this */
1268*4882a593Smuzhiyun static struct ieee80211_channel wl1251_channels[] = {
1269*4882a593Smuzhiyun { .hw_value = 1, .center_freq = 2412},
1270*4882a593Smuzhiyun { .hw_value = 2, .center_freq = 2417},
1271*4882a593Smuzhiyun { .hw_value = 3, .center_freq = 2422},
1272*4882a593Smuzhiyun { .hw_value = 4, .center_freq = 2427},
1273*4882a593Smuzhiyun { .hw_value = 5, .center_freq = 2432},
1274*4882a593Smuzhiyun { .hw_value = 6, .center_freq = 2437},
1275*4882a593Smuzhiyun { .hw_value = 7, .center_freq = 2442},
1276*4882a593Smuzhiyun { .hw_value = 8, .center_freq = 2447},
1277*4882a593Smuzhiyun { .hw_value = 9, .center_freq = 2452},
1278*4882a593Smuzhiyun { .hw_value = 10, .center_freq = 2457},
1279*4882a593Smuzhiyun { .hw_value = 11, .center_freq = 2462},
1280*4882a593Smuzhiyun { .hw_value = 12, .center_freq = 2467},
1281*4882a593Smuzhiyun { .hw_value = 13, .center_freq = 2472},
1282*4882a593Smuzhiyun };
1283*4882a593Smuzhiyun
wl1251_op_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 queue,const struct ieee80211_tx_queue_params * params)1284*4882a593Smuzhiyun static int wl1251_op_conf_tx(struct ieee80211_hw *hw,
1285*4882a593Smuzhiyun struct ieee80211_vif *vif, u16 queue,
1286*4882a593Smuzhiyun const struct ieee80211_tx_queue_params *params)
1287*4882a593Smuzhiyun {
1288*4882a593Smuzhiyun enum wl1251_acx_ps_scheme ps_scheme;
1289*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
1290*4882a593Smuzhiyun int ret;
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun mutex_lock(&wl->mutex);
1293*4882a593Smuzhiyun
1294*4882a593Smuzhiyun wl1251_debug(DEBUG_MAC80211, "mac80211 conf tx %d", queue);
1295*4882a593Smuzhiyun
1296*4882a593Smuzhiyun ret = wl1251_ps_elp_wakeup(wl);
1297*4882a593Smuzhiyun if (ret < 0)
1298*4882a593Smuzhiyun goto out;
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun /* mac80211 uses units of 32 usec */
1301*4882a593Smuzhiyun ret = wl1251_acx_ac_cfg(wl, wl1251_tx_get_queue(queue),
1302*4882a593Smuzhiyun params->cw_min, params->cw_max,
1303*4882a593Smuzhiyun params->aifs, params->txop * 32);
1304*4882a593Smuzhiyun if (ret < 0)
1305*4882a593Smuzhiyun goto out_sleep;
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun if (params->uapsd)
1308*4882a593Smuzhiyun ps_scheme = WL1251_ACX_PS_SCHEME_UPSD_TRIGGER;
1309*4882a593Smuzhiyun else
1310*4882a593Smuzhiyun ps_scheme = WL1251_ACX_PS_SCHEME_LEGACY;
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun ret = wl1251_acx_tid_cfg(wl, wl1251_tx_get_queue(queue),
1313*4882a593Smuzhiyun CHANNEL_TYPE_EDCF,
1314*4882a593Smuzhiyun wl1251_tx_get_queue(queue), ps_scheme,
1315*4882a593Smuzhiyun WL1251_ACX_ACK_POLICY_LEGACY);
1316*4882a593Smuzhiyun if (ret < 0)
1317*4882a593Smuzhiyun goto out_sleep;
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun out_sleep:
1320*4882a593Smuzhiyun wl1251_ps_elp_sleep(wl);
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun out:
1323*4882a593Smuzhiyun mutex_unlock(&wl->mutex);
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun return ret;
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun
wl1251_op_get_survey(struct ieee80211_hw * hw,int idx,struct survey_info * survey)1328*4882a593Smuzhiyun static int wl1251_op_get_survey(struct ieee80211_hw *hw, int idx,
1329*4882a593Smuzhiyun struct survey_info *survey)
1330*4882a593Smuzhiyun {
1331*4882a593Smuzhiyun struct wl1251 *wl = hw->priv;
1332*4882a593Smuzhiyun struct ieee80211_conf *conf = &hw->conf;
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun if (idx != 0)
1335*4882a593Smuzhiyun return -ENOENT;
1336*4882a593Smuzhiyun
1337*4882a593Smuzhiyun survey->channel = conf->chandef.chan;
1338*4882a593Smuzhiyun survey->filled = SURVEY_INFO_NOISE_DBM;
1339*4882a593Smuzhiyun survey->noise = wl->noise;
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun return 0;
1342*4882a593Smuzhiyun }
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun /* can't be const, mac80211 writes to this */
1345*4882a593Smuzhiyun static struct ieee80211_supported_band wl1251_band_2ghz = {
1346*4882a593Smuzhiyun .channels = wl1251_channels,
1347*4882a593Smuzhiyun .n_channels = ARRAY_SIZE(wl1251_channels),
1348*4882a593Smuzhiyun .bitrates = wl1251_rates,
1349*4882a593Smuzhiyun .n_bitrates = ARRAY_SIZE(wl1251_rates),
1350*4882a593Smuzhiyun };
1351*4882a593Smuzhiyun
1352*4882a593Smuzhiyun static const struct ieee80211_ops wl1251_ops = {
1353*4882a593Smuzhiyun .start = wl1251_op_start,
1354*4882a593Smuzhiyun .stop = wl1251_op_stop,
1355*4882a593Smuzhiyun .add_interface = wl1251_op_add_interface,
1356*4882a593Smuzhiyun .remove_interface = wl1251_op_remove_interface,
1357*4882a593Smuzhiyun .config = wl1251_op_config,
1358*4882a593Smuzhiyun .prepare_multicast = wl1251_op_prepare_multicast,
1359*4882a593Smuzhiyun .configure_filter = wl1251_op_configure_filter,
1360*4882a593Smuzhiyun .tx = wl1251_op_tx,
1361*4882a593Smuzhiyun .set_key = wl1251_op_set_key,
1362*4882a593Smuzhiyun .hw_scan = wl1251_op_hw_scan,
1363*4882a593Smuzhiyun .bss_info_changed = wl1251_op_bss_info_changed,
1364*4882a593Smuzhiyun .set_rts_threshold = wl1251_op_set_rts_threshold,
1365*4882a593Smuzhiyun .conf_tx = wl1251_op_conf_tx,
1366*4882a593Smuzhiyun .get_survey = wl1251_op_get_survey,
1367*4882a593Smuzhiyun };
1368*4882a593Smuzhiyun
wl1251_read_eeprom_byte(struct wl1251 * wl,off_t offset,u8 * data)1369*4882a593Smuzhiyun static int wl1251_read_eeprom_byte(struct wl1251 *wl, off_t offset, u8 *data)
1370*4882a593Smuzhiyun {
1371*4882a593Smuzhiyun unsigned long timeout;
1372*4882a593Smuzhiyun
1373*4882a593Smuzhiyun wl1251_reg_write32(wl, EE_ADDR, offset);
1374*4882a593Smuzhiyun wl1251_reg_write32(wl, EE_CTL, EE_CTL_READ);
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun /* EE_CTL_READ clears when data is ready */
1377*4882a593Smuzhiyun timeout = jiffies + msecs_to_jiffies(100);
1378*4882a593Smuzhiyun while (1) {
1379*4882a593Smuzhiyun if (!(wl1251_reg_read32(wl, EE_CTL) & EE_CTL_READ))
1380*4882a593Smuzhiyun break;
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun if (time_after(jiffies, timeout))
1383*4882a593Smuzhiyun return -ETIMEDOUT;
1384*4882a593Smuzhiyun
1385*4882a593Smuzhiyun msleep(1);
1386*4882a593Smuzhiyun }
1387*4882a593Smuzhiyun
1388*4882a593Smuzhiyun *data = wl1251_reg_read32(wl, EE_DATA);
1389*4882a593Smuzhiyun return 0;
1390*4882a593Smuzhiyun }
1391*4882a593Smuzhiyun
wl1251_read_eeprom(struct wl1251 * wl,off_t offset,u8 * data,size_t len)1392*4882a593Smuzhiyun static int wl1251_read_eeprom(struct wl1251 *wl, off_t offset,
1393*4882a593Smuzhiyun u8 *data, size_t len)
1394*4882a593Smuzhiyun {
1395*4882a593Smuzhiyun size_t i;
1396*4882a593Smuzhiyun int ret;
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun wl1251_reg_write32(wl, EE_START, 0);
1399*4882a593Smuzhiyun
1400*4882a593Smuzhiyun for (i = 0; i < len; i++) {
1401*4882a593Smuzhiyun ret = wl1251_read_eeprom_byte(wl, offset + i, &data[i]);
1402*4882a593Smuzhiyun if (ret < 0)
1403*4882a593Smuzhiyun return ret;
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun return 0;
1407*4882a593Smuzhiyun }
1408*4882a593Smuzhiyun
wl1251_read_eeprom_mac(struct wl1251 * wl)1409*4882a593Smuzhiyun static int wl1251_read_eeprom_mac(struct wl1251 *wl)
1410*4882a593Smuzhiyun {
1411*4882a593Smuzhiyun u8 mac[ETH_ALEN];
1412*4882a593Smuzhiyun int i, ret;
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun wl1251_set_partition(wl, 0, 0, REGISTERS_BASE, REGISTERS_DOWN_SIZE);
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun ret = wl1251_read_eeprom(wl, 0x1c, mac, sizeof(mac));
1417*4882a593Smuzhiyun if (ret < 0) {
1418*4882a593Smuzhiyun wl1251_warning("failed to read MAC address from EEPROM");
1419*4882a593Smuzhiyun return ret;
1420*4882a593Smuzhiyun }
1421*4882a593Smuzhiyun
1422*4882a593Smuzhiyun /* MAC is stored in reverse order */
1423*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN; i++)
1424*4882a593Smuzhiyun wl->mac_addr[i] = mac[ETH_ALEN - i - 1];
1425*4882a593Smuzhiyun
1426*4882a593Smuzhiyun return 0;
1427*4882a593Smuzhiyun }
1428*4882a593Smuzhiyun
1429*4882a593Smuzhiyun #define NVS_OFF_MAC_LEN 0x19
1430*4882a593Smuzhiyun #define NVS_OFF_MAC_ADDR_LO 0x1a
1431*4882a593Smuzhiyun #define NVS_OFF_MAC_ADDR_HI 0x1b
1432*4882a593Smuzhiyun #define NVS_OFF_MAC_DATA 0x1c
1433*4882a593Smuzhiyun
wl1251_check_nvs_mac(struct wl1251 * wl)1434*4882a593Smuzhiyun static int wl1251_check_nvs_mac(struct wl1251 *wl)
1435*4882a593Smuzhiyun {
1436*4882a593Smuzhiyun if (wl->nvs_len < 0x24)
1437*4882a593Smuzhiyun return -ENODATA;
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun /* length is 2 and data address is 0x546c (ANDed with 0xfffe) */
1440*4882a593Smuzhiyun if (wl->nvs[NVS_OFF_MAC_LEN] != 2 ||
1441*4882a593Smuzhiyun wl->nvs[NVS_OFF_MAC_ADDR_LO] != 0x6d ||
1442*4882a593Smuzhiyun wl->nvs[NVS_OFF_MAC_ADDR_HI] != 0x54)
1443*4882a593Smuzhiyun return -EINVAL;
1444*4882a593Smuzhiyun
1445*4882a593Smuzhiyun return 0;
1446*4882a593Smuzhiyun }
1447*4882a593Smuzhiyun
wl1251_read_nvs_mac(struct wl1251 * wl)1448*4882a593Smuzhiyun static int wl1251_read_nvs_mac(struct wl1251 *wl)
1449*4882a593Smuzhiyun {
1450*4882a593Smuzhiyun u8 mac[ETH_ALEN];
1451*4882a593Smuzhiyun int i, ret;
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun ret = wl1251_check_nvs_mac(wl);
1454*4882a593Smuzhiyun if (ret)
1455*4882a593Smuzhiyun return ret;
1456*4882a593Smuzhiyun
1457*4882a593Smuzhiyun /* MAC is stored in reverse order */
1458*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN; i++)
1459*4882a593Smuzhiyun mac[i] = wl->nvs[NVS_OFF_MAC_DATA + ETH_ALEN - i - 1];
1460*4882a593Smuzhiyun
1461*4882a593Smuzhiyun /* 00:00:20:07:03:09 is in example file wl1251-nvs.bin, so invalid */
1462*4882a593Smuzhiyun if (ether_addr_equal_unaligned(mac, "\x00\x00\x20\x07\x03\x09"))
1463*4882a593Smuzhiyun return -EINVAL;
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun memcpy(wl->mac_addr, mac, ETH_ALEN);
1466*4882a593Smuzhiyun return 0;
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun
wl1251_write_nvs_mac(struct wl1251 * wl)1469*4882a593Smuzhiyun static int wl1251_write_nvs_mac(struct wl1251 *wl)
1470*4882a593Smuzhiyun {
1471*4882a593Smuzhiyun int i, ret;
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun ret = wl1251_check_nvs_mac(wl);
1474*4882a593Smuzhiyun if (ret)
1475*4882a593Smuzhiyun return ret;
1476*4882a593Smuzhiyun
1477*4882a593Smuzhiyun /* MAC is stored in reverse order */
1478*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN; i++)
1479*4882a593Smuzhiyun wl->nvs[NVS_OFF_MAC_DATA + i] = wl->mac_addr[ETH_ALEN - i - 1];
1480*4882a593Smuzhiyun
1481*4882a593Smuzhiyun return 0;
1482*4882a593Smuzhiyun }
1483*4882a593Smuzhiyun
wl1251_register_hw(struct wl1251 * wl)1484*4882a593Smuzhiyun static int wl1251_register_hw(struct wl1251 *wl)
1485*4882a593Smuzhiyun {
1486*4882a593Smuzhiyun int ret;
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun if (wl->mac80211_registered)
1489*4882a593Smuzhiyun return 0;
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr);
1492*4882a593Smuzhiyun
1493*4882a593Smuzhiyun ret = ieee80211_register_hw(wl->hw);
1494*4882a593Smuzhiyun if (ret < 0) {
1495*4882a593Smuzhiyun wl1251_error("unable to register mac80211 hw: %d", ret);
1496*4882a593Smuzhiyun return ret;
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun
1499*4882a593Smuzhiyun wl->mac80211_registered = true;
1500*4882a593Smuzhiyun
1501*4882a593Smuzhiyun wl1251_notice("loaded");
1502*4882a593Smuzhiyun
1503*4882a593Smuzhiyun return 0;
1504*4882a593Smuzhiyun }
1505*4882a593Smuzhiyun
wl1251_init_ieee80211(struct wl1251 * wl)1506*4882a593Smuzhiyun int wl1251_init_ieee80211(struct wl1251 *wl)
1507*4882a593Smuzhiyun {
1508*4882a593Smuzhiyun int ret;
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun /* The tx descriptor buffer and the TKIP space */
1511*4882a593Smuzhiyun wl->hw->extra_tx_headroom = sizeof(struct tx_double_buffer_desc)
1512*4882a593Smuzhiyun + WL1251_TKIP_IV_SPACE;
1513*4882a593Smuzhiyun
1514*4882a593Smuzhiyun /* unit us */
1515*4882a593Smuzhiyun /* FIXME: find a proper value */
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun ieee80211_hw_set(wl->hw, SIGNAL_DBM);
1518*4882a593Smuzhiyun ieee80211_hw_set(wl->hw, SUPPORTS_PS);
1519*4882a593Smuzhiyun
1520*4882a593Smuzhiyun wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1521*4882a593Smuzhiyun BIT(NL80211_IFTYPE_ADHOC);
1522*4882a593Smuzhiyun wl->hw->wiphy->max_scan_ssids = 1;
1523*4882a593Smuzhiyun wl->hw->wiphy->bands[NL80211_BAND_2GHZ] = &wl1251_band_2ghz;
1524*4882a593Smuzhiyun
1525*4882a593Smuzhiyun wl->hw->queues = 4;
1526*4882a593Smuzhiyun
1527*4882a593Smuzhiyun if (wl->nvs == NULL && !wl->use_eeprom) {
1528*4882a593Smuzhiyun ret = wl1251_fetch_nvs(wl);
1529*4882a593Smuzhiyun if (ret < 0)
1530*4882a593Smuzhiyun goto out;
1531*4882a593Smuzhiyun }
1532*4882a593Smuzhiyun
1533*4882a593Smuzhiyun if (wl->use_eeprom)
1534*4882a593Smuzhiyun ret = wl1251_read_eeprom_mac(wl);
1535*4882a593Smuzhiyun else
1536*4882a593Smuzhiyun ret = wl1251_read_nvs_mac(wl);
1537*4882a593Smuzhiyun
1538*4882a593Smuzhiyun if (ret == 0 && !is_valid_ether_addr(wl->mac_addr))
1539*4882a593Smuzhiyun ret = -EINVAL;
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun if (ret < 0) {
1542*4882a593Smuzhiyun /*
1543*4882a593Smuzhiyun * In case our MAC address is not correctly set,
1544*4882a593Smuzhiyun * we use a random but Nokia MAC.
1545*4882a593Smuzhiyun */
1546*4882a593Smuzhiyun static const u8 nokia_oui[3] = {0x00, 0x1f, 0xdf};
1547*4882a593Smuzhiyun memcpy(wl->mac_addr, nokia_oui, 3);
1548*4882a593Smuzhiyun get_random_bytes(wl->mac_addr + 3, 3);
1549*4882a593Smuzhiyun if (!wl->use_eeprom)
1550*4882a593Smuzhiyun wl1251_write_nvs_mac(wl);
1551*4882a593Smuzhiyun wl1251_warning("MAC address in eeprom or nvs data is not valid");
1552*4882a593Smuzhiyun wl1251_warning("Setting random MAC address: %pM", wl->mac_addr);
1553*4882a593Smuzhiyun }
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun ret = wl1251_register_hw(wl);
1556*4882a593Smuzhiyun if (ret)
1557*4882a593Smuzhiyun goto out;
1558*4882a593Smuzhiyun
1559*4882a593Smuzhiyun wl1251_debugfs_init(wl);
1560*4882a593Smuzhiyun wl1251_notice("initialized");
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun ret = 0;
1563*4882a593Smuzhiyun
1564*4882a593Smuzhiyun out:
1565*4882a593Smuzhiyun return ret;
1566*4882a593Smuzhiyun }
1567*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wl1251_init_ieee80211);
1568*4882a593Smuzhiyun
wl1251_alloc_hw(void)1569*4882a593Smuzhiyun struct ieee80211_hw *wl1251_alloc_hw(void)
1570*4882a593Smuzhiyun {
1571*4882a593Smuzhiyun struct ieee80211_hw *hw;
1572*4882a593Smuzhiyun struct wl1251 *wl;
1573*4882a593Smuzhiyun int i;
1574*4882a593Smuzhiyun
1575*4882a593Smuzhiyun hw = ieee80211_alloc_hw(sizeof(*wl), &wl1251_ops);
1576*4882a593Smuzhiyun if (!hw) {
1577*4882a593Smuzhiyun wl1251_error("could not alloc ieee80211_hw");
1578*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
1579*4882a593Smuzhiyun }
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun wl = hw->priv;
1582*4882a593Smuzhiyun memset(wl, 0, sizeof(*wl));
1583*4882a593Smuzhiyun
1584*4882a593Smuzhiyun wl->hw = hw;
1585*4882a593Smuzhiyun
1586*4882a593Smuzhiyun wl->data_in_count = 0;
1587*4882a593Smuzhiyun
1588*4882a593Smuzhiyun skb_queue_head_init(&wl->tx_queue);
1589*4882a593Smuzhiyun
1590*4882a593Smuzhiyun INIT_DELAYED_WORK(&wl->elp_work, wl1251_elp_work);
1591*4882a593Smuzhiyun wl->channel = WL1251_DEFAULT_CHANNEL;
1592*4882a593Smuzhiyun wl->monitor_present = false;
1593*4882a593Smuzhiyun wl->joined = false;
1594*4882a593Smuzhiyun wl->scanning = false;
1595*4882a593Smuzhiyun wl->bss_type = MAX_BSS_TYPE;
1596*4882a593Smuzhiyun wl->default_key = 0;
1597*4882a593Smuzhiyun wl->listen_int = 1;
1598*4882a593Smuzhiyun wl->rx_counter = 0;
1599*4882a593Smuzhiyun wl->rx_handled = 0;
1600*4882a593Smuzhiyun wl->rx_current_buffer = 0;
1601*4882a593Smuzhiyun wl->rx_last_id = 0;
1602*4882a593Smuzhiyun wl->rx_config = WL1251_DEFAULT_RX_CONFIG;
1603*4882a593Smuzhiyun wl->rx_filter = WL1251_DEFAULT_RX_FILTER;
1604*4882a593Smuzhiyun wl->elp = false;
1605*4882a593Smuzhiyun wl->station_mode = STATION_ACTIVE_MODE;
1606*4882a593Smuzhiyun wl->psm_requested = false;
1607*4882a593Smuzhiyun wl->psm_entry_retry = 0;
1608*4882a593Smuzhiyun wl->tx_queue_stopped = false;
1609*4882a593Smuzhiyun wl->power_level = WL1251_DEFAULT_POWER_LEVEL;
1610*4882a593Smuzhiyun wl->rssi_thold = 0;
1611*4882a593Smuzhiyun wl->beacon_int = WL1251_DEFAULT_BEACON_INT;
1612*4882a593Smuzhiyun wl->dtim_period = WL1251_DEFAULT_DTIM_PERIOD;
1613*4882a593Smuzhiyun wl->vif = NULL;
1614*4882a593Smuzhiyun
1615*4882a593Smuzhiyun for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++)
1616*4882a593Smuzhiyun wl->tx_frames[i] = NULL;
1617*4882a593Smuzhiyun
1618*4882a593Smuzhiyun wl->next_tx_complete = 0;
1619*4882a593Smuzhiyun
1620*4882a593Smuzhiyun INIT_WORK(&wl->irq_work, wl1251_irq_work);
1621*4882a593Smuzhiyun INIT_WORK(&wl->tx_work, wl1251_tx_work);
1622*4882a593Smuzhiyun
1623*4882a593Smuzhiyun wl->state = WL1251_STATE_OFF;
1624*4882a593Smuzhiyun mutex_init(&wl->mutex);
1625*4882a593Smuzhiyun spin_lock_init(&wl->wl_lock);
1626*4882a593Smuzhiyun
1627*4882a593Smuzhiyun wl->tx_mgmt_frm_rate = DEFAULT_HW_GEN_TX_RATE;
1628*4882a593Smuzhiyun wl->tx_mgmt_frm_mod = DEFAULT_HW_GEN_MODULATION_TYPE;
1629*4882a593Smuzhiyun
1630*4882a593Smuzhiyun wl->rx_descriptor = kmalloc(sizeof(*wl->rx_descriptor), GFP_KERNEL);
1631*4882a593Smuzhiyun if (!wl->rx_descriptor) {
1632*4882a593Smuzhiyun wl1251_error("could not allocate memory for rx descriptor");
1633*4882a593Smuzhiyun ieee80211_free_hw(hw);
1634*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
1635*4882a593Smuzhiyun }
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun return hw;
1638*4882a593Smuzhiyun }
1639*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wl1251_alloc_hw);
1640*4882a593Smuzhiyun
wl1251_free_hw(struct wl1251 * wl)1641*4882a593Smuzhiyun int wl1251_free_hw(struct wl1251 *wl)
1642*4882a593Smuzhiyun {
1643*4882a593Smuzhiyun ieee80211_unregister_hw(wl->hw);
1644*4882a593Smuzhiyun
1645*4882a593Smuzhiyun wl1251_debugfs_exit(wl);
1646*4882a593Smuzhiyun
1647*4882a593Smuzhiyun kfree(wl->target_mem_map);
1648*4882a593Smuzhiyun kfree(wl->data_path);
1649*4882a593Smuzhiyun vfree(wl->fw);
1650*4882a593Smuzhiyun wl->fw = NULL;
1651*4882a593Smuzhiyun kfree(wl->nvs);
1652*4882a593Smuzhiyun wl->nvs = NULL;
1653*4882a593Smuzhiyun
1654*4882a593Smuzhiyun kfree(wl->rx_descriptor);
1655*4882a593Smuzhiyun wl->rx_descriptor = NULL;
1656*4882a593Smuzhiyun
1657*4882a593Smuzhiyun ieee80211_free_hw(wl->hw);
1658*4882a593Smuzhiyun
1659*4882a593Smuzhiyun return 0;
1660*4882a593Smuzhiyun }
1661*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wl1251_free_hw);
1662*4882a593Smuzhiyun
1663*4882a593Smuzhiyun MODULE_DESCRIPTION("TI wl1251 Wireless LAN Driver Core");
1664*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1665*4882a593Smuzhiyun MODULE_AUTHOR("Kalle Valo <kvalo@adurom.com>");
1666*4882a593Smuzhiyun MODULE_FIRMWARE(WL1251_FW_NAME);
1667*4882a593Smuzhiyun MODULE_FIRMWARE(WL1251_NVS_NAME);
1668