xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/ti/wl1251/init.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * This file is part of wl1251
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2009 Nokia Corporation
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include "init.h"
13*4882a593Smuzhiyun #include "wl12xx_80211.h"
14*4882a593Smuzhiyun #include "acx.h"
15*4882a593Smuzhiyun #include "cmd.h"
16*4882a593Smuzhiyun #include "reg.h"
17*4882a593Smuzhiyun 
wl1251_hw_init_hwenc_config(struct wl1251 * wl)18*4882a593Smuzhiyun int wl1251_hw_init_hwenc_config(struct wl1251 *wl)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	int ret;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	ret = wl1251_acx_feature_cfg(wl, 0);
23*4882a593Smuzhiyun 	if (ret < 0) {
24*4882a593Smuzhiyun 		wl1251_warning("couldn't set feature config");
25*4882a593Smuzhiyun 		return ret;
26*4882a593Smuzhiyun 	}
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	ret = wl1251_acx_default_key(wl, wl->default_key);
29*4882a593Smuzhiyun 	if (ret < 0) {
30*4882a593Smuzhiyun 		wl1251_warning("couldn't set default key");
31*4882a593Smuzhiyun 		return ret;
32*4882a593Smuzhiyun 	}
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	return 0;
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun 
wl1251_hw_init_templates_config(struct wl1251 * wl)37*4882a593Smuzhiyun int wl1251_hw_init_templates_config(struct wl1251 *wl)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun 	int ret;
40*4882a593Smuzhiyun 	u8 partial_vbm[PARTIAL_VBM_MAX];
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	/* send empty templates for fw memory reservation */
43*4882a593Smuzhiyun 	ret = wl1251_cmd_template_set(wl, CMD_PROBE_REQ, NULL,
44*4882a593Smuzhiyun 				      sizeof(struct wl12xx_probe_req_template));
45*4882a593Smuzhiyun 	if (ret < 0)
46*4882a593Smuzhiyun 		return ret;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	ret = wl1251_cmd_template_set(wl, CMD_NULL_DATA, NULL,
49*4882a593Smuzhiyun 				      sizeof(struct wl12xx_null_data_template));
50*4882a593Smuzhiyun 	if (ret < 0)
51*4882a593Smuzhiyun 		return ret;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	ret = wl1251_cmd_template_set(wl, CMD_PS_POLL, NULL,
54*4882a593Smuzhiyun 				      sizeof(struct wl12xx_ps_poll_template));
55*4882a593Smuzhiyun 	if (ret < 0)
56*4882a593Smuzhiyun 		return ret;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	ret = wl1251_cmd_template_set(wl, CMD_QOS_NULL_DATA, NULL,
59*4882a593Smuzhiyun 				      sizeof
60*4882a593Smuzhiyun 				      (struct wl12xx_qos_null_data_template));
61*4882a593Smuzhiyun 	if (ret < 0)
62*4882a593Smuzhiyun 		return ret;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	ret = wl1251_cmd_template_set(wl, CMD_PROBE_RESP, NULL,
65*4882a593Smuzhiyun 				      sizeof
66*4882a593Smuzhiyun 				      (struct wl12xx_probe_resp_template));
67*4882a593Smuzhiyun 	if (ret < 0)
68*4882a593Smuzhiyun 		return ret;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	ret = wl1251_cmd_template_set(wl, CMD_BEACON, NULL,
71*4882a593Smuzhiyun 				      sizeof
72*4882a593Smuzhiyun 				      (struct wl12xx_beacon_template));
73*4882a593Smuzhiyun 	if (ret < 0)
74*4882a593Smuzhiyun 		return ret;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	/* tim templates, first reserve space then allocate an empty one */
77*4882a593Smuzhiyun 	memset(partial_vbm, 0, PARTIAL_VBM_MAX);
78*4882a593Smuzhiyun 	ret = wl1251_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, PARTIAL_VBM_MAX, 0);
79*4882a593Smuzhiyun 	if (ret < 0)
80*4882a593Smuzhiyun 		return ret;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	ret = wl1251_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, 1, 0);
83*4882a593Smuzhiyun 	if (ret < 0)
84*4882a593Smuzhiyun 		return ret;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
wl1251_hw_init_rx_config(struct wl1251 * wl,u32 config,u32 filter)89*4882a593Smuzhiyun int wl1251_hw_init_rx_config(struct wl1251 *wl, u32 config, u32 filter)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	int ret;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	ret = wl1251_acx_rx_msdu_life_time(wl, RX_MSDU_LIFETIME_DEF);
94*4882a593Smuzhiyun 	if (ret < 0)
95*4882a593Smuzhiyun 		return ret;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	ret = wl1251_acx_rx_config(wl, config, filter);
98*4882a593Smuzhiyun 	if (ret < 0)
99*4882a593Smuzhiyun 		return ret;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
wl1251_hw_init_phy_config(struct wl1251 * wl)104*4882a593Smuzhiyun int wl1251_hw_init_phy_config(struct wl1251 *wl)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	int ret;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	ret = wl1251_acx_pd_threshold(wl);
109*4882a593Smuzhiyun 	if (ret < 0)
110*4882a593Smuzhiyun 		return ret;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	ret = wl1251_acx_slot(wl, DEFAULT_SLOT_TIME);
113*4882a593Smuzhiyun 	if (ret < 0)
114*4882a593Smuzhiyun 		return ret;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	ret = wl1251_acx_group_address_tbl(wl, true, NULL, 0);
117*4882a593Smuzhiyun 	if (ret < 0)
118*4882a593Smuzhiyun 		return ret;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	ret = wl1251_acx_service_period_timeout(wl);
121*4882a593Smuzhiyun 	if (ret < 0)
122*4882a593Smuzhiyun 		return ret;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	ret = wl1251_acx_rts_threshold(wl, RTS_THRESHOLD_DEF);
125*4882a593Smuzhiyun 	if (ret < 0)
126*4882a593Smuzhiyun 		return ret;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
wl1251_hw_init_beacon_filter(struct wl1251 * wl)131*4882a593Smuzhiyun int wl1251_hw_init_beacon_filter(struct wl1251 *wl)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	int ret;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	/* disable beacon filtering at this stage */
136*4882a593Smuzhiyun 	ret = wl1251_acx_beacon_filter_opt(wl, false);
137*4882a593Smuzhiyun 	if (ret < 0)
138*4882a593Smuzhiyun 		return ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	ret = wl1251_acx_beacon_filter_table(wl);
141*4882a593Smuzhiyun 	if (ret < 0)
142*4882a593Smuzhiyun 		return ret;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return 0;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
wl1251_hw_init_pta(struct wl1251 * wl)147*4882a593Smuzhiyun int wl1251_hw_init_pta(struct wl1251 *wl)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	int ret;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	ret = wl1251_acx_sg_enable(wl);
152*4882a593Smuzhiyun 	if (ret < 0)
153*4882a593Smuzhiyun 		return ret;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	ret = wl1251_acx_sg_cfg(wl);
156*4882a593Smuzhiyun 	if (ret < 0)
157*4882a593Smuzhiyun 		return ret;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	return 0;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
wl1251_hw_init_energy_detection(struct wl1251 * wl)162*4882a593Smuzhiyun int wl1251_hw_init_energy_detection(struct wl1251 *wl)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	int ret;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	ret = wl1251_acx_cca_threshold(wl);
167*4882a593Smuzhiyun 	if (ret < 0)
168*4882a593Smuzhiyun 		return ret;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	return 0;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
wl1251_hw_init_beacon_broadcast(struct wl1251 * wl)173*4882a593Smuzhiyun int wl1251_hw_init_beacon_broadcast(struct wl1251 *wl)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	int ret;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	ret = wl1251_acx_bcn_dtim_options(wl);
178*4882a593Smuzhiyun 	if (ret < 0)
179*4882a593Smuzhiyun 		return ret;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	return 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
wl1251_hw_init_power_auth(struct wl1251 * wl)184*4882a593Smuzhiyun int wl1251_hw_init_power_auth(struct wl1251 *wl)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	return wl1251_acx_sleep_auth(wl, WL1251_PSM_CAM);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
wl1251_hw_init_mem_config(struct wl1251 * wl)189*4882a593Smuzhiyun int wl1251_hw_init_mem_config(struct wl1251 *wl)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	int ret;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	ret = wl1251_acx_mem_cfg(wl);
194*4882a593Smuzhiyun 	if (ret < 0)
195*4882a593Smuzhiyun 		return ret;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	wl->target_mem_map = kzalloc(sizeof(struct wl1251_acx_mem_map),
198*4882a593Smuzhiyun 					  GFP_KERNEL);
199*4882a593Smuzhiyun 	if (!wl->target_mem_map) {
200*4882a593Smuzhiyun 		wl1251_error("couldn't allocate target memory map");
201*4882a593Smuzhiyun 		return -ENOMEM;
202*4882a593Smuzhiyun 	}
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	/* we now ask for the firmware built memory map */
205*4882a593Smuzhiyun 	ret = wl1251_acx_mem_map(wl, wl->target_mem_map,
206*4882a593Smuzhiyun 				 sizeof(struct wl1251_acx_mem_map));
207*4882a593Smuzhiyun 	if (ret < 0) {
208*4882a593Smuzhiyun 		wl1251_error("couldn't retrieve firmware memory map");
209*4882a593Smuzhiyun 		kfree(wl->target_mem_map);
210*4882a593Smuzhiyun 		wl->target_mem_map = NULL;
211*4882a593Smuzhiyun 		return ret;
212*4882a593Smuzhiyun 	}
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	return 0;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
wl1251_hw_init_txq_fill(u8 qid,struct acx_tx_queue_qos_config * config,u32 num_blocks)217*4882a593Smuzhiyun static int wl1251_hw_init_txq_fill(u8 qid,
218*4882a593Smuzhiyun 				   struct acx_tx_queue_qos_config *config,
219*4882a593Smuzhiyun 				   u32 num_blocks)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	config->qid = qid;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	switch (qid) {
224*4882a593Smuzhiyun 	case QOS_AC_BE:
225*4882a593Smuzhiyun 		config->high_threshold =
226*4882a593Smuzhiyun 			(QOS_TX_HIGH_BE_DEF * num_blocks) / 100;
227*4882a593Smuzhiyun 		config->low_threshold =
228*4882a593Smuzhiyun 			(QOS_TX_LOW_BE_DEF * num_blocks) / 100;
229*4882a593Smuzhiyun 		break;
230*4882a593Smuzhiyun 	case QOS_AC_BK:
231*4882a593Smuzhiyun 		config->high_threshold =
232*4882a593Smuzhiyun 			(QOS_TX_HIGH_BK_DEF * num_blocks) / 100;
233*4882a593Smuzhiyun 		config->low_threshold =
234*4882a593Smuzhiyun 			(QOS_TX_LOW_BK_DEF * num_blocks) / 100;
235*4882a593Smuzhiyun 		break;
236*4882a593Smuzhiyun 	case QOS_AC_VI:
237*4882a593Smuzhiyun 		config->high_threshold =
238*4882a593Smuzhiyun 			(QOS_TX_HIGH_VI_DEF * num_blocks) / 100;
239*4882a593Smuzhiyun 		config->low_threshold =
240*4882a593Smuzhiyun 			(QOS_TX_LOW_VI_DEF * num_blocks) / 100;
241*4882a593Smuzhiyun 		break;
242*4882a593Smuzhiyun 	case QOS_AC_VO:
243*4882a593Smuzhiyun 		config->high_threshold =
244*4882a593Smuzhiyun 			(QOS_TX_HIGH_VO_DEF * num_blocks) / 100;
245*4882a593Smuzhiyun 		config->low_threshold =
246*4882a593Smuzhiyun 			(QOS_TX_LOW_VO_DEF * num_blocks) / 100;
247*4882a593Smuzhiyun 		break;
248*4882a593Smuzhiyun 	default:
249*4882a593Smuzhiyun 		wl1251_error("Invalid TX queue id: %d", qid);
250*4882a593Smuzhiyun 		return -EINVAL;
251*4882a593Smuzhiyun 	}
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	return 0;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun 
wl1251_hw_init_tx_queue_config(struct wl1251 * wl)256*4882a593Smuzhiyun static int wl1251_hw_init_tx_queue_config(struct wl1251 *wl)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	struct acx_tx_queue_qos_config *config;
259*4882a593Smuzhiyun 	struct wl1251_acx_mem_map *wl_mem_map = wl->target_mem_map;
260*4882a593Smuzhiyun 	int ret, i;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	wl1251_debug(DEBUG_ACX, "acx tx queue config");
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	config = kzalloc(sizeof(*config), GFP_KERNEL);
265*4882a593Smuzhiyun 	if (!config) {
266*4882a593Smuzhiyun 		ret = -ENOMEM;
267*4882a593Smuzhiyun 		goto out;
268*4882a593Smuzhiyun 	}
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	for (i = 0; i < MAX_NUM_OF_AC; i++) {
271*4882a593Smuzhiyun 		ret = wl1251_hw_init_txq_fill(i, config,
272*4882a593Smuzhiyun 					      wl_mem_map->num_tx_mem_blocks);
273*4882a593Smuzhiyun 		if (ret < 0)
274*4882a593Smuzhiyun 			goto out;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 		ret = wl1251_cmd_configure(wl, ACX_TX_QUEUE_CFG,
277*4882a593Smuzhiyun 					   config, sizeof(*config));
278*4882a593Smuzhiyun 		if (ret < 0)
279*4882a593Smuzhiyun 			goto out;
280*4882a593Smuzhiyun 	}
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	wl1251_acx_ac_cfg(wl, AC_BE, CWMIN_BE, CWMAX_BE, AIFS_DIFS, TXOP_BE);
283*4882a593Smuzhiyun 	wl1251_acx_ac_cfg(wl, AC_BK, CWMIN_BK, CWMAX_BK, AIFS_DIFS, TXOP_BK);
284*4882a593Smuzhiyun 	wl1251_acx_ac_cfg(wl, AC_VI, CWMIN_VI, CWMAX_VI, AIFS_DIFS, TXOP_VI);
285*4882a593Smuzhiyun 	wl1251_acx_ac_cfg(wl, AC_VO, CWMIN_VO, CWMAX_VO, AIFS_DIFS, TXOP_VO);
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun out:
288*4882a593Smuzhiyun 	kfree(config);
289*4882a593Smuzhiyun 	return ret;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
wl1251_hw_init_data_path_config(struct wl1251 * wl)292*4882a593Smuzhiyun static int wl1251_hw_init_data_path_config(struct wl1251 *wl)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	int ret;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	/* asking for the data path parameters */
297*4882a593Smuzhiyun 	wl->data_path = kzalloc(sizeof(struct acx_data_path_params_resp),
298*4882a593Smuzhiyun 				GFP_KERNEL);
299*4882a593Smuzhiyun 	if (!wl->data_path)
300*4882a593Smuzhiyun 		return -ENOMEM;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	ret = wl1251_acx_data_path_params(wl, wl->data_path);
303*4882a593Smuzhiyun 	if (ret < 0) {
304*4882a593Smuzhiyun 		kfree(wl->data_path);
305*4882a593Smuzhiyun 		wl->data_path = NULL;
306*4882a593Smuzhiyun 		return ret;
307*4882a593Smuzhiyun 	}
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 
wl1251_hw_init(struct wl1251 * wl)313*4882a593Smuzhiyun int wl1251_hw_init(struct wl1251 *wl)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	struct wl1251_acx_mem_map *wl_mem_map;
316*4882a593Smuzhiyun 	int ret;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	ret = wl1251_hw_init_hwenc_config(wl);
319*4882a593Smuzhiyun 	if (ret < 0)
320*4882a593Smuzhiyun 		return ret;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	/* Template settings */
323*4882a593Smuzhiyun 	ret = wl1251_hw_init_templates_config(wl);
324*4882a593Smuzhiyun 	if (ret < 0)
325*4882a593Smuzhiyun 		return ret;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	/* Default memory configuration */
328*4882a593Smuzhiyun 	ret = wl1251_hw_init_mem_config(wl);
329*4882a593Smuzhiyun 	if (ret < 0)
330*4882a593Smuzhiyun 		return ret;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	/* Default data path configuration  */
333*4882a593Smuzhiyun 	ret = wl1251_hw_init_data_path_config(wl);
334*4882a593Smuzhiyun 	if (ret < 0)
335*4882a593Smuzhiyun 		goto out_free_memmap;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	/* RX config */
338*4882a593Smuzhiyun 	ret = wl1251_hw_init_rx_config(wl,
339*4882a593Smuzhiyun 				       RX_CFG_PROMISCUOUS | RX_CFG_TSF,
340*4882a593Smuzhiyun 				       RX_FILTER_OPTION_DEF);
341*4882a593Smuzhiyun 	/* RX_CONFIG_OPTION_ANY_DST_ANY_BSS,
342*4882a593Smuzhiyun 	   RX_FILTER_OPTION_FILTER_ALL); */
343*4882a593Smuzhiyun 	if (ret < 0)
344*4882a593Smuzhiyun 		goto out_free_data_path;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	/* TX queues config */
347*4882a593Smuzhiyun 	ret = wl1251_hw_init_tx_queue_config(wl);
348*4882a593Smuzhiyun 	if (ret < 0)
349*4882a593Smuzhiyun 		goto out_free_data_path;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	/* PHY layer config */
352*4882a593Smuzhiyun 	ret = wl1251_hw_init_phy_config(wl);
353*4882a593Smuzhiyun 	if (ret < 0)
354*4882a593Smuzhiyun 		goto out_free_data_path;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	/* Initialize connection monitoring thresholds */
357*4882a593Smuzhiyun 	ret = wl1251_acx_conn_monit_params(wl);
358*4882a593Smuzhiyun 	if (ret < 0)
359*4882a593Smuzhiyun 		goto out_free_data_path;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	/* Beacon filtering */
362*4882a593Smuzhiyun 	ret = wl1251_hw_init_beacon_filter(wl);
363*4882a593Smuzhiyun 	if (ret < 0)
364*4882a593Smuzhiyun 		goto out_free_data_path;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	/* Bluetooth WLAN coexistence */
367*4882a593Smuzhiyun 	ret = wl1251_hw_init_pta(wl);
368*4882a593Smuzhiyun 	if (ret < 0)
369*4882a593Smuzhiyun 		goto out_free_data_path;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	/* Energy detection */
372*4882a593Smuzhiyun 	ret = wl1251_hw_init_energy_detection(wl);
373*4882a593Smuzhiyun 	if (ret < 0)
374*4882a593Smuzhiyun 		goto out_free_data_path;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	/* Beacons and boradcast settings */
377*4882a593Smuzhiyun 	ret = wl1251_hw_init_beacon_broadcast(wl);
378*4882a593Smuzhiyun 	if (ret < 0)
379*4882a593Smuzhiyun 		goto out_free_data_path;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	/* Enable rx data path */
382*4882a593Smuzhiyun 	ret = wl1251_cmd_data_path_rx(wl, wl->channel, 1);
383*4882a593Smuzhiyun 	if (ret < 0)
384*4882a593Smuzhiyun 		goto out_free_data_path;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	/* Enable tx data path */
387*4882a593Smuzhiyun 	ret = wl1251_cmd_data_path_tx(wl, wl->channel, 1);
388*4882a593Smuzhiyun 	if (ret < 0)
389*4882a593Smuzhiyun 		goto out_free_data_path;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	/* Default power state */
392*4882a593Smuzhiyun 	ret = wl1251_hw_init_power_auth(wl);
393*4882a593Smuzhiyun 	if (ret < 0)
394*4882a593Smuzhiyun 		goto out_free_data_path;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	wl_mem_map = wl->target_mem_map;
397*4882a593Smuzhiyun 	wl1251_info("%d tx blocks at 0x%x, %d rx blocks at 0x%x",
398*4882a593Smuzhiyun 		    wl_mem_map->num_tx_mem_blocks,
399*4882a593Smuzhiyun 		    wl->data_path->tx_control_addr,
400*4882a593Smuzhiyun 		    wl_mem_map->num_rx_mem_blocks,
401*4882a593Smuzhiyun 		    wl->data_path->rx_control_addr);
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	return 0;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun  out_free_data_path:
406*4882a593Smuzhiyun 	kfree(wl->data_path);
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun  out_free_memmap:
409*4882a593Smuzhiyun 	kfree(wl->target_mem_map);
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	return ret;
412*4882a593Smuzhiyun }
413