1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 21 #ifndef __HAL_PG_H__ 22 #define __HAL_PG_H__ 23 24 #define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F 25 #define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0 26 27 #define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F 28 #define PPG_THERMAL_OFFSET_MASK 0x1F 29 #define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 30 #define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 31 #define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 32 33 /* **************************************************** 34 * EEPROM/Efuse PG Offset for 88EE/88EU/88ES 35 * **************************************************** */ 36 #define EEPROM_TX_PWR_INX_88E 0x10 37 38 #define EEPROM_ChannelPlan_88E 0xB8 39 #define EEPROM_XTAL_88E 0xB9 40 #define EEPROM_THERMAL_METER_88E 0xBA 41 #define EEPROM_IQK_LCK_88E 0xBB 42 43 #define EEPROM_RF_BOARD_OPTION_88E 0xC1 44 #define EEPROM_RF_FEATURE_OPTION_88E 0xC2 45 #define EEPROM_RF_BT_SETTING_88E 0xC3 46 #define EEPROM_VERSION_88E 0xC4 47 #define EEPROM_CustomID_88E 0xC5 48 #define EEPROM_RF_ANTENNA_OPT_88E 0xC9 49 #define EEPROM_COUNTRY_CODE_88E 0xCB 50 51 /* RTL88EE */ 52 #define EEPROM_MAC_ADDR_88EE 0xD0 53 #define EEPROM_VID_88EE 0xD6 54 #define EEPROM_DID_88EE 0xD8 55 #define EEPROM_SVID_88EE 0xDA 56 #define EEPROM_SMID_88EE 0xDC 57 58 /* RTL88EU */ 59 #define EEPROM_MAC_ADDR_88EU 0xD7 60 #define EEPROM_VID_88EU 0xD0 61 #define EEPROM_PID_88EU 0xD2 62 #define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 /* 8188EU, 8192EU, 8812AU is the same */ 63 #define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 64 65 /* RTL88ES */ 66 #define EEPROM_MAC_ADDR_88ES 0x11A 67 /* **************************************************** 68 * EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES 69 * **************************************************** */ 70 #define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 71 #define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 72 73 #define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6 74 #define PPG_THERMAL_OFFSET_8192E 0x1F5 75 76 /* 0x10 ~ 0x63 = TX power area. */ 77 #define EEPROM_TX_PWR_INX_8192E 0x10 78 79 #define EEPROM_ChannelPlan_8192E 0xB8 80 #define EEPROM_XTAL_8192E 0xB9 81 #define EEPROM_THERMAL_METER_8192E 0xBA 82 #define EEPROM_IQK_LCK_8192E 0xBB 83 #define EEPROM_2G_5G_PA_TYPE_8192E 0xBC 84 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD 85 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF 86 87 #define EEPROM_RF_BOARD_OPTION_8192E 0xC1 88 #define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 89 #define EEPROM_RF_BT_SETTING_8192E 0xC3 90 #define EEPROM_VERSION_8192E 0xC4 91 #define EEPROM_CustomID_8192E 0xC5 92 #define EEPROM_TX_BBSWING_2G_8192E 0xC6 93 #define EEPROM_TX_BBSWING_5G_8192E 0xC7 94 #define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 95 #define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 96 #define EEPROM_RFE_OPTION_8192E 0xCA 97 #define EEPROM_RFE_OPTION_8188E 0xCA 98 #define EEPROM_COUNTRY_CODE_8192E 0xCB 99 100 /* RTL8192EE */ 101 #define EEPROM_MAC_ADDR_8192EE 0xD0 102 #define EEPROM_VID_8192EE 0xD6 103 #define EEPROM_DID_8192EE 0xD8 104 #define EEPROM_SVID_8192EE 0xDA 105 #define EEPROM_SMID_8192EE 0xDC 106 107 /* RTL8192EU */ 108 #define EEPROM_MAC_ADDR_8192EU 0xD7 109 #define EEPROM_VID_8192EU 0xD0 110 #define EEPROM_PID_8192EU 0xD2 111 #define EEPROM_PA_TYPE_8192EU 0xBC 112 #define EEPROM_LNA_TYPE_2G_8192EU 0xBD 113 #define EEPROM_LNA_TYPE_5G_8192EU 0xBF 114 115 /* RTL8192ES */ 116 #define EEPROM_MAC_ADDR_8192ES 0x11A 117 /* **************************************************** 118 * EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS 119 * **************************************************** 120 * 0x10 ~ 0x63 = TX power area. */ 121 #define EEPROM_USB_MODE_8812 0x08 122 #define EEPROM_TX_PWR_INX_8812 0x10 123 124 #define EEPROM_ChannelPlan_8812 0xB8 125 #define EEPROM_XTAL_8812 0xB9 126 #define EEPROM_THERMAL_METER_8812 0xBA 127 #define EEPROM_IQK_LCK_8812 0xBB 128 #define EEPROM_2G_5G_PA_TYPE_8812 0xBC 129 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD 130 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF 131 132 #define EEPROM_RF_BOARD_OPTION_8812 0xC1 133 #define EEPROM_RF_FEATURE_OPTION_8812 0xC2 134 #define EEPROM_RF_BT_SETTING_8812 0xC3 135 #define EEPROM_VERSION_8812 0xC4 136 #define EEPROM_CustomID_8812 0xC5 137 #define EEPROM_TX_BBSWING_2G_8812 0xC6 138 #define EEPROM_TX_BBSWING_5G_8812 0xC7 139 #define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 140 #define EEPROM_RF_ANTENNA_OPT_8812 0xC9 141 #define EEPROM_RFE_OPTION_8812 0xCA 142 #define EEPROM_COUNTRY_CODE_8812 0xCB 143 144 /* RTL8812AE */ 145 #define EEPROM_MAC_ADDR_8812AE 0xD0 146 #define EEPROM_VID_8812AE 0xD6 147 #define EEPROM_DID_8812AE 0xD8 148 #define EEPROM_SVID_8812AE 0xDA 149 #define EEPROM_SMID_8812AE 0xDC 150 151 /* RTL8812AU */ 152 #define EEPROM_MAC_ADDR_8812AU 0xD7 153 #define EEPROM_VID_8812AU 0xD0 154 #define EEPROM_PID_8812AU 0xD2 155 #define EEPROM_PA_TYPE_8812AU 0xBC 156 #define EEPROM_LNA_TYPE_2G_8812AU 0xBD 157 #define EEPROM_LNA_TYPE_5G_8812AU 0xBF 158 159 /* RTL8814AU */ 160 #define EEPROM_MAC_ADDR_8814AU 0xD8 161 #define EEPROM_VID_8814AU 0xD0 162 #define EEPROM_PID_8814AU 0xD2 163 #define EEPROM_PA_TYPE_8814AU 0xBC 164 #define EEPROM_LNA_TYPE_2G_8814AU 0xBD 165 #define EEPROM_LNA_TYPE_5G_8814AU 0xBF 166 167 /* RTL8814AE */ 168 #define EEPROM_MAC_ADDR_8814AE 0xD0 169 #define EEPROM_VID_8814AE 0xD6 170 #define EEPROM_DID_8814AE 0xD8 171 #define EEPROM_SVID_8814AE 0xDA 172 #define EEPROM_SMID_8814AE 0xDC 173 174 /* **************************************************** 175 * EEPROM/Efuse PG Offset for 8814AU 176 * **************************************************** */ 177 #define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) 178 #define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 179 #define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2) 180 181 #define KFREE_GAIN_DATA_LENGTH_8814A 22 182 183 #define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE 184 185 #define PPG_THERMAL_OFFSET_8814A 0x3EF 186 187 #define EEPROM_TX_PWR_INX_8814 0x10 188 #define EEPROM_USB_MODE_8814A 0x0E 189 #define EEPROM_ChannelPlan_8814 0xB8 190 #define EEPROM_XTAL_8814 0xB9 191 #define EEPROM_THERMAL_METER_8814 0xBA 192 #define EEPROM_IQK_LCK_8814 0xBB 193 194 195 #define EEPROM_PA_TYPE_8814 0xBC 196 #define EEPROM_LNA_TYPE_AB_2G_8814 0xBD 197 #define EEPROM_LNA_TYPE_CD_2G_8814 0xBE 198 #define EEPROM_LNA_TYPE_AB_5G_8814 0xBF 199 #define EEPROM_LNA_TYPE_CD_5G_8814 0xC0 200 #define EEPROM_RF_BOARD_OPTION_8814 0xC1 201 #define EEPROM_RF_BT_SETTING_8814 0xC3 202 #define EEPROM_VERSION_8814 0xC4 203 #define EEPROM_CustomID_8814 0xC5 204 #define EEPROM_TX_BBSWING_2G_8814 0xC6 205 #define EEPROM_TX_BBSWING_5G_8814 0xC7 206 #define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9 207 #define EEPROM_RFE_OPTION_8814 0xCA 208 #define EEPROM_COUNTRY_CODE_8814 0xCB 209 210 /*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/ 211 #define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120 212 #define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121 213 #define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122 214 #define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123 215 #define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124 216 #define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125 217 #define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126 218 #define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127 219 220 /* **************************************************** 221 * EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS 222 * **************************************************** */ 223 224 #define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) 225 #define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 226 227 #define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6 228 #define PPG_THERMAL_OFFSET_8821A 0x1F5 229 #define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4 230 #define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3 231 #define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2 232 #define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1 233 #define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0 234 235 #define EEPROM_TX_PWR_INX_8821 0x10 236 237 #define EEPROM_ChannelPlan_8821 0xB8 238 #define EEPROM_XTAL_8821 0xB9 239 #define EEPROM_THERMAL_METER_8821 0xBA 240 #define EEPROM_IQK_LCK_8821 0xBB 241 242 243 #define EEPROM_RF_BOARD_OPTION_8821 0xC1 244 #define EEPROM_RF_FEATURE_OPTION_8821 0xC2 245 #define EEPROM_RF_BT_SETTING_8821 0xC3 246 #define EEPROM_VERSION_8821 0xC4 247 #define EEPROM_CustomID_8821 0xC5 248 #define EEPROM_RF_ANTENNA_OPT_8821 0xC9 249 250 /* RTL8821AE */ 251 #define EEPROM_MAC_ADDR_8821AE 0xD0 252 #define EEPROM_VID_8821AE 0xD6 253 #define EEPROM_DID_8821AE 0xD8 254 #define EEPROM_SVID_8821AE 0xDA 255 #define EEPROM_SMID_8821AE 0xDC 256 257 /* RTL8821AU */ 258 #define EEPROM_PA_TYPE_8821AU 0xBC 259 #define EEPROM_LNA_TYPE_8821AU 0xBF 260 261 /* RTL8821AS */ 262 #define EEPROM_MAC_ADDR_8821AS 0x11A 263 264 /* RTL8821AU */ 265 #define EEPROM_MAC_ADDR_8821AU 0x107 266 #define EEPROM_VID_8821AU 0x100 267 #define EEPROM_PID_8821AU 0x102 268 269 270 /* **************************************************** 271 * EEPROM/Efuse PG Offset for 8192 SE/SU 272 * **************************************************** */ 273 #define EEPROM_VID_92SE 0x0A 274 #define EEPROM_DID_92SE 0x0C 275 #define EEPROM_SVID_92SE 0x0E 276 #define EEPROM_SMID_92SE 0x10 277 278 #define EEPROM_MAC_ADDR_92S 0x12 279 280 #define EEPROM_TSSI_A_92SE 0x74 281 #define EEPROM_TSSI_B_92SE 0x75 282 283 #define EEPROM_Version_92SE 0x7C 284 285 286 #define EEPROM_VID_92SU 0x08 287 #define EEPROM_PID_92SU 0x0A 288 289 #define EEPROM_Version_92SU 0x50 290 #define EEPROM_TSSI_A_92SU 0x6b 291 #define EEPROM_TSSI_B_92SU 0x6c 292 293 /* ==================================================== 294 EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS 295 ==================================================== 296 */ 297 298 #define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 299 #define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 300 301 #define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE 302 #define PPG_THERMAL_OFFSET_8188F 0xEF 303 304 /* 0x10 ~ 0x63 = TX power area. */ 305 #define EEPROM_TX_PWR_INX_8188F 0x10 306 307 #define EEPROM_ChannelPlan_8188F 0xB8 308 #define EEPROM_XTAL_8188F 0xB9 309 #define EEPROM_THERMAL_METER_8188F 0xBA 310 #define EEPROM_IQK_LCK_8188F 0xBB 311 #define EEPROM_2G_5G_PA_TYPE_8188F 0xBC 312 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD 313 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF 314 315 #define EEPROM_RF_BOARD_OPTION_8188F 0xC1 316 #define EEPROM_FEATURE_OPTION_8188F 0xC2 317 #define EEPROM_RF_BT_SETTING_8188F 0xC3 318 #define EEPROM_VERSION_8188F 0xC4 319 #define EEPROM_CustomID_8188F 0xC5 320 #define EEPROM_TX_BBSWING_2G_8188F 0xC6 321 #define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8 322 #define EEPROM_RF_ANTENNA_OPT_8188F 0xC9 323 #define EEPROM_RFE_OPTION_8188F 0xCA 324 #define EEPROM_COUNTRY_CODE_8188F 0xCB 325 #define EEPROM_CUSTOMER_ID_8188F 0x7F 326 #define EEPROM_SUBCUSTOMER_ID_8188F 0x59 327 328 /* RTL8188FU */ 329 #define EEPROM_MAC_ADDR_8188FU 0xD7 330 #define EEPROM_VID_8188FU 0xD0 331 #define EEPROM_PID_8188FU 0xD2 332 #define EEPROM_PA_TYPE_8188FU 0xBC 333 #define EEPROM_LNA_TYPE_2G_8188FU 0xBD 334 #define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4 335 336 /* RTL8188FS */ 337 #define EEPROM_MAC_ADDR_8188FS 0x11A 338 #define EEPROM_Voltage_ADDR_8188F 0x8 339 340 /* **************************************************** 341 * EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS 342 * **************************************************** 343 * 0x10 ~ 0x63 = TX power area. */ 344 #define EEPROM_TX_PWR_INX_8723B 0x10 345 346 #define EEPROM_ChannelPlan_8723B 0xB8 347 #define EEPROM_XTAL_8723B 0xB9 348 #define EEPROM_THERMAL_METER_8723B 0xBA 349 #define EEPROM_IQK_LCK_8723B 0xBB 350 #define EEPROM_2G_5G_PA_TYPE_8723B 0xBC 351 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD 352 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF 353 354 #define EEPROM_RF_BOARD_OPTION_8723B 0xC1 355 #define EEPROM_FEATURE_OPTION_8723B 0xC2 356 #define EEPROM_RF_BT_SETTING_8723B 0xC3 357 #define EEPROM_VERSION_8723B 0xC4 358 #define EEPROM_CustomID_8723B 0xC5 359 #define EEPROM_TX_BBSWING_2G_8723B 0xC6 360 #define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 361 #define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 362 #define EEPROM_RFE_OPTION_8723B 0xCA 363 #define EEPROM_COUNTRY_CODE_8723B 0xCB 364 365 /* RTL8723BE */ 366 #define EEPROM_MAC_ADDR_8723BE 0xD0 367 #define EEPROM_VID_8723BE 0xD6 368 #define EEPROM_DID_8723BE 0xD8 369 #define EEPROM_SVID_8723BE 0xDA 370 #define EEPROM_SMID_8723BE 0xDC 371 372 /* RTL8723BU */ 373 #define EEPROM_MAC_ADDR_8723BU 0x107 374 #define EEPROM_VID_8723BU 0x100 375 #define EEPROM_PID_8723BU 0x102 376 #define EEPROM_PA_TYPE_8723BU 0xBC 377 #define EEPROM_LNA_TYPE_2G_8723BU 0xBD 378 379 380 /* RTL8723BS */ 381 #define EEPROM_MAC_ADDR_8723BS 0x11A 382 #define EEPROM_Voltage_ADDR_8723B 0x8 383 384 /* **************************************************** 385 * EEPROM/Efuse PG Offset for 8703B 386 * **************************************************** */ 387 #define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 388 #define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 389 390 #define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE 391 #define PPG_THERMAL_OFFSET_8703B 0xEF 392 393 #define EEPROM_TX_PWR_INX_8703B 0x10 394 395 #define EEPROM_ChannelPlan_8703B 0xB8 396 #define EEPROM_XTAL_8703B 0xB9 397 #define EEPROM_THERMAL_METER_8703B 0xBA 398 #define EEPROM_IQK_LCK_8703B 0xBB 399 #define EEPROM_2G_5G_PA_TYPE_8703B 0xBC 400 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD 401 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF 402 403 #define EEPROM_RF_BOARD_OPTION_8703B 0xC1 404 #define EEPROM_FEATURE_OPTION_8703B 0xC2 405 #define EEPROM_RF_BT_SETTING_8703B 0xC3 406 #define EEPROM_VERSION_8703B 0xC4 407 #define EEPROM_CustomID_8703B 0xC5 408 #define EEPROM_TX_BBSWING_2G_8703B 0xC6 409 #define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8 410 #define EEPROM_RF_ANTENNA_OPT_8703B 0xC9 411 #define EEPROM_RFE_OPTION_8703B 0xCA 412 #define EEPROM_COUNTRY_CODE_8703B 0xCB 413 414 /* RTL8703BU */ 415 #define EEPROM_MAC_ADDR_8703BU 0x107 416 #define EEPROM_VID_8703BU 0x100 417 #define EEPROM_PID_8703BU 0x102 418 #define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104 419 #define EEPROM_PA_TYPE_8703BU 0xBC 420 #define EEPROM_LNA_TYPE_2G_8703BU 0xBD 421 422 /* RTL8703BS */ 423 #define EEPROM_MAC_ADDR_8703BS 0x11A 424 #define EEPROM_Voltage_ADDR_8703B 0x8 425 426 /* 427 * ==================================================== 428 * EEPROM/Efuse PG Offset for 8822B 429 * ==================================================== 430 */ 431 #define GET_PG_KFREE_ON_8822B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 432 #define GET_PG_KFREE_THERMAL_K_ON_8822B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 433 434 #define PPG_BB_GAIN_2G_TXA_OFFSET_8822B 0xEE 435 #define PPG_THERMAL_OFFSET_8822B 0xEF 436 437 #define EEPROM_TX_PWR_INX_8822B 0x10 438 439 #define EEPROM_ChannelPlan_8822B 0xB8 440 #define EEPROM_XTAL_8822B 0xB9 441 #define EEPROM_THERMAL_METER_8822B 0xBA 442 #define EEPROM_IQK_LCK_8822B 0xBB 443 #define EEPROM_2G_5G_PA_TYPE_8822B 0xBC 444 /* PATH A & PATH B */ 445 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBD 446 /* PATH C & PATH D */ 447 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822B 0xBE 448 /* PATH A & PATH B */ 449 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBF 450 /* PATH C & PATH D */ 451 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822B 0xC0 452 453 #define EEPROM_RF_BOARD_OPTION_8822B 0xC1 454 #define EEPROM_FEATURE_OPTION_8822B 0xC2 455 #define EEPROM_RF_BT_SETTING_8822B 0xC3 456 #define EEPROM_VERSION_8822B 0xC4 457 #define EEPROM_CustomID_8822B 0xC5 458 #define EEPROM_TX_BBSWING_2G_8822B 0xC6 459 #define EEPROM_TX_PWR_CALIBRATE_RATE_8822B 0xC8 460 #define EEPROM_RF_ANTENNA_OPT_8822B 0xC9 461 #define EEPROM_RFE_OPTION_8822B 0xCA 462 #define EEPROM_COUNTRY_CODE_8822B 0xCB 463 464 /* RTL8822BU */ 465 #define EEPROM_MAC_ADDR_8822BU 0x107 466 #define EEPROM_VID_8822BU 0x100 467 #define EEPROM_PID_8822BU 0x102 468 #define EEPROM_USB_OPTIONAL_FUNCTION0_8822BU 0x104 469 #define EEPROM_USB_MODE_8822BU 0x06 470 471 /* RTL8822BS */ 472 #define EEPROM_MAC_ADDR_8822BS 0x11A 473 474 /* RTL8822BE */ 475 #define EEPROM_MAC_ADDR_8822BE 0xD0 476 /* 477 * ==================================================== 478 * EEPROM/Efuse PG Offset for 8821C 479 * ==================================================== 480 */ 481 #define GET_PG_KFREE_ON_8821C(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 482 #define GET_PG_KFREE_THERMAL_K_ON_8821C(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 483 484 #define PPG_BB_GAIN_2G_TXA_OFFSET_8821C 0xEE 485 #define PPG_THERMAL_OFFSET_8821C 0xEF 486 487 #define EEPROM_TX_PWR_INX_8821C 0x10 488 489 #define EEPROM_ChannelPlan_8821C 0xB8 490 #define EEPROM_XTAL_8821C 0xB9 491 #define EEPROM_THERMAL_METER_8821C 0xBA 492 #define EEPROM_IQK_LCK_8821C 0xBB 493 #define EEPROM_2G_5G_PA_TYPE_8821C 0xBC 494 /* PATH A & PATH B */ 495 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBD 496 /* PATH C & PATH D */ 497 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8821C 0xBE 498 /* PATH A & PATH B */ 499 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBF 500 /* PATH C & PATH D */ 501 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8821C 0xC0 502 503 #define EEPROM_RF_BOARD_OPTION_8821C 0xC1 504 #define EEPROM_FEATURE_OPTION_8821C 0xC2 505 #define EEPROM_RF_BT_SETTING_8821C 0xC3 506 #define EEPROM_VERSION_8821C 0xC4 507 #define EEPROM_CustomID_8821C 0xC5 508 #define EEPROM_TX_BBSWING_2G_8821C 0xC6 509 #define EEPROM_TX_PWR_CALIBRATE_RATE_8821C 0xC8 510 #define EEPROM_RF_ANTENNA_OPT_8821C 0xC9 511 #define EEPROM_RFE_OPTION_8821C 0xCA 512 #define EEPROM_COUNTRY_CODE_8821C 0xCB 513 514 /* RTL8821CU */ 515 #define EEPROM_MAC_ADDR_8821CU 0x107 516 #define EEPROM_VID_8821CU 0x100 517 #define EEPROM_PID_8821CU 0x102 518 #define EEPROM_USB_OPTIONAL_FUNCTION0_8821CU 0x104 519 #define EEPROM_USB_MODE_8821CU 0x06 520 521 /* RTL8821CS */ 522 #define EEPROM_MAC_ADDR_8821CS 0x11A 523 524 /* RTL8821CE */ 525 #define EEPROM_MAC_ADDR_8821CE 0xD0 526 /* **************************************************** 527 * EEPROM/Efuse PG Offset for 8723D 528 * **************************************************** */ 529 #define GET_PG_KFREE_ON_8723D(_pg_m) \ 530 LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 531 #define GET_PG_KFREE_THERMAL_K_ON_8723D(_pg_m) \ 532 LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 533 534 #define PPG_BB_GAIN_2G_TXA_OFFSET_8723D 0xEE 535 #define PPG_THERMAL_OFFSET_8723D 0xEF 536 537 #define EEPROM_TX_PWR_INX_8723D 0x10 538 539 #define EEPROM_ChannelPlan_8723D 0xB8 540 #define EEPROM_XTAL_8723D 0xB9 541 #define EEPROM_THERMAL_METER_8723D 0xBA 542 #define EEPROM_IQK_LCK_8723D 0xBB 543 #define EEPROM_2G_5G_PA_TYPE_8723D 0xBC 544 #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723D 0xBD 545 #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723D 0xBF 546 547 #define EEPROM_RF_BOARD_OPTION_8723D 0xC1 548 #define EEPROM_FEATURE_OPTION_8723D 0xC2 549 #define EEPROM_RF_BT_SETTING_8723D 0xC3 550 #define EEPROM_VERSION_8723D 0xC4 551 #define EEPROM_CustomID_8723D 0xC5 552 #define EEPROM_TX_BBSWING_2G_8723D 0xC6 553 #define EEPROM_TX_PWR_CALIBRATE_RATE_8723D 0xC8 554 #define EEPROM_RF_ANTENNA_OPT_8723D 0xC9 555 #define EEPROM_RFE_OPTION_8723D 0xCA 556 #define EEPROM_COUNTRY_CODE_8723D 0xCB 557 558 /* MAC Hidden */ 559 #define PPG_MAC_HIDDEN_START_8723D 0xF0 560 #define PPG_MAC_HIDDEN_END_8723D 0xFF 561 #define EEPROM_HCI_AND_PACKAGE_TYPE_8723D 0xF8 562 #define EEPROM_WL_FUNC_CAP_8723D 0xF9 563 #define EEPROM_BW_AND_ANT_NUM_CAP_8723D 0xFB 564 #define GET_PMH_HCI_TYPE_8723D(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8723D - PPG_MAC_HIDDEN_START_8723D, 0, 4) 565 #define GET_PMH_PACKAGE_TYPE_8723D(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_HCI_AND_PACKAGE_TYPE_8723D - PPG_MAC_HIDDEN_START_8723D, 4, 4) 566 #define GET_PMH_WL_FUNC_CAP_8723D(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_WL_FUNC_CAP_8723D - PPG_MAC_HIDDEN_START_8723D, 0, 4) 567 #define GET_PMH_BW_CAP_8723D(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8723D - PPG_MAC_HIDDEN_START_8723D, 0, 3) 568 #define GET_PMH_ANT_NUM_CAP_8723D(_pmh_m) LE_BITS_TO_1BYTE(((u8 *)(_pmh_m)) + EEPROM_BW_AND_ANT_NUM_CAP_8723D - PPG_MAC_HIDDEN_START_8723D, 5, 3) 569 570 /* RTL8723DE */ 571 #define EEPROM_MAC_ADDR_8723DE 0xD0 572 #define EEPROM_VID_8723DE 0xD6 573 #define EEPROM_DID_8723DE 0xD8 574 #define EEPROM_SVID_8723DE 0xDA 575 #define EEPROM_SMID_8723DE 0xDC 576 577 /* RTL8723DU */ 578 #define EEPROM_MAC_ADDR_8723DU 0x107 579 #define EEPROM_VID_8723DU 0x100 580 #define EEPROM_PID_8723DU 0x102 581 #define EEPROM_USB_OPTIONAL_FUNCTION0_8723DU 0x104 582 583 /* RTL8723BS */ 584 #define EEPROM_MAC_ADDR_8723DS 0x11A 585 #define EEPROM_Voltage_ADDR_8723D 0x8 586 587 /* **************************************************** 588 * EEPROM/Efuse Value Type 589 * **************************************************** */ 590 #define EETYPE_TX_PWR 0x0 591 /* **************************************************** 592 * EEPROM/Efuse Default Value 593 * **************************************************** */ 594 #define EEPROM_CID_DEFAULT 0x0 595 #define EEPROM_CID_DEFAULT_EXT 0xFF /* Reserved for Realtek */ 596 #define EEPROM_CID_TOSHIBA 0x4 597 #define EEPROM_CID_CCX 0x10 598 #define EEPROM_CID_QMI 0x0D 599 #define EEPROM_CID_WHQL 0xFE 600 601 #define EEPROM_CHANNEL_PLAN_FCC 0x0 602 #define EEPROM_CHANNEL_PLAN_IC 0x1 603 #define EEPROM_CHANNEL_PLAN_ETSI 0x2 604 #define EEPROM_CHANNEL_PLAN_SPAIN 0x3 605 #define EEPROM_CHANNEL_PLAN_FRANCE 0x4 606 #define EEPROM_CHANNEL_PLAN_MKK 0x5 607 #define EEPROM_CHANNEL_PLAN_MKK1 0x6 608 #define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 609 #define EEPROM_CHANNEL_PLAN_TELEC 0x8 610 #define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 611 #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA 612 #define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB 613 #define EEPROM_CHANNEL_PLAN_CHIAN 0XC 614 #define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD 615 #define EEPROM_CHANNEL_PLAN_KOREA 0xE 616 #define EEPROM_CHANNEL_PLAN_TURKEY 0xF 617 #define EEPROM_CHANNEL_PLAN_JAPAN 0x10 618 #define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 619 #define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 620 #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 621 #define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 622 623 #define EEPROM_USB_OPTIONAL1 0xE 624 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 625 626 #define RTL_EEPROM_ID 0x8129 627 #define EEPROM_Default_TSSI 0x0 628 #define EEPROM_Default_BoardType 0x02 629 #define EEPROM_Default_ThermalMeter 0x12 630 #define EEPROM_Default_ThermalMeter_92SU 0x7 631 #define EEPROM_Default_ThermalMeter_88E 0x18 632 #define EEPROM_Default_ThermalMeter_8812 0x18 633 #define EEPROM_Default_ThermalMeter_8192E 0x1A 634 #define EEPROM_Default_ThermalMeter_8723B 0x18 635 #define EEPROM_Default_ThermalMeter_8703B 0x18 636 #define EEPROM_Default_ThermalMeter_8723D 0x18 637 #define EEPROM_Default_ThermalMeter_8188F 0x18 638 #define EEPROM_Default_ThermalMeter_8814A 0x18 639 640 641 #define EEPROM_Default_CrystalCap 0x0 642 #define EEPROM_Default_CrystalCap_8723A 0x20 643 #define EEPROM_Default_CrystalCap_88E 0x20 644 #define EEPROM_Default_CrystalCap_8812 0x20 645 #define EEPROM_Default_CrystalCap_8814 0x20 646 #define EEPROM_Default_CrystalCap_8192E 0x20 647 #define EEPROM_Default_CrystalCap_8723B 0x20 648 #define EEPROM_Default_CrystalCap_8703B 0x20 649 #define EEPROM_Default_CrystalCap_8723D 0x20 650 #define EEPROM_Default_CrystalCap_8188F 0x20 651 #define EEPROM_Default_CrystalFreq 0x0 652 #define EEPROM_Default_TxPowerLevel_92C 0x22 653 #define EEPROM_Default_TxPowerLevel_2G 0x2C 654 #define EEPROM_Default_TxPowerLevel_5G 0x22 655 #define EEPROM_Default_TxPowerLevel 0x22 656 #define EEPROM_Default_HT40_2SDiff 0x0 657 #define EEPROM_Default_HT20_Diff 2 658 #define EEPROM_Default_LegacyHTTxPowerDiff 0x3 659 #define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 660 #define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 661 #define EEPROM_Default_HT40_PwrMaxOffset 0 662 #define EEPROM_Default_HT20_PwrMaxOffset 0 663 664 #define EEPROM_Default_PID 0x1234 665 #define EEPROM_Default_VID 0x5678 666 #define EEPROM_Default_CustomerID 0xAB 667 #define EEPROM_Default_CustomerID_8188E 0x00 668 #define EEPROM_Default_SubCustomerID 0xCD 669 #define EEPROM_Default_Version 0 670 671 #define EEPROM_Default_externalPA_C9 0x00 672 #define EEPROM_Default_externalPA_CC 0xFF 673 #define EEPROM_Default_internalPA_SP3T_C9 0xAA 674 #define EEPROM_Default_internalPA_SP3T_CC 0xAF 675 #define EEPROM_Default_internalPA_SPDT_C9 0xAA 676 #ifdef CONFIG_PCI_HCI 677 #define EEPROM_Default_internalPA_SPDT_CC 0xA0 678 #else 679 #define EEPROM_Default_internalPA_SPDT_CC 0xFA 680 #endif 681 #define EEPROM_Default_PAType 0 682 #define EEPROM_Default_LNAType 0 683 684 /* New EFUSE default value */ 685 #define EEPROM_DEFAULT_24G_INDEX 0x2D 686 #define EEPROM_DEFAULT_24G_HT20_DIFF 0X02 687 #define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04 688 689 #define EEPROM_DEFAULT_5G_INDEX 0X2A 690 #define EEPROM_DEFAULT_5G_HT20_DIFF 0X00 691 #define EEPROM_DEFAULT_5G_OFDM_DIFF 0X04 692 693 #define EEPROM_DEFAULT_DIFF 0XFE 694 #define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F 695 #define EEPROM_DEFAULT_BOARD_OPTION 0x00 696 #define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF 697 #define EEPROM_DEFAULT_RFE_OPTION_8188E 0xFF 698 #define EEPROM_DEFAULT_RFE_OPTION 0x04 699 #define EEPROM_DEFAULT_FEATURE_OPTION 0x00 700 #define EEPROM_DEFAULT_BT_OPTION 0x10 701 702 703 #define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 704 705 /* PCIe related */ 706 #define EEPROM_PCIE_DEV_CAP_01 0xE0 /* Express device capability in PCIe configuration space, i.e., map to offset 0x74 */ 707 #define EEPROM_PCIE_DEV_CAP_02 0xE1 /* Express device capability in PCIe configuration space, i.e., map to offset 0x75 */ 708 709 710 /* 711 * For VHT series TX power by rate table. 712 * VHT TX power by rate off setArray = 713 * Band:-2G&5G = 0 / 1 714 * RF: at most 4*4 = ABCD=0/1/2/3 715 * CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 716 * */ 717 #define TX_PWR_BY_RATE_NUM_BAND 2 718 #define TX_PWR_BY_RATE_NUM_RF 4 719 #define TX_PWR_BY_RATE_NUM_RATE 84 720 721 #define TXPWR_LMT_MAX_RF 4 722 723 /* ---------------------------------------------------------------------------- 724 * EEPROM/EFUSE data structure definition. 725 * ---------------------------------------------------------------------------- */ 726 727 /* For 88E new structure */ 728 729 /* 730 2.4G: 731 { 732 {1,2}, 733 {3,4,5}, 734 {6,7,8}, 735 {9,10,11}, 736 {12,13}, 737 {14} 738 } 739 740 5G: 741 { 742 {36,38,40}, 743 {44,46,48}, 744 {52,54,56}, 745 {60,62,64}, 746 {100,102,104}, 747 {108,110,112}, 748 {116,118,120}, 749 {124,126,128}, 750 {132,134,136}, 751 {140,142,144}, 752 {149,151,153}, 753 {157,159,161}, 754 {173,175,177}, 755 } 756 */ 757 #define MAX_RF_PATH 4 758 #define RF_PATH_MAX MAX_RF_PATH 759 #define MAX_CHNL_GROUP_24G 6 760 #define MAX_CHNL_GROUP_5G 14 761 762 /* It must always set to 4, otherwise read efuse table sequence will be wrong. */ 763 #define MAX_TX_COUNT 4 764 765 typedef struct _TxPowerInfo24G { 766 u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; 767 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; 768 /* If only one tx, only BW20 and OFDM are used. */ 769 s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 770 s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 771 s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 772 s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 773 } TxPowerInfo24G, *PTxPowerInfo24G; 774 775 typedef struct _TxPowerInfo5G { 776 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; 777 /* If only one tx, only BW20, OFDM, BW80 and BW160 are used. */ 778 s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 779 s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 780 s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 781 s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 782 s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; 783 } TxPowerInfo5G, *PTxPowerInfo5G; 784 785 786 typedef enum _BT_Ant_NUM { 787 Ant_x2 = 0, 788 Ant_x1 = 1 789 } BT_Ant_NUM, *PBT_Ant_NUM; 790 791 typedef enum _BT_CoType { 792 BT_2WIRE = 0, 793 BT_ISSC_3WIRE = 1, 794 BT_ACCEL = 2, 795 BT_CSR_BC4 = 3, 796 BT_CSR_BC8 = 4, 797 BT_RTL8756 = 5, 798 BT_RTL8723A = 6, 799 BT_RTL8821 = 7, 800 BT_RTL8723B = 8, 801 BT_RTL8192E = 9, 802 BT_RTL8814A = 10, 803 BT_RTL8812A = 11, 804 BT_RTL8703B = 12, 805 BT_RTL8822B = 13, 806 BT_RTL8723D = 14, 807 BT_RTL8821C = 15 808 } BT_CoType, *PBT_CoType; 809 810 typedef enum _BT_RadioShared { 811 BT_Radio_Shared = 0, 812 BT_Radio_Individual = 1, 813 } BT_RadioShared, *PBT_RadioShared; 814 815 816 #endif 817