xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/btc/halbtc8723d2ant.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ************************************************************
3  * Description:
4  *
5  * This file is for RTL8723D Co-exist mechanism
6  *
7  * History
8  * 2012/11/15 Cosa first check in.
9  *
10  * ************************************************************ */
11 
12 /* ************************************************************
13  * include files
14  * ************************************************************ */
15 #include "Mp_Precomp.h"
16 
17 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
18 
19 #if (RTL8723D_SUPPORT == 1)
20 /* ************************************************************
21  * Global variables, these are static variables
22  * ************************************************************ */
23 static u8	*trace_buf = &gl_btc_trace_buf[0];
24 static struct  coex_dm_8723d_2ant		glcoex_dm_8723d_2ant;
25 static struct  coex_dm_8723d_2ant	*coex_dm = &glcoex_dm_8723d_2ant;
26 static struct  coex_sta_8723d_2ant		glcoex_sta_8723d_2ant;
27 static struct  coex_sta_8723d_2ant	*coex_sta = &glcoex_sta_8723d_2ant;
28 static struct  psdscan_sta_8723d_2ant	gl_psd_scan_8723d_2ant;
29 static struct  psdscan_sta_8723d_2ant *psd_scan = &gl_psd_scan_8723d_2ant;
30 
31 const char *const glbt_info_src_8723d_2ant[] = {
32 	"BT Info[wifi fw]",
33 	"BT Info[bt rsp]",
34 	"BT Info[bt auto report]",
35 };
36 
37 u32	glcoex_ver_date_8723d_2ant = 20160218;
38 u32	glcoex_ver_8723d_2ant = 0x05;
39 
40 /* ************************************************************
41  * local function proto type if needed
42  * ************************************************************
43  * ************************************************************
44  * local function start with halbtc8723d2ant_
45  * ************************************************************ */
halbtc8723d2ant_bt_rssi_state(u8 * ppre_bt_rssi_state,u8 level_num,u8 rssi_thresh,u8 rssi_thresh1)46 u8 halbtc8723d2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
47 				 u8 rssi_thresh, u8 rssi_thresh1)
48 {
49 	s32			bt_rssi = 0;
50 	u8			bt_rssi_state = *ppre_bt_rssi_state;
51 
52 	bt_rssi = coex_sta->bt_rssi;
53 
54 	if (level_num == 2) {
55 		if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
56 		    (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
57 			if (bt_rssi >= (rssi_thresh +
58 					BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
59 				bt_rssi_state = BTC_RSSI_STATE_HIGH;
60 			else
61 				bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
62 		} else {
63 			if (bt_rssi < rssi_thresh)
64 				bt_rssi_state = BTC_RSSI_STATE_LOW;
65 			else
66 				bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
67 		}
68 	} else if (level_num == 3) {
69 		if (rssi_thresh > rssi_thresh1) {
70 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
71 				    "[BTCoex], BT Rssi thresh error!!\n");
72 			BTC_TRACE(trace_buf);
73 			return *ppre_bt_rssi_state;
74 		}
75 
76 		if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
77 		    (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
78 			if (bt_rssi >= (rssi_thresh +
79 					BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
80 				bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
81 			else
82 				bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
83 		} else if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
84 			(*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
85 			if (bt_rssi >= (rssi_thresh1 +
86 					BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
87 				bt_rssi_state = BTC_RSSI_STATE_HIGH;
88 			else if (bt_rssi < rssi_thresh)
89 				bt_rssi_state = BTC_RSSI_STATE_LOW;
90 			else
91 				bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
92 		} else {
93 			if (bt_rssi < rssi_thresh1)
94 				bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
95 			else
96 				bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
97 		}
98 	}
99 
100 	*ppre_bt_rssi_state = bt_rssi_state;
101 
102 	return bt_rssi_state;
103 }
104 
halbtc8723d2ant_wifi_rssi_state(IN struct btc_coexist * btcoexist,IN u8 * pprewifi_rssi_state,IN u8 level_num,IN u8 rssi_thresh,IN u8 rssi_thresh1)105 u8 halbtc8723d2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
106 	   IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
107 				   IN u8 rssi_thresh1)
108 {
109 	s32			wifi_rssi = 0;
110 	u8			wifi_rssi_state = *pprewifi_rssi_state;
111 
112 	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
113 
114 	if (level_num == 2) {
115 		if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
116 		    (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
117 			if (wifi_rssi >= (rssi_thresh +
118 					  BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
119 				wifi_rssi_state = BTC_RSSI_STATE_HIGH;
120 			else
121 				wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
122 		} else {
123 			if (wifi_rssi < rssi_thresh)
124 				wifi_rssi_state = BTC_RSSI_STATE_LOW;
125 			else
126 				wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
127 		}
128 	} else if (level_num == 3) {
129 		if (rssi_thresh > rssi_thresh1) {
130 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
131 				    "[BTCoex], wifi RSSI thresh error!!\n");
132 			BTC_TRACE(trace_buf);
133 			return *pprewifi_rssi_state;
134 		}
135 
136 		if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
137 		    (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
138 			if (wifi_rssi >= (rssi_thresh +
139 					  BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
140 				wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
141 			else
142 				wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
143 		} else if ((*pprewifi_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
144 			(*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
145 			if (wifi_rssi >= (rssi_thresh1 +
146 					  BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
147 				wifi_rssi_state = BTC_RSSI_STATE_HIGH;
148 			else if (wifi_rssi < rssi_thresh)
149 				wifi_rssi_state = BTC_RSSI_STATE_LOW;
150 			else
151 				wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
152 		} else {
153 			if (wifi_rssi < rssi_thresh1)
154 				wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
155 			else
156 				wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
157 		}
158 	}
159 
160 	*pprewifi_rssi_state = wifi_rssi_state;
161 
162 	return wifi_rssi_state;
163 }
164 
halbtc8723d2ant_coex_switch_threshold(IN struct btc_coexist * btcoexist,IN u8 isolation_measuared)165 void halbtc8723d2ant_coex_switch_threshold(IN struct btc_coexist *btcoexist,
166 		IN u8 isolation_measuared)
167 {
168 	s8	interference_wl_tx = 0, interference_bt_tx = 0;
169 
170 
171 	interference_wl_tx = BT_8723D_2ANT_WIFI_MAX_TX_POWER - isolation_measuared;
172 	interference_bt_tx = BT_8723D_2ANT_BT_MAX_TX_POWER - isolation_measuared;
173 
174 
175 
176 	coex_sta->wifi_coex_thres		 = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1;
177 	coex_sta->wifi_coex_thres2	 = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2;
178 
179 	coex_sta->bt_coex_thres		 = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1;
180 	coex_sta->bt_coex_thres2		 = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2;
181 
182 
183 	/*
184 		coex_sta->wifi_coex_thres		= interference_wl_tx + BT_8723D_2ANT_WIFI_SIR_THRES1;
185 		coex_sta->wifi_coex_thres2		= interference_wl_tx + BT_8723D_2ANT_WIFI_SIR_THRES2;
186 
187 		coex_sta->bt_coex_thres		= interference_bt_tx + BT_8723D_2ANT_BT_SIR_THRES1;
188 		coex_sta->bt_coex_thres2		= interference_bt_tx + BT_8723D_2ANT_BT_SIR_THRES2;
189 	*/
190 
191 
192 
193 
194 
195 	/*
196 		if  ( BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
197 					BT_8723D_2ANT_DEFAULT_ISOLATION) )
198 			coex_sta->wifi_coex_thres	 = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1;
199 		else
200 			coex_sta->wifi_coex_thres =  BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
201 					BT_8723D_2ANT_DEFAULT_ISOLATION);
202 
203 		if  ( BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
204 					BT_8723D_2ANT_DEFAULT_ISOLATION) )
205 			coex_sta->bt_coex_thres	 = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1;
206 		else
207 			coex_sta->bt_coex_thres =  BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
208 					BT_8723D_2ANT_DEFAULT_ISOLATION);
209 
210 	*/
211 }
212 
213 
halbtc8723d2ant_limited_rx(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rej_ap_agg_pkt,IN boolean bt_ctrl_agg_buf_size,IN u8 agg_buf_size)214 void halbtc8723d2ant_limited_rx(IN struct btc_coexist *btcoexist,
215 			IN boolean force_exec, IN boolean rej_ap_agg_pkt,
216 			IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
217 {
218 	boolean	reject_rx_agg = rej_ap_agg_pkt;
219 	boolean	bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
220 	u8	rx_agg_size = agg_buf_size;
221 
222 	/* ============================================ */
223 	/*	Rx Aggregation related setting */
224 	/* ============================================ */
225 	btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
226 			   &reject_rx_agg);
227 	/* decide BT control aggregation buf size or not */
228 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
229 			   &bt_ctrl_rx_agg_size);
230 	/* aggregation buf size, only work when BT control Rx aggregation size. */
231 	btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
232 	/* real update aggregation setting */
233 	btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
234 }
235 
halbtc8723d2ant_query_bt_info(IN struct btc_coexist * btcoexist)236 void halbtc8723d2ant_query_bt_info(IN struct btc_coexist *btcoexist)
237 {
238 	u8			h2c_parameter[1] = {0};
239 
240 	coex_sta->c2h_bt_info_req_sent = true;
241 
242 	h2c_parameter[0] |= BIT(0);	/* trigger */
243 
244 	btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
245 }
246 
halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist * btcoexist)247 void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
248 {
249 	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
250 	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
251 	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
252 
253 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
254 
255 	reg_hp_txrx = 0x770;
256 	reg_lp_txrx = 0x774;
257 
258 	u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
259 	reg_hp_tx = u32tmp & MASKLWORD;
260 	reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
261 
262 	u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
263 	reg_lp_tx = u32tmp & MASKLWORD;
264 	reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
265 
266 	coex_sta->high_priority_tx = reg_hp_tx;
267 	coex_sta->high_priority_rx = reg_hp_rx;
268 	coex_sta->low_priority_tx = reg_lp_tx;
269 	coex_sta->low_priority_rx = reg_lp_rx;
270 
271 
272 	/* reset counter */
273 	btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
274 
275 	if ((coex_sta->low_priority_tx > 1050)  &&
276 	    (!coex_sta->c2h_bt_inquiry_page))
277 		coex_sta->pop_event_cnt++;
278 
279 	if ((coex_sta->low_priority_rx >= 950) && (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
280 	    && (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) && (coex_sta->bt_link_exist))	{
281 		if (cnt_slave >= 2) {
282 			bt_link_info->slave_role = true;
283 			cnt_slave = 2;
284 		} else
285 			cnt_slave++;
286 	} else {
287 		if (cnt_slave == 0)	{
288 			bt_link_info->slave_role = false;
289 			cnt_slave = 0;
290 		} else
291 			cnt_slave--;
292 
293 	}
294 
295 	if ((coex_sta->high_priority_tx == 0) && (coex_sta->high_priority_rx == 0) && (coex_sta->low_priority_tx == 0) &&
296 	    (coex_sta->low_priority_rx == 0)) {
297 		num_of_bt_counter_chk++;
298 		if (num_of_bt_counter_chk >= 3) {
299 			halbtc8723d2ant_query_bt_info(btcoexist);
300 			num_of_bt_counter_chk = 0;
301 		}
302 	}
303 
304 }
305 
halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist * btcoexist)306 void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
307 {
308 
309 
310 	if (coex_sta->under_ips) {
311 		coex_sta->crc_ok_cck = 0;
312 		coex_sta->crc_ok_11g = 0;
313 		coex_sta->crc_ok_11n = 0;
314 		coex_sta->crc_ok_11n_agg = 0;
315 
316 		coex_sta->crc_err_cck = 0;
317 		coex_sta->crc_err_11g = 0;
318 		coex_sta->crc_err_11n = 0;
319 		coex_sta->crc_err_11n_agg = 0;
320 	} else {
321 		coex_sta->crc_ok_cck	= btcoexist->btc_read_4byte(btcoexist,
322 					  0xf88);
323 		coex_sta->crc_ok_11g	= btcoexist->btc_read_2byte(btcoexist,
324 					  0xf94);
325 		coex_sta->crc_ok_11n	= btcoexist->btc_read_2byte(btcoexist,
326 					  0xf90);
327 		coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist,
328 					   0xfb8);
329 
330 		coex_sta->crc_err_cck	 = btcoexist->btc_read_4byte(btcoexist,
331 					   0xf84);
332 		coex_sta->crc_err_11g	 = btcoexist->btc_read_2byte(btcoexist,
333 					   0xf96);
334 		coex_sta->crc_err_11n	 = btcoexist->btc_read_2byte(btcoexist,
335 					   0xf92);
336 		coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist,
337 					    0xfba);
338 	}
339 
340 	/* reset counter */
341 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1);
342 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0);
343 }
344 
345 
halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist * btcoexist)346 boolean halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist *btcoexist)
347 {
348 	static boolean	pre_wifi_busy = false, pre_under_4way = false,
349 			pre_bt_hs_on = false, pre_bt_off = false;
350 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
351 	boolean			wifi_busy = false, under_4way = false, bt_hs_on = false;
352 	boolean			wifi_connected = false;
353 	u8			wifi_rssi_state = BTC_RSSI_STATE_HIGH;
354 
355 
356 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
357 			   &wifi_connected);
358 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
359 	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
360 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
361 			   &under_4way);
362 
363 	if (coex_sta->bt_disabled != pre_bt_off) {
364 		pre_bt_off = coex_sta->bt_disabled;
365 
366 		if (coex_sta->bt_disabled)
367 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
368 				    "[BTCoex], BT is disabled !!\n");
369 		else
370 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
371 				    "[BTCoex], BT is enabled !!\n");
372 
373 		BTC_TRACE(trace_buf);
374 		return true;
375 	}
376 
377 	if (wifi_connected) {
378 		if (wifi_busy != pre_wifi_busy) {
379 			pre_wifi_busy = wifi_busy;
380 			return true;
381 		}
382 		if (under_4way != pre_under_4way) {
383 			pre_under_4way = under_4way;
384 			return true;
385 		}
386 		if (bt_hs_on != pre_bt_hs_on) {
387 			pre_bt_hs_on = bt_hs_on;
388 			return true;
389 		}
390 
391 	}
392 
393 	return false;
394 }
395 
halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist * btcoexist)396 void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
397 {
398 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
399 	boolean				bt_hs_on = false;
400 
401 	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
402 
403 	bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
404 	bt_link_info->sco_exist = coex_sta->sco_exist;
405 	bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
406 	bt_link_info->pan_exist = coex_sta->pan_exist;
407 	bt_link_info->hid_exist = coex_sta->hid_exist;
408 	bt_link_info->acl_busy = coex_sta->acl_busy;
409 
410 	/* work around for HS mode. */
411 	if (bt_hs_on) {
412 		bt_link_info->pan_exist = true;
413 		bt_link_info->bt_link_exist = true;
414 	}
415 
416 	/* check if Sco only */
417 	if (bt_link_info->sco_exist &&
418 	    !bt_link_info->a2dp_exist &&
419 	    !bt_link_info->pan_exist &&
420 	    !bt_link_info->hid_exist)
421 		bt_link_info->sco_only = true;
422 	else
423 		bt_link_info->sco_only = false;
424 
425 	/* check if A2dp only */
426 	if (!bt_link_info->sco_exist &&
427 	    bt_link_info->a2dp_exist &&
428 	    !bt_link_info->pan_exist &&
429 	    !bt_link_info->hid_exist)
430 		bt_link_info->a2dp_only = true;
431 	else
432 		bt_link_info->a2dp_only = false;
433 
434 	/* check if Pan only */
435 	if (!bt_link_info->sco_exist &&
436 	    !bt_link_info->a2dp_exist &&
437 	    bt_link_info->pan_exist &&
438 	    !bt_link_info->hid_exist)
439 		bt_link_info->pan_only = true;
440 	else
441 		bt_link_info->pan_only = false;
442 
443 	/* check if Hid only */
444 	if (!bt_link_info->sco_exist &&
445 	    !bt_link_info->a2dp_exist &&
446 	    !bt_link_info->pan_exist &&
447 	    bt_link_info->hid_exist)
448 		bt_link_info->hid_only = true;
449 	else
450 		bt_link_info->hid_only = false;
451 }
452 
halbtc8723d2ant_update_wifi_channel_info(IN struct btc_coexist * btcoexist,IN u8 type)453 void halbtc8723d2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
454 		IN u8 type)
455 {
456 	u8			h2c_parameter[3] = {0};
457 	u32			wifi_bw;
458 	u8			wifi_central_chnl;
459 
460 	/* only 2.4G we need to inform bt the chnl mask */
461 	btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
462 			   &wifi_central_chnl);
463 	if ((BTC_MEDIA_CONNECT == type) &&
464 	    (wifi_central_chnl <= 14)) {
465 		h2c_parameter[0] =
466 			0x1;  /* enable BT AFH skip WL channel for 8723d because BT Rx LO interference */
467 		/* h2c_parameter[0] = 0x0; */
468 		h2c_parameter[1] = wifi_central_chnl;
469 		btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
470 		if (BTC_WIFI_BW_HT40 == wifi_bw)
471 			h2c_parameter[2] = 0x30;
472 		else
473 			h2c_parameter[2] = 0x20;
474 	}
475 
476 	coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
477 	coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
478 	coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
479 
480 	btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
481 
482 }
483 
halbtc8723d2ant_set_fw_dac_swing_level(IN struct btc_coexist * btcoexist,IN u8 dac_swing_lvl)484 void halbtc8723d2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
485 		IN u8 dac_swing_lvl)
486 {
487 	u8			h2c_parameter[1] = {0};
488 
489 	/* There are several type of dacswing */
490 	/* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
491 	h2c_parameter[0] = dac_swing_lvl;
492 
493 	btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
494 }
495 
halbtc8723d2ant_fw_dac_swing_lvl(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 fw_dac_swing_lvl)496 void halbtc8723d2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
497 			      IN boolean force_exec, IN u8 fw_dac_swing_lvl)
498 {
499 	coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
500 
501 	if (!force_exec) {
502 		if (coex_dm->pre_fw_dac_swing_lvl ==
503 		    coex_dm->cur_fw_dac_swing_lvl)
504 			return;
505 	}
506 
507 	halbtc8723d2ant_set_fw_dac_swing_level(btcoexist,
508 					       coex_dm->cur_fw_dac_swing_lvl);
509 
510 	coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
511 }
512 
halbtc8723d2ant_set_fw_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN u8 dec_bt_pwr_lvl)513 void halbtc8723d2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
514 				       IN u8 dec_bt_pwr_lvl)
515 {
516 	u8			h2c_parameter[1] = {0};
517 
518 	h2c_parameter[0] = dec_bt_pwr_lvl;
519 
520 	btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
521 }
522 
halbtc8723d2ant_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 dec_bt_pwr_lvl)523 void halbtc8723d2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
524 				IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
525 {
526 	coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
527 
528 	if (!force_exec) {
529 		if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
530 			return;
531 	}
532 	halbtc8723d2ant_set_fw_dec_bt_pwr(btcoexist,
533 					  coex_dm->cur_bt_dec_pwr_lvl);
534 
535 	coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
536 }
537 
halbtc8723d2ant_set_fw_low_penalty_ra(IN struct btc_coexist * btcoexist,IN boolean low_penalty_ra)538 void halbtc8723d2ant_set_fw_low_penalty_ra(IN struct btc_coexist
539 		*btcoexist, IN boolean low_penalty_ra)
540 {
541 	u8			h2c_parameter[6] = {0};
542 
543 	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
544 
545 	if (low_penalty_ra) {
546 		h2c_parameter[1] |= BIT(0);
547 		h2c_parameter[2] =
548 			0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
549 		h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
550 		h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
551 		h2c_parameter[5] = 0xf9;	/* MCS5 or OFDM36	 */
552 	}
553 
554 	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
555 }
556 
halbtc8723d2ant_low_penalty_ra(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean low_penalty_ra)557 void halbtc8723d2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
558 			    IN boolean force_exec, IN boolean low_penalty_ra)
559 {
560 	coex_dm->cur_low_penalty_ra = low_penalty_ra;
561 
562 	if (!force_exec) {
563 		if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
564 			return;
565 	}
566 	halbtc8723d2ant_set_fw_low_penalty_ra(btcoexist,
567 					      coex_dm->cur_low_penalty_ra);
568 
569 	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
570 }
571 
halbtc8723d2ant_set_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean enable_auto_report)572 void halbtc8723d2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
573 					IN boolean enable_auto_report)
574 {
575 	u8			h2c_parameter[1] = {0};
576 
577 	h2c_parameter[0] = 0;
578 
579 	if (enable_auto_report)
580 		h2c_parameter[0] |= BIT(0);
581 
582 	btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
583 }
584 
halbtc8723d2ant_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable_auto_report)585 void halbtc8723d2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
586 		    IN boolean force_exec, IN boolean enable_auto_report)
587 {
588 	coex_dm->cur_bt_auto_report = enable_auto_report;
589 
590 	if (!force_exec) {
591 		if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
592 			return;
593 	}
594 	halbtc8723d2ant_set_bt_auto_report(btcoexist,
595 					   coex_dm->cur_bt_auto_report);
596 
597 	coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
598 }
599 
halbtc8723d2ant_sw_mechanism1(IN struct btc_coexist * btcoexist,IN boolean shrink_rx_lpf,IN boolean low_penalty_ra,IN boolean limited_dig,IN boolean bt_lna_constrain)600 void halbtc8723d2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
601 			   IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
602 			   IN boolean limited_dig, IN boolean bt_lna_constrain)
603 {
604 
605 	halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
606 }
607 
halbtc8723d2ant_sw_mechanism2(IN struct btc_coexist * btcoexist,IN boolean agc_table_shift,IN boolean adc_back_off,IN boolean sw_dac_swing,IN u32 dac_swing_lvl)608 void halbtc8723d2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
609 			   IN boolean agc_table_shift, IN boolean adc_back_off,
610 			   IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
611 {
612 	/* halbtc8723d2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
613 	/* halbtc8723d2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
614 }
615 
halbtc8723d2ant_write_score_board(IN struct btc_coexist * btcoexist,IN u16 bitpos,IN BOOLEAN state)616 void halbtc8723d2ant_write_score_board(
617 	IN	struct  btc_coexist		*btcoexist,
618 	IN	u16				bitpos,
619 	IN	BOOLEAN		state
620 )
621 {
622 
623 	static u16 originalval = 0x8002;
624 
625 	if (state)
626 		originalval = originalval | bitpos;
627 	else
628 		originalval = originalval & (~bitpos);
629 
630 
631 	btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
632 
633 }
634 
halbtc8723d2ant_read_score_board(IN struct btc_coexist * btcoexist,IN u16 * score_board_val)635 void halbtc8723d2ant_read_score_board(
636 	IN	struct  btc_coexist		*btcoexist,
637 	IN   u16				*score_board_val
638 )
639 {
640 
641 	*score_board_val = (btcoexist->btc_read_2byte(btcoexist,
642 			    0xaa)) & 0x7fff;
643 }
644 
halbtc8723d2ant_post_activestate_to_bt(IN struct btc_coexist * btcoexist,IN boolean wifi_active)645 void halbtc8723d2ant_post_activestate_to_bt(
646 	IN	struct  btc_coexist		*btcoexist,
647 	IN	boolean				wifi_active
648 )
649 {
650 
651 	if (wifi_active)
652 		halbtc8723d2ant_write_score_board(btcoexist, (u16) BIT(0), TRUE);
653 	else
654 		halbtc8723d2ant_write_score_board(btcoexist, (u16) BIT(0), FALSE);
655 
656 	/* The BT should set "No Shunt-down" mode if WL = Active for BT Synthesizer on/off interference WL Lo issue at 8703b b-cut. */
657 
658 }
659 
halbtc8723d2ant_post_onoffstate_to_bt(IN struct btc_coexist * btcoexist,IN boolean wifi_on)660 void halbtc8723d2ant_post_onoffstate_to_bt(
661 	IN	struct  btc_coexist		*btcoexist,
662 	IN	boolean				wifi_on
663 )
664 {
665 
666 	if (wifi_on)
667 		halbtc8723d2ant_write_score_board(btcoexist, (u16) BIT(1), TRUE);
668 	else
669 		halbtc8723d2ant_write_score_board(btcoexist, (u16) BIT(1), FALSE);
670 
671 }
672 
halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist * btcoexist)673 void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
674 {
675 	static u32		bt_disable_cnt = 0;
676 	boolean			bt_active = true, bt_disabled = false;
677 	u16			u16tmp;
678 
679 	/* This function check if bt is disabled */
680 #if 0
681 	if (coex_sta->high_priority_tx == 0 &&
682 	    coex_sta->high_priority_rx == 0 &&
683 	    coex_sta->low_priority_tx == 0 &&
684 	    coex_sta->low_priority_rx == 0)
685 		bt_active = false;
686 	if (coex_sta->high_priority_tx == 0xffff &&
687 	    coex_sta->high_priority_rx == 0xffff &&
688 	    coex_sta->low_priority_tx == 0xffff &&
689 	    coex_sta->low_priority_rx == 0xffff)
690 		bt_active = false;
691 
692 
693 #else
694 
695 	/* Read BT on/off status from scoreboard[1], enable this only if BT patch support this feature */
696 	halbtc8723d2ant_read_score_board(btcoexist,	&u16tmp);
697 
698 	bt_active = u16tmp & BIT(1);
699 
700 
701 #endif
702 
703 	if (bt_active) {
704 		bt_disable_cnt = 0;
705 		bt_disabled = false;
706 		btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
707 				   &bt_disabled);
708 	} else {
709 
710 		bt_disable_cnt++;
711 		if (bt_disable_cnt >= 2) {
712 			bt_disabled = true;
713 			bt_disable_cnt = 2;
714 		}
715 
716 		btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
717 				   &bt_disabled);
718 	}
719 
720 
721 	if (coex_sta->bt_disabled != bt_disabled) {
722 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
723 			    "[BTCoex], BT is from %s to %s!!\n",
724 			    (coex_sta->bt_disabled ? "disabled" : "enabled"),
725 			    (bt_disabled ? "disabled" : "enabled"));
726 		BTC_TRACE(trace_buf);
727 		coex_sta->bt_disabled = bt_disabled;
728 	}
729 
730 }
731 
halbtc8723d2ant_enable_gnt_to_gpio(IN struct btc_coexist * btcoexist,boolean isenable)732 void halbtc8723d2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
733 					boolean isenable)
734 {
735 
736 	if (isenable) {
737 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x1);
738 
739 		/* enable GNT_BT to GPIO debug */
740 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x0);
741 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x0);
742 
743 		/* 0x48[20] = 0  for GPIO14 =  GNT_WL*/
744 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4a, 0x10, 0x0);
745 		/* 0x40[17] = 0  for GPIO14 =  GNT_WL*/
746 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x42, 0x02, 0x0);
747 
748 		/* 0x66[9] = 0   for GPIO15 =  GNT_BT*/
749 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x02, 0x0);
750 		/* 0x66[7] = 0
751 		for GPIO15 =  GNT_BT*/
752 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x66, 0x80, 0x0);
753 		/* 0x8[8] = 0    for GPIO15 =  GNT_BT*/
754 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x9, 0x1, 0x0);
755 
756 		/* BT Vendor Reg 0x76[0] = 0  for GPIO15 =  GNT_BT, this is not set here*/
757 	} else {
758 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x0);
759 
760 		/* Disable GNT_BT debug to GPIO, and enable chip_wakeup_host */
761 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x1);
762 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x1);
763 
764 		/* 0x48[20] = 0  for GPIO14 =  GNT_WL*/
765 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4a, 0x10, 0x1);
766 	}
767 
768 
769 }
770 
halbtc8723d2ant_ltecoex_indirect_read_reg(IN struct btc_coexist * btcoexist,IN u16 reg_addr)771 u32 halbtc8723d2ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
772 		IN u16 reg_addr)
773 {
774 	u32 j = 0;
775 
776 
777 	/* wait for ready bit before access 0x7c0		 */
778 	btcoexist->btc_write_4byte(btcoexist, 0x7c0, 0x800F0000 | reg_addr);
779 
780 	do {
781 		j++;
782 	} while (((btcoexist->btc_read_1byte(btcoexist,
783 					     0x7c3)&BIT(5)) == 0) &&
784 		 (j < BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
785 
786 
787 	return btcoexist->btc_read_4byte(btcoexist,
788 					 0x7c8);  /* get read data */
789 
790 }
791 
halbtc8723d2ant_ltecoex_indirect_write_reg(IN struct btc_coexist * btcoexist,IN u16 reg_addr,IN u32 bit_mask,IN u32 reg_value)792 void halbtc8723d2ant_ltecoex_indirect_write_reg(IN struct btc_coexist *btcoexist,
793 		IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value)
794 {
795 	u32 val, i = 0, j = 0, bitpos = 0;
796 
797 
798 	if (bit_mask == 0x0)
799 		return;
800 	if (bit_mask == 0xffffffff) {
801 		btcoexist->btc_write_4byte(btcoexist, 0x7c4,
802 					   reg_value); /* put write data */
803 
804 		/* wait for ready bit before access 0x7c0 */
805 		do {
806 			j++;
807 		} while (((btcoexist->btc_read_1byte(btcoexist,
808 						     0x7c3)&BIT(5)) == 0) &&
809 			(j < BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
810 
811 
812 		btcoexist->btc_write_4byte(btcoexist, 0x7c0,
813 					   0xc00F0000 | reg_addr);
814 	} else {
815 		for (i = 0; i <= 31; i++) {
816 			if (((bit_mask >> i) & 0x1) == 0x1) {
817 				bitpos = i;
818 				break;
819 			}
820 		}
821 
822 		/* read back register value before write */
823 		val = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
824 				reg_addr);
825 		val = (val & (~bit_mask)) | (reg_value << bitpos);
826 
827 		btcoexist->btc_write_4byte(btcoexist, 0x7c4,
828 					   val); /* put write data */
829 
830 		/* wait for ready bit before access 0x7c0		 */
831 		do {
832 			j++;
833 		} while (((btcoexist->btc_read_1byte(btcoexist,
834 						     0x7c3)&BIT(5)) == 0) &&
835 			(j < BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
836 
837 
838 		btcoexist->btc_write_4byte(btcoexist, 0x7c0,
839 					   0xc00F0000 | reg_addr);
840 
841 	}
842 
843 }
844 
halbtc8723d2ant_ltecoex_enable(IN struct btc_coexist * btcoexist,IN boolean enable)845 void halbtc8723d2ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
846 				    IN boolean enable)
847 {
848 	u8 val;
849 
850 	val = (enable) ? 1 : 0;
851 	halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist, 0x38, 0x80,
852 			val);  /* 0x38[7] */
853 
854 }
855 
halbtc8723d2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist * btcoexist,IN boolean wifi_control)856 void halbtc8723d2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
857 		IN boolean wifi_control)
858 {
859 	u8 val;
860 
861 	val = (wifi_control) ? 1 : 0;
862 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x4,
863 					   val); /* 0x70[26] */
864 
865 }
866 
halbtc8723d2ant_ltecoex_set_gnt_bt(IN struct btc_coexist * btcoexist,IN u8 control_block,IN boolean sw_control,IN u8 state)867 void halbtc8723d2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
868 			IN u8 control_block, IN boolean sw_control, IN u8 state)
869 {
870 	u32 val = 0, bit_mask;
871 
872 	state = state & 0x1;
873 	val = (sw_control) ? ((state << 1) | 0x1) : 0;
874 
875 	switch (control_block) {
876 	case BT_8723D_2ANT_GNT_BLOCK_RFC_BB:
877 	default:
878 		bit_mask = 0xc000;
879 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
880 				0x38, bit_mask, val); /* 0x38[15:14] */
881 		bit_mask = 0x0c00;
882 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
883 				0x38, bit_mask, val); /* 0x38[11:10]						 */
884 		break;
885 	case BT_8723D_2ANT_GNT_BLOCK_RFC:
886 		bit_mask = 0xc000;
887 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
888 				0x38, bit_mask, val); /* 0x38[15:14] */
889 		break;
890 	case BT_8723D_2ANT_GNT_BLOCK_BB:
891 		bit_mask = 0x0c00;
892 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
893 				0x38, bit_mask, val); /* 0x38[11:10] */
894 		break;
895 
896 	}
897 
898 }
899 
halbtc8723d2ant_ltecoex_set_gnt_wl(IN struct btc_coexist * btcoexist,IN u8 control_block,IN boolean sw_control,IN u8 state)900 void halbtc8723d2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
901 			IN u8 control_block, IN boolean sw_control, IN u8 state)
902 {
903 	u32 val = 0, bit_mask;
904 
905 	state = state & 0x1;
906 	val = (sw_control) ? ((state << 1) | 0x1) : 0;
907 
908 	switch (control_block) {
909 	case BT_8723D_2ANT_GNT_BLOCK_RFC_BB:
910 	default:
911 		bit_mask = 0x3000;
912 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
913 				0x38, bit_mask, val); /* 0x38[13:12] */
914 		bit_mask = 0x0300;
915 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
916 				0x38, bit_mask, val); /* 0x38[9:8]						 */
917 		break;
918 	case BT_8723D_2ANT_GNT_BLOCK_RFC:
919 		bit_mask = 0x3000;
920 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
921 				0x38, bit_mask, val); /* 0x38[13:12] */
922 		break;
923 	case BT_8723D_2ANT_GNT_BLOCK_BB:
924 		bit_mask = 0x0300;
925 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
926 				0x38, bit_mask, val); /* 0x38[9:8] */
927 		break;
928 
929 	}
930 
931 }
932 
halbtc8723d2ant_ltecoex_set_coex_table(IN struct btc_coexist * btcoexist,IN u8 table_type,IN u16 table_content)933 void halbtc8723d2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
934 		IN u8 table_type, IN u16 table_content)
935 {
936 	u16 reg_addr = 0x0000;
937 
938 	switch (table_type) {
939 	case BT_8723D_2ANT_CTT_WL_VS_LTE:
940 		reg_addr = 0xa0;
941 		break;
942 	case BT_8723D_2ANT_CTT_BT_VS_LTE:
943 		reg_addr = 0xa4;
944 		break;
945 	}
946 
947 	if (reg_addr != 0x0000)
948 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
949 			0xffff, table_content); /* 0xa0[15:0] or 0xa4[15:0] */
950 
951 
952 }
953 
954 
halbtc8723d2ant_ltecoex_set_break_table(IN struct btc_coexist * btcoexist,IN u8 table_type,IN u8 table_content)955 void halbtc8723d2ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
956 		IN u8 table_type, IN u8 table_content)
957 {
958 	u16 reg_addr = 0x0000;
959 
960 	switch (table_type) {
961 	case BT_8723D_2ANT_LBTT_WL_BREAK_LTE:
962 		reg_addr = 0xa8;
963 		break;
964 	case BT_8723D_2ANT_LBTT_BT_BREAK_LTE:
965 		reg_addr = 0xac;
966 		break;
967 	case BT_8723D_2ANT_LBTT_LTE_BREAK_WL:
968 		reg_addr = 0xb0;
969 		break;
970 	case BT_8723D_2ANT_LBTT_LTE_BREAK_BT:
971 		reg_addr = 0xb4;
972 		break;
973 	}
974 
975 	if (reg_addr != 0x0000)
976 		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
977 			0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */
978 
979 
980 }
981 
982 
halbtc8723d2ant_set_coex_table(IN struct btc_coexist * btcoexist,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)983 void halbtc8723d2ant_set_coex_table(IN struct btc_coexist *btcoexist,
984 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
985 {
986 	btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
987 
988 	btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
989 
990 	btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
991 
992 	btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
993 }
994 
halbtc8723d2ant_coex_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)995 void halbtc8723d2ant_coex_table(IN struct btc_coexist *btcoexist,
996 			IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
997 				IN u32 val0x6c8, IN u8 val0x6cc)
998 {
999 	coex_dm->cur_val0x6c0 = val0x6c0;
1000 	coex_dm->cur_val0x6c4 = val0x6c4;
1001 	coex_dm->cur_val0x6c8 = val0x6c8;
1002 	coex_dm->cur_val0x6cc = val0x6cc;
1003 
1004 	if (!force_exec) {
1005 		if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1006 		    (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1007 		    (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1008 		    (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1009 			return;
1010 	}
1011 	halbtc8723d2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
1012 				       val0x6cc);
1013 
1014 	coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1015 	coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1016 	coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1017 	coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1018 }
1019 
halbtc8723d2ant_coex_table_with_type(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)1020 void halbtc8723d2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
1021 		IN boolean force_exec, IN u8 type)
1022 {
1023 	u32	break_table;
1024 	u8	select_table;
1025 
1026 	coex_sta->coex_table_type = type;
1027 
1028 	if (coex_sta->concurrent_rx_mode_on == true) {
1029 		break_table = 0xf0ffffff;  /* set WL hi-pri can break BT */
1030 		select_table =
1031 			0xb;		/* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
1032 	} else {
1033 		break_table = 0xffffff;
1034 		select_table = 0x3;
1035 	}
1036 
1037 	switch (type) {
1038 	case 0:
1039 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1040 			   0xffffffff, 0xffffffff, break_table, select_table);
1041 		break;
1042 	case 1:
1043 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1044 			   0xaaaaaaaa, 0xaaaaaaaa, break_table, select_table);
1045 		break;
1046 	case 2:
1047 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1048 			   0x5a5a5a5a, 0x5a5a5a5a, break_table, select_table);
1049 		break;
1050 	case 3:
1051 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1052 			   0xdafadafa, 0xdafadafa, break_table, select_table);
1053 		break;
1054 	case 4:
1055 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1056 			   0xddffddff, 0xffbbffbb, break_table, select_table);
1057 		break;
1058 	case 5:
1059 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1060 			   0x5fff5fff, 0x5fff5fff, break_table, select_table);
1061 		break;
1062 	case 6:
1063 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1064 			   0x55ff55ff, 0x5a5a5a5a, break_table, select_table);
1065 		break;
1066 	case 7:
1067 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1068 			   0x5aff55ff, 0x5a7a5a7a, break_table, select_table);
1069 		break;
1070 	case 8:
1071 		halbtc8723d2ant_coex_table(btcoexist, force_exec,
1072 			   0x55555555, 0xaaaaaaaa, break_table, select_table);
1073 		break;
1074 	default:
1075 		break;
1076 	}
1077 }
1078 
halbtc8723d2ant_set_fw_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean enable)1079 void halbtc8723d2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1080 		IN boolean enable)
1081 {
1082 	u8			h2c_parameter[1] = {0};
1083 
1084 	if (enable)
1085 		h2c_parameter[0] |= BIT(0);		/* function enable */
1086 
1087 	btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1088 }
1089 
halbtc8723d2ant_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable)1090 void halbtc8723d2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1091 				     IN boolean force_exec, IN boolean enable)
1092 {
1093 	coex_dm->cur_ignore_wlan_act = enable;
1094 
1095 	if (!force_exec) {
1096 		if (coex_dm->pre_ignore_wlan_act ==
1097 		    coex_dm->cur_ignore_wlan_act)
1098 			return;
1099 	}
1100 	halbtc8723d2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1101 
1102 	coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1103 }
1104 
halbtc8723d2ant_set_lps_rpwm(IN struct btc_coexist * btcoexist,IN u8 lps_val,IN u8 rpwm_val)1105 void halbtc8723d2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
1106 				  IN u8 lps_val, IN u8 rpwm_val)
1107 {
1108 	u8	lps = lps_val;
1109 	u8	rpwm = rpwm_val;
1110 
1111 	btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
1112 	btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
1113 }
1114 
halbtc8723d2ant_lps_rpwm(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 lps_val,IN u8 rpwm_val)1115 void halbtc8723d2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
1116 		      IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
1117 {
1118 	coex_dm->cur_lps = lps_val;
1119 	coex_dm->cur_rpwm = rpwm_val;
1120 
1121 	if (!force_exec) {
1122 		if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
1123 		    (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
1124 			return;
1125 	}
1126 	halbtc8723d2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
1127 
1128 	coex_dm->pre_lps = coex_dm->cur_lps;
1129 	coex_dm->pre_rpwm = coex_dm->cur_rpwm;
1130 }
1131 
halbtc8723d2ant_ps_tdma_check_for_power_save_state(IN struct btc_coexist * btcoexist,IN boolean new_ps_state)1132 void halbtc8723d2ant_ps_tdma_check_for_power_save_state(
1133 	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
1134 {
1135 	u8	lps_mode = 0x0;
1136 	u8	h2c_parameter[5] = {0, 0, 0, 0x40, 0};
1137 
1138 	btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
1139 
1140 	if (lps_mode) {	/* already under LPS state */
1141 		if (new_ps_state) {
1142 			/* keep state under LPS, do nothing. */
1143 		} else {
1144 			/* will leave LPS state, turn off psTdma first */
1145 			/*halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1146 						8); */
1147 			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1148 		}
1149 	} else {					/* NO PS state */
1150 		if (new_ps_state) {
1151 			/* will enter LPS state, turn off psTdma first */
1152 			/*halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1153 						8);*/
1154 			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1155 		} else {
1156 			/* keep state under NO PS state, do nothing. */
1157 		}
1158 	}
1159 }
1160 
halbtc8723d2ant_power_save_state(IN struct btc_coexist * btcoexist,IN u8 ps_type,IN u8 lps_val,IN u8 rpwm_val)1161 void halbtc8723d2ant_power_save_state(IN struct btc_coexist *btcoexist,
1162 			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
1163 {
1164 	boolean		low_pwr_disable = false;
1165 
1166 	switch (ps_type) {
1167 	case BTC_PS_WIFI_NATIVE:
1168 		/* recover to original 32k low power setting */
1169 		low_pwr_disable = false;
1170 		btcoexist->btc_set(btcoexist,
1171 				   BTC_SET_ACT_DISABLE_LOW_POWER,
1172 				   &low_pwr_disable);
1173 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
1174 				   NULL);
1175 		coex_sta->force_lps_on = false;
1176 		break;
1177 	case BTC_PS_LPS_ON:
1178 		halbtc8723d2ant_ps_tdma_check_for_power_save_state(
1179 			btcoexist, true);
1180 		halbtc8723d2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
1181 					 lps_val, rpwm_val);
1182 		/* when coex force to enter LPS, do not enter 32k low power. */
1183 		low_pwr_disable = true;
1184 		btcoexist->btc_set(btcoexist,
1185 				   BTC_SET_ACT_DISABLE_LOW_POWER,
1186 				   &low_pwr_disable);
1187 		/* power save must executed before psTdma.			 */
1188 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
1189 				   NULL);
1190 		coex_sta->force_lps_on = true;
1191 		break;
1192 	case BTC_PS_LPS_OFF:
1193 		halbtc8723d2ant_ps_tdma_check_for_power_save_state(
1194 			btcoexist, false);
1195 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
1196 				   NULL);
1197 		coex_sta->force_lps_on = false;
1198 		break;
1199 	default:
1200 		break;
1201 	}
1202 }
1203 
1204 
1205 
halbtc8723d2ant_set_fw_pstdma(IN struct btc_coexist * btcoexist,IN u8 byte1,IN u8 byte2,IN u8 byte3,IN u8 byte4,IN u8 byte5)1206 void halbtc8723d2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1207 	   IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1208 {
1209 	u8			h2c_parameter[5] = {0};
1210 	u8			real_byte1 = byte1, real_byte5 = byte5;
1211 	boolean			ap_enable = false;
1212 
1213 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
1214 			   &ap_enable);
1215 
1216 	if (ap_enable) {
1217 		if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
1218 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1219 				    "[BTCoex], FW for 1Ant AP mode\n");
1220 			BTC_TRACE(trace_buf);
1221 			real_byte1 &= ~BIT(4);
1222 			real_byte1 |= BIT(5);
1223 
1224 			real_byte5 |= BIT(5);
1225 			real_byte5 &= ~BIT(6);
1226 
1227 			halbtc8723d2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1228 							 0x0);
1229 		}
1230 	} else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
1231 
1232 		halbtc8723d2ant_power_save_state(
1233 			btcoexist, BTC_PS_LPS_ON, 0x50,
1234 			0x4);
1235 	} else {
1236 		halbtc8723d2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1237 						 0x0);
1238 	}
1239 
1240 
1241 	h2c_parameter[0] = real_byte1;
1242 	h2c_parameter[1] = byte2;
1243 	h2c_parameter[2] = byte3;
1244 	h2c_parameter[3] = byte4;
1245 	h2c_parameter[4] = real_byte5;
1246 
1247 	coex_dm->ps_tdma_para[0] = real_byte1;
1248 	coex_dm->ps_tdma_para[1] = byte2;
1249 	coex_dm->ps_tdma_para[2] = byte3;
1250 	coex_dm->ps_tdma_para[3] = byte4;
1251 	coex_dm->ps_tdma_para[4] = real_byte5;
1252 
1253 	btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1254 }
1255 
halbtc8723d2ant_ps_tdma(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean turn_on,IN u8 type)1256 void halbtc8723d2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1257 		     IN boolean force_exec, IN boolean turn_on, IN u8 type)
1258 {
1259 
1260 	static u8			psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
1261 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1262 
1263 
1264 	coex_dm->cur_ps_tdma_on = turn_on;
1265 	coex_dm->cur_ps_tdma = type;
1266 
1267 	/* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
1268 	if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
1269 		psTdmaByte4Modify = 0x1;
1270 	else
1271 		psTdmaByte4Modify = 0x0;
1272 
1273 	if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
1274 
1275 		force_exec = true;
1276 		pre_psTdmaByte4Modify = psTdmaByte4Modify;
1277 	}
1278 
1279 	if (!force_exec) {
1280 		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1281 		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1282 			return;
1283 	}
1284 
1285 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1286 		    "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1287 		(force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"), type);
1288 	BTC_TRACE(trace_buf);
1289 
1290 
1291 	if (turn_on)	{
1292 
1293 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
1294 					   0x1);  /* enable TBTT nterrupt */
1295 	}
1296 
1297 
1298 	if (turn_on) {
1299 		switch (type) {
1300 		case 1:
1301 		default:
1302 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1303 						      0x10, 0x03, 0xf1,
1304 						      0x14 | psTdmaByte4Modify);
1305 			break;
1306 		case 2:
1307 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1308 						      0x35, 0x03, 0x71,
1309 						      0x11 | psTdmaByte4Modify);
1310 			break;
1311 		case 3:
1312 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1313 						      0x3a, 0x3, 0xf1,
1314 						      0x10 | psTdmaByte4Modify);
1315 			break;
1316 		case 4:
1317 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1318 						      0x21, 0x3, 0xf1,
1319 						      0x10 | psTdmaByte4Modify);
1320 			break;
1321 		case 5:
1322 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1323 						      0x30, 0x3, 0xf1,
1324 						      0x10 | psTdmaByte4Modify);
1325 			break;
1326 		case 6:
1327 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1328 						      0x1c, 0x3, 0xf1,
1329 						      0x10 | psTdmaByte4Modify);
1330 			break;
1331 		case 7:
1332 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1333 						      0x25, 0x3, 0xf1,
1334 						      0x10 | psTdmaByte4Modify);
1335 			break;
1336 		case 11:
1337 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1338 						      0x30, 0x03, 0x71,
1339 						      0x10 | psTdmaByte4Modify);
1340 			break;
1341 		case 12:
1342 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1343 						      0x21, 0x03, 0x71,
1344 						      0x11 | psTdmaByte4Modify);
1345 			break;
1346 		case 13:
1347 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1348 						      0x1c, 0x03, 0x71,
1349 						      0x10 | psTdmaByte4Modify);
1350 			break;
1351 		case 101:
1352 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
1353 						      0x10, 0x03, 0x70,
1354 						      0x14 | psTdmaByte4Modify);
1355 			break;
1356 		case 102:
1357 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
1358 						      0x35, 0x03, 0x71,
1359 						      0x11 | psTdmaByte4Modify);
1360 			break;
1361 		case 103:
1362 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
1363 						      0x3a, 0x3, 0x70,
1364 						      0x10 | psTdmaByte4Modify);
1365 			break;
1366 		case 104:
1367 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
1368 						      0x21, 0x3, 0x70,
1369 						      0x10 | psTdmaByte4Modify);
1370 			break;
1371 		case 105:
1372 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
1373 						      0x30, 0x3, 0x70,
1374 						      0x10 | psTdmaByte4Modify);
1375 			break;
1376 		case 106:
1377 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
1378 						      0x1c, 0x3, 0x70,
1379 						      0x10 | psTdmaByte4Modify);
1380 			break;
1381 		case 107:
1382 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
1383 						      0x25, 0x3, 0x70,
1384 						      0x10 | psTdmaByte4Modify);
1385 			break;
1386 
1387 
1388 		}
1389 	} else {
1390 		/* disable PS tdma */
1391 		switch (type) {
1392 		case 0:
1393 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x0,
1394 						      0x0, 0x0, 0x40, 0x0);
1395 			break;
1396 		case 1:
1397 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x0,
1398 						      0x0, 0x0, 0x48, 0x0);
1399 			break;
1400 		default:
1401 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x0,
1402 						      0x0, 0x0, 0x40, 0x0);
1403 			break;
1404 		}
1405 	}
1406 
1407 	/* update pre state */
1408 	coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1409 	coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1410 }
1411 
halbtc8723d2ant_set_ant_path(IN struct btc_coexist * btcoexist,IN u8 ant_pos_type,IN boolean init_hwcfg,IN boolean wifi_off)1412 void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1413 	  IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1414 {
1415 	struct  btc_board_info *board_info = &btcoexist->board_info;
1416 	u32			u32tmp = 0;
1417 	boolean			pg_ext_switch = false;
1418 	u8			h2c_parameter[2] = {0}, u8tmp0 = 0;
1419 	boolean			is_in_mp_mode = false;
1420 	u32				u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0;
1421 	u16				u16tmp0 = 0;
1422 
1423 
1424 	if (init_hwcfg) {
1425 
1426 		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
1427 		halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
1428 
1429 		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
1430 		halbtc8723d2ant_ltecoex_set_coex_table(btcoexist,
1431 				       BT_8723D_1ANT_CTT_WL_VS_LTE, 0xffff);
1432 
1433 		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
1434 		halbtc8723d2ant_ltecoex_set_coex_table(btcoexist,
1435 				       BT_8723D_1ANT_CTT_BT_VS_LTE, 0xffff);
1436 
1437 		/* Set Path control to WL */
1438 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
1439 
1440 		/* set Path control owner to WL at initial step */
1441 		halbtc8723d2ant_ltecoex_pathcontrol_owner(btcoexist,
1442 				BT_8723D_1ANT_PCO_WLSIDE);
1443 
1444 		/* set GNT_BT to high */
1445 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
1446 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
1447 					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
1448 					   BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
1449 		/* Set GNT_WL to high */
1450 		halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
1451 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
1452 					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
1453 					   BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
1454 
1455 		/* Send antenna info (inverse, non-inverse, Int/Ext)  to Firmware */
1456 		if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
1457 			/* tell firmware "no antenna inverse" */
1458 			h2c_parameter[0] = 0;
1459 		} else {
1460 			/* tell firmware "antenna inverse" */
1461 			h2c_parameter[0] = 1;
1462 		}
1463 
1464 		/* int switch type */
1465 		h2c_parameter[1] = 0;
1466 		btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter);
1467 
1468 		coex_sta->gnt_control_by_PTA = false;
1469 	} else if (wifi_off) {
1470 		/* Disable LTE Coex Function in WiFi side */
1471 		halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
1472 
1473 		/* Set Path control to BT */
1474 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x0);
1475 
1476 		halbtc8723d2ant_ltecoex_pathcontrol_owner(btcoexist,
1477 			BT_8723D_1ANT_PCO_BTSIDE);/* set Path control owner to BT */
1478 
1479 		coex_sta->gnt_control_by_PTA = false;
1480 	} else {
1481 
1482 		/* set GNT_BT to PTA */
1483 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
1484 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
1485 					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA,
1486 					   BT_8723D_2ANT_SIG_STA_SET_BY_HW);
1487 		/* Set GNT_WL to PTA */
1488 		halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
1489 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
1490 					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA,
1491 					   BT_8723D_2ANT_SIG_STA_SET_BY_HW);
1492 
1493 		coex_sta->gnt_control_by_PTA = true;
1494 	}
1495 
1496 	switch (ant_pos_type) {
1497 	case BTC_ANT_WIFI_AT_MAIN:
1498 		u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0x948);
1499 		if ((u16tmp0 == 0x140) || (u16tmp0 == 0x40))
1500 			btcoexist->btc_write_2byte(btcoexist, 0x948, u16tmp0);
1501 		else
1502 			btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0);
1503 		break;
1504 	case BTC_ANT_WIFI_AT_AUX:
1505 		u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0x948);
1506 		if ((u16tmp0 == 0x140) || (u16tmp0 == 0x40))
1507 			btcoexist->btc_write_2byte(btcoexist, 0x948, u16tmp0);
1508 		else
1509 			btcoexist->btc_write_2byte(btcoexist, 0x948, 0x280);
1510 		break;
1511 	}
1512 
1513 
1514 	u8tmp0 =  btcoexist->btc_read_1byte(btcoexist, 0x67);
1515 	u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0x948);
1516 	u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
1517 	u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
1518 	u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
1519 
1520 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1521 		"[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (After Set Ant Path) **********\n",
1522 		    u8tmp0, u16tmp0, u32tmp0, u32tmp1, u32tmp2);
1523 	BTC_TRACE(trace_buf);
1524 
1525 }
1526 
halbtc8723d2ant_action_algorithm(IN struct btc_coexist * btcoexist)1527 u8 halbtc8723d2ant_action_algorithm(IN struct btc_coexist *btcoexist)
1528 {
1529 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
1530 	boolean				bt_hs_on = false;
1531 	u8				algorithm = BT_8723D_2ANT_COEX_ALGO_UNDEFINED;
1532 	u8				num_of_diff_profile = 0;
1533 
1534 	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1535 
1536 	if (!bt_link_info->bt_link_exist) {
1537 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1538 			    "[BTCoex], No BT link exists!!!\n");
1539 		BTC_TRACE(trace_buf);
1540 		return algorithm;
1541 	}
1542 
1543 	if (bt_link_info->sco_exist)
1544 		num_of_diff_profile++;
1545 	if (bt_link_info->hid_exist)
1546 		num_of_diff_profile++;
1547 	if (bt_link_info->pan_exist)
1548 		num_of_diff_profile++;
1549 	if (bt_link_info->a2dp_exist)
1550 		num_of_diff_profile++;
1551 
1552 	if (num_of_diff_profile == 0) {
1553 
1554 		if (bt_link_info->acl_busy) {
1555 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1556 				    "[BTCoex], No-Profile busy\n");
1557 			BTC_TRACE(trace_buf);
1558 			algorithm = BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY;
1559 		}
1560 	} else if (num_of_diff_profile == 1) {
1561 		if (bt_link_info->sco_exist) {
1562 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1563 				    "[BTCoex], SCO only\n");
1564 			BTC_TRACE(trace_buf);
1565 			algorithm = BT_8723D_2ANT_COEX_ALGO_SCO;
1566 		} else {
1567 			if (bt_link_info->hid_exist) {
1568 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1569 					    "[BTCoex], HID only\n");
1570 				BTC_TRACE(trace_buf);
1571 				algorithm = BT_8723D_2ANT_COEX_ALGO_HID;
1572 			} else if (bt_link_info->a2dp_exist) {
1573 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1574 					    "[BTCoex], A2DP only\n");
1575 				BTC_TRACE(trace_buf);
1576 				algorithm = BT_8723D_2ANT_COEX_ALGO_A2DP;
1577 			} else if (bt_link_info->pan_exist) {
1578 				if (bt_hs_on) {
1579 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1580 						    "[BTCoex], PAN(HS) only\n");
1581 					BTC_TRACE(trace_buf);
1582 					algorithm =
1583 						BT_8723D_2ANT_COEX_ALGO_PANHS;
1584 				} else {
1585 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1586 						"[BTCoex], PAN(EDR) only\n");
1587 					BTC_TRACE(trace_buf);
1588 					algorithm =
1589 						BT_8723D_2ANT_COEX_ALGO_PANEDR;
1590 				}
1591 			}
1592 		}
1593 	} else if (num_of_diff_profile == 2) {
1594 		if (bt_link_info->sco_exist) {
1595 			if (bt_link_info->hid_exist) {
1596 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1597 					    "[BTCoex], SCO + HID\n");
1598 				BTC_TRACE(trace_buf);
1599 				algorithm = BT_8723D_2ANT_COEX_ALGO_SCO;
1600 			} else if (bt_link_info->a2dp_exist) {
1601 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1602 					    "[BTCoex], SCO + A2DP ==> A2DP\n");
1603 				BTC_TRACE(trace_buf);
1604 				algorithm = BT_8723D_2ANT_COEX_ALGO_A2DP;
1605 			} else if (bt_link_info->pan_exist) {
1606 				if (bt_hs_on) {
1607 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1608 						"[BTCoex], SCO + PAN(HS)\n");
1609 					BTC_TRACE(trace_buf);
1610 					algorithm = BT_8723D_2ANT_COEX_ALGO_SCO;
1611 				} else {
1612 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1613 						"[BTCoex], SCO + PAN(EDR)\n");
1614 					BTC_TRACE(trace_buf);
1615 					algorithm =	BT_8723D_2ANT_COEX_ALGO_PANEDR;
1616 				}
1617 			}
1618 		} else {
1619 			if (bt_link_info->hid_exist &&
1620 			    bt_link_info->a2dp_exist) {
1621 				{
1622 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1623 						    "[BTCoex], HID + A2DP\n");
1624 					BTC_TRACE(trace_buf);
1625 					algorithm =
1626 						BT_8723D_2ANT_COEX_ALGO_HID_A2DP;
1627 				}
1628 			} else if (bt_link_info->hid_exist &&
1629 				   bt_link_info->pan_exist) {
1630 				if (bt_hs_on) {
1631 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1632 						"[BTCoex], HID + PAN(HS)\n");
1633 					BTC_TRACE(trace_buf);
1634 					algorithm = BT_8723D_2ANT_COEX_ALGO_HID;
1635 				} else {
1636 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1637 						"[BTCoex], HID + PAN(EDR)\n");
1638 					BTC_TRACE(trace_buf);
1639 					algorithm =
1640 						BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
1641 				}
1642 			} else if (bt_link_info->pan_exist &&
1643 				   bt_link_info->a2dp_exist) {
1644 				if (bt_hs_on) {
1645 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1646 						"[BTCoex], A2DP + PAN(HS)\n");
1647 					BTC_TRACE(trace_buf);
1648 					algorithm =
1649 						BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS;
1650 				} else {
1651 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1652 						"[BTCoex], A2DP + PAN(EDR)\n");
1653 					BTC_TRACE(trace_buf);
1654 					algorithm =
1655 						BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP;
1656 				}
1657 			}
1658 		}
1659 	} else if (num_of_diff_profile == 3) {
1660 		if (bt_link_info->sco_exist) {
1661 			if (bt_link_info->hid_exist &&
1662 			    bt_link_info->a2dp_exist) {
1663 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1664 					"[BTCoex], SCO + HID + A2DP ==> HID + A2DP\n");
1665 				BTC_TRACE(trace_buf);
1666 				algorithm = BT_8723D_2ANT_COEX_ALGO_HID_A2DP;
1667 			} else if (bt_link_info->hid_exist &&
1668 				   bt_link_info->pan_exist) {
1669 				if (bt_hs_on) {
1670 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1671 						"[BTCoex], SCO + HID + PAN(HS)\n");
1672 					BTC_TRACE(trace_buf);
1673 					algorithm =
1674 						BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
1675 				} else {
1676 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1677 						"[BTCoex], SCO + HID + PAN(EDR)\n");
1678 					BTC_TRACE(trace_buf);
1679 					algorithm =
1680 						BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
1681 				}
1682 			} else if (bt_link_info->pan_exist &&
1683 				   bt_link_info->a2dp_exist) {
1684 				if (bt_hs_on) {
1685 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1686 						"[BTCoex], SCO + A2DP + PAN(HS)\n");
1687 					BTC_TRACE(trace_buf);
1688 					algorithm =
1689 						BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP;
1690 				} else {
1691 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1692 						"[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
1693 					BTC_TRACE(trace_buf);
1694 					algorithm =
1695 						BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP;
1696 				}
1697 			}
1698 		} else {
1699 			if (bt_link_info->hid_exist &&
1700 			    bt_link_info->pan_exist &&
1701 			    bt_link_info->a2dp_exist) {
1702 				if (bt_hs_on) {
1703 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1704 						"[BTCoex], HID + A2DP + PAN(HS)\n");
1705 					BTC_TRACE(trace_buf);
1706 					algorithm =
1707 						BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
1708 				} else {
1709 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1710 						"[BTCoex], HID + A2DP + PAN(EDR)\n");
1711 					BTC_TRACE(trace_buf);
1712 					algorithm =
1713 						BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
1714 				}
1715 			}
1716 		}
1717 	} else if (num_of_diff_profile >= 3) {
1718 		if (bt_link_info->sco_exist) {
1719 			if (bt_link_info->hid_exist &&
1720 			    bt_link_info->pan_exist &&
1721 			    bt_link_info->a2dp_exist) {
1722 				if (bt_hs_on) {
1723 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1724 						"[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
1725 					BTC_TRACE(trace_buf);
1726 					algorithm =
1727 						BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
1728 				} else {
1729 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1730 						"[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
1731 					BTC_TRACE(trace_buf);
1732 					algorithm =
1733 						BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
1734 				}
1735 			}
1736 		}
1737 	}
1738 
1739 	return algorithm;
1740 }
1741 
1742 
1743 
halbtc8723d2ant_action_coex_all_off(IN struct btc_coexist * btcoexist)1744 void halbtc8723d2ant_action_coex_all_off(IN struct btc_coexist *btcoexist)
1745 {
1746 
1747 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1748 
1749 	/* fw all off */
1750 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1751 
1752 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
1753 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1754 
1755 	/* sw all off */
1756 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
1757 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1758 
1759 }
1760 
halbtc8723d2ant_action_init_coex_dm(IN struct btc_coexist * btcoexist)1761 void halbtc8723d2ant_action_init_coex_dm(IN struct btc_coexist *btcoexist)
1762 {
1763 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1764 
1765 	/* fw all off */
1766 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1767 
1768 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
1769 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1770 
1771 	/* sw all off */
1772 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
1773 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1774 
1775 	coex_sta->pop_event_cnt = 0;
1776 }
1777 
halbtc8723d2ant_action_bt_inquiry(IN struct btc_coexist * btcoexist)1778 void halbtc8723d2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
1779 {
1780 
1781 	boolean	wifi_connected = false;
1782 	boolean		scan = false, link = false, roam = false;
1783 	boolean			wifi_busy = false;
1784 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1785 
1786 
1787 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1788 
1789 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1790 			   &wifi_connected);
1791 
1792 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
1793 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
1794 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
1795 
1796 	if (link || roam || coex_sta->wifi_is_high_pri_task) {
1797 
1798 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1799 			"[BTCoex], Wifi link/roam/hi-pri-task process + BT Inq/Page!!\n");
1800 		BTC_TRACE(trace_buf);
1801 
1802 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1803 						     8);
1804 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1805 
1806 	} else if (scan) {
1807 
1808 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1809 			    "[BTCoex], Wifi scan process + BT Inq/Page!!\n");
1810 		BTC_TRACE(trace_buf);
1811 
1812 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1813 						     8);
1814 
1815 		if (coex_sta->bt_create_connection)
1816 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 12);
1817 		else
1818 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1819 
1820 	}  else if (wifi_connected) {
1821 
1822 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1823 			    "[BTCoex], Wifi connected + BT Inq/Page!!\n");
1824 		BTC_TRACE(trace_buf);
1825 
1826 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1827 						     7);
1828 
1829 		if (wifi_busy) {
1830 
1831 			if ((bt_link_info->a2dp_exist) && (bt_link_info->acl_busy))
1832 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
1833 			else
1834 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1835 
1836 		} else
1837 
1838 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
1839 	} else {
1840 
1841 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1842 			    "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
1843 		BTC_TRACE(trace_buf);
1844 
1845 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1846 
1847 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1848 	}
1849 
1850 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
1851 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1852 
1853 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
1854 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1855 
1856 }
1857 
halbtc8723d2ant_action_wifi_link_process(IN struct btc_coexist * btcoexist)1858 void halbtc8723d2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
1859 {
1860 	u32	u32tmp, u32tmpb;
1861 	u8	u8tmpa;
1862 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1863 
1864 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
1865 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1866 
1867 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
1868 
1869 	if ((bt_link_info->a2dp_exist) && (bt_link_info->acl_busy))
1870 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
1871 	else
1872 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1873 
1874 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
1875 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1876 
1877 }
1878 
1879 
halbtc8723d2ant_action_wifi_nonconnected(IN struct btc_coexist * btcoexist)1880 void halbtc8723d2ant_action_wifi_nonconnected(IN struct btc_coexist *btcoexist)
1881 {
1882 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1883 
1884 	/* fw all off */
1885 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1886 
1887 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
1888 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1889 
1890 	/* sw all off */
1891 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
1892 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1893 }
1894 
halbtc8723d2ant_action_bt_idle(IN struct btc_coexist * btcoexist)1895 void halbtc8723d2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
1896 {
1897 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
1898 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1899 	u8		wifi_rssi_state, bt_rssi_state;
1900 
1901 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
1902 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
1903 	u8		wifi_rssi_state2, bt_rssi_state2;
1904 
1905 	boolean	wifi_connected = false;
1906 	boolean		scan = false, link = false, roam = false;
1907 	boolean			wifi_busy = false;
1908 
1909 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
1910 			  &prewifi_rssi_state, 2,
1911 			  coex_sta->wifi_coex_thres , 0);
1912 
1913 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
1914 			   &prewifi_rssi_state2, 2,
1915 			   coex_sta->wifi_coex_thres2 , 0);
1916 
1917 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1918 			coex_sta->bt_coex_thres , 0);
1919 
1920 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
1921 			 coex_sta->bt_coex_thres2 , 0);
1922 
1923 
1924 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1925 
1926 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1927 			   &wifi_connected);
1928 
1929 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
1930 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
1931 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
1932 
1933 	if (scan || link || roam) {
1934 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1935 			    "[BTCoex], Wifi link process + BT Idle!!\n");
1936 		BTC_TRACE(trace_buf);
1937 
1938 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1939 						     7);
1940 
1941 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1942 	} else if (wifi_connected) {
1943 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1944 			    "[BTCoex], Wifi connected + BT Idle!!\n");
1945 		BTC_TRACE(trace_buf);
1946 
1947 		if (wifi_busy) {
1948 			if (!BTC_RSSI_HIGH(bt_rssi_state2))
1949 				halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1950 								     2);
1951 			else
1952 				halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1953 								     0);
1954 		} else {
1955 			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1956 							     0);
1957 		}
1958 
1959 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1960 
1961 	} else {
1962 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1963 			    "[BTCoex], Wifi no-link + BT Idle!!\n");
1964 		BTC_TRACE(trace_buf);
1965 
1966 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1967 						     0);
1968 
1969 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1970 	}
1971 
1972 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
1973 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1974 
1975 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
1976 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1977 
1978 }
1979 
1980 
1981 /* SCO only or SCO+PAN(HS) */
halbtc8723d2ant_action_sco(IN struct btc_coexist * btcoexist)1982 void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
1983 {
1984 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
1985 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1986 	u8		wifi_rssi_state, bt_rssi_state;
1987 
1988 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
1989 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
1990 	u8		wifi_rssi_state2, bt_rssi_state2;
1991 	boolean			wifi_busy = false;
1992 
1993 
1994 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1995 
1996 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
1997 			  &prewifi_rssi_state, 2,
1998 			  coex_sta->wifi_coex_thres , 0);
1999 
2000 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2001 			   &prewifi_rssi_state2, 2,
2002 			   coex_sta->wifi_coex_thres2 , 0);
2003 
2004 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2005 			coex_sta->bt_coex_thres , 0);
2006 
2007 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2008 			 coex_sta->bt_coex_thres2 , 0);
2009 
2010 
2011 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2012 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2013 
2014 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2015 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2016 
2017 		coex_dm->is_switch_to_1dot5_ant = false;
2018 
2019 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2020 
2021 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2022 	}  else {
2023 
2024 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2025 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2026 
2027 		coex_dm->is_switch_to_1dot5_ant = false;
2028 
2029 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2030 
2031 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2032 	}
2033 
2034 
2035 	/* sw mechanism */
2036 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2037 				      false, false);
2038 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2039 				      false, 0x18);
2040 
2041 }
2042 
2043 
halbtc8723d2ant_action_hid(IN struct btc_coexist * btcoexist)2044 void halbtc8723d2ant_action_hid(IN struct btc_coexist *btcoexist)
2045 {
2046 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2047 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2048 	u8		wifi_rssi_state, bt_rssi_state;
2049 
2050 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2051 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2052 	u8		wifi_rssi_state2, bt_rssi_state2;
2053 	boolean			wifi_busy = false;
2054 
2055 
2056 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2057 
2058 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2059 			  &prewifi_rssi_state, 2,
2060 			  coex_sta->wifi_coex_thres , 0);
2061 
2062 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2063 			   &prewifi_rssi_state2, 2,
2064 			   coex_sta->wifi_coex_thres2 , 0);
2065 
2066 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2067 			coex_sta->bt_coex_thres , 0);
2068 
2069 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2070 			 coex_sta->bt_coex_thres2 , 0);
2071 
2072 
2073 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2074 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2075 
2076 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2077 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2078 
2079 		coex_dm->is_switch_to_1dot5_ant = false;
2080 
2081 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2082 
2083 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2084 	}  else {
2085 
2086 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2087 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2088 
2089 		coex_dm->is_switch_to_1dot5_ant = false;
2090 
2091 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2092 
2093 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2094 	}
2095 
2096 
2097 	/* sw mechanism */
2098 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2099 				      false, false);
2100 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2101 				      false, 0x18);
2102 
2103 }
2104 
2105 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
halbtc8723d2ant_action_a2dp(IN struct btc_coexist * btcoexist)2106 void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
2107 {
2108 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2109 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2110 	u8		wifi_rssi_state, bt_rssi_state;
2111 
2112 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2113 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2114 	u8		wifi_rssi_state2, bt_rssi_state2;
2115 	boolean			wifi_busy = false;
2116 
2117 
2118 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2119 
2120 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2121 			  &prewifi_rssi_state, 2,
2122 			  coex_sta->wifi_coex_thres , 0);
2123 
2124 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2125 			   &prewifi_rssi_state2, 2,
2126 			   coex_sta->wifi_coex_thres2 , 0);
2127 
2128 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2129 			coex_sta->bt_coex_thres , 0);
2130 
2131 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2132 			 coex_sta->bt_coex_thres2 , 0);
2133 
2134 
2135 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2136 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2137 
2138 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2139 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2140 
2141 		coex_dm->is_switch_to_1dot5_ant = false;
2142 
2143 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2144 
2145 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2146 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2147 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2148 
2149 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2150 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2151 
2152 		coex_dm->is_switch_to_1dot5_ant = false;
2153 
2154 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2155 
2156 		if (wifi_busy)
2157 
2158 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2159 		else
2160 
2161 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
2162 	} else {
2163 
2164 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2165 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2166 
2167 		coex_dm->is_switch_to_1dot5_ant = true;
2168 
2169 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
2170 
2171 		if (wifi_busy)
2172 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 101);
2173 		else
2174 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 102);
2175 
2176 	}
2177 
2178 	/* sw mechanism */
2179 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2180 				      false, false);
2181 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2182 				      false, 0x18);
2183 
2184 }
2185 
halbtc8723d2ant_action_pan_edr(IN struct btc_coexist * btcoexist)2186 void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
2187 {
2188 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2189 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2190 	u8		wifi_rssi_state, bt_rssi_state;
2191 
2192 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2193 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2194 	u8		wifi_rssi_state2, bt_rssi_state2;
2195 	boolean			wifi_busy = false;
2196 
2197 
2198 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2199 
2200 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2201 			  &prewifi_rssi_state, 2,
2202 			  coex_sta->wifi_coex_thres , 0);
2203 
2204 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2205 			   &prewifi_rssi_state2, 2,
2206 			   coex_sta->wifi_coex_thres2 , 0);
2207 
2208 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2209 			coex_sta->bt_coex_thres , 0);
2210 
2211 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2212 			 coex_sta->bt_coex_thres2 , 0);
2213 
2214 #if 0
2215 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2216 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2217 
2218 	coex_dm->is_switch_to_1dot5_ant = false;
2219 
2220 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2221 
2222 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2223 #endif
2224 
2225 
2226 #if 1
2227 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2228 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2229 
2230 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2231 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2232 
2233 		coex_dm->is_switch_to_1dot5_ant = false;
2234 
2235 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2236 
2237 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2238 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2239 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2240 
2241 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2242 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2243 
2244 		coex_dm->is_switch_to_1dot5_ant = false;
2245 
2246 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2247 
2248 		if (wifi_busy)
2249 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
2250 		else
2251 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
2252 	} else {
2253 
2254 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2255 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2256 
2257 		coex_dm->is_switch_to_1dot5_ant = true;
2258 
2259 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
2260 
2261 		if (wifi_busy)
2262 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 103);
2263 		else
2264 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 104);
2265 
2266 	}
2267 
2268 #endif
2269 
2270 
2271 	/* sw mechanism */
2272 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2273 				      false, false);
2274 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2275 				      false, 0x18);
2276 
2277 }
2278 
2279 
2280 /* PAN(HS) only */
halbtc8723d2ant_action_pan_hs(IN struct btc_coexist * btcoexist)2281 void halbtc8723d2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
2282 {
2283 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2284 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2285 	u8		wifi_rssi_state, bt_rssi_state;
2286 
2287 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2288 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2289 	u8		wifi_rssi_state2, bt_rssi_state2;
2290 	boolean			wifi_busy = false;
2291 
2292 
2293 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2294 
2295 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2296 			  &prewifi_rssi_state, 2,
2297 			  coex_sta->wifi_coex_thres , 0);
2298 
2299 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2300 			   &prewifi_rssi_state2, 2,
2301 			   coex_sta->wifi_coex_thres2 , 0);
2302 
2303 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2304 			coex_sta->bt_coex_thres , 0);
2305 
2306 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2307 			 coex_sta->bt_coex_thres2 , 0);
2308 
2309 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2310 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2311 
2312 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2313 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2314 
2315 		coex_dm->is_switch_to_1dot5_ant = false;
2316 
2317 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2318 
2319 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2320 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2321 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2322 
2323 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2324 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2325 
2326 		coex_dm->is_switch_to_1dot5_ant = false;
2327 
2328 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2329 
2330 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2331 
2332 
2333 	} else {
2334 
2335 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2336 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2337 
2338 		coex_dm->is_switch_to_1dot5_ant = true;
2339 
2340 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2341 
2342 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2343 	}
2344 
2345 
2346 	/* sw mechanism */
2347 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2348 				      false, false);
2349 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2350 				      false, 0x18);
2351 }
2352 
2353 
halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist * btcoexist)2354 void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
2355 {
2356 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2357 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2358 	u8		wifi_rssi_state, bt_rssi_state;
2359 
2360 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2361 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2362 	u8		wifi_rssi_state2, bt_rssi_state2;
2363 	boolean			wifi_busy = false;
2364 
2365 
2366 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2367 
2368 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2369 			  &prewifi_rssi_state, 2,
2370 			  coex_sta->wifi_coex_thres , 0);
2371 
2372 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2373 			   &prewifi_rssi_state2, 2,
2374 			   coex_sta->wifi_coex_thres2 , 0);
2375 
2376 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2377 			coex_sta->bt_coex_thres , 0);
2378 
2379 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2380 			 coex_sta->bt_coex_thres2 , 0);
2381 
2382 
2383 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2384 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2385 
2386 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2387 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2388 
2389 		coex_dm->is_switch_to_1dot5_ant = false;
2390 
2391 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2392 
2393 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2394 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2395 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2396 
2397 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2398 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2399 
2400 		coex_dm->is_switch_to_1dot5_ant = false;
2401 
2402 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2403 
2404 		if (wifi_busy)
2405 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2406 		else
2407 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
2408 
2409 
2410 	} else {
2411 
2412 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2413 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2414 
2415 		coex_dm->is_switch_to_1dot5_ant = true;
2416 
2417 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
2418 
2419 		if (wifi_busy)
2420 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 101);
2421 		else
2422 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 102);
2423 
2424 	}
2425 
2426 
2427 	/* sw mechanism */
2428 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2429 				      false, false);
2430 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2431 				      false, 0x18);
2432 
2433 }
2434 
2435 
halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist * btcoexist)2436 void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
2437 {
2438 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2439 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2440 	u8		wifi_rssi_state, bt_rssi_state;
2441 
2442 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2443 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2444 	u8		wifi_rssi_state2, bt_rssi_state2;
2445 	boolean			wifi_busy = false;
2446 
2447 
2448 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2449 
2450 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2451 			  &prewifi_rssi_state, 2,
2452 			  coex_sta->wifi_coex_thres , 0);
2453 
2454 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2455 			   &prewifi_rssi_state2, 2,
2456 			   coex_sta->wifi_coex_thres2 , 0);
2457 
2458 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2459 			coex_sta->bt_coex_thres , 0);
2460 
2461 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2462 			 coex_sta->bt_coex_thres2 , 0);
2463 
2464 
2465 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2466 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2467 
2468 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2469 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2470 
2471 		coex_dm->is_switch_to_1dot5_ant = false;
2472 
2473 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2474 
2475 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2476 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2477 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2478 
2479 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2480 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2481 
2482 		coex_dm->is_switch_to_1dot5_ant = false;
2483 
2484 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2485 
2486 		if (wifi_busy) {
2487 
2488 			if ((coex_sta->a2dp_bit_pool > 40) && (coex_sta->a2dp_bit_pool < 255))
2489 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
2490 			else
2491 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2492 		} else
2493 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
2494 
2495 	} else {
2496 
2497 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2498 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2499 
2500 		coex_dm->is_switch_to_1dot5_ant = true;
2501 
2502 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
2503 
2504 		if (wifi_busy) {
2505 
2506 			if ((coex_sta->a2dp_bit_pool > 40) && (coex_sta->a2dp_bit_pool < 255))
2507 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 107);
2508 			else
2509 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 105);
2510 		} else
2511 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 106);
2512 
2513 	}
2514 
2515 
2516 	/* sw mechanism */
2517 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2518 				      false, false);
2519 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2520 				      false, 0x18);
2521 
2522 }
2523 
2524 
2525 
2526 /* PAN(EDR)+A2DP */
halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist * btcoexist)2527 void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
2528 {
2529 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2530 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2531 	u8		wifi_rssi_state, bt_rssi_state;
2532 
2533 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2534 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2535 	u8		wifi_rssi_state2, bt_rssi_state2;
2536 	boolean			wifi_busy = false;
2537 
2538 
2539 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2540 
2541 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2542 			  &prewifi_rssi_state, 2,
2543 			  coex_sta->wifi_coex_thres , 0);
2544 
2545 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2546 			   &prewifi_rssi_state2, 2,
2547 			   coex_sta->wifi_coex_thres2 , 0);
2548 
2549 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2550 			coex_sta->bt_coex_thres , 0);
2551 
2552 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2553 			 coex_sta->bt_coex_thres2 , 0);
2554 
2555 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2556 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2557 
2558 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2559 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2560 
2561 		coex_dm->is_switch_to_1dot5_ant = false;
2562 
2563 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2564 
2565 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2566 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2567 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2568 
2569 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2570 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2571 
2572 		coex_dm->is_switch_to_1dot5_ant = false;
2573 
2574 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2575 
2576 		if (wifi_busy) {
2577 
2578 			if ((coex_sta->a2dp_bit_pool > 40) && (coex_sta->a2dp_bit_pool < 255))
2579 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
2580 			else
2581 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2582 		} else
2583 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
2584 	} else {
2585 
2586 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2587 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2588 
2589 		coex_dm->is_switch_to_1dot5_ant = true;
2590 
2591 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
2592 
2593 		if (wifi_busy) {
2594 
2595 			if ((coex_sta->a2dp_bit_pool > 40) && (coex_sta->a2dp_bit_pool < 255))
2596 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 107);
2597 			else
2598 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 105);
2599 		} else
2600 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 106);
2601 
2602 	}
2603 
2604 
2605 	/* sw mechanism */
2606 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2607 				      false, false);
2608 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2609 				      false, 0x18);
2610 
2611 }
2612 
halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist * btcoexist)2613 void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
2614 {
2615 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2616 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2617 	u8		wifi_rssi_state, bt_rssi_state;
2618 
2619 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2620 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2621 	u8		wifi_rssi_state2, bt_rssi_state2;
2622 	boolean			wifi_busy = false;
2623 
2624 
2625 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2626 
2627 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2628 			  &prewifi_rssi_state, 2,
2629 			  coex_sta->wifi_coex_thres , 0);
2630 
2631 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2632 			   &prewifi_rssi_state2, 2,
2633 			   coex_sta->wifi_coex_thres2 , 0);
2634 
2635 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2636 			coex_sta->bt_coex_thres , 0);
2637 
2638 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2639 			 coex_sta->bt_coex_thres2 , 0);
2640 
2641 
2642 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2643 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2644 
2645 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2646 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2647 
2648 		coex_dm->is_switch_to_1dot5_ant = false;
2649 
2650 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2651 
2652 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2653 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2654 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2655 
2656 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2657 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2658 
2659 		coex_dm->is_switch_to_1dot5_ant = false;
2660 
2661 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2662 
2663 		if (wifi_busy)
2664 
2665 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
2666 		else
2667 
2668 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
2669 
2670 
2671 	} else {
2672 
2673 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2674 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2675 
2676 		coex_dm->is_switch_to_1dot5_ant = true;
2677 
2678 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
2679 
2680 		if (wifi_busy)
2681 
2682 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 103);
2683 		else
2684 
2685 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 104);
2686 
2687 	}
2688 
2689 
2690 	/* sw mechanism */
2691 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2692 				      false, false);
2693 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2694 				      false, 0x18);
2695 
2696 }
2697 
2698 /* HID+A2DP+PAN(EDR) */
halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist * btcoexist)2699 void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
2700 {
2701 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2702 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2703 	u8		wifi_rssi_state, bt_rssi_state;
2704 
2705 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
2706 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
2707 	u8		wifi_rssi_state2, bt_rssi_state2;
2708 	boolean			wifi_busy = false;
2709 
2710 
2711 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2712 
2713 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2714 			  &prewifi_rssi_state, 2,
2715 			  coex_sta->wifi_coex_thres , 0);
2716 
2717 	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
2718 			   &prewifi_rssi_state2, 2,
2719 			   coex_sta->wifi_coex_thres2 , 0);
2720 
2721 	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2722 			coex_sta->bt_coex_thres , 0);
2723 
2724 	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
2725 			 coex_sta->bt_coex_thres2 , 0);
2726 
2727 
2728 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2729 	    BTC_RSSI_HIGH(bt_rssi_state)) {
2730 
2731 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2732 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2733 
2734 		coex_dm->is_switch_to_1dot5_ant = false;
2735 
2736 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2737 
2738 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2739 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
2740 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
2741 
2742 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2743 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2744 
2745 		coex_dm->is_switch_to_1dot5_ant = false;
2746 
2747 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2748 
2749 		if (wifi_busy) {
2750 
2751 			if ((coex_sta->a2dp_bit_pool > 40) && (coex_sta->a2dp_bit_pool < 255))
2752 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
2753 			else
2754 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2755 		} else
2756 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
2757 	} else {
2758 
2759 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2760 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2761 
2762 		coex_dm->is_switch_to_1dot5_ant = true;
2763 
2764 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
2765 
2766 		if (wifi_busy) {
2767 
2768 			if ((coex_sta->a2dp_bit_pool > 40) && (coex_sta->a2dp_bit_pool < 255))
2769 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 107);
2770 			else
2771 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 105);
2772 		} else
2773 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 106);
2774 	}
2775 
2776 	/* sw mechanism */
2777 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
2778 				      false, false);
2779 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
2780 				      false, 0x18);
2781 
2782 }
2783 
2784 
2785 
halbtc8723d2ant_action_bt_whck_test(IN struct btc_coexist * btcoexist)2786 void halbtc8723d2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
2787 {
2788 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2789 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2790 
2791 	/* sw mechanism all off */
2792 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
2793 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
2794 
2795 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2796 
2797 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2798 }
2799 
halbtc8723d2ant_action_wifi_multi_port(IN struct btc_coexist * btcoexist)2800 void halbtc8723d2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
2801 {
2802 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
2803 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2804 
2805 	/* sw mechanism all off */
2806 	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
2807 	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
2808 
2809 	/* hw all off */
2810 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2811 
2812 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2813 }
2814 
halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist * btcoexist)2815 void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
2816 {
2817 	u8				algorithm = 0;
2818 	u32				num_of_wifi_link = 0;
2819 	u32				wifi_link_status = 0;
2820 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
2821 	boolean				miracast_plus_bt = false;
2822 	boolean				scan = false, link = false, roam = false, wifi_connected = false;
2823 
2824 
2825 
2826 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2827 		    "[BTCoex], RunCoexistMechanism()===>\n");
2828 	BTC_TRACE(trace_buf);
2829 
2830 	if (btcoexist->manual_control) {
2831 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2832 			"[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
2833 		BTC_TRACE(trace_buf);
2834 		return;
2835 	}
2836 
2837 	if (btcoexist->stop_coex_dm) {
2838 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2839 			"[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n");
2840 		BTC_TRACE(trace_buf);
2841 		return;
2842 	}
2843 
2844 	if (coex_sta->under_ips) {
2845 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2846 			    "[BTCoex], wifi is under IPS !!!\n");
2847 		BTC_TRACE(trace_buf);
2848 		return;
2849 	}
2850 
2851 	if (coex_sta->bt_whck_test) {
2852 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2853 			    "[BTCoex], BT is under WHCK TEST!!!\n");
2854 		BTC_TRACE(trace_buf);
2855 		halbtc8723d2ant_action_bt_whck_test(btcoexist);
2856 		return;
2857 	}
2858 
2859 	if (coex_sta->bt_disabled) {
2860 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2861 			    "[BTCoex], BT is disabled!!!\n");
2862 		BTC_TRACE(trace_buf);
2863 		halbtc8723d2ant_action_coex_all_off(btcoexist);
2864 		return;
2865 	}
2866 
2867 	if (coex_sta->c2h_bt_inquiry_page) {
2868 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2869 			    "[BTCoex], BT is under inquiry/page scan !!\n");
2870 		BTC_TRACE(trace_buf);
2871 		halbtc8723d2ant_action_bt_inquiry(btcoexist);
2872 		return;
2873 	}
2874 
2875 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2876 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2877 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2878 
2879 	if (scan || link || roam) {
2880 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2881 			    "[BTCoex], WiFi is under Link Process !!\n");
2882 		BTC_TRACE(trace_buf);
2883 		halbtc8723d2ant_action_wifi_link_process(btcoexist);
2884 		return;
2885 	}
2886 
2887 	/* for P2P */
2888 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
2889 			   &wifi_link_status);
2890 	num_of_wifi_link = wifi_link_status >> 16;
2891 
2892 	if ((num_of_wifi_link >= 2) ||
2893 	    (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
2894 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2895 			"############# [BTCoex],  Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
2896 			    num_of_wifi_link, wifi_link_status);
2897 		BTC_TRACE(trace_buf);
2898 
2899 		if (bt_link_info->bt_link_exist)
2900 			miracast_plus_bt = true;
2901 		else
2902 			miracast_plus_bt = false;
2903 
2904 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
2905 				   &miracast_plus_bt);
2906 		halbtc8723d2ant_action_wifi_multi_port(btcoexist);
2907 
2908 		return;
2909 	} else {
2910 		miracast_plus_bt = false;
2911 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
2912 				   &miracast_plus_bt);
2913 	}
2914 
2915 
2916 	algorithm = halbtc8723d2ant_action_algorithm(btcoexist);
2917 	coex_dm->cur_algorithm = algorithm;
2918 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
2919 		    coex_dm->cur_algorithm);
2920 	BTC_TRACE(trace_buf);
2921 
2922 
2923 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
2924 			   &wifi_connected);
2925 
2926 	if (!wifi_connected) {
2927 
2928 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2929 			    "[BTCoex], Action 2-Ant, wifi non-connected!!.\n");
2930 		BTC_TRACE(trace_buf);
2931 		halbtc8723d2ant_action_wifi_nonconnected(btcoexist);
2932 
2933 	} else if ((BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
2934 		coex_dm->bt_status) || (BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE ==
2935 					    coex_dm->bt_status)) {
2936 
2937 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2938 			    "[BTCoex], Action 2-Ant, bt idle!!.\n");
2939 		BTC_TRACE(trace_buf);
2940 
2941 		halbtc8723d2ant_action_bt_idle(btcoexist);
2942 
2943 	} else {
2944 
2945 		if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
2946 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2947 				"[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
2948 				coex_dm->pre_algorithm, coex_dm->cur_algorithm);
2949 			BTC_TRACE(trace_buf);
2950 		}
2951 
2952 		switch (coex_dm->cur_algorithm) {
2953 
2954 		case BT_8723D_2ANT_COEX_ALGO_SCO:
2955 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2956 				"[BTCoex], Action 2-Ant, algorithm = SCO.\n");
2957 			BTC_TRACE(trace_buf);
2958 			halbtc8723d2ant_action_sco(btcoexist);
2959 			break;
2960 		case BT_8723D_2ANT_COEX_ALGO_HID:
2961 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2962 				"[BTCoex], Action 2-Ant, algorithm = HID.\n");
2963 			BTC_TRACE(trace_buf);
2964 			halbtc8723d2ant_action_hid(btcoexist);
2965 			break;
2966 		case BT_8723D_2ANT_COEX_ALGO_A2DP:
2967 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2968 				"[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
2969 			BTC_TRACE(trace_buf);
2970 			halbtc8723d2ant_action_a2dp(btcoexist);
2971 			break;
2972 		case BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS:
2973 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2974 				"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
2975 			BTC_TRACE(trace_buf);
2976 			halbtc8723d2ant_action_a2dp_pan_hs(btcoexist);
2977 			break;
2978 		case BT_8723D_2ANT_COEX_ALGO_PANEDR:
2979 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2980 				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
2981 			BTC_TRACE(trace_buf);
2982 			halbtc8723d2ant_action_pan_edr(btcoexist);
2983 			break;
2984 		case BT_8723D_2ANT_COEX_ALGO_PANHS:
2985 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2986 				"[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
2987 			BTC_TRACE(trace_buf);
2988 			halbtc8723d2ant_action_pan_hs(btcoexist);
2989 			break;
2990 		case BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP:
2991 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2992 				"[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
2993 			BTC_TRACE(trace_buf);
2994 			halbtc8723d2ant_action_pan_edr_a2dp(btcoexist);
2995 			break;
2996 		case BT_8723D_2ANT_COEX_ALGO_PANEDR_HID:
2997 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2998 				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
2999 			BTC_TRACE(trace_buf);
3000 			halbtc8723d2ant_action_pan_edr_hid(btcoexist);
3001 			break;
3002 		case BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3003 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3004 				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3005 			BTC_TRACE(trace_buf);
3006 			halbtc8723d2ant_action_hid_a2dp_pan_edr(
3007 				btcoexist);
3008 			break;
3009 		case BT_8723D_2ANT_COEX_ALGO_HID_A2DP:
3010 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3011 				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
3012 			BTC_TRACE(trace_buf);
3013 			halbtc8723d2ant_action_hid_a2dp(btcoexist);
3014 			break;
3015 		case BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY:
3016 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3017 				"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
3018 			BTC_TRACE(trace_buf);
3019 			halbtc8723d2ant_action_bt_idle(btcoexist);
3020 			break;
3021 		default:
3022 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3023 				"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
3024 			BTC_TRACE(trace_buf);
3025 			halbtc8723d2ant_action_coex_all_off(btcoexist);
3026 			break;
3027 		}
3028 		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3029 	}
3030 }
3031 
halbtc8723d2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean wifi_only)3032 void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3033 				    IN boolean wifi_only)
3034 {
3035 	u8	u8tmp = 0;
3036 	u32	 vendor;
3037 	u32				u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0;
3038 
3039 
3040 	u8tmp =	btcoexist->btc_read_1byte(btcoexist, 0x67);
3041 	u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
3042 	u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
3043 	u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
3044 
3045 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3046 		"[BTCoex], ********** 0x67 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Init HW config) **********\n",
3047 		    u8tmp, u32tmp0, u32tmp1, u32tmp2);
3048 	BTC_TRACE(trace_buf);
3049 
3050 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3051 		    "[BTCoex], 2Ant Init HW Config!!\n");
3052 	BTC_TRACE(trace_buf);
3053 
3054 #if 0
3055 	btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
3056 	if (vendor == BTC_VENDOR_LENOVO)
3057 		coex_dm->switch_thres_offset = 0;
3058 	else
3059 		coex_dm->switch_thres_offset = 20;
3060 #endif
3061 	/* 0xf0[15:12] --> Chip Cut information */
3062 	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
3063 				 0xf1) & 0xf0) >> 4;
3064 
3065 	coex_sta->dis_ver_info_cnt = 0;
3066 
3067 	/* default isolation = 15dB */
3068 	coex_sta->isolation_btween_wb = BT_8723D_2ANT_DEFAULT_ISOLATION;
3069 	halbtc8723d2ant_coex_switch_threshold(btcoexist, coex_sta->isolation_btween_wb);
3070 
3071 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
3072 					   0x1);  /* enable TBTT nterrupt */
3073 
3074 	/* BT report packet sample rate	 */
3075 	btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5);
3076 
3077 	/* Init 0x778 = 0x1 for 2-Ant */
3078 	btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1);
3079 
3080 	/* Enable PTA (3-wire function form BT side) */
3081 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
3082 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x41, 0x02, 0x1);
3083 
3084 	/* Enable PTA (tx/rx signal form WiFi side) */
3085 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4c6, 0x10, 0x1);
3086 
3087 	halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, FALSE);
3088 
3089 	/* check if WL firmware download ok */
3090 	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
3091 		halbtc8723d2ant_post_onoffstate_to_bt(btcoexist, true);
3092 
3093 	/* Enable counter statistics */
3094 	btcoexist->btc_write_1byte(btcoexist, 0x76e,
3095 			   0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
3096 
3097 	if (wifi_only) {
3098 		coex_sta->concurrent_rx_mode_on = false;
3099 		/* Path config	 */
3100 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true,
3101 					     false);
3102 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, false,
3103 					     false);
3104 	} else {
3105 		/* coex_sta->concurrent_rx_mode_on = true; */
3106 		/* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1); */
3107 
3108 		/* RF 0x1[0] = 0->Set GNT_WL_RF_Rx always = 1 for con-current Rx */
3109 		btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0x1, 0x0);
3110 
3111 		/* Path config	 */
3112 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true,
3113 					     false);
3114 	}
3115 
3116 	/* WLAN_Tx by GNT_WL  0x950[29] = 0 */
3117 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x20, 0x0);
3118 
3119 	halbtc8723d2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3120 
3121 	halbtc8723d2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
3122 
3123 	u8tmp =	btcoexist->btc_read_1byte(btcoexist, 0x67);
3124 	u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
3125 	u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
3126 	u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
3127 
3128 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3129 		"[BTCoex], ********** 0x67 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (After Init HW config) **********\n",
3130 		    u8tmp, u32tmp0, u32tmp1, u32tmp2);
3131 	BTC_TRACE(trace_buf);
3132 
3133 	psd_scan->ant_det_is_ant_det_available = TRUE;
3134 
3135 }
3136 
halbtc8723d2ant_psd_log2base(IN struct btc_coexist * btcoexist,IN u32 val)3137 u32 halbtc8723d2ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
3138 {
3139 	u8	j;
3140 	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
3141 	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
3142 				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
3143 							   32, 23, 15, 7, 0
3144 							      };
3145 
3146 	if (val == 0)
3147 		return 0;
3148 
3149 	tmp = val;
3150 
3151 	while (1) {
3152 		if (tmp == 1)
3153 			break;
3154 		else {
3155 			tmp = (tmp >> 1);
3156 			shiftcount++;
3157 		}
3158 	}
3159 
3160 
3161 	val_integerd_b = shiftcount + 1;
3162 
3163 	tmp2 = 1;
3164 	for (j = 1; j <= val_integerd_b; j++)
3165 		tmp2 = tmp2 * 2;
3166 
3167 	tmp = (val * 100) / tmp2;
3168 	tindex = tmp / 5;
3169 
3170 	if (tindex > 20)
3171 		tindex = 20;
3172 
3173 	val_fractiond_b = table_fraction[tindex];
3174 
3175 	result = val_integerd_b * 100 - val_fractiond_b;
3176 
3177 	return result;
3178 
3179 
3180 }
3181 
halbtc8723d2ant_psd_show_antenna_detect_result(IN struct btc_coexist * btcoexist)3182 void halbtc8723d2ant_psd_show_antenna_detect_result(IN struct btc_coexist
3183 		*btcoexist)
3184 {
3185 	u8		*cli_buf = btcoexist->cli_buf;
3186 	struct  btc_board_info	*board_info = &btcoexist->board_info;
3187 
3188 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3189 		   "\r\n============[Antenna Detection info]  ============\n");
3190 	CL_PRINTF(cli_buf);
3191 
3192 	if (psd_scan->ant_det_result == 1)
3193 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
3194 			   "Ant Det Result", "2-Antenna (Bad-Isolation)",
3195 			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
3196 	else if (psd_scan->ant_det_result == 2)
3197 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
3198 			   "Ant Det Result", "2-Antenna (Good-Isolation)",
3199 			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
3200 			   + psd_scan->ant_det_thres_offset,
3201 			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
3202 	else
3203 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
3204 			   "Ant Det Result", "1-Antenna",
3205 			   BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT,
3206 			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
3207 			   + psd_scan->ant_det_thres_offset);
3208 
3209 	CL_PRINTF(cli_buf);
3210 
3211 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
3212 		   "Antenna Detection Finish",
3213 		   (board_info->btdm_ant_det_finish
3214 		    ? "Yes" : "No"));
3215 	CL_PRINTF(cli_buf);
3216 
3217 	switch (psd_scan->ant_det_result) {
3218 	case 0:
3219 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3220 			   "(BT is not available)");
3221 		break;
3222 	case 1:  /* 2-Ant bad-isolation */
3223 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3224 			   "(BT is available)");
3225 		break;
3226 	case 2:  /* 2-Ant good-isolation */
3227 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3228 			   "(BT is available)");
3229 		break;
3230 	case 3:  /* 1-Ant */
3231 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3232 			   "(BT is available)");
3233 		break;
3234 	case 4:
3235 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3236 			   "(Uncertainty result)");
3237 		break;
3238 	case 5:
3239 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
3240 		break;
3241 	case 6:
3242 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3243 			   "(WiFi is Scanning)");
3244 		break;
3245 	case 7:
3246 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3247 			   "(BT is not idle)");
3248 		break;
3249 	case 8:
3250 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3251 			   "(Abort by WiFi Scanning)");
3252 		break;
3253 	case 9:
3254 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3255 			   "(Antenna Init is not ready)");
3256 		break;
3257 	case 10:
3258 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3259 			   "(BT is Inquiry or page)");
3260 		break;
3261 	case 11:
3262 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3263 			   "(BT is Disabled)");
3264 		break;
3265 	}
3266 	CL_PRINTF(cli_buf);
3267 
3268 
3269 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
3270 		   "Ant Detect Total Count", psd_scan->ant_det_try_count);
3271 	CL_PRINTF(cli_buf);
3272 
3273 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
3274 		   "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
3275 	CL_PRINTF(cli_buf);
3276 
3277 	if ((!board_info->btdm_ant_det_finish) &&
3278 	    (psd_scan->ant_det_result != 5))
3279 		return;
3280 
3281 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
3282 		   (psd_scan->ant_det_result ? "ok" : "fail"));
3283 	CL_PRINTF(cli_buf);
3284 
3285 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
3286 		   psd_scan->ant_det_bt_tx_time);
3287 	CL_PRINTF(cli_buf);
3288 
3289 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
3290 		   psd_scan->ant_det_bt_le_channel);
3291 	CL_PRINTF(cli_buf);
3292 
3293 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
3294 		   "WiFi PSD Cent-Ch/Offset/Span",
3295 		   psd_scan->real_cent_freq, psd_scan->real_offset,
3296 		   psd_scan->real_span);
3297 	CL_PRINTF(cli_buf);
3298 
3299 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
3300 		   "PSD Pre-Scan Peak Value",
3301 		   psd_scan->ant_det_pre_psdscan_peak_val / 100);
3302 	CL_PRINTF(cli_buf);
3303 
3304 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
3305 		   "PSD Pre-Scan result",
3306 		   (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
3307 		   BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
3308 		   + psd_scan->ant_det_thres_offset);
3309 	CL_PRINTF(cli_buf);
3310 
3311 	if (psd_scan->ant_det_result == 5)
3312 		return;
3313 
3314 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
3315 		   "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
3316 	CL_PRINTF(cli_buf);
3317 
3318 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
3319 		   "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
3320 	CL_PRINTF(cli_buf);
3321 
3322 
3323 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
3324 		   (board_info->tfbga_package) ?  "Yes" : "No");
3325 	CL_PRINTF(cli_buf);
3326 
3327 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
3328 		   "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
3329 	CL_PRINTF(cli_buf);
3330 
3331 }
3332 
halbtc8723d2ant_psd_showdata(IN struct btc_coexist * btcoexist)3333 void halbtc8723d2ant_psd_showdata(IN struct btc_coexist *btcoexist)
3334 {
3335 	u8		*cli_buf = btcoexist->cli_buf;
3336 	u32		delta_freq_per_point;
3337 	u32		freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
3338 
3339 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3340 		   "\r\n\n============[PSD info]  (%d)============\n",
3341 		   psd_scan->psd_gen_count);
3342 	CL_PRINTF(cli_buf);
3343 
3344 	if (psd_scan->psd_gen_count == 0) {
3345 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
3346 		CL_PRINTF(cli_buf);
3347 		return;
3348 	}
3349 
3350 	if (psd_scan->psd_point == 0)
3351 		delta_freq_per_point = 0;
3352 	else
3353 		delta_freq_per_point = psd_scan->psd_band_width /
3354 				       psd_scan->psd_point;
3355 
3356 	/* if (psd_scan->is_psd_show_max_only) */
3357 	if (0) {
3358 		psd_rep1 = psd_scan->psd_max_value / 100;
3359 		psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
3360 
3361 		freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
3362 			psd_scan->psd_max_value_point * delta_freq_per_point);
3363 		freq1 = freq / 1000000;
3364 		freq2 = freq / 1000 - freq1 * 1000;
3365 
3366 		if (freq2 < 100)
3367 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3368 				   "\r\n Freq = %d.0%d MHz",
3369 				   freq1, freq2);
3370 		else
3371 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3372 				   "\r\n Freq = %d.%d MHz",
3373 				   freq1, freq2);
3374 
3375 		if (psd_rep2 < 10)
3376 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3377 				   ", Value = %d.0%d dB, (%d)\n",
3378 				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
3379 		else
3380 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3381 				   ", Value = %d.%d dB, (%d)\n",
3382 				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
3383 
3384 		CL_PRINTF(cli_buf);
3385 	} else {
3386 		m = psd_scan->psd_start_point;
3387 		n = psd_scan->psd_start_point;
3388 		i = 1;
3389 		j = 1;
3390 
3391 		while (1) {
3392 			do {
3393 				freq = ((psd_scan->real_cent_freq - 20) * 1000000 + m *
3394 					delta_freq_per_point);
3395 				freq1 = freq / 1000000;
3396 				freq2 = freq / 1000 - freq1 * 1000;
3397 
3398 				if (i == 1) {
3399 					if (freq2 == 0)
3400 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3401 							"\r\n Freq%6d.000", freq1);
3402 					else if (freq2 < 100)
3403 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3404 							"\r\n Freq%6d.0%2d", freq1,
3405 							   freq2);
3406 					else
3407 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3408 							"\r\n Freq%6d.%3d", freq1,
3409 							   freq2);
3410 				} else if ((i % 8 == 0) ||
3411 					   (m == psd_scan->psd_stop_point)) {
3412 					if (freq2 == 0)
3413 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3414 							   "%6d.000\n", freq1);
3415 					else if (freq2 < 100)
3416 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3417 							"%6d.0%2d\n", freq1, freq2);
3418 					else
3419 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3420 							"%6d.%3d\n", freq1, freq2);
3421 				} else {
3422 					if (freq2 == 0)
3423 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3424 							   "%6d.000", freq1);
3425 					else if (freq2 < 100)
3426 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3427 							"%6d.0%2d", freq1, freq2);
3428 					else
3429 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3430 							"%6d.%3d", freq1, freq2);
3431 				}
3432 
3433 				i++;
3434 				m++;
3435 				CL_PRINTF(cli_buf);
3436 
3437 			} while ((i <= 8) && (m <= psd_scan->psd_stop_point));
3438 
3439 
3440 			do {
3441 				psd_rep1 = psd_scan->psd_report_max_hold[n] / 100;
3442 				psd_rep2 = psd_scan->psd_report_max_hold[n] - psd_rep1 *
3443 					   100;
3444 
3445 				if (j == 1) {
3446 					if (psd_rep2 < 10)
3447 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3448 							"\r\n Val %7d.0%d", psd_rep1,
3449 							   psd_rep2);
3450 					else
3451 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3452 							"\r\n Val %7d.%d", psd_rep1,
3453 							   psd_rep2);
3454 				} else if ((j % 8 == 0)  ||
3455 					   (n == psd_scan->psd_stop_point)) {
3456 					if (psd_rep2 < 10)
3457 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3458 							"%7d.0%d\n", psd_rep1,
3459 							   psd_rep2);
3460 					else
3461 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3462 							"%7d.%d\n", psd_rep1, psd_rep2);
3463 				} else {
3464 					if (psd_rep2 < 10)
3465 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3466 							"%7d.0%d", psd_rep1, psd_rep2);
3467 					else
3468 						CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3469 							"%7d.%d", psd_rep1, psd_rep2);
3470 				}
3471 
3472 				j++;
3473 				n++;
3474 				CL_PRINTF(cli_buf);
3475 
3476 			} while ((j <= 8) && (n <= psd_scan->psd_stop_point));
3477 
3478 			if ((m > psd_scan->psd_stop_point) ||
3479 			    (n > psd_scan->psd_stop_point))
3480 				break;
3481 			else {
3482 				i = 1;
3483 				j = 1;
3484 			}
3485 
3486 		}
3487 	}
3488 
3489 
3490 }
3491 
halbtc8723d2ant_psd_maxholddata(IN struct btc_coexist * btcoexist,IN u32 gen_count)3492 void halbtc8723d2ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
3493 				     IN u32 gen_count)
3494 {
3495 	u32	i = 0, i_max = 0, val_max = 0;
3496 
3497 	if (gen_count == 1) {
3498 		memcpy(psd_scan->psd_report_max_hold,
3499 		       psd_scan->psd_report,
3500 		       BT_8723D_2ANT_ANTDET_PSD_POINTS * sizeof(u32));
3501 
3502 		psd_scan->psd_max_value_point = 0;
3503 		psd_scan->psd_max_value = 0;
3504 
3505 	} else {
3506 		for (i = psd_scan->psd_start_point;
3507 		     i <= psd_scan->psd_stop_point; i++) {
3508 			if (psd_scan->psd_report[i] >
3509 			    psd_scan->psd_report_max_hold[i])
3510 				psd_scan->psd_report_max_hold[i] =
3511 					psd_scan->psd_report[i];
3512 
3513 			/* search Max Value */
3514 			if (i == psd_scan->psd_start_point) {
3515 				i_max = i;
3516 				val_max = psd_scan->psd_report_max_hold[i];
3517 			} else {
3518 				if (psd_scan->psd_report_max_hold[i] >
3519 				    val_max) {
3520 					i_max = i;
3521 					val_max = psd_scan->psd_report_max_hold[i];
3522 				}
3523 			}
3524 
3525 		}
3526 
3527 		psd_scan->psd_max_value_point = i_max;
3528 		psd_scan->psd_max_value = val_max;
3529 
3530 	}
3531 
3532 
3533 }
3534 
halbtc8723d2ant_psd_getdata(IN struct btc_coexist * btcoexist,IN u32 point)3535 u32 halbtc8723d2ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
3536 {
3537 	/* reg 0x808[9:0]: FFT data x */
3538 	/* reg 0x808[22]: 0-->1 to get 1 FFT data y */
3539 	/* reg 0x8b4[15:0]: FFT data y report */
3540 
3541 	u32 val = 0, psd_report = 0;
3542 	int k = 0;
3543 
3544 	val = btcoexist->btc_read_4byte(btcoexist, 0x808);
3545 
3546 	val &= 0xffbffc00;
3547 	val |= point;
3548 
3549 	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
3550 
3551 	val |= 0x00400000;
3552 	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
3553 
3554 	while (1) {
3555 		if (k++ > BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY)
3556 			break;
3557 	}
3558 
3559 	val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
3560 
3561 	psd_report = val & 0x0000ffff;
3562 
3563 	return psd_report;
3564 }
3565 
3566 
halbtc8723d2ant_psd_sweep_point(IN struct btc_coexist * btcoexist,IN u32 cent_freq,IN s32 offset,IN u32 span,IN u32 points,IN u32 avgnum,IN u32 loopcnt)3567 boolean halbtc8723d2ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
3568 		IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
3569 					IN u32 avgnum, IN u32 loopcnt)
3570 {
3571 	u32	 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
3572 	u32	points1 = 0, psd_report = 0;
3573 	u32	start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
3574 	u32    psd_center_freq = 20 * 10 ^ 6;
3575 	boolean outloop = false, scan , roam, is_sweep_ok = true;
3576 	u8	 flag = 0;
3577 	u32	tmp = 0, u32tmp1 = 0;
3578 	u32	wifi_original_channel = 1;
3579 
3580 	psd_scan->is_psd_running = true;
3581 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3582 		    "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
3583 	BTC_TRACE(trace_buf);
3584 
3585 	do {
3586 		switch (flag) {
3587 		case 0:  /* Get PSD parameters */
3588 		default:
3589 
3590 			psd_scan->psd_band_width = 40 * 1000000;
3591 			psd_scan->psd_point = points;
3592 			psd_scan->psd_start_base = points / 2;
3593 			psd_scan->psd_avg_num = avgnum;
3594 			psd_scan->real_cent_freq = cent_freq;
3595 			psd_scan->real_offset = offset;
3596 			psd_scan->real_span = span;
3597 
3598 
3599 			points1 = psd_scan->psd_point;
3600 			delta_freq_per_point = psd_scan->psd_band_width /
3601 					       psd_scan->psd_point;
3602 
3603 			/* PSD point setup */
3604 			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
3605 			val &= 0xffff0fff;
3606 
3607 			switch (psd_scan->psd_point) {
3608 			case 128:
3609 				val |= 0x0;
3610 				break;
3611 			case 256:
3612 			default:
3613 				val |= 0x00004000;
3614 				break;
3615 			case 512:
3616 				val |= 0x00008000;
3617 				break;
3618 			case 1024:
3619 				val |= 0x0000c000;
3620 				break;
3621 			}
3622 
3623 			switch (psd_scan->psd_avg_num) {
3624 			case 1:
3625 				val |= 0x0;
3626 				break;
3627 			case 8:
3628 				val |= 0x00001000;
3629 				break;
3630 			case 16:
3631 				val |= 0x00002000;
3632 				break;
3633 			case 32:
3634 			default:
3635 				val |= 0x00003000;
3636 				break;
3637 			}
3638 			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
3639 
3640 			flag = 1;
3641 			break;
3642 		case 1:	  /* calculate the PSD point index from freq/offset/span */
3643 			psd_center_freq = psd_scan->psd_band_width / 2 +
3644 					  offset * (1000000);
3645 
3646 			start_p = psd_scan->psd_start_base + (psd_center_freq -
3647 				span * (1000000) / 2) / delta_freq_per_point;
3648 			psd_scan->psd_start_point = start_p -
3649 						    psd_scan->psd_start_base;
3650 
3651 			stop_p = psd_scan->psd_start_base + (psd_center_freq +
3652 				span * (1000000) / 2) / delta_freq_per_point;
3653 			psd_scan->psd_stop_point = stop_p -
3654 						   psd_scan->psd_start_base - 1;
3655 
3656 			flag = 2;
3657 			break;
3658 		case 2:  /* set RF channel/BW/Mode */
3659 
3660 			/* set 3-wire off */
3661 			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
3662 			val |= 0x00300000;
3663 			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
3664 
3665 			/* CCK off */
3666 			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
3667 			val &= 0xfeffffff;
3668 			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
3669 
3670 			/* Tx-pause on */
3671 			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
3672 
3673 			/* store WiFi original channel */
3674 			wifi_original_channel = btcoexist->btc_get_rf_reg(
3675 					btcoexist, BTC_RF_A, 0x18, 0x3ff);
3676 
3677 			/* Set RF channel */
3678 			if (cent_freq == 2484)
3679 				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
3680 							  0x18, 0x3ff, 0xe);
3681 			else
3682 				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
3683 					  0x18, 0x3ff, (cent_freq - 2412) / 5 +
3684 						  1); /* WiFi TRx Mask on */
3685 
3686 			/* save original RCK value */
3687 			u32tmp1 =  btcoexist->btc_get_rf_reg(
3688 					   btcoexist, BTC_RF_A, 0x1d, 0xfffff);
3689 
3690 			/* Enter debug mode */
3691 			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
3692 						  0x2, 0x1);
3693 
3694 			/* Set RF Rx filter corner */
3695 			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
3696 						  0xfffff, 0x2e);
3697 
3698 
3699 			/* Set  RF mode = Rx, RF Gain = 0x320a0 */
3700 			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
3701 						  0xfffff, 0x320a0);
3702 
3703 			while (1) {
3704 				if (k++ > BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY)
3705 					break;
3706 			}
3707 			flag = 3;
3708 			break;
3709 		case 3:
3710 			psd_scan->psd_gen_count = 0;
3711 
3712 			for (j = 1; j <= loopcnt; j++) {
3713 
3714 				/* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0, 0xfffff, 0x320a0); */
3715 
3716 				btcoexist->btc_get(btcoexist,
3717 						   BTC_GET_BL_WIFI_SCAN, &scan);
3718 				btcoexist->btc_get(btcoexist,
3719 						   BTC_GET_BL_WIFI_ROAM, &roam);
3720 
3721 				if (scan || roam) {
3722 					is_sweep_ok = false;
3723 					break;
3724 				}
3725 				memset(psd_scan->psd_report, 0,
3726 				       psd_scan->psd_point * sizeof(u32));
3727 				start_p = psd_scan->psd_start_point +
3728 					  psd_scan->psd_start_base;
3729 				stop_p = psd_scan->psd_stop_point +
3730 					 psd_scan->psd_start_base + 1;
3731 
3732 				i = start_p;
3733 				point_index = 0;
3734 
3735 				while (i < stop_p) {
3736 					if (i >= points1)
3737 						psd_report =
3738 							halbtc8723d2ant_psd_getdata(
3739 							btcoexist, i - points1);
3740 					else
3741 						psd_report =
3742 							halbtc8723d2ant_psd_getdata(
3743 								btcoexist, i);
3744 
3745 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3746 						"Point=%d, psd_raw_data = 0x%08x\n",
3747 						    i, psd_report);
3748 					BTC_TRACE(trace_buf);
3749 					if (psd_report == 0)
3750 						tmp = 0;
3751 					else
3752 						/* tmp =  20*log10((double)psd_report); */
3753 						/* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
3754 						tmp = 6 * halbtc8723d2ant_psd_log2base(
3755 							btcoexist, psd_report);
3756 
3757 					n = i - psd_scan->psd_start_base;
3758 					psd_scan->psd_report[n] =  tmp;
3759 
3760 
3761 					halbtc8723d2ant_psd_maxholddata(
3762 						btcoexist, j);
3763 
3764 					i++;
3765 
3766 				}
3767 
3768 				psd_scan->psd_gen_count = j;
3769 
3770 
3771 				/*
3772 				val = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
3773 				tmp = btcoexist->btc_read_4byte(btcoexist, 0x64);
3774 				u32tmp1 =  btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3775 
3776 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3777 						"0x54 = 0x%08x, 0x67 = 0x%08x, 0x6c4 = 0x%08x\n", val, (tmp & 0xff000000) >> 24 ,u32tmp1);
3778 					BTC_TRACE(trace_buf);
3779 				*/
3780 
3781 			}
3782 
3783 			flag = 100;
3784 			break;
3785 		case 99:	/* error */
3786 
3787 			outloop = true;
3788 			break;
3789 		case 100: /* recovery */
3790 
3791 			/* set 3-wire on */
3792 			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
3793 			val &= 0xffcfffff;
3794 			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
3795 
3796 			/* CCK on */
3797 			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
3798 			val |= 0x01000000;
3799 			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
3800 
3801 			/* Tx-pause off */
3802 			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
3803 
3804 			/* PSD off */
3805 			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
3806 			val &= 0xffbfffff;
3807 			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
3808 
3809 			/* restore RF Rx filter corner */
3810 			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
3811 						  0xfffff, u32tmp1);
3812 
3813 			/* Exit debug mode */
3814 			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
3815 						  0x2, 0x0);
3816 
3817 			/* restore WiFi original channel */
3818 			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
3819 						  0x3ff, wifi_original_channel);
3820 
3821 			outloop = true;
3822 			break;
3823 
3824 		}
3825 
3826 	} while (!outloop);
3827 
3828 
3829 
3830 	psd_scan->is_psd_running = false;
3831 
3832 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3833 		    "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
3834 	BTC_TRACE(trace_buf);
3835 	return is_sweep_ok;
3836 
3837 }
3838 
halbtc8723d2ant_psd_antenna_detection(IN struct btc_coexist * btcoexist,IN u32 bt_tx_time,IN u32 bt_le_channel)3839 void halbtc8723d2ant_psd_antenna_detection(IN struct btc_coexist *btcoexist,
3840 		IN u32 bt_tx_time, IN u32 bt_le_channel)
3841 {
3842 	u32	i = 0;
3843 	u32	wlpsd_cent_freq = 2484, wlpsd_span = 2, wlpsd_sweep_count = 50;
3844 	s32	wlpsd_offset = -4;
3845 	u8	bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
3846 
3847 	u8	h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
3848 
3849 	u8	state = 0;
3850 	boolean		outloop = false, bt_resp = false;
3851 	u32		freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
3852 			u32tmp, u32tmp0, u32tmp1, u32tmp2;
3853 	struct  btc_board_info	*board_info = &btcoexist->board_info;
3854 
3855 	board_info->btdm_ant_det_finish = false;
3856 	memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
3857 	memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
3858 
3859 	if (board_info->tfbga_package) /* for TFBGA */
3860 		psd_scan->ant_det_thres_offset = 5;
3861 	else
3862 		psd_scan->ant_det_thres_offset = 0;
3863 
3864 	do {
3865 		switch (state) {
3866 		case 0:
3867 			if (bt_le_channel == 39)
3868 				wlpsd_cent_freq = 2484;
3869 			else {
3870 				for (i = 1; i <= 13; i++) {
3871 					if (bt_le_ch[i - 1] ==
3872 					    bt_le_channel) {
3873 						wlpsd_cent_freq = 2412
3874 								  + (i - 1) * 5;
3875 						break;
3876 					}
3877 				}
3878 
3879 				if (i == 14) {
3880 
3881 					BTC_SPRINTF(trace_buf,
3882 						    BT_TMP_BUF_SIZE,
3883 						"xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
3884 						    bt_le_channel);
3885 					BTC_TRACE(trace_buf);
3886 					outloop = true;
3887 					break;
3888 				}
3889 			}
3890 
3891 			wlpsd_sweep_count = bt_tx_time * 238 /
3892 					    100; /* bt_tx_time/0.42								 */
3893 			wlpsd_sweep_count = wlpsd_sweep_count / 5;
3894 
3895 			if (wlpsd_sweep_count % 5 != 0)
3896 				wlpsd_sweep_count = (wlpsd_sweep_count /
3897 						     5 + 1) * 5;
3898 
3899 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3900 				"xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d,  BT_LECh = %d\n",
3901 				    bt_tx_time, bt_le_channel);
3902 			BTC_TRACE(trace_buf);
3903 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3904 				"xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d,  wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
3905 				    wlpsd_cent_freq,
3906 				    wlpsd_offset,
3907 				    wlpsd_span,
3908 				    wlpsd_sweep_count);
3909 			BTC_TRACE(trace_buf);
3910 
3911 			state = 1;
3912 			break;
3913 		case 1: /* stop coex DM & set antenna path */
3914 			/* Stop Coex DM */
3915 			/*
3916 			btcoexist->stop_coex_dm = true;
3917 
3918 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3919 				"xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
3920 			BTC_TRACE(trace_buf);  */
3921 
3922 			/* Set TDMA off,				 */
3923 			halbtc8723d2ant_ps_tdma(btcoexist, FORCE_EXEC,
3924 						false, 0);
3925 
3926 			/* Set coex table */
3927 			halbtc8723d2ant_coex_table_with_type(btcoexist,
3928 							     FORCE_EXEC, 0);
3929 
3930 			if (board_info->btdm_ant_pos ==
3931 			    BTC_ANTENNA_AT_MAIN_PORT) {
3932 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3933 					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
3934 				BTC_TRACE(trace_buf);
3935 
3936 
3937 				/* Set Antenna Path,  both GNT_WL/GNT_BT = 1, and control by SW */
3938 				/* Set Antenna path, switch WiFi to un-certain antenna port */
3939 
3940 				halbtc8723d2ant_set_ant_path(btcoexist,
3941 						     BTC_ANT_WIFI_AT_AUX, true,
3942 							     false);
3943 			} else {
3944 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3945 					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
3946 				BTC_TRACE(trace_buf);
3947 
3948 
3949 				/* Set Antenna Path,  both GNT_WL/GNT_BT = 1, and control by SW */
3950 				/* Set Antenna path, switch WiFi to un-certain antenna port */
3951 
3952 				halbtc8723d2ant_set_ant_path(btcoexist,
3953 						     BTC_ANT_WIFI_AT_MAIN, true,
3954 							     false);
3955 			}
3956 
3957 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3958 				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
3959 			BTC_TRACE(trace_buf);
3960 
3961 			/* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
3962 			h2c_parameter[0] = 0x1;
3963 			h2c_parameter[1] = 0xd;
3964 			h2c_parameter[2] = 0x14;
3965 
3966 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3967 				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
3968 				    h2c_parameter[1],
3969 				    h2c_parameter[2]);
3970 			BTC_TRACE(trace_buf);
3971 
3972 			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
3973 						h2c_parameter);
3974 
3975 			u32tmp = btcoexist->btc_read_2byte(btcoexist, 0x948);
3976 			u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
3977 			u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
3978 			u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
3979 
3980 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3981 				"[BTCoex], ********** 0x948 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Ant Det) **********\n",
3982 				    u32tmp, u32tmp0, u32tmp1, u32tmp2);
3983 			BTC_TRACE(trace_buf);
3984 
3985 			state = 2;
3986 			break;
3987 		case 2:	/* Pre-sweep background psd */
3988 			if (!halbtc8723d2ant_psd_sweep_point(btcoexist,
3989 				     wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
3990 					     BT_8723D_2ANT_ANTDET_PSD_POINTS,
3991 				     BT_8723D_2ANT_ANTDET_PSD_AVGNUM, 3)) {
3992 				board_info->btdm_ant_det_finish = false;
3993 				board_info->btdm_ant_num_by_ant_det = 1;
3994 				psd_scan->ant_det_result = 8;
3995 				state = 99;
3996 				break;
3997 			}
3998 
3999 			psd_scan->ant_det_pre_psdscan_peak_val =
4000 				psd_scan->psd_max_value;
4001 
4002 			if (psd_scan->psd_max_value >
4003 			    (BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
4004 			     + psd_scan->ant_det_thres_offset) * 100) {
4005 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4006 					"xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
4007 					    psd_scan->psd_max_value / 100,
4008 					BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
4009 					    + psd_scan->ant_det_thres_offset);
4010 				BTC_TRACE(trace_buf);
4011 				board_info->btdm_ant_det_finish = false;
4012 				board_info->btdm_ant_num_by_ant_det = 1;
4013 				psd_scan->ant_det_result = 5;
4014 				state = 99;
4015 			} else {
4016 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4017 					"xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
4018 					    psd_scan->psd_max_value / 100,
4019 					BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
4020 					    + psd_scan->ant_det_thres_offset);
4021 				BTC_TRACE(trace_buf);
4022 				state = 3;
4023 			}
4024 			break;
4025 		case 3:
4026 			bt_resp = btcoexist->btc_set_bt_ant_detection(
4027 					  btcoexist, (u8)(bt_tx_time & 0xff),
4028 					  (u8)(bt_le_channel & 0xff));
4029 
4030 			if (!halbtc8723d2ant_psd_sweep_point(btcoexist,
4031 					     wlpsd_cent_freq, wlpsd_offset,
4032 							     wlpsd_span,
4033 					     BT_8723D_2ANT_ANTDET_PSD_POINTS,
4034 					     BT_8723D_2ANT_ANTDET_PSD_AVGNUM,
4035 						     wlpsd_sweep_count)) {
4036 				board_info->btdm_ant_det_finish = false;
4037 				board_info->btdm_ant_num_by_ant_det = 1;
4038 				psd_scan->ant_det_result = 8;
4039 				state = 99;
4040 				break;
4041 			}
4042 
4043 			psd_scan->ant_det_psd_scan_peak_val =
4044 				psd_scan->psd_max_value;
4045 			psd_scan->ant_det_psd_scan_peak_freq =
4046 				psd_scan->psd_max_value_point;
4047 			state = 4;
4048 			break;
4049 		case 4:
4050 
4051 			if (psd_scan->psd_point == 0)
4052 				delta_freq_per_point = 0;
4053 			else
4054 				delta_freq_per_point =
4055 					psd_scan->psd_band_width /
4056 					psd_scan->psd_point;
4057 
4058 			psd_rep1 = psd_scan->psd_max_value / 100;
4059 			psd_rep2 = psd_scan->psd_max_value - psd_rep1 *
4060 				   100;
4061 
4062 			freq = ((psd_scan->real_cent_freq - 20) *
4063 				1000000 + psd_scan->psd_max_value_point
4064 				* delta_freq_per_point);
4065 			freq1 = freq / 1000000;
4066 			freq2 = freq / 1000 - freq1 * 1000;
4067 
4068 			if (freq2 < 100) {
4069 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4070 					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
4071 					    freq1, freq2);
4072 				BTC_TRACE(trace_buf);
4073 				CL_SPRINTF(psd_scan->ant_det_peak_freq,
4074 					   BT_8723D_2ANT_ANTDET_BUF_LEN,
4075 					   "%d.0%d", freq1, freq2);
4076 			} else {
4077 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4078 					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
4079 					    freq1, freq2);
4080 				BTC_TRACE(trace_buf);
4081 				CL_SPRINTF(psd_scan->ant_det_peak_freq,
4082 					   BT_8723D_2ANT_ANTDET_BUF_LEN,
4083 					   "%d.%d", freq1, freq2);
4084 			}
4085 
4086 			if (psd_rep2 < 10) {
4087 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4088 					    ", Value = %d.0%d dB\n",
4089 					    psd_rep1, psd_rep2);
4090 				BTC_TRACE(trace_buf);
4091 				CL_SPRINTF(psd_scan->ant_det_peak_val,
4092 					   BT_8723D_2ANT_ANTDET_BUF_LEN,
4093 					   "%d.0%d", psd_rep1, psd_rep2);
4094 			} else {
4095 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4096 					    ", Value = %d.%d dB\n",
4097 					    psd_rep1, psd_rep2);
4098 				BTC_TRACE(trace_buf);
4099 				CL_SPRINTF(psd_scan->ant_det_peak_val,
4100 					   BT_8723D_2ANT_ANTDET_BUF_LEN,
4101 					   "%d.%d", psd_rep1, psd_rep2);
4102 			}
4103 
4104 			psd_scan->ant_det_is_btreply_available = true;
4105 
4106 			if (bt_resp == false) {
4107 				psd_scan->ant_det_is_btreply_available =
4108 					false;
4109 				psd_scan->ant_det_result = 0;
4110 				board_info->btdm_ant_det_finish = false;
4111 				board_info->btdm_ant_num_by_ant_det = 1;
4112 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4113 					"xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
4114 				BTC_TRACE(trace_buf);
4115 			} else if (psd_scan->psd_max_value >
4116 				(BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
4117 				   * 100) {
4118 				psd_scan->ant_det_result = 1;
4119 				board_info->btdm_ant_det_finish = true;
4120 				board_info->btdm_ant_num_by_ant_det = 2;
4121 				coex_sta->isolation_btween_wb = (u8)(85 - psd_scan->psd_max_value / 100) & 0xff;
4122 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4123 					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
4124 				BTC_TRACE(trace_buf);
4125 			} else if (psd_scan->psd_max_value >
4126 				(BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
4127 				    + psd_scan->ant_det_thres_offset) * 100) {
4128 				psd_scan->ant_det_result = 2;
4129 				board_info->btdm_ant_det_finish = true;
4130 				board_info->btdm_ant_num_by_ant_det = 2;
4131 				coex_sta->isolation_btween_wb = (u8)(85 - psd_scan->psd_max_value / 100) & 0xff;
4132 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4133 					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
4134 				BTC_TRACE(trace_buf);
4135 			} else if (psd_scan->psd_max_value >
4136 				   (BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT) *
4137 				   100) {
4138 				psd_scan->ant_det_result = 3;
4139 				board_info->btdm_ant_det_finish = true;
4140 				board_info->btdm_ant_num_by_ant_det = 1;
4141 				coex_sta->isolation_btween_wb = (u8)(85 - psd_scan->psd_max_value / 100) & 0xff;
4142 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4143 					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
4144 				BTC_TRACE(trace_buf);
4145 			} else {
4146 				psd_scan->ant_det_result = 4;
4147 				board_info->btdm_ant_det_finish = false;
4148 				board_info->btdm_ant_num_by_ant_det = 1;
4149 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4150 					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
4151 				BTC_TRACE(trace_buf);
4152 			}
4153 
4154 			state = 99;
4155 			break;
4156 		case 99:  /* restore setup */
4157 
4158 			/* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
4159 			h2c_parameter[0] = 0x0;
4160 			h2c_parameter[1] = 0x0;
4161 			h2c_parameter[2] = 0x0;
4162 
4163 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4164 				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
4165 				    h2c_parameter[1], h2c_parameter[2]);
4166 			BTC_TRACE(trace_buf);
4167 
4168 			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
4169 						h2c_parameter);
4170 
4171 			/* Set Antenna Path, GNT_WL/GNT_BT control by PTA */
4172 			/* Set Antenna path, switch WiFi to certain antenna port */
4173 			halbtc8723d2ant_set_ant_path(btcoexist,
4174 					     BTC_ANT_WIFI_AT_MAIN, false,
4175 						     false);
4176 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4177 				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
4178 			BTC_TRACE(trace_buf);
4179 
4180 			/* Resume Coex DM */
4181 			/*
4182 			btcoexist->stop_coex_dm = false;
4183 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4184 				"xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
4185 			BTC_TRACE(trace_buf);  */
4186 
4187 			/* stimulate coex running */
4188 			/*
4189 			halbtc8723d2ant_run_coexist_mechanism(
4190 				btcoexist);
4191 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4192 				"xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
4193 			BTC_TRACE(trace_buf);  */
4194 
4195 			outloop = true;
4196 			break;
4197 		}
4198 
4199 	} while (!outloop);
4200 
4201 
4202 
4203 }
4204 
halbtc8723d2ant_psd_antenna_detection_check(IN struct btc_coexist * btcoexist)4205 void halbtc8723d2ant_psd_antenna_detection_check(IN struct btc_coexist
4206 		*btcoexist)
4207 {
4208 	static u32 ant_det_count = 0, ant_det_fail_count = 0;
4209 	struct  btc_board_info	*board_info = &btcoexist->board_info;
4210 
4211 	boolean scan, roam;
4212 
4213 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
4214 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
4215 
4216 
4217 	/* psd_scan->ant_det_bt_tx_time = 20; */
4218 	psd_scan->ant_det_bt_tx_time =
4219 		BT_8723D_2ANT_ANTDET_BTTXTIME;	   /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
4220 	psd_scan->ant_det_bt_le_channel = BT_8723D_2ANT_ANTDET_BTTXCHANNEL;
4221 
4222 	ant_det_count++;
4223 
4224 	psd_scan->ant_det_try_count = ant_det_count;
4225 
4226 	if (scan || roam) {
4227 		board_info->btdm_ant_det_finish = false;
4228 		psd_scan->ant_det_result = 6;
4229 	} else if (coex_sta->bt_disabled) {
4230 		board_info->btdm_ant_det_finish = false;
4231 		psd_scan->ant_det_result = 11;
4232 	} else if (coex_sta->num_of_profile >= 1) {
4233 		board_info->btdm_ant_det_finish = false;
4234 		psd_scan->ant_det_result = 7;
4235 	} else if (
4236 		!psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
4237 		board_info->btdm_ant_det_finish = false;
4238 		psd_scan->ant_det_result = 9;
4239 	} else if (coex_sta->c2h_bt_inquiry_page) {
4240 		board_info->btdm_ant_det_finish = false;
4241 		psd_scan->ant_det_result = 10;
4242 	} else {
4243 
4244 		btcoexist->stop_coex_dm = true;
4245 
4246 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4247 			"xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
4248 		BTC_TRACE(trace_buf);
4249 
4250 		halbtc8723d2ant_psd_antenna_detection(btcoexist,
4251 					      psd_scan->ant_det_bt_tx_time,
4252 					      psd_scan->ant_det_bt_le_channel);
4253 
4254 		delay_ms(psd_scan->ant_det_bt_tx_time);
4255 
4256 		btcoexist->stop_coex_dm = false;
4257 
4258 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4259 			"xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
4260 		BTC_TRACE(trace_buf);
4261 
4262 		/* stimulate coex running */
4263 
4264 		halbtc8723d2ant_run_coexist_mechanism(
4265 			btcoexist);
4266 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4267 			"xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
4268 		BTC_TRACE(trace_buf);
4269 	}
4270 
4271 
4272 	if (!board_info->btdm_ant_det_finish)
4273 		ant_det_fail_count++;
4274 
4275 	psd_scan->ant_det_fail_count = ant_det_fail_count;
4276 
4277 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4278 		"xxxxxxxxxxxxxxxx AntennaDetect(), result = %d, fail_count = %d, finish = %s\n",
4279 		    psd_scan->ant_det_result,
4280 		    psd_scan->ant_det_fail_count,
4281 		    board_info->btdm_ant_det_finish == TRUE ? "Yes" : "No");
4282 	BTC_TRACE(trace_buf);
4283 
4284 }
4285 
4286 
4287 /* ************************************************************
4288  * work around function start with wa_halbtc8723d2ant_
4289  * ************************************************************
4290  * ************************************************************
4291  * extern function start with ex_halbtc8723d2ant_
4292  * ************************************************************ */
ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist * btcoexist)4293 void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist)
4294 {
4295 	struct  btc_board_info	*board_info = &btcoexist->board_info;
4296 	u8 u8tmp = 0x0;
4297 	u16 u16tmp = 0x0;
4298 	u32	value = 0;
4299 
4300 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4301 		"xxxxxxxxxxxxxxxx Execute 8723d 2-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n");
4302 	BTC_TRACE(trace_buf);
4303 
4304 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4305 		    "Ant Det Finish = %s, Ant Det Number  = %d\n",
4306 		    (board_info->btdm_ant_det_finish ? "Yes" : "No"),
4307 		    board_info->btdm_ant_num_by_ant_det);
4308 	BTC_TRACE(trace_buf);
4309 
4310 
4311 	btcoexist->stop_coex_dm = true;
4312 	psd_scan->ant_det_is_ant_det_available = FALSE;
4313 
4314 	/* enable BB, REG_SYS_FUNC_EN such that we can write BB Register correctly. */
4315 	u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
4316 	btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
4317 
4318 	/* set Path control owner to WiFi */
4319 	halbtc8723d2ant_ltecoex_pathcontrol_owner(btcoexist,
4320 			BT_8723D_2ANT_PCO_WLSIDE);
4321 
4322 	/* set GNT_BT to high */
4323 	halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
4324 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
4325 					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
4326 					   BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
4327 	/* Set GNT_WL to high */
4328 	halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
4329 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
4330 					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
4331 					   BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
4332 
4333 	/* Local setting bit define */
4334 	/*	BIT0: "0" for no antenna inverse; "1" for antenna inverse  */
4335 	/*	BIT1: "0" for internal switch; "1" for external switch */
4336 	/*	BIT2: "0" for one antenna; "1" for two antenna */
4337 	/* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
4338 
4339 	/* Set path control to WL */
4340 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
4341 	btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0);
4342 
4343 	/* Check efuse 0xc3[6] for Single Antenna Path */
4344 	if (board_info->single_ant_path == 0) {
4345 		/* set to S1 */
4346 		board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
4347 		u8tmp = 4;
4348 	} else if (board_info->single_ant_path == 1) {
4349 		/* set to S0 */
4350 		board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
4351 		u8tmp = 5;
4352 	}
4353 
4354 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4355 		"[BTCoex], ********** (Power On) single_ant_path  = %d, btdm_ant_pos = %d **********\n",
4356 		    board_info->single_ant_path , board_info->btdm_ant_pos);
4357 	BTC_TRACE(trace_buf);
4358 
4359 	/* Write Single Antenna Position to Registry to tell BT for 872db. This line can be removed
4360 	since BT EFuse also add "single antenna position" in EFuse for 8723d*/
4361 	btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
4362 			   &value);
4363 
4364 	/* Save"single antenna position" info in Local register setting for FW reading, because FW may not ready at  power on */
4365 	if (btcoexist->chip_interface == BTC_INTF_PCI)
4366 		btcoexist->btc_write_local_reg_1byte(btcoexist, 0x3e0, u8tmp);
4367 	else if (btcoexist->chip_interface == BTC_INTF_USB)
4368 		btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
4369 	else if (btcoexist->chip_interface == BTC_INTF_SDIO)
4370 		btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, u8tmp);
4371 
4372 	/* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */
4373 	halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, FALSE);
4374 
4375 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4376 		"[BTCoex], **********  LTE coex Reg 0x38 (Power-On) = 0x%x**********\n",
4377 		    halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38));
4378 	BTC_TRACE(trace_buf);
4379 
4380 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4381 		"[BTCoex], **********  MAC Reg 0x70/ BB Reg 0x948 (Power-On) = 0x%x / 0x%x**********\n",
4382 		btcoexist->btc_read_4byte(btcoexist, 0x70), btcoexist->btc_read_2byte(btcoexist, 0x948));
4383 	BTC_TRACE(trace_buf);
4384 }
4385 
ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist * btcoexist)4386 void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
4387 {
4388 	struct  btc_board_info	*board_info = &btcoexist->board_info;
4389 	u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
4390 
4391 	/* */
4392 	/* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
4393 	/* Local setting bit define */
4394 	/*	BIT0: "0" for no antenna inverse; "1" for antenna inverse  */
4395 	/*	BIT1: "0" for internal switch; "1" for external switch */
4396 	/*	BIT2: "0" for one antenna; "1" for two antenna */
4397 	/* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
4398 	if (btcoexist->chip_interface == BTC_INTF_USB) {
4399 		/* fixed at S0 for USB interface */
4400 		u8tmp |= 0x1;	/* antenna inverse */
4401 		btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
4402 	} else {
4403 		/* for PCIE and SDIO interface, we check efuse 0xc3[6] */
4404 		if (board_info->single_ant_path == 0) {
4405 		} else if (board_info->single_ant_path == 1) {
4406 			/* set to S0 */
4407 			u8tmp |= 0x1;	/* antenna inverse */
4408 		}
4409 
4410 		if (btcoexist->chip_interface == BTC_INTF_PCI)
4411 			btcoexist->btc_write_local_reg_1byte(btcoexist, 0x3e0,
4412 							     u8tmp);
4413 		else if (btcoexist->chip_interface == BTC_INTF_SDIO)
4414 			btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60,
4415 							     u8tmp);
4416 	}
4417 }
4418 
4419 
ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean wifi_only)4420 void ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
4421 				       IN boolean wifi_only)
4422 {
4423 	btcoexist->stop_coex_dm = false;
4424 	halbtc8723d2ant_init_hw_config(btcoexist, wifi_only);
4425 }
4426 
ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist * btcoexist)4427 void ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
4428 {
4429 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4430 		    "[BTCoex], Coex Mechanism Init!!\n");
4431 	BTC_TRACE(trace_buf);
4432 
4433 	btcoexist->stop_coex_dm = false;
4434 
4435 	halbtc8723d2ant_action_init_coex_dm(btcoexist);
4436 }
4437 
ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist * btcoexist)4438 void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
4439 {
4440 	struct  btc_board_info		*board_info = &btcoexist->board_info;
4441 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
4442 	u8				*cli_buf = btcoexist->cli_buf;
4443 	u8				u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
4444 	u32				u32tmp[4];
4445 	u16				u16tmp[4];
4446 	u32				fa_of_dm, fa_cck;
4447 	u32				fw_ver = 0, bt_patch_ver = 0;
4448 	static u8			pop_report_in_10s = 0;
4449 
4450 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4451 		   "\r\n ============[BT Coexist info]============");
4452 	CL_PRINTF(cli_buf);
4453 
4454 	if (btcoexist->manual_control) {
4455 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4456 			"\r\n ============[Under Manual Control]============");
4457 		CL_PRINTF(cli_buf);
4458 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4459 			   "\r\n ==========================================");
4460 		CL_PRINTF(cli_buf);
4461 	}
4462 
4463 	if (psd_scan->ant_det_try_count == 0) {
4464 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
4465 			   "Ant PG Num/ Mech/ Pos",
4466 			   board_info->pg_ant_num, board_info->btdm_ant_num,
4467 			   (board_info->btdm_ant_pos == 1 ? "S1" : "S0"));
4468 		CL_PRINTF(cli_buf);
4469 	} else {
4470 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4471 			"\r\n %-35s = %d/ %d/ %s  (retry=%d/fail=%d/result=%d)",
4472 			   "Ant PG Num/ Mech(Ant_Det)/ Pos",
4473 			board_info->pg_ant_num, board_info->btdm_ant_num_by_ant_det,
4474 			   (board_info->btdm_ant_pos == 1 ? "S1" : "S0"),
4475 			psd_scan->ant_det_try_count, psd_scan->ant_det_fail_count,
4476 			   psd_scan->ant_det_result);
4477 		CL_PRINTF(cli_buf);
4478 
4479 		if (board_info->btdm_ant_det_finish) {
4480 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
4481 				   "Ant Det PSD Value",
4482 				   psd_scan->ant_det_peak_val);
4483 			CL_PRINTF(cli_buf);
4484 		}
4485 	}
4486 
4487 
4488 	btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
4489 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4490 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4491 		   "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c",
4492 		   "Version Coex/ Fw/ Patch/ Cut",
4493 		   glcoex_ver_date_8723d_2ant, glcoex_ver_8723d_2ant, fw_ver,
4494 		   bt_patch_ver, bt_patch_ver, coex_sta->cut_version + 65);
4495 	CL_PRINTF(cli_buf);
4496 
4497 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
4498 		   "Wifi channel informed to BT",
4499 		   coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
4500 		   coex_dm->wifi_chnl_info[2]);
4501 	CL_PRINTF(cli_buf);
4502 
4503 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d ",
4504 		   "Isolation/WL_Thres/BT_Thres",
4505 		   coex_sta->isolation_btween_wb,
4506 		   coex_sta->wifi_coex_thres,
4507 		   coex_sta->bt_coex_thres);
4508 	CL_PRINTF(cli_buf);
4509 
4510 	/* wifi status */
4511 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4512 		   "============[Wifi Status]============");
4513 	CL_PRINTF(cli_buf);
4514 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
4515 
4516 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4517 		   "============[BT Status]============");
4518 	CL_PRINTF(cli_buf);
4519 
4520 	pop_report_in_10s++;
4521 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ",
4522 		   "BT [status/ rssi/ retryCnt/ popCnt]",
4523 		   ((coex_sta->bt_disabled) ? ("disabled") :	((
4524 			   coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page")
4525 			   : ((BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
4526 			       coex_dm->bt_status) ? "non-connected idle" :
4527 		((BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
4528 				       ? "connected-idle" : "busy")))),
4529 		   coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
4530 		   coex_sta->pop_event_cnt);
4531 	CL_PRINTF(cli_buf);
4532 
4533 	if (pop_report_in_10s >= 5) {
4534 		coex_sta->pop_event_cnt = 0;
4535 		pop_report_in_10s = 0;
4536 	}
4537 
4538 
4539 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4540 		   "\r\n %-35s = %d / %d / %d / %d / %d / %d",
4541 		   "SCO/HID/PAN/A2DP/NameReq/WHQL",
4542 		   bt_link_info->sco_exist, bt_link_info->hid_exist,
4543 		   bt_link_info->pan_exist, bt_link_info->a2dp_exist,
4544 		   coex_sta->c2h_bt_remote_name_req,
4545 		   coex_sta->bt_whck_test);
4546 	CL_PRINTF(cli_buf);
4547 
4548 	bt_info_ext = coex_sta->bt_info_ext;
4549 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s / %d",
4550 		   "Role/A2DP Rate/Bitpool",
4551 		   ((bt_link_info->slave_role) ? "Slave" : "Master"),
4552 		(bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool);
4553 	CL_PRINTF(cli_buf);
4554 
4555 	for (i = 0; i < BT_INFO_SRC_8723D_2ANT_MAX; i++) {
4556 		if (coex_sta->bt_info_c2h_cnt[i]) {
4557 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4558 				"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
4559 				   glbt_info_src_8723d_2ant[i],
4560 				   coex_sta->bt_info_c2h[i][0],
4561 				   coex_sta->bt_info_c2h[i][1],
4562 				   coex_sta->bt_info_c2h[i][2],
4563 				   coex_sta->bt_info_c2h[i][3],
4564 				   coex_sta->bt_info_c2h[i][4],
4565 				   coex_sta->bt_info_c2h[i][5],
4566 				   coex_sta->bt_info_c2h[i][6],
4567 				   coex_sta->bt_info_c2h_cnt[i]);
4568 			CL_PRINTF(cli_buf);
4569 		}
4570 	}
4571 
4572 	/* Sw mechanism	 */
4573 	if (btcoexist->manual_control)
4574 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4575 			"============[mechanism] (before Manual)============");
4576 	else
4577 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4578 			   "============[mechanism]============");
4579 
4580 	CL_PRINTF(cli_buf);
4581 
4582 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ 0x%x/ 0x%x ",
4583 		   "LowP-RA/ DecWLPwr/ DecBTPwr",
4584 		   (coex_dm->cur_low_penalty_ra ? "On" : "Off"),
4585 		   coex_dm->cur_fw_dac_swing_lvl,
4586 		   coex_dm->cur_bt_dec_pwr_lvl);
4587 	CL_PRINTF(cli_buf);
4588 
4589 	ps_tdma_case = coex_dm->cur_ps_tdma;
4590 
4591 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4592 		   "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s, %s)",
4593 		   "PS TDMA",
4594 		   coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
4595 		   coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
4596 		   coex_dm->ps_tdma_para[4], ps_tdma_case,
4597 		   (coex_dm->cur_ps_tdma_on ? "On" : "Off"),
4598 		   (coex_dm->is_switch_to_1dot5_ant ? "1.5Ant" : "2Ant"));
4599 	CL_PRINTF(cli_buf);
4600 
4601 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
4602 		   "WL/BT Coex Table Type",
4603 		   coex_sta->coex_table_type);
4604 	CL_PRINTF(cli_buf);
4605 
4606 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
4607 	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
4608 	u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
4609 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4610 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4611 		   "0x6c0/0x6c4/0x6c8(coexTable)",
4612 		   u32tmp[0], u32tmp[1], u32tmp[2]);
4613 	CL_PRINTF(cli_buf);
4614 
4615 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
4616 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc);
4617 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4618 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4619 		   "0x778/0x6cc/IgnWlanAct",
4620 		   u8tmp[0], u32tmp[0],  coex_dm->cur_ignore_wlan_act);
4621 	CL_PRINTF(cli_buf);
4622 
4623 
4624 	u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
4625 			0xa0);
4626 	u32tmp[1] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
4627 			0xa4);
4628 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4629 		   "LTE Coex Table W_L/B_L",
4630 		   u32tmp[0] & 0xffff, u32tmp[1] & 0xffff);
4631 	CL_PRINTF(cli_buf);
4632 
4633 
4634 	u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
4635 			0xa8);
4636 	u32tmp[1] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
4637 			0xac);
4638 	u32tmp[2] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
4639 			0xb0);
4640 	u32tmp[3] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
4641 			0xb4);
4642 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4643 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4644 		   "LTE Break Table W_L/B_L/L_W/L_B",
4645 		   u32tmp[0] & 0xffff, u32tmp[1] & 0xffff,
4646 		   u32tmp[2] & 0xffff, u32tmp[3] & 0xffff);
4647 	CL_PRINTF(cli_buf);
4648 
4649 	/* Hw setting		 */
4650 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4651 		   "============[Hw setting]============");
4652 	CL_PRINTF(cli_buf);
4653 
4654 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
4655 	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
4656 	u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
4657 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
4658 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
4659 		   "0x430/0x434/0x42a/0x456",
4660 		   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
4661 	CL_PRINTF(cli_buf);
4662 
4663 
4664 	u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
4665 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
4666 
4667 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s",
4668 		   "LTE CoexOn/Path Ctrl Owner",
4669 		(int)((u32tmp[0] & BIT(7)) >> 7), ((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
4670 	CL_PRINTF(cli_buf);
4671 
4672 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4673 		   "LTE 3Wire/OPMode/UART/UARTMode",
4674 		(int)((u32tmp[0] & BIT(6)) >> 6), (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
4675 		   (int)((u32tmp[0] & BIT(3)) >> 3),
4676 		   (int)(u32tmp[0] & (BIT(2) | BIT(1) | BIT(0))));
4677 	CL_PRINTF(cli_buf);
4678 
4679 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
4680 		   "GNT_WL_SWCtrl/GNT_BT_SWCtrl/Dbg",
4681 		(int)((u32tmp[0] & BIT(12)) >> 12), (int)((u32tmp[0] & BIT(14)) >> 14),
4682 		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
4683 	CL_PRINTF(cli_buf);
4684 
4685 	u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
4686 
4687 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4688 		   "GNT_WL/GNT_BT/LTE_Busy/UART_Busy",
4689 		(int)((u32tmp[0] & BIT(2)) >> 2), (int)((u32tmp[0] & BIT(3)) >> 3),
4690 		   (int)((u32tmp[0] & BIT(1)) >> 1), (int)(u32tmp[0] & BIT(0)));
4691 	CL_PRINTF(cli_buf);
4692 
4693 
4694 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6);
4695 	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
4696 
4697 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4698 		   "0x4c6[4]/0x40[5] (WL/BT PTA)",
4699 		(int)((u8tmp[0] & BIT(4)) >> 4), (int)((u8tmp[1] & BIT(5)) >> 5));
4700 	CL_PRINTF(cli_buf);
4701 
4702 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
4703 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
4704 	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x953);
4705 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %s",
4706 		   "0x550(bcn ctrl)/0x522/4-RxAGC",
4707 		   u32tmp[0], u8tmp[0], (u8tmp[1] & 0x2) ? "On" : "Off");
4708 	CL_PRINTF(cli_buf);
4709 
4710 	u32tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x948);
4711 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
4712 	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
4713 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4714 		   "0x948/ 0x67[7]/ 0xc50[7:0]",
4715 		   u32tmp[0],
4716 		   ((u8tmp[0] & 0x80) >> 7), u32tmp[1] & 0xff);
4717 	CL_PRINTF(cli_buf);
4718 
4719 
4720 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0);
4721 	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4);
4722 	u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8);
4723 	u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0);
4724 
4725 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b);
4726 	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c);
4727 
4728 	fa_of_dm = ((u32tmp[0] & 0xffff0000) >> 16) + ((u32tmp[1] & 0xffff0000)
4729 			>> 16) + (u32tmp[1] & 0xffff) + (u32tmp[2] & 0xffff) +
4730 		   ((u32tmp[3] & 0xffff0000) >> 16) + (u32tmp[3] & 0xffff);
4731 	fa_cck = (u8tmp[0] << 8) + u8tmp[1];
4732 
4733 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4734 		   "OFDM-CCA/OFDM-FA/CCK-FA",
4735 		   u32tmp[0] & 0xffff, fa_of_dm, fa_cck);
4736 	CL_PRINTF(cli_buf);
4737 
4738 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4739 		   "CRC_OK CCK/11g/11n/11n-Agg",
4740 		   coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
4741 		   coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_agg);
4742 	CL_PRINTF(cli_buf);
4743 
4744 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4745 		   "CRC_Err CCK/11g/11n/11n-Agg",
4746 		   coex_sta->crc_err_cck, coex_sta->crc_err_11g,
4747 		   coex_sta->crc_err_11n, coex_sta->crc_err_11n_agg);
4748 	CL_PRINTF(cli_buf);
4749 
4750 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4751 		   "0x770(high-pri rx/tx)",
4752 		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
4753 	CL_PRINTF(cli_buf);
4754 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4755 		   "0x774(low-pri rx/tx)",
4756 		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
4757 	CL_PRINTF(cli_buf);
4758 
4759 	halbtc8723d2ant_read_score_board(btcoexist,	&u16tmp[0]);
4760 
4761 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %04x",
4762 		   "ScoreBoard[14:0] (from BT)", u16tmp[0]);
4763 	CL_PRINTF(cli_buf);
4764 
4765 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
4766 }
4767 
4768 
ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist * btcoexist,IN u8 type)4769 void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4770 {
4771 	if (btcoexist->manual_control ||	btcoexist->stop_coex_dm)
4772 		return;
4773 
4774 	if (BTC_IPS_ENTER == type) {
4775 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4776 			    "[BTCoex], IPS ENTER notify\n");
4777 		BTC_TRACE(trace_buf);
4778 		coex_sta->under_ips = true;
4779 		coex_sta->under_lps = false;
4780 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, false,
4781 					     true);
4782 		halbtc8723d2ant_action_coex_all_off(btcoexist);
4783 	} else if (BTC_IPS_LEAVE == type) {
4784 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4785 			    "[BTCoex], IPS LEAVE notify\n");
4786 		BTC_TRACE(trace_buf);
4787 		coex_sta->under_ips = false;
4788 		halbtc8723d2ant_init_hw_config(btcoexist, false);
4789 		halbtc8723d2ant_action_init_coex_dm(btcoexist);
4790 		halbtc8723d2ant_query_bt_info(btcoexist);
4791 	}
4792 }
4793 
ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist * btcoexist,IN u8 type)4794 void ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4795 {
4796 	if (btcoexist->manual_control || btcoexist->stop_coex_dm)
4797 		return;
4798 
4799 	if (BTC_LPS_ENABLE == type) {
4800 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4801 			    "[BTCoex], LPS ENABLE notify\n");
4802 		BTC_TRACE(trace_buf);
4803 		coex_sta->under_lps = true;
4804 		coex_sta->under_ips = false;
4805 	} else if (BTC_LPS_DISABLE == type) {
4806 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4807 			    "[BTCoex], LPS DISABLE notify\n");
4808 		BTC_TRACE(trace_buf);
4809 		coex_sta->under_lps = false;
4810 	}
4811 }
4812 
ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist * btcoexist,IN u8 type)4813 void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
4814 				    IN u8 type)
4815 {
4816 	u32	u32tmp;
4817 	u8	u8tmpa, u8tmpb;
4818 	boolean	wifi_connected = false;
4819 
4820 
4821 	if (btcoexist->manual_control ||
4822 	    btcoexist->stop_coex_dm)
4823 		return;
4824 
4825 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
4826 			   &wifi_connected);
4827 
4828 	halbtc8723d2ant_query_bt_info(btcoexist);  /*  this can't be removed for RF off_on event, or BT would dis-connect */
4829 
4830 	if (BTC_SCAN_START == type) {
4831 
4832 		if (!wifi_connected)
4833 			coex_sta->wifi_is_high_pri_task = true;
4834 
4835 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4836 			    "[BTCoex], SCAN START notify\n");
4837 		BTC_TRACE(trace_buf);
4838 
4839 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, false,
4840 					     false);
4841 
4842 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
4843 
4844 	} else if (BTC_SCAN_FINISH == type) {
4845 
4846 		coex_sta->wifi_is_high_pri_task = false;
4847 
4848 		btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
4849 				   &coex_sta->scan_ap_num);
4850 
4851 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4852 			"[BTCoex], SCAN FINISH notify  (Scan-AP = %d)\n", coex_sta->scan_ap_num);
4853 		BTC_TRACE(trace_buf);
4854 
4855 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
4856 	}
4857 
4858 }
4859 
ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist * btcoexist,IN u8 type)4860 void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
4861 				       IN u8 type)
4862 {
4863 	if (btcoexist->manual_control ||
4864 	    btcoexist->stop_coex_dm ||
4865 	    coex_sta->bt_disabled)
4866 		return;
4867 
4868 	if (BTC_ASSOCIATE_START == type) {
4869 
4870 		coex_sta->wifi_is_high_pri_task = true;
4871 
4872 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4873 			    "[BTCoex], CONNECT START notify\n");
4874 		BTC_TRACE(trace_buf);
4875 
4876 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, false,
4877 					     false);
4878 
4879 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
4880 
4881 		coex_dm->arp_cnt = 0;
4882 
4883 	} else if (BTC_ASSOCIATE_FINISH == type) {
4884 
4885 		coex_sta->wifi_is_high_pri_task = false;
4886 
4887 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4888 			    "[BTCoex], CONNECT FINISH notify\n");
4889 		BTC_TRACE(trace_buf);
4890 
4891 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
4892 	}
4893 }
4894 
ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist * btcoexist,IN u8 type)4895 void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
4896 		IN u8 type)
4897 {
4898 	u8			h2c_parameter[3] = {0};
4899 	u32			wifi_bw;
4900 	u8			wifi_central_chnl;
4901 	u8			ap_num = 0;
4902 	boolean		wifi_under_b_mode = false;
4903 
4904 	if (btcoexist->manual_control ||
4905 	    btcoexist->stop_coex_dm ||
4906 	    coex_sta->bt_disabled)
4907 		return;
4908 
4909 	if (BTC_MEDIA_CONNECT == type) {
4910 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4911 			    "[BTCoex], MEDIA connect notify\n");
4912 		BTC_TRACE(trace_buf);
4913 
4914 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, false,
4915 					     false);
4916 
4917 		/* psd_scan->ant_det_is_ant_det_available = TRUE; */
4918 
4919 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
4920 				   &wifi_under_b_mode);
4921 
4922 		/* Set CCK Tx/Rx high Pri except 11b mode */
4923 		if (wifi_under_b_mode) {
4924 			btcoexist->btc_write_1byte(btcoexist, 0x6cd,
4925 						   0x00); /* CCK Tx */
4926 			btcoexist->btc_write_1byte(btcoexist, 0x6cf,
4927 						   0x00); /* CCK Rx */
4928 		} else {
4929 
4930 			btcoexist->btc_write_1byte(btcoexist, 0x6cd,
4931 						   0x00); /* CCK Tx */
4932 			btcoexist->btc_write_1byte(btcoexist, 0x6cf,
4933 						   0x10); /* CCK Rx */
4934 		}
4935 
4936 	} else {
4937 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4938 			    "[BTCoex], MEDIA disconnect notify\n");
4939 		BTC_TRACE(trace_buf);
4940 
4941 		btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */
4942 		btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */
4943 	}
4944 
4945 
4946 	halbtc8723d2ant_update_wifi_channel_info(btcoexist, type);
4947 }
4948 
ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist * btcoexist,IN u8 type)4949 void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
4950 		IN u8 type)
4951 {
4952 	boolean under_4way = false;
4953 
4954 	if (btcoexist->manual_control ||
4955 	    btcoexist->stop_coex_dm ||
4956 	    coex_sta->bt_disabled)
4957 		return;
4958 
4959 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
4960 			   &under_4way);
4961 
4962 	if (under_4way) {
4963 
4964 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4965 			    "[BTCoex], specific Packet ---- under_4way!!\n");
4966 		BTC_TRACE(trace_buf);
4967 
4968 		coex_sta->wifi_is_high_pri_task = true;
4969 		coex_sta->specific_pkt_period_cnt = 2;
4970 
4971 	} else if (BTC_PACKET_ARP == type) {
4972 
4973 		coex_dm->arp_cnt++;
4974 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4975 			"[BTCoex], specific Packet ARP notify -cnt = %d\n", coex_dm->arp_cnt);
4976 		BTC_TRACE(trace_buf);
4977 
4978 	} else {
4979 
4980 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4981 			"[BTCoex], specific Packet DHCP or EAPOL notify [Type = %d]\n", type);
4982 		BTC_TRACE(trace_buf);
4983 
4984 		coex_sta->wifi_is_high_pri_task = true;
4985 		coex_sta->specific_pkt_period_cnt = 2;
4986 	}
4987 
4988 	if (coex_sta->wifi_is_high_pri_task)
4989 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
4990 
4991 }
4992 
ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist * btcoexist,IN u8 * tmp_buf,IN u8 length)4993 void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
4994 				       IN u8 *tmp_buf, IN u8 length)
4995 {
4996 	u8			bt_info = 0;
4997 	u8			i, rsp_source = 0;
4998 	boolean			bt_busy = false, limited_dig = false;
4999 	boolean			wifi_connected = false;
5000 
5001 	coex_sta->c2h_bt_info_req_sent = false;
5002 
5003 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
5004 			   &wifi_connected);
5005 
5006 	rsp_source = tmp_buf[0] & 0xf;
5007 	if (rsp_source >= BT_INFO_SRC_8723D_2ANT_MAX)
5008 		rsp_source = BT_INFO_SRC_8723D_2ANT_WIFI_FW;
5009 	coex_sta->bt_info_c2h_cnt[rsp_source]++;
5010 
5011 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5012 		    "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
5013 		    length);
5014 	BTC_TRACE(trace_buf);
5015 	for (i = 0; i < length; i++) {
5016 		coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
5017 		if (i == 1)
5018 			bt_info = tmp_buf[i];
5019 
5020 		if (i == length - 1) {
5021 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
5022 				    tmp_buf[i]);
5023 			BTC_TRACE(trace_buf);
5024 		} else {
5025 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
5026 				    tmp_buf[i]);
5027 			BTC_TRACE(trace_buf);
5028 		}
5029 	}
5030 
5031 	if (BT_INFO_SRC_8723D_2ANT_WIFI_FW != rsp_source) {
5032 
5033 		/* if 0xff, it means BT is under WHCK test */
5034 		if (bt_info == 0xff)
5035 			coex_sta->bt_whck_test = true;
5036 		else
5037 			coex_sta->bt_whck_test = false;
5038 
5039 		coex_sta->bt_retry_cnt =	/* [3:0] */
5040 			coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
5041 
5042 		if (coex_sta->bt_retry_cnt >= 1)
5043 			coex_sta->pop_event_cnt++;
5044 
5045 		if (coex_sta->bt_info_c2h[rsp_source][2] & 0x80)
5046 			coex_sta->bt_create_connection = true;
5047 		else
5048 			coex_sta->bt_create_connection = false;
5049 
5050 		/* unit: %, value-100 to translate to unit: dBm  */
5051 		coex_sta->bt_rssi = coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
5052 
5053 		if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20)
5054 			coex_sta->c2h_bt_remote_name_req = true;
5055 		else
5056 			coex_sta->c2h_bt_remote_name_req = false;
5057 
5058 		if ((coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) {
5059 			coex_sta->a2dp_bit_pool =
5060 				coex_sta->bt_info_c2h[rsp_source][6];
5061 		} else
5062 			coex_sta->a2dp_bit_pool = 0;
5063 
5064 		if (coex_sta->bt_info_c2h[rsp_source][1] & 0x9)
5065 			coex_sta->acl_busy = true;
5066 		else
5067 			coex_sta->acl_busy = false;
5068 
5069 		coex_sta->bt_info_ext =
5070 			coex_sta->bt_info_c2h[rsp_source][4];
5071 
5072 		/* Here we need to resend some wifi info to BT */
5073 		/* because bt is reset and loss of the info. */
5074 
5075 		if ((!btcoexist->manual_control) && (!btcoexist->stop_coex_dm)) {
5076 
5077 			/*  Re-Init */
5078 			if ((coex_sta->bt_info_ext & BIT(1))) {
5079 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5080 					"[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
5081 				BTC_TRACE(trace_buf);
5082 				if (wifi_connected)
5083 					ex_halbtc8723d2ant_media_status_notify(
5084 						btcoexist, BTC_MEDIA_CONNECT);
5085 				else
5086 					ex_halbtc8723d2ant_media_status_notify(
5087 						btcoexist, BTC_MEDIA_DISCONNECT);
5088 			}
5089 
5090 
5091 			/*  If Ignore_WLanAct && not SetUp_Link */
5092 			if ((coex_sta->bt_info_ext & BIT(3)) && (!(coex_sta->bt_info_ext & BIT(2)))) {
5093 
5094 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5095 					"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
5096 				BTC_TRACE(trace_buf);
5097 				halbtc8723d2ant_ignore_wlan_act(btcoexist,
5098 							FORCE_EXEC, false);
5099 			}
5100 		}
5101 
5102 		/* check BIT2 first ==> check if bt is under inquiry or page scan */
5103 		if (bt_info & BT_INFO_8723D_2ANT_B_INQ_PAGE)
5104 			coex_sta->c2h_bt_inquiry_page = true;
5105 		else
5106 			coex_sta->c2h_bt_inquiry_page = false;
5107 	}
5108 
5109 	coex_sta->num_of_profile = 0;
5110 
5111 	/* set link exist status */
5112 	if (!(bt_info & BT_INFO_8723D_2ANT_B_CONNECTION)) {
5113 		coex_sta->bt_link_exist = false;
5114 		coex_sta->pan_exist = false;
5115 		coex_sta->a2dp_exist = false;
5116 		coex_sta->hid_exist = false;
5117 		coex_sta->sco_exist = false;
5118 	} else {	/* connection exists */
5119 		coex_sta->bt_link_exist = true;
5120 		if (bt_info & BT_INFO_8723D_2ANT_B_FTP) {
5121 			coex_sta->pan_exist = true;
5122 			coex_sta->num_of_profile++;
5123 		} else
5124 			coex_sta->pan_exist = false;
5125 
5126 		if (bt_info & BT_INFO_8723D_2ANT_B_A2DP) {
5127 			coex_sta->a2dp_exist = true;
5128 			coex_sta->num_of_profile++;
5129 		} else
5130 			coex_sta->a2dp_exist = false;
5131 
5132 		if (bt_info & BT_INFO_8723D_2ANT_B_HID) {
5133 			coex_sta->hid_exist = true;
5134 			coex_sta->num_of_profile++;
5135 		} else
5136 			coex_sta->hid_exist = false;
5137 
5138 		if (bt_info & BT_INFO_8723D_2ANT_B_SCO_ESCO) {
5139 			coex_sta->sco_exist = true;
5140 			coex_sta->num_of_profile++;
5141 		} else
5142 			coex_sta->sco_exist = false;
5143 
5144 	}
5145 
5146 	halbtc8723d2ant_update_bt_link_info(btcoexist);
5147 
5148 	if (!(bt_info & BT_INFO_8723D_2ANT_B_CONNECTION)) {
5149 		coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
5150 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5151 			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
5152 		BTC_TRACE(trace_buf);
5153 	} else if (bt_info ==
5154 		BT_INFO_8723D_2ANT_B_CONNECTION) {	/* connection exists but no busy */
5155 		coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE;
5156 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5157 			    "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
5158 		BTC_TRACE(trace_buf);
5159 	} else if ((bt_info & BT_INFO_8723D_2ANT_B_SCO_ESCO) ||
5160 		   (bt_info & BT_INFO_8723D_2ANT_B_SCO_BUSY)) {
5161 		coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_SCO_BUSY;
5162 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5163 			    "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
5164 		BTC_TRACE(trace_buf);
5165 	} else if (bt_info & BT_INFO_8723D_2ANT_B_ACL_BUSY) {
5166 		coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_ACL_BUSY;
5167 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5168 			    "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
5169 		BTC_TRACE(trace_buf);
5170 	} else {
5171 		coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_MAX;
5172 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5173 			"[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
5174 		BTC_TRACE(trace_buf);
5175 	}
5176 
5177 	if ((BT_8723D_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
5178 	    (BT_8723D_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
5179 	    (BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
5180 		bt_busy = true;
5181 		limited_dig = true;
5182 	} else {
5183 		bt_busy = false;
5184 		limited_dig = false;
5185 	}
5186 
5187 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
5188 
5189 	coex_dm->limited_dig = limited_dig;
5190 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
5191 
5192 	if (btcoexist->manual_control) {
5193 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5194 			"[BTCoex], BtInfoNotify(), No run_coexist_mechanism return for Manual CTRL<===\n");
5195 		BTC_TRACE(trace_buf);
5196 		return;
5197 	}
5198 
5199 	if (btcoexist->stop_coex_dm) {
5200 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5201 			"[BTCoex], BtInfoNotify(),  No run_coexist_mechanism return for Stop Coex DM <===\n");
5202 		BTC_TRACE(trace_buf);
5203 		return;
5204 	}
5205 
5206 	/*  don't run coex mechanism while receve BTInfo if GNT_WL/GNT_BT control by SW */
5207 	if (!coex_sta->gnt_control_by_PTA)
5208 		return;
5209 
5210 	halbtc8723d2ant_run_coexist_mechanism(btcoexist);
5211 }
5212 
ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist * btcoexist,IN u8 type)5213 void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
5214 		IN u8 type)
5215 {
5216 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n");
5217 	BTC_TRACE(trace_buf);
5218 
5219 	if (BTC_RF_ON == type) {
5220 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5221 			    "[BTCoex], RF is turned ON!!\n");
5222 		BTC_TRACE(trace_buf);
5223 
5224 		coex_sta->wl_rf_off_on_event = true;
5225 		btcoexist->stop_coex_dm = false;
5226 
5227 		halbtc8723d2ant_post_onoffstate_to_bt(btcoexist, TRUE);
5228 	} else if (BTC_RF_OFF == type) {
5229 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5230 			    "[BTCoex], RF is turned OFF!!\n");
5231 		BTC_TRACE(trace_buf);
5232 
5233 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, false,
5234 					     true);
5235 		halbtc8723d2ant_action_coex_all_off(btcoexist);
5236 		halbtc8723d2ant_post_onoffstate_to_bt(btcoexist, FALSE);
5237 		btcoexist->stop_coex_dm = true;
5238 		coex_sta->wl_rf_off_on_event = false;
5239 
5240 	}
5241 }
5242 
ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist * btcoexist)5243 void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist)
5244 {
5245 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
5246 	BTC_TRACE(trace_buf);
5247 
5248 	halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, false,
5249 				     true);
5250 
5251 	ex_halbtc8723d2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
5252 
5253 	halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, FALSE);
5254 
5255 	halbtc8723d2ant_post_onoffstate_to_bt(btcoexist, FALSE);
5256 }
5257 
ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist * btcoexist,IN u8 pnp_state)5258 void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
5259 				   IN u8 pnp_state)
5260 {
5261 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
5262 	BTC_TRACE(trace_buf);
5263 
5264 	if (BTC_WIFI_PNP_SLEEP == pnp_state) {
5265 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5266 			    "[BTCoex], Pnp notify to SLEEP\n");
5267 		BTC_TRACE(trace_buf);
5268 
5269 		/* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
5270 		/* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
5271 		/* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
5272 		coex_sta->under_ips = false;
5273 		coex_sta->under_lps = false;
5274 
5275 		halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, FALSE);
5276 		halbtc8723d2ant_post_onoffstate_to_bt(btcoexist, FALSE);
5277 	} else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
5278 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5279 			    "[BTCoex], Pnp notify to WAKE UP\n");
5280 		BTC_TRACE(trace_buf);
5281 
5282 		halbtc8723d2ant_post_onoffstate_to_bt(btcoexist, TRUE);
5283 	}
5284 }
5285 
ex_halbtc8723d2ant_periodical(IN struct btc_coexist * btcoexist)5286 void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
5287 {
5288 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
5289 
5290 #if (BT_AUTO_REPORT_ONLY_8723D_2ANT == 0)
5291 	halbtc8723d2ant_query_bt_info(btcoexist);
5292 #endif
5293 
5294 	halbtc8723d2ant_monitor_bt_ctr(btcoexist);
5295 	halbtc8723d2ant_monitor_wifi_ctr(btcoexist);
5296 	halbtc8723d2ant_monitor_bt_enable_disable(btcoexist);
5297 
5298 	/* for 4-way, DHCP, EAPOL packet */
5299 	if (coex_sta->specific_pkt_period_cnt > 0) {
5300 
5301 		coex_sta->specific_pkt_period_cnt--;
5302 
5303 		if ((coex_sta->specific_pkt_period_cnt == 0) && (coex_sta->wifi_is_high_pri_task))
5304 			coex_sta->wifi_is_high_pri_task = false;
5305 
5306 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5307 			"[BTCoex], ***************** Hi-Pri Task = %s*****************\n", (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"));
5308 		BTC_TRACE(trace_buf);
5309 
5310 	}
5311 
5312 	if (halbtc8723d2ant_is_wifibt_status_changed(btcoexist))
5313 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
5314 }
5315 
5316 
ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist * btcoexist,IN u32 cent_freq,IN u32 offset,IN u32 span,IN u32 seconds)5317 void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
5318 		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
5319 {
5320 
5321 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5322 		    "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
5323 	BTC_TRACE(trace_buf);
5324 
5325 #if BT_8723D_2ANT_ANTDET_ENABLE
5326 	static u32 ant_det_count = 0, ant_det_fail_count = 0;
5327 	struct  btc_board_info	*board_info = &btcoexist->board_info;
5328 	/*boolean scan, roam;*/
5329 
5330 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5331 		    "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
5332 	BTC_TRACE(trace_buf);
5333 
5334 	if (seconds == 0) {
5335 		psd_scan->ant_det_try_count	= 0;
5336 		psd_scan->ant_det_fail_count	= 0;
5337 		ant_det_count = 0;
5338 		ant_det_fail_count = 0;
5339 		board_info->btdm_ant_det_finish = false;
5340 		board_info->btdm_ant_num_by_ant_det = 1;
5341 		return;
5342 	}
5343 
5344 	if (!board_info->btdm_ant_det_finish) {
5345 		psd_scan->ant_det_inteval_count =
5346 			psd_scan->ant_det_inteval_count + 2;
5347 
5348 		if (psd_scan->ant_det_inteval_count >=
5349 		    BT_8723D_2ANT_ANTDET_RETRY_INTERVAL) {
5350 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5351 				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
5352 			BTC_TRACE(trace_buf);
5353 			halbtc8723d2ant_psd_antenna_detection_check(btcoexist);
5354 
5355 			if (board_info->btdm_ant_det_finish) {
5356 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5357 					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
5358 				BTC_TRACE(trace_buf);
5359 
5360 #if 0
5361 				board_info->btdm_ant_det_finish = false;
5362 #endif
5363 
5364 #if 0
5365 				if (board_info->btdm_ant_num_by_ant_det == 2)
5366 					halbtc8723d2ant_mechanism_switch(
5367 						btcoexist, true);
5368 				else
5369 					halbtc8723d2ant_mechanism_switch(
5370 						btcoexist, false);
5371 #endif
5372 			} else {
5373 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5374 					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
5375 				BTC_TRACE(trace_buf);
5376 			}
5377 			psd_scan->ant_det_inteval_count = 0;
5378 		} else {
5379 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
5380 				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
5381 				    psd_scan->ant_det_inteval_count);
5382 			BTC_TRACE(trace_buf);
5383 		}
5384 
5385 	}
5386 #endif
5387 
5388 
5389 }
5390 
5391 
ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist * btcoexist)5392 void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist)
5393 {
5394 
5395 #if BT_8723D_2ANT_ANTDET_ENABLE
5396 	struct  btc_board_info	*board_info = &btcoexist->board_info;
5397 
5398 	if (psd_scan->ant_det_try_count != 0)	{
5399 		halbtc8723d2ant_psd_show_antenna_detect_result(btcoexist);
5400 
5401 		if (board_info->btdm_ant_det_finish)
5402 			halbtc8723d2ant_psd_showdata(btcoexist);
5403 		return;
5404 	}
5405 #endif
5406 
5407 }
5408 
5409 
5410 #endif
5411 
5412 #endif	/*  #if (RTL8723D_SUPPORT == 1) */
5413