1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ************************************************************
3 * Description:
4 *
5 * This file is for RTL8723B Co-exist mechanism
6 *
7 * History
8 * 2012/11/15 Cosa first check in.
9 *
10 * ************************************************************ */
11
12 /* ************************************************************
13 * include files
14 * ************************************************************ */
15 #include "Mp_Precomp.h"
16
17 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
18
19 #if (RTL8723B_SUPPORT == 1)
20 /* ************************************************************
21 * Global variables, these are static variables
22 * ************************************************************ */
23 static u8 *trace_buf = &gl_btc_trace_buf[0];
24 static struct coex_dm_8723b_2ant glcoex_dm_8723b_2ant;
25 static struct coex_dm_8723b_2ant *coex_dm = &glcoex_dm_8723b_2ant;
26 static struct coex_sta_8723b_2ant glcoex_sta_8723b_2ant;
27 static struct coex_sta_8723b_2ant *coex_sta = &glcoex_sta_8723b_2ant;
28
29 const char *const glbt_info_src_8723b_2ant[] = {
30 "BT Info[wifi fw]",
31 "BT Info[bt rsp]",
32 "BT Info[bt auto report]",
33 };
34
35 u32 glcoex_ver_date_8723b_2ant = 20151223;
36 u32 glcoex_ver_8723b_2ant = 0x4a;
37
38 /* ************************************************************
39 * local function proto type if needed
40 * ************************************************************
41 * ************************************************************
42 * local function start with halbtc8723b2ant_
43 * ************************************************************ */
halbtc8723b2ant_bt_rssi_state(u8 * ppre_bt_rssi_state,u8 level_num,u8 rssi_thresh,u8 rssi_thresh1)44 u8 halbtc8723b2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
45 u8 rssi_thresh, u8 rssi_thresh1)
46 {
47 s32 bt_rssi = 0;
48 u8 bt_rssi_state = *ppre_bt_rssi_state;
49
50 bt_rssi = coex_sta->bt_rssi;
51
52 if (level_num == 2) {
53 if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
54 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
55 if (bt_rssi >= (rssi_thresh +
56 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
57 bt_rssi_state = BTC_RSSI_STATE_HIGH;
58 else
59 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
60 } else {
61 if (bt_rssi < rssi_thresh)
62 bt_rssi_state = BTC_RSSI_STATE_LOW;
63 else
64 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
65 }
66 } else if (level_num == 3) {
67 if (rssi_thresh > rssi_thresh1) {
68 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
69 "[BTCoex], BT Rssi thresh error!!\n");
70 BTC_TRACE(trace_buf);
71 return *ppre_bt_rssi_state;
72 }
73
74 if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
75 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
76 if (bt_rssi >= (rssi_thresh +
77 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
78 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
79 else
80 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
81 } else if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
82 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
83 if (bt_rssi >= (rssi_thresh1 +
84 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
85 bt_rssi_state = BTC_RSSI_STATE_HIGH;
86 else if (bt_rssi < rssi_thresh)
87 bt_rssi_state = BTC_RSSI_STATE_LOW;
88 else
89 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
90 } else {
91 if (bt_rssi < rssi_thresh1)
92 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
93 else
94 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
95 }
96 }
97
98 *ppre_bt_rssi_state = bt_rssi_state;
99
100 return bt_rssi_state;
101 }
102
halbtc8723b2ant_wifi_rssi_state(IN struct btc_coexist * btcoexist,IN u8 * pprewifi_rssi_state,IN u8 level_num,IN u8 rssi_thresh,IN u8 rssi_thresh1)103 u8 halbtc8723b2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
104 IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
105 IN u8 rssi_thresh1)
106 {
107 s32 wifi_rssi = 0;
108 u8 wifi_rssi_state = *pprewifi_rssi_state;
109
110 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
111
112 if (level_num == 2) {
113 if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
114 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
115 if (wifi_rssi >= (rssi_thresh +
116 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
117 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
118 else
119 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
120 } else {
121 if (wifi_rssi < rssi_thresh)
122 wifi_rssi_state = BTC_RSSI_STATE_LOW;
123 else
124 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
125 }
126 } else if (level_num == 3) {
127 if (rssi_thresh > rssi_thresh1) {
128 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
129 "[BTCoex], wifi RSSI thresh error!!\n");
130 BTC_TRACE(trace_buf);
131 return *pprewifi_rssi_state;
132 }
133
134 if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
135 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
136 if (wifi_rssi >= (rssi_thresh +
137 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
138 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
139 else
140 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
141 } else if ((*pprewifi_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
142 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
143 if (wifi_rssi >= (rssi_thresh1 +
144 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
145 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
146 else if (wifi_rssi < rssi_thresh)
147 wifi_rssi_state = BTC_RSSI_STATE_LOW;
148 else
149 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
150 } else {
151 if (wifi_rssi < rssi_thresh1)
152 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
153 else
154 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
155 }
156 }
157
158 *pprewifi_rssi_state = wifi_rssi_state;
159
160 return wifi_rssi_state;
161 }
162
halbtc8723b2ant_monitor_bt_enable_disable(IN struct btc_coexist * btcoexist)163 void halbtc8723b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
164 {
165 static u32 bt_disable_cnt = 0;
166 boolean bt_active = true, bt_disabled = false;
167
168 /* This function check if bt is disabled */
169
170 if (coex_sta->high_priority_tx == 0 &&
171 coex_sta->high_priority_rx == 0 &&
172 coex_sta->low_priority_tx == 0 &&
173 coex_sta->low_priority_rx == 0)
174 bt_active = false;
175 if (coex_sta->high_priority_tx == 0xffff &&
176 coex_sta->high_priority_rx == 0xffff &&
177 coex_sta->low_priority_tx == 0xffff &&
178 coex_sta->low_priority_rx == 0xffff)
179 bt_active = false;
180 if (bt_active) {
181 bt_disable_cnt = 0;
182 bt_disabled = false;
183 } else {
184 bt_disable_cnt++;
185 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
186 "[BTCoex], bt all counters=0, %d times!!\n",
187 bt_disable_cnt);
188 BTC_TRACE(trace_buf);
189 if (bt_disable_cnt >= 2)
190 bt_disabled = true;
191 }
192 if (coex_sta->bt_disabled != bt_disabled) {
193 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
194 "[BTCoex], BT is from %s to %s!!\n",
195 (coex_sta->bt_disabled ? "disabled" : "enabled"),
196 (bt_disabled ? "disabled" : "enabled"));
197 BTC_TRACE(trace_buf);
198
199 coex_sta->bt_disabled = bt_disabled;
200 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
201 &bt_disabled);
202 if (bt_disabled) {
203 btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
204 NULL);
205 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
206 NULL);
207 }
208 }
209 }
210
211
halbtc8723b2ant_limited_rx(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rej_ap_agg_pkt,IN boolean bt_ctrl_agg_buf_size,IN u8 agg_buf_size)212 void halbtc8723b2ant_limited_rx(IN struct btc_coexist *btcoexist,
213 IN boolean force_exec, IN boolean rej_ap_agg_pkt,
214 IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
215 {
216 boolean reject_rx_agg = rej_ap_agg_pkt;
217 boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
218 u8 rx_agg_size = agg_buf_size;
219
220 /* ============================================ */
221 /* Rx Aggregation related setting */
222 /* ============================================ */
223 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
224 &reject_rx_agg);
225 /* decide BT control aggregation buf size or not */
226 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
227 &bt_ctrl_rx_agg_size);
228 /* aggregation buf size, only work when BT control Rx aggregation size. */
229 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
230 /* real update aggregation setting */
231 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
232 }
233
halbtc8723b2ant_monitor_bt_ctr(IN struct btc_coexist * btcoexist)234 void halbtc8723b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
235 {
236 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
237 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
238
239 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
240
241 reg_hp_txrx = 0x770;
242 reg_lp_txrx = 0x774;
243
244 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
245 reg_hp_tx = u32tmp & MASKLWORD;
246 reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
247
248 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
249 reg_lp_tx = u32tmp & MASKLWORD;
250 reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
251
252 coex_sta->high_priority_tx = reg_hp_tx;
253 coex_sta->high_priority_rx = reg_hp_rx;
254 coex_sta->low_priority_tx = reg_lp_tx;
255 coex_sta->low_priority_rx = reg_lp_rx;
256
257 if ((coex_sta->low_priority_tx > 1050) &&
258 (!coex_sta->c2h_bt_inquiry_page))
259 coex_sta->pop_event_cnt++;
260
261 if ((coex_sta->low_priority_rx >= 950) &&
262 (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) &&
263 (!coex_sta->under_ips))
264 bt_link_info->slave_role = true;
265 else
266 bt_link_info->slave_role = false;
267
268 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
269 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
270 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
271 BTC_TRACE(trace_buf);
272 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
273 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
274 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
275 BTC_TRACE(trace_buf);
276
277 /* reset counter */
278 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
279 }
280
halbtc8723b2ant_monitor_wifi_ctr(IN struct btc_coexist * btcoexist)281 void halbtc8723b2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
282 {
283
284
285 if (coex_sta->under_ips) {
286 coex_sta->crc_ok_cck = 0;
287 coex_sta->crc_ok_11g = 0;
288 coex_sta->crc_ok_11n = 0;
289 coex_sta->crc_ok_11n_agg = 0;
290
291 coex_sta->crc_err_cck = 0;
292 coex_sta->crc_err_11g = 0;
293 coex_sta->crc_err_11n = 0;
294 coex_sta->crc_err_11n_agg = 0;
295 } else {
296 coex_sta->crc_ok_cck = btcoexist->btc_read_4byte(btcoexist,
297 0xf88);
298 coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist,
299 0xf94);
300 coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist,
301 0xf90);
302 coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist,
303 0xfb8);
304
305 coex_sta->crc_err_cck = btcoexist->btc_read_4byte(btcoexist,
306 0xf84);
307 coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist,
308 0xf96);
309 coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist,
310 0xf92);
311 coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist,
312 0xfba);
313 }
314
315 /* reset counter */
316 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1);
317 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0);
318 }
319
halbtc8723b2ant_query_bt_info(IN struct btc_coexist * btcoexist)320 void halbtc8723b2ant_query_bt_info(IN struct btc_coexist *btcoexist)
321 {
322 u8 h2c_parameter[1] = {0};
323
324 coex_sta->c2h_bt_info_req_sent = true;
325
326 h2c_parameter[0] |= BIT(0); /* trigger */
327
328 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
329 }
330
halbtc8723b2ant_is_wifi_status_changed(IN struct btc_coexist * btcoexist)331 boolean halbtc8723b2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
332 {
333 static boolean pre_wifi_busy = false, pre_under_4way = false,
334 pre_bt_hs_on = false;
335 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
336 boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
337 boolean wifi_connected = false;
338 u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
339
340
341 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
342 &wifi_connected);
343 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
344 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
345 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
346 &under_4way);
347
348 if (wifi_connected) {
349 if (wifi_busy != pre_wifi_busy) {
350 pre_wifi_busy = wifi_busy;
351 return true;
352 }
353 if (under_4way != pre_under_4way) {
354 pre_under_4way = under_4way;
355 return true;
356 }
357 if (bt_hs_on != pre_bt_hs_on) {
358 pre_bt_hs_on = bt_hs_on;
359 return true;
360 }
361
362
363 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
364 &prewifi_rssi_state, 2,
365 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
366 coex_dm->switch_thres_offset, 0);
367
368 if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) ||
369 (BTC_RSSI_STATE_LOW == wifi_rssi_state))
370 return true;
371
372 }
373
374 return false;
375 }
376
halbtc8723b2ant_update_bt_link_info(IN struct btc_coexist * btcoexist)377 void halbtc8723b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
378 {
379 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
380 boolean bt_hs_on = false;
381
382 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
383
384 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
385 bt_link_info->sco_exist = coex_sta->sco_exist;
386 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
387 bt_link_info->pan_exist = coex_sta->pan_exist;
388 bt_link_info->hid_exist = coex_sta->hid_exist;
389
390 /* work around for HS mode. */
391 if (bt_hs_on) {
392 bt_link_info->pan_exist = true;
393 bt_link_info->bt_link_exist = true;
394 }
395
396 /* check if Sco only */
397 if (bt_link_info->sco_exist &&
398 !bt_link_info->a2dp_exist &&
399 !bt_link_info->pan_exist &&
400 !bt_link_info->hid_exist)
401 bt_link_info->sco_only = true;
402 else
403 bt_link_info->sco_only = false;
404
405 /* check if A2dp only */
406 if (!bt_link_info->sco_exist &&
407 bt_link_info->a2dp_exist &&
408 !bt_link_info->pan_exist &&
409 !bt_link_info->hid_exist)
410 bt_link_info->a2dp_only = true;
411 else
412 bt_link_info->a2dp_only = false;
413
414 /* check if Pan only */
415 if (!bt_link_info->sco_exist &&
416 !bt_link_info->a2dp_exist &&
417 bt_link_info->pan_exist &&
418 !bt_link_info->hid_exist)
419 bt_link_info->pan_only = true;
420 else
421 bt_link_info->pan_only = false;
422
423 /* check if Hid only */
424 if (!bt_link_info->sco_exist &&
425 !bt_link_info->a2dp_exist &&
426 !bt_link_info->pan_exist &&
427 bt_link_info->hid_exist)
428 bt_link_info->hid_only = true;
429 else
430 bt_link_info->hid_only = false;
431 }
432
halbtc8723b2ant_action_algorithm(IN struct btc_coexist * btcoexist)433 u8 halbtc8723b2ant_action_algorithm(IN struct btc_coexist *btcoexist)
434 {
435 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
436 boolean bt_hs_on = false;
437 u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
438 u8 num_of_diff_profile = 0;
439
440 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
441
442 if (!bt_link_info->bt_link_exist) {
443 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
444 "[BTCoex], No BT link exists!!!\n");
445 BTC_TRACE(trace_buf);
446 return algorithm;
447 }
448
449 if (bt_link_info->sco_exist)
450 num_of_diff_profile++;
451 if (bt_link_info->hid_exist)
452 num_of_diff_profile++;
453 if (bt_link_info->pan_exist)
454 num_of_diff_profile++;
455 if (bt_link_info->a2dp_exist)
456 num_of_diff_profile++;
457
458 if (num_of_diff_profile == 1) {
459 if (bt_link_info->sco_exist) {
460 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
461 "[BTCoex], SCO only\n");
462 BTC_TRACE(trace_buf);
463 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
464 } else {
465 if (bt_link_info->hid_exist) {
466 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
467 "[BTCoex], HID only\n");
468 BTC_TRACE(trace_buf);
469 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
470 } else if (bt_link_info->a2dp_exist) {
471 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
472 "[BTCoex], A2DP only\n");
473 BTC_TRACE(trace_buf);
474 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
475 } else if (bt_link_info->pan_exist) {
476 if (bt_hs_on) {
477 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
478 "[BTCoex], PAN(HS) only\n");
479 BTC_TRACE(trace_buf);
480 algorithm =
481 BT_8723B_2ANT_COEX_ALGO_PANHS;
482 } else {
483 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
484 "[BTCoex], PAN(EDR) only\n");
485 BTC_TRACE(trace_buf);
486 algorithm =
487 BT_8723B_2ANT_COEX_ALGO_PANEDR;
488 }
489 }
490 }
491 } else if (num_of_diff_profile == 2) {
492 if (bt_link_info->sco_exist) {
493 if (bt_link_info->hid_exist) {
494 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
495 "[BTCoex], SCO + HID\n");
496 BTC_TRACE(trace_buf);
497 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
498 } else if (bt_link_info->a2dp_exist) {
499 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
500 "[BTCoex], SCO + A2DP ==> SCO\n");
501 BTC_TRACE(trace_buf);
502 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
503 } else if (bt_link_info->pan_exist) {
504 if (bt_hs_on) {
505 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
506 "[BTCoex], SCO + PAN(HS)\n");
507 BTC_TRACE(trace_buf);
508 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
509 } else {
510 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
511 "[BTCoex], SCO + PAN(EDR)\n");
512 BTC_TRACE(trace_buf);
513 algorithm =
514 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
515 }
516 }
517 } else {
518 if (bt_link_info->hid_exist &&
519 bt_link_info->a2dp_exist) {
520 {
521 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
522 "[BTCoex], HID + A2DP\n");
523 BTC_TRACE(trace_buf);
524 algorithm =
525 BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
526 }
527 } else if (bt_link_info->hid_exist &&
528 bt_link_info->pan_exist) {
529 if (bt_hs_on) {
530 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
531 "[BTCoex], HID + PAN(HS)\n");
532 BTC_TRACE(trace_buf);
533 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
534 } else {
535 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
536 "[BTCoex], HID + PAN(EDR)\n");
537 BTC_TRACE(trace_buf);
538 algorithm =
539 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
540 }
541 } else if (bt_link_info->pan_exist &&
542 bt_link_info->a2dp_exist) {
543 if (bt_hs_on) {
544 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
545 "[BTCoex], A2DP + PAN(HS)\n");
546 BTC_TRACE(trace_buf);
547 algorithm =
548 BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
549 } else {
550 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
551 "[BTCoex], A2DP + PAN(EDR)\n");
552 BTC_TRACE(trace_buf);
553 algorithm =
554 BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
555 }
556 }
557 }
558 } else if (num_of_diff_profile == 3) {
559 if (bt_link_info->sco_exist) {
560 if (bt_link_info->hid_exist &&
561 bt_link_info->a2dp_exist) {
562 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
563 "[BTCoex], SCO + HID + A2DP ==> HID\n");
564 BTC_TRACE(trace_buf);
565 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
566 } else if (bt_link_info->hid_exist &&
567 bt_link_info->pan_exist) {
568 if (bt_hs_on) {
569 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
570 "[BTCoex], SCO + HID + PAN(HS)\n");
571 BTC_TRACE(trace_buf);
572 algorithm =
573 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
574 } else {
575 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
576 "[BTCoex], SCO + HID + PAN(EDR)\n");
577 BTC_TRACE(trace_buf);
578 algorithm =
579 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
580 }
581 } else if (bt_link_info->pan_exist &&
582 bt_link_info->a2dp_exist) {
583 if (bt_hs_on) {
584 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
585 "[BTCoex], SCO + A2DP + PAN(HS)\n");
586 BTC_TRACE(trace_buf);
587 algorithm =
588 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
589 } else {
590 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
591 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
592 BTC_TRACE(trace_buf);
593 algorithm =
594 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
595 }
596 }
597 } else {
598 if (bt_link_info->hid_exist &&
599 bt_link_info->pan_exist &&
600 bt_link_info->a2dp_exist) {
601 if (bt_hs_on) {
602 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
603 "[BTCoex], HID + A2DP + PAN(HS)\n");
604 BTC_TRACE(trace_buf);
605 algorithm =
606 BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
607 } else {
608 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
609 "[BTCoex], HID + A2DP + PAN(EDR)\n");
610 BTC_TRACE(trace_buf);
611 algorithm =
612 BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
613 }
614 }
615 }
616 } else if (num_of_diff_profile >= 3) {
617 if (bt_link_info->sco_exist) {
618 if (bt_link_info->hid_exist &&
619 bt_link_info->pan_exist &&
620 bt_link_info->a2dp_exist) {
621 if (bt_hs_on) {
622 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
623 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
624 BTC_TRACE(trace_buf);
625
626 } else {
627 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
628 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
629 BTC_TRACE(trace_buf);
630 algorithm =
631 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
632 }
633 }
634 }
635 }
636
637 return algorithm;
638 }
639
halbtc8723b2ant_set_fw_dac_swing_level(IN struct btc_coexist * btcoexist,IN u8 dac_swing_lvl)640 void halbtc8723b2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
641 IN u8 dac_swing_lvl)
642 {
643 u8 h2c_parameter[1] = {0};
644
645 /* There are several type of dacswing */
646 /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
647 h2c_parameter[0] = dac_swing_lvl;
648
649 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
650 }
651
halbtc8723b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN u8 dec_bt_pwr_lvl)652 void halbtc8723b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
653 IN u8 dec_bt_pwr_lvl)
654 {
655 u8 h2c_parameter[1] = {0};
656
657 h2c_parameter[0] = dec_bt_pwr_lvl;
658
659 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
660 }
661
halbtc8723b2ant_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 dec_bt_pwr_lvl)662 void halbtc8723b2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
663 IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
664 {
665 coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
666
667 if (!force_exec) {
668 if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
669 return;
670 }
671 halbtc8723b2ant_set_fw_dec_bt_pwr(btcoexist,
672 coex_dm->cur_bt_dec_pwr_lvl);
673
674 coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
675 }
676
halbtc8723b2ant_set_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean enable_auto_report)677 void halbtc8723b2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
678 IN boolean enable_auto_report)
679 {
680 u8 h2c_parameter[1] = {0};
681
682 h2c_parameter[0] = 0;
683
684 if (enable_auto_report)
685 h2c_parameter[0] |= BIT(0);
686
687 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
688 }
689
halbtc8723b2ant_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable_auto_report)690 void halbtc8723b2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
691 IN boolean force_exec, IN boolean enable_auto_report)
692 {
693 coex_dm->cur_bt_auto_report = enable_auto_report;
694
695 if (!force_exec) {
696 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
697 return;
698 }
699 halbtc8723b2ant_set_bt_auto_report(btcoexist,
700 coex_dm->cur_bt_auto_report);
701
702 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
703 }
704
halbtc8723b2ant_fw_dac_swing_lvl(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 fw_dac_swing_lvl)705 void halbtc8723b2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
706 IN boolean force_exec, IN u8 fw_dac_swing_lvl)
707 {
708 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
709
710 if (!force_exec) {
711 if (coex_dm->pre_fw_dac_swing_lvl ==
712 coex_dm->cur_fw_dac_swing_lvl)
713 return;
714 }
715
716 halbtc8723b2ant_set_fw_dac_swing_level(btcoexist,
717 coex_dm->cur_fw_dac_swing_lvl);
718
719 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
720 }
721
halbtc8723b2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist * btcoexist,IN boolean rx_rf_shrink_on)722 void halbtc8723b2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
723 IN boolean rx_rf_shrink_on)
724 {
725 if (rx_rf_shrink_on) {
726 /* Shrink RF Rx LPF corner */
727 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
728 "[BTCoex], Shrink RF Rx LPF corner!!\n");
729 BTC_TRACE(trace_buf);
730 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
731 0xffffc);
732 } else {
733 /* Resume RF Rx LPF corner */
734 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
735 if (btcoexist->initilized) {
736 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
737 "[BTCoex], Resume RF Rx LPF corner!!\n");
738 BTC_TRACE(trace_buf);
739 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
740 0xfffff, coex_dm->bt_rf_0x1e_backup);
741 }
742 }
743 }
744
halbtc8723b2ant_rf_shrink(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rx_rf_shrink_on)745 void halbtc8723b2ant_rf_shrink(IN struct btc_coexist *btcoexist,
746 IN boolean force_exec, IN boolean rx_rf_shrink_on)
747 {
748 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
749
750 if (!force_exec) {
751 if (coex_dm->pre_rf_rx_lpf_shrink ==
752 coex_dm->cur_rf_rx_lpf_shrink)
753 return;
754 }
755 halbtc8723b2ant_set_sw_rf_rx_lpf_corner(btcoexist,
756 coex_dm->cur_rf_rx_lpf_shrink);
757
758 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
759 }
760
halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist * btcoexist,IN boolean low_penalty_ra)761 void halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
762 *btcoexist, IN boolean low_penalty_ra)
763 {
764 u8 h2c_parameter[6] = {0};
765
766 h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
767
768 if (low_penalty_ra) {
769 h2c_parameter[1] |= BIT(0);
770 h2c_parameter[2] =
771 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
772 h2c_parameter[3] = 0xf4; /* MCS7 or OFDM54 */
773 h2c_parameter[4] = 0xf5; /* MCS6 or OFDM48 */
774 h2c_parameter[5] = 0xf6; /* MCS5 or OFDM36 */
775 }
776
777 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
778 }
779
halbtc8723b2ant_low_penalty_ra(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean low_penalty_ra)780 void halbtc8723b2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
781 IN boolean force_exec, IN boolean low_penalty_ra)
782 {
783 coex_dm->cur_low_penalty_ra = low_penalty_ra;
784
785 if (!force_exec) {
786 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
787 return;
788 }
789 halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
790 coex_dm->cur_low_penalty_ra);
791
792 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
793 }
794
halbtc8723b2ant_set_dac_swing_reg(IN struct btc_coexist * btcoexist,IN u32 level)795 void halbtc8723b2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
796 IN u32 level)
797 {
798 u8 val = (u8)level;
799
800 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
801 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
802 BTC_TRACE(trace_buf);
803 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
804 }
805
halbtc8723b2ant_set_sw_full_time_dac_swing(IN struct btc_coexist * btcoexist,IN boolean sw_dac_swing_on,IN u32 sw_dac_swing_lvl)806 void halbtc8723b2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
807 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
808 {
809 if (sw_dac_swing_on)
810 halbtc8723b2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
811 else
812 halbtc8723b2ant_set_dac_swing_reg(btcoexist, 0x18);
813 }
814
815
halbtc8723b2ant_dac_swing(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean dac_swing_on,IN u32 dac_swing_lvl)816 void halbtc8723b2ant_dac_swing(IN struct btc_coexist *btcoexist,
817 IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
818 {
819 coex_dm->cur_dac_swing_on = dac_swing_on;
820 coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
821
822 if (!force_exec) {
823 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
824 (coex_dm->pre_dac_swing_lvl ==
825 coex_dm->cur_dac_swing_lvl))
826 return;
827 }
828 delay_ms(30);
829 halbtc8723b2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
830 dac_swing_lvl);
831
832 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
833 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
834 }
835
halbtc8723b2ant_set_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean adc_back_off)836 void halbtc8723b2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
837 IN boolean adc_back_off)
838 {
839 if (adc_back_off) {
840 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
841 "[BTCoex], BB BackOff Level On!\n");
842 BTC_TRACE(trace_buf);
843 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
844 } else {
845 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
846 "[BTCoex], BB BackOff Level Off!\n");
847 BTC_TRACE(trace_buf);
848 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
849 }
850 }
851
halbtc8723b2ant_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean adc_back_off)852 void halbtc8723b2ant_adc_back_off(IN struct btc_coexist *btcoexist,
853 IN boolean force_exec, IN boolean adc_back_off)
854 {
855 coex_dm->cur_adc_back_off = adc_back_off;
856
857 if (!force_exec) {
858 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
859 return;
860 }
861 halbtc8723b2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
862
863 coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
864 }
865
halbtc8723b2ant_set_agc_table(IN struct btc_coexist * btcoexist,IN boolean agc_table_en)866 void halbtc8723b2ant_set_agc_table(IN struct btc_coexist *btcoexist,
867 IN boolean agc_table_en)
868 {
869 u8 rssi_adjust_val = 0;
870
871 /* =================BB AGC Gain Table */
872 if (agc_table_en) {
873 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
874 "[BTCoex], BB Agc Table On!\n");
875 BTC_TRACE(trace_buf);
876 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001);
877 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001);
878 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001);
879 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001);
880 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001);
881 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001);
882 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001);
883 } else {
884 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
885 "[BTCoex], BB Agc Table Off!\n");
886 BTC_TRACE(trace_buf);
887 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
888 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
889 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
890 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
891 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
892 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
893 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001);
894 }
895
896
897 /* =================RF Gain */
898 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
899 if (agc_table_en) {
900 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
901 "[BTCoex], Agc Table On!\n");
902 BTC_TRACE(trace_buf);
903 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
904 0x38fff);
905 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
906 0x38ffe);
907 } else {
908 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
909 "[BTCoex], Agc Table Off!\n");
910 BTC_TRACE(trace_buf);
911 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
912 0x380c3);
913 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
914 0x28ce6);
915 }
916 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
917
918 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
919 if (agc_table_en) {
920 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
921 "[BTCoex], Agc Table On!\n");
922 BTC_TRACE(trace_buf);
923 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
924 0x38fff);
925 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
926 0x38ffe);
927 } else {
928 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
929 "[BTCoex], Agc Table Off!\n");
930 BTC_TRACE(trace_buf);
931 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
932 0x380c3);
933 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
934 0x28ce6);
935 }
936 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
937
938 /* set rssi_adjust_val for wifi module. */
939 if (agc_table_en)
940 rssi_adjust_val = 8;
941 btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
942 &rssi_adjust_val);
943 }
944
halbtc8723b2ant_agc_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean agc_table_en)945 void halbtc8723b2ant_agc_table(IN struct btc_coexist *btcoexist,
946 IN boolean force_exec, IN boolean agc_table_en)
947 {
948 coex_dm->cur_agc_table_en = agc_table_en;
949
950 if (!force_exec) {
951 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
952 return;
953 }
954 halbtc8723b2ant_set_agc_table(btcoexist, agc_table_en);
955
956 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
957 }
958
halbtc8723b2ant_set_coex_table(IN struct btc_coexist * btcoexist,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)959 void halbtc8723b2ant_set_coex_table(IN struct btc_coexist *btcoexist,
960 IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
961 {
962 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
963
964 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
965
966 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
967
968 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
969 }
970
halbtc8723b2ant_coex_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)971 void halbtc8723b2ant_coex_table(IN struct btc_coexist *btcoexist,
972 IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
973 IN u32 val0x6c8, IN u8 val0x6cc)
974 {
975 coex_dm->cur_val0x6c0 = val0x6c0;
976 coex_dm->cur_val0x6c4 = val0x6c4;
977 coex_dm->cur_val0x6c8 = val0x6c8;
978 coex_dm->cur_val0x6cc = val0x6cc;
979
980 if (!force_exec) {
981 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
982 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
983 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
984 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
985 return;
986 }
987 halbtc8723b2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
988 val0x6cc);
989
990 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
991 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
992 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
993 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
994 }
995
halbtc8723b2ant_coex_table_with_type(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)996 void halbtc8723b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
997 IN boolean force_exec, IN u8 type)
998 {
999 coex_sta->coex_table_type = type;
1000
1001 switch (type) {
1002 case 0:
1003 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1004 0x55555555, 0x55555555, 0xffffff, 0x3);
1005 break;
1006 case 1:
1007 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1008 0x55555555, 0x5afa5afa, 0xffffff, 0x3);
1009 break;
1010 case 2:
1011 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1012 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3);
1013 break;
1014 case 3:
1015 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1016 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
1017 break;
1018 case 4:
1019 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1020 0xffffffff, 0xffffffff, 0xffffff, 0x3);
1021 break;
1022 case 5:
1023 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1024 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3);
1025 break;
1026 case 6:
1027 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1028 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3);
1029 break;
1030 case 7:
1031 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1032 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1033 break;
1034 case 8:
1035 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1036 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1037 break;
1038 case 9:
1039 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1040 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1041 break;
1042 case 10:
1043 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1044 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1045 break;
1046 case 11:
1047 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1048 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1049 break;
1050 case 12:
1051 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1052 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1053 break;
1054 case 13:
1055 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1056 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
1057 break;
1058 case 14:
1059 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1060 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
1061 break;
1062 case 15:
1063 halbtc8723b2ant_coex_table(btcoexist, force_exec,
1064 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
1065 break;
1066 default:
1067 break;
1068 }
1069 }
1070
halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean enable)1071 void halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1072 IN boolean enable)
1073 {
1074 u8 h2c_parameter[1] = {0};
1075
1076 if (enable) {
1077 h2c_parameter[0] |= BIT(0); /* function enable */
1078 }
1079
1080 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1081 }
1082
halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist * btcoexist,IN u8 lps_val,IN u8 rpwm_val)1083 void halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
1084 IN u8 lps_val, IN u8 rpwm_val)
1085 {
1086 u8 lps = lps_val;
1087 u8 rpwm = rpwm_val;
1088
1089 btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
1090 btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
1091 }
1092
halbtc8723b2ant_lps_rpwm(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 lps_val,IN u8 rpwm_val)1093 void halbtc8723b2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
1094 IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
1095 {
1096 coex_dm->cur_lps = lps_val;
1097 coex_dm->cur_rpwm = rpwm_val;
1098
1099 if (!force_exec) {
1100 if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
1101 (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
1102 return;
1103 }
1104 halbtc8723b2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
1105
1106 coex_dm->pre_lps = coex_dm->cur_lps;
1107 coex_dm->pre_rpwm = coex_dm->cur_rpwm;
1108 }
1109
halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable)1110 void halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1111 IN boolean force_exec, IN boolean enable)
1112 {
1113 coex_dm->cur_ignore_wlan_act = enable;
1114
1115 if (!force_exec) {
1116 if (coex_dm->pre_ignore_wlan_act ==
1117 coex_dm->cur_ignore_wlan_act)
1118 return;
1119 }
1120 halbtc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1121
1122 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1123 }
1124
halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist * btcoexist,IN u8 byte1,IN u8 byte2,IN u8 byte3,IN u8 byte4,IN u8 byte5)1125 void halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1126 IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1127 {
1128 u8 h2c_parameter[5] = {0};
1129
1130
1131 if ((coex_sta->a2dp_exist) && (coex_sta->hid_exist))
1132 byte5 = byte5 | 0x1;
1133
1134 h2c_parameter[0] = byte1;
1135 h2c_parameter[1] = byte2;
1136 h2c_parameter[2] = byte3;
1137 h2c_parameter[3] = byte4;
1138 h2c_parameter[4] = byte5;
1139
1140 coex_dm->ps_tdma_para[0] = byte1;
1141 coex_dm->ps_tdma_para[1] = byte2;
1142 coex_dm->ps_tdma_para[2] = byte3;
1143 coex_dm->ps_tdma_para[3] = byte4;
1144 coex_dm->ps_tdma_para[4] = byte5;
1145
1146 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1147 }
1148
halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist * btcoexist,IN boolean shrink_rx_lpf,IN boolean low_penalty_ra,IN boolean limited_dig,IN boolean bt_lna_constrain)1149 void halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
1150 IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
1151 IN boolean limited_dig, IN boolean bt_lna_constrain)
1152 {
1153 /*
1154 u32 wifi_bw;
1155
1156 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1157
1158 if(BTC_WIFI_BW_HT40 != wifi_bw)
1159 {
1160 if (shrink_rx_lpf)
1161 shrink_rx_lpf = false;
1162 }
1163 */
1164
1165 /* halbtc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */
1166 halbtc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
1167 }
1168
halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist * btcoexist,IN boolean agc_table_shift,IN boolean adc_back_off,IN boolean sw_dac_swing,IN u32 dac_swing_lvl)1169 void halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
1170 IN boolean agc_table_shift, IN boolean adc_back_off,
1171 IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
1172 {
1173 /* halbtc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
1174 /* halbtc8723b2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
1175 /* halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, dac_swing_lvl); */
1176 }
1177
halbtc8723b2ant_set_ant_path(IN struct btc_coexist * btcoexist,IN u8 ant_pos_type,IN boolean init_hwcfg,IN boolean wifi_off)1178 void halbtc8723b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1179 IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1180 {
1181 struct btc_board_info *board_info = &btcoexist->board_info;
1182 PADAPTER pAdapter = btcoexist->Adapter;
1183 u32 fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0;
1184 boolean pg_ext_switch = false;
1185 boolean use_ext_switch = false;
1186 u8 h2c_parameter[2] = {0};
1187 u32 u32tmp_1[4];
1188
1189 btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch);
1190 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER,
1191 &fw_ver); /* [31:16]=fw ver, [15:0]=fw sub ver */
1192
1193 if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch)
1194 use_ext_switch = true;
1195
1196 if (init_hwcfg) {
1197 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1);
1198 btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
1199 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
1200 btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
1201 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
1202
1203 if (fw_ver >= 0x180000) {
1204 /* Use H2C to set GNT_BT to High to avoid A2DP click */
1205 h2c_parameter[0] = 1;
1206 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
1207 h2c_parameter);
1208
1209 cnt_bt_cal_chk = 0;
1210 while(1)
1211 {
1212 if( pAdapter->bFWReady == FALSE )
1213 {
1214 //RT_TRACE(COMP_INIT , DBG_LOUD, ("halbtc8723b2ant_SetAntPath(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"));
1215 break;
1216 }
1217
1218 if( btcoexist->btc_read_1byte(btcoexist, 0x765) == 0x18 )
1219 break;
1220
1221 cnt_bt_cal_chk++;
1222 if( cnt_bt_cal_chk > 20 )
1223 break;
1224 }
1225 } else
1226 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
1227 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
1228 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1229 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
1230 else
1231 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
1232
1233 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
1234 0x0); /* WiFi TRx Mask off */
1235 /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
1236 /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off */
1237
1238 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
1239 /* tell firmware "no antenna inverse" */
1240 h2c_parameter[0] = 0;
1241 } else {
1242 /* tell firmware "antenna inverse" */
1243 h2c_parameter[0] = 1;
1244 }
1245
1246 if (use_ext_switch) {
1247 /* ext switch type */
1248 h2c_parameter[1] = 1;
1249 } else {
1250 /* int switch type */
1251 h2c_parameter[1] = 0;
1252 }
1253 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter);
1254 } else {
1255 if (fw_ver >= 0x180000) {
1256 /* Use H2C to set GNT_BT to "Control by PTA"*/
1257 h2c_parameter[0] = 0;
1258 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
1259 h2c_parameter);
1260
1261 cnt_bt_cal_chk = 0;
1262 while(1)
1263 {
1264 if( pAdapter->bFWReady == FALSE )
1265 {
1266 //RT_TRACE(COMP_INIT , DBG_LOUD, ("halbtc8723b2ant_SetAntPath(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"));
1267 break;
1268 }
1269
1270 if( btcoexist->btc_read_1byte(btcoexist, 0x765) == 0x0 )
1271 break;
1272
1273 cnt_bt_cal_chk++;
1274 if( cnt_bt_cal_chk > 20 )
1275 break;
1276 }
1277 } else
1278 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0);
1279 }
1280
1281 /* ext switch setting */
1282 if (use_ext_switch) {
1283 if (init_hwcfg) {
1284 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
1285 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1286 u32tmp &= ~BIT(23);
1287 u32tmp |= BIT(24);
1288 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1289 }
1290 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
1291 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1292 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
1293 else
1294 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
1295
1296 switch (ant_pos_type) {
1297 case BTC_ANT_WIFI_AT_MAIN:
1298 btcoexist->btc_write_1byte_bitmask(btcoexist,
1299 0x92c, 0x3,
1300 0x1); /* ext switch main at wifi */
1301 break;
1302 case BTC_ANT_WIFI_AT_AUX:
1303 btcoexist->btc_write_1byte_bitmask(btcoexist,
1304 0x92c, 0x3,
1305 0x2); /* ext switch aux at wifi */
1306 break;
1307 }
1308 } else { /* internal switch */
1309 if (init_hwcfg) {
1310 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
1311 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1312 u32tmp |= BIT(23);
1313 u32tmp &= ~BIT(24);
1314 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1315 }
1316
1317 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
1318 0x0); /* fixed external switch S1->Main, S0->Aux */
1319 switch (ant_pos_type) {
1320 case BTC_ANT_WIFI_AT_MAIN:
1321 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
1322 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1323 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
1324 else
1325 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
1326 break;
1327 case BTC_ANT_WIFI_AT_AUX:
1328 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
1329 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
1330 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
1331 else
1332 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x280);
1333 break;
1334 }
1335 }
1336 }
1337 #if 0
1338 boolean halbtc8723b2ant_CoexSwitchThresCheck(IN struct btc_coexist *btcoexist)
1339 {
1340 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
1341 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1342 u8 wifi_rssi_state1, bt_rssi_state;
1343 u32 vendor;
1344 u8 offset = 0;
1345
1346 btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
1347
1348 /* if (vendor == BTC_VENDOR_LENOVO) */
1349 /* offset = 20; */
1350
1351 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1352 &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
1353 - coex_dm->switch_thres_offset, 0);
1354 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1355 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
1356 coex_dm->switch_thres_offset, 0);
1357
1358 if (BTC_RSSI_LOW(wifi_rssi_state1) || BTC_RSSI_LOW(bt_rssi_state))
1359 return true;
1360
1361 return false;
1362 }
1363 #endif
1364
halbtc8723b2ant_ps_tdma(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean turn_on,IN u8 type)1365 void halbtc8723b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1366 IN boolean force_exec, IN boolean turn_on, IN u8 type)
1367 {
1368 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
1369 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1370 u8 wifi_rssi_state1, bt_rssi_state;
1371 s8 wifi_duration_adjust = 0x0;
1372 u8 psTdmaByte4Modify = 0x0;
1373 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1374
1375 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1376 &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
1377 - coex_dm->switch_thres_offset, 0);
1378 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1379 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
1380 coex_dm->switch_thres_offset, 0);
1381
1382 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1383 "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1384 (force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"), type);
1385 BTC_TRACE(trace_buf);
1386 coex_dm->cur_ps_tdma_on = turn_on;
1387 coex_dm->cur_ps_tdma = type;
1388
1389 if (!(BTC_RSSI_HIGH(wifi_rssi_state1) &&
1390 BTC_RSSI_HIGH(bt_rssi_state)) && turn_on)
1391 /* if (halbtc8723b2ant_CoexSwitchThresCheck(btcoexist) && turn_on) */
1392 {
1393 type = type + 100; /* for WiFi RSSI low or BT RSSI low */
1394 coex_dm->is_switch_to_1dot5_ant = true;
1395 } else
1396 coex_dm->is_switch_to_1dot5_ant = false;
1397
1398
1399 if (!force_exec) {
1400 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1401 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1402 return;
1403 }
1404
1405 if (coex_sta->scan_ap_num <= 5) {
1406 if (coex_sta->a2dp_bit_pool >= 45)
1407 wifi_duration_adjust = -15;
1408 else if (coex_sta->a2dp_bit_pool >= 35)
1409 wifi_duration_adjust = -10;
1410 else
1411 wifi_duration_adjust = 5;
1412 } else if (coex_sta->scan_ap_num <= 20) {
1413 if (coex_sta->a2dp_bit_pool >= 45)
1414 wifi_duration_adjust = -15;
1415 else if (coex_sta->a2dp_bit_pool >= 35)
1416 wifi_duration_adjust = -10;
1417 else
1418 wifi_duration_adjust = 0;
1419 } else if (coex_sta->scan_ap_num <= 40) {
1420 if (coex_sta->a2dp_bit_pool >= 45)
1421 wifi_duration_adjust = -15;
1422 else if (coex_sta->a2dp_bit_pool >= 35)
1423 wifi_duration_adjust = -10;
1424 else
1425 wifi_duration_adjust = -5;
1426 } else {
1427 if (coex_sta->a2dp_bit_pool >= 45)
1428 wifi_duration_adjust = -15;
1429 else if (coex_sta->a2dp_bit_pool >= 35)
1430 wifi_duration_adjust = -10;
1431 else
1432 wifi_duration_adjust = -10;
1433 }
1434
1435 if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist))
1436 psTdmaByte4Modify =
1437 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
1438
1439
1440 if (turn_on) {
1441 switch (type) {
1442 case 1:
1443 default:
1444 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1445 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1446 0x90 | psTdmaByte4Modify);
1447 break;
1448 case 2:
1449 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1450 0x2d + wifi_duration_adjust, 0x03, 0xf1,
1451 0x90 | psTdmaByte4Modify);
1452 break;
1453 case 3:
1454 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1455 0x1c, 0x3, 0xf1, 0x90 |
1456 psTdmaByte4Modify);
1457 break;
1458 case 4:
1459 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1460 0x10, 0x03, 0xf1, 0x90 |
1461 psTdmaByte4Modify);
1462 break;
1463 case 5:
1464 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1465 0x3c + wifi_duration_adjust, 0x3, 0x70,
1466 0x90 | psTdmaByte4Modify);
1467 break;
1468 case 6:
1469 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1470 0x2d + wifi_duration_adjust, 0x3, 0x70,
1471 0x90 | psTdmaByte4Modify);
1472 break;
1473 case 7:
1474 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1475 0x1c, 0x3, 0x70, 0x90 |
1476 psTdmaByte4Modify);
1477 break;
1478 case 8:
1479 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
1480 0x10, 0x3, 0x70, 0x90 |
1481 psTdmaByte4Modify);
1482 break;
1483 case 9:
1484 /*
1485 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1486 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1487 0x90 | psTdmaByte4Modify);
1488 */
1489 /* Bryant Modify for BT no-profile busy case */
1490 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1491 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1492 0x91);
1493
1494 break;
1495 case 10:
1496 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1497 0x2d + wifi_duration_adjust, 0x03, 0xf1,
1498 0x90 | psTdmaByte4Modify);
1499 break;
1500 case 11:
1501 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1502 0x1c, 0x3, 0xf1, 0x90 |
1503 psTdmaByte4Modify);
1504 break;
1505 case 12:
1506 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1507 0x10, 0x3, 0xf1, 0x90 |
1508 psTdmaByte4Modify);
1509 break;
1510 case 13:
1511 /*
1512 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1513 0x3c + wifi_duration_adjust, 0x3, 0x70,
1514 0x90 | psTdmaByte4Modify);
1515 */
1516 /* Bryant Modify for BT no-profile busy case */
1517 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1518 0x3c + wifi_duration_adjust, 0x3, 0x70,
1519 0x91);
1520 break;
1521 case 14:
1522 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1523 0x2d + wifi_duration_adjust, 0x3, 0x70,
1524 0x90 | psTdmaByte4Modify);
1525 break;
1526 case 15:
1527 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1528 0x1c, 0x3, 0x70, 0x90 |
1529 psTdmaByte4Modify);
1530 break;
1531 case 16:
1532 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1533 0x10, 0x3, 0x70, 0x90 |
1534 psTdmaByte4Modify);
1535 break;
1536 case 17:
1537 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
1538 0x2f, 0x2f, 0x60, 0x90);
1539 break;
1540 case 18:
1541 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1542 0x5, 0x5, 0xe1, 0x90);
1543 break;
1544 case 19:
1545 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1546 0x25, 0x25, 0xe1, 0x90);
1547 break;
1548 case 20:
1549 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1550 0x25, 0x25, 0x60, 0x90);
1551 break;
1552 case 21:
1553 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1554 0x15, 0x03, 0x70, 0x90);
1555 break;
1556 case 22:
1557 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1558 0x35, 0x03, 0xf1, 0x90);
1559 break;
1560 case 23:
1561 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1562 0x35, 0x03, 0x71, 0x10);
1563 break;
1564
1565 case 33:
1566 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1567 0x1c, 0x3, 0xf1, 0x91);
1568
1569 break;
1570 case 71:
1571 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1572 0x3c + wifi_duration_adjust, 0x03, 0xf1,
1573 0x90);
1574 break;
1575 case 101:
1576 case 105:
1577 case 113:
1578 case 171:
1579 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1580 0x3a + wifi_duration_adjust, 0x03, 0x70,
1581 0x50 | psTdmaByte4Modify);
1582 break;
1583 case 102:
1584 case 106:
1585 case 110:
1586 case 114:
1587 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1588 0x2d + wifi_duration_adjust, 0x03, 0x70,
1589 0x50 | psTdmaByte4Modify);
1590 break;
1591 case 103:
1592 case 107:
1593 case 111:
1594 case 115:
1595 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1596 0x1c, 0x03, 0x70, 0x50 |
1597 psTdmaByte4Modify);
1598 break;
1599 case 104:
1600 case 108:
1601 case 112:
1602 case 116:
1603 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1604 0x10, 0x03, 0x70, 0x50 |
1605 psTdmaByte4Modify);
1606 break;
1607 case 109:
1608 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1609 0x3c, 0x03, 0xf1, 0x90 |
1610 psTdmaByte4Modify);
1611 break;
1612 /* case 113:
1613 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1614 0x3c, 0x03, 0x70, 0x90 |
1615 psTdmaByte4Modify);
1616 break; */
1617 case 121:
1618 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1619 0x15, 0x03, 0x70, 0x90 |
1620 psTdmaByte4Modify);
1621 break;
1622 case 122:
1623 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1624 0x35, 0x03, 0x71, 0x11);
1625 break;
1626 case 123:
1627 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
1628 0x35, 0x03, 0x71, 0x10);
1629 break;
1630 case 133:
1631 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
1632 0x1c, 0x3, 0x70, 0x51);
1633
1634 break;
1635 }
1636 } else {
1637 /* disable PS tdma */
1638 switch (type) {
1639 case 0:
1640 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
1641 0x0, 0x0, 0x40, 0x0);
1642 break;
1643 case 1:
1644 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
1645 0x0, 0x0, 0x48, 0x0);
1646 break;
1647 default:
1648 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
1649 0x0, 0x0, 0x40, 0x0);
1650 break;
1651 }
1652 }
1653
1654 /* update pre state */
1655 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1656 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1657 }
1658
halbtc8723b2ant_ps_tdma_check_for_power_save_state(IN struct btc_coexist * btcoexist,IN boolean new_ps_state)1659 void halbtc8723b2ant_ps_tdma_check_for_power_save_state(
1660 IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
1661 {
1662 u8 lps_mode = 0x0;
1663
1664 btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
1665
1666 if (lps_mode) { /* already under LPS state */
1667 if (new_ps_state) {
1668 /* keep state under LPS, do nothing. */
1669 } else {
1670 /* will leave LPS state, turn off psTdma first */
1671 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1672 1);
1673 }
1674 } else { /* NO PS state */
1675 if (new_ps_state) {
1676 /* will enter LPS state, turn off psTdma first */
1677 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1678 1);
1679 } else {
1680 /* keep state under NO PS state, do nothing. */
1681 }
1682 }
1683 }
1684
halbtc8723b2ant_power_save_state(IN struct btc_coexist * btcoexist,IN u8 ps_type,IN u8 lps_val,IN u8 rpwm_val)1685 void halbtc8723b2ant_power_save_state(IN struct btc_coexist *btcoexist,
1686 IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
1687 {
1688 boolean low_pwr_disable = false;
1689
1690 switch (ps_type) {
1691 case BTC_PS_WIFI_NATIVE:
1692 /* recover to original 32k low power setting */
1693 low_pwr_disable = false;
1694 btcoexist->btc_set(btcoexist,
1695 BTC_SET_ACT_DISABLE_LOW_POWER,
1696 &low_pwr_disable);
1697 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
1698 NULL);
1699 coex_sta->force_lps_on = false;
1700 break;
1701 case BTC_PS_LPS_ON:
1702 halbtc8723b2ant_ps_tdma_check_for_power_save_state(
1703 btcoexist, true);
1704 halbtc8723b2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
1705 lps_val, rpwm_val);
1706 /* when coex force to enter LPS, do not enter 32k low power. */
1707 low_pwr_disable = true;
1708 btcoexist->btc_set(btcoexist,
1709 BTC_SET_ACT_DISABLE_LOW_POWER,
1710 &low_pwr_disable);
1711 /* power save must executed before psTdma. */
1712 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
1713 NULL);
1714 coex_sta->force_lps_on = true;
1715 break;
1716 case BTC_PS_LPS_OFF:
1717 halbtc8723b2ant_ps_tdma_check_for_power_save_state(
1718 btcoexist, false);
1719 btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
1720 NULL);
1721 coex_sta->force_lps_on = false;
1722 break;
1723 default:
1724 break;
1725 }
1726 }
1727
1728
halbtc8723b2ant_coex_all_off(IN struct btc_coexist * btcoexist)1729 void halbtc8723b2ant_coex_all_off(IN struct btc_coexist *btcoexist)
1730 {
1731 /* fw all off */
1732 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1733 0x0);
1734 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1735 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1736 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1737
1738 /* sw all off */
1739 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1740 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1741
1742 /* hw all off */
1743 /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
1744 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1745 }
1746
halbtc8723b2ant_init_coex_dm(IN struct btc_coexist * btcoexist)1747 void halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
1748 {
1749 /* force to reset coex mechanism */
1750 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1751
1752 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1753 0x0);
1754 halbtc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1755 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1756 halbtc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
1757
1758 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1759 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1760
1761 coex_sta->pop_event_cnt = 0;
1762
1763 }
1764
halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist * btcoexist)1765 void halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
1766 {
1767 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
1768 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
1769 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1770 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
1771 boolean wifi_connected = false;
1772 boolean low_pwr_disable = true;
1773 boolean scan = false, link = false, roam = false;
1774 boolean wifi_busy = false;
1775
1776
1777 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1778 &prewifi_rssi_state, 2, 15, 0);
1779 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1780 &prewifi_rssi_state1, 2,
1781 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
1782 coex_dm->switch_thres_offset, 0);
1783 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1784 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
1785 coex_dm->switch_thres_offset, 0);
1786
1787 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1788 &low_pwr_disable);
1789 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1790 &wifi_connected);
1791
1792 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
1793 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
1794 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
1795 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1796
1797 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1798 0x0);
1799
1800 if (coex_sta->bt_abnormal_scan) {
1801 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
1802 23);
1803 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
1804 } else if (scan || link || roam) {
1805 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1806 "[BTCoex], Wifi link process + BT Inq/Page!!\n");
1807 BTC_TRACE(trace_buf);
1808 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1809 7);
1810 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1811 } else if (wifi_connected) {
1812 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1813 "[BTCoex], Wifi connected + BT Inq/Page!!\n");
1814 BTC_TRACE(trace_buf);
1815 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
1816 7);
1817
1818 if (wifi_busy)
1819 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1820 else
1821 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
1822 } else {
1823 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1824 "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
1825 BTC_TRACE(trace_buf);
1826 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1827 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1828 }
1829
1830 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1831 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1832
1833 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1834 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1835 /*
1836 coex_dm->need_recover0x948 = true;
1837 coex_dm->backup0x948 = btcoexist->btc_read_4byte(btcoexist, 0x948);
1838
1839 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_AUX, false, false);
1840 */
1841 }
1842
1843
halbtc8723b2ant_action_wifi_link_process(IN struct btc_coexist * btcoexist)1844 void halbtc8723b2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
1845 {
1846 u32 u32tmp;
1847 u8 u8tmpa, u8tmpb;
1848
1849 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 15);
1850 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
1851
1852 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1853 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1854
1855
1856 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
1857 u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
1858 u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
1859
1860 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1861 "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
1862 u32tmp, u8tmpa, u8tmpb);
1863 BTC_TRACE(trace_buf);
1864 }
1865
halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist * btcoexist)1866 boolean halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist
1867 *btcoexist)
1868 {
1869 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
1870 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
1871 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
1872 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
1873 u8 ap_num = 0;
1874
1875 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1876 &prewifi_rssi_state, 2, 15, 0);
1877 /* wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-coex_dm->switch_thres_offset-coex_dm->switch_thres_offset, 0); */
1878 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
1879 &prewifi_rssi_state1, 2,
1880 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
1881 coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
1882 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
1883 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
1884 coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
1885
1886 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
1887
1888 /* define the office environment */
1889 if (BTC_RSSI_HIGH(wifi_rssi_state1) &&
1890 (coex_sta->hid_exist == true) &&
1891 (coex_sta->a2dp_exist == true)) {
1892
1893 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1894 "[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n");
1895 BTC_TRACE(trace_buf);
1896
1897 halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x6);
1898 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1899
1900 /* sw all off */
1901 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
1902 false);
1903 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
1904 0x18);
1905
1906 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1907
1908 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
1909 0x0, 0x0);
1910 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1911
1912 return true;
1913 } else {
1914 halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x18);
1915 return false;
1916 }
1917
1918
1919 }
1920
1921
1922
halbtc8723b2ant_is_common_action(IN struct btc_coexist * btcoexist)1923 boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist)
1924 {
1925 boolean common = false, wifi_connected = false, wifi_busy = false;
1926 boolean bt_hs_on = false, low_pwr_disable = false;
1927 boolean asus_8723b = false;
1928
1929 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1930 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1931 &wifi_connected);
1932 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1933
1934 if (!wifi_connected) {
1935 low_pwr_disable = false;
1936 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1937 &low_pwr_disable);
1938 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
1939 0x8);
1940
1941 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1942 "[BTCoex], Wifi non-connected idle!!\n");
1943 BTC_TRACE(trace_buf);
1944
1945 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
1946 0x0);
1947 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1948
1949 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
1950 0x0, 0x0);
1951 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1952 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1953 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1954
1955 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
1956 false);
1957 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
1958 0x18);
1959
1960 common = true;
1961 } else {
1962 if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1963 coex_dm->bt_status) {
1964 low_pwr_disable = false;
1965 btcoexist->btc_set(btcoexist,
1966 BTC_SET_ACT_DISABLE_LOW_POWER,
1967 &low_pwr_disable);
1968 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
1969 false, false, 0x8);
1970
1971 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1972 "[BTCoex], Wifi connected + BT non connected-idle!!\n");
1973 BTC_TRACE(trace_buf);
1974
1975 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
1976 0xfffff, 0x0);
1977 halbtc8723b2ant_coex_table_with_type(btcoexist,
1978 NORMAL_EXEC, 0);
1979
1980 halbtc8723b2ant_power_save_state(btcoexist,
1981 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1982 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1983 1);
1984 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1985 0xb);
1986 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1987
1988 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
1989 false);
1990 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
1991 false, 0x18);
1992
1993 common = true;
1994 } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE ==
1995 coex_dm->bt_status) {
1996 low_pwr_disable = true;
1997 btcoexist->btc_set(btcoexist,
1998 BTC_SET_ACT_DISABLE_LOW_POWER,
1999 &low_pwr_disable);
2000
2001 if (bt_hs_on)
2002 return false;
2003 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2004 "[BTCoex], Wifi connected + BT connected-idle!!\n");
2005 BTC_TRACE(trace_buf);
2006 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
2007 false, false, 0x8);
2008
2009 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
2010 0xfffff, 0x0);
2011 halbtc8723b2ant_coex_table_with_type(btcoexist,
2012 NORMAL_EXEC, 0);
2013
2014 halbtc8723b2ant_power_save_state(btcoexist,
2015 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2016 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
2017 1);
2018 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
2019 0xb);
2020 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2021
2022 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
2023 false, false);
2024 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
2025 false, 0x18);
2026
2027 common = true;
2028 } else {
2029 low_pwr_disable = true;
2030 btcoexist->btc_set(btcoexist,
2031 BTC_SET_ACT_DISABLE_LOW_POWER,
2032 &low_pwr_disable);
2033
2034 if (wifi_busy) {
2035 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2036 "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
2037 BTC_TRACE(trace_buf);
2038 /* btcoexist->btc_get(btcoexist,
2039 BTC_GET_BL_IS_ASUS_8723B, &asus_8723b);
2040 if (!asus_8723b)
2041 common = false;
2042 else
2043 common = halbtc8723b2ant_action_wifi_idle_process(
2044 btcoexist); */
2045 common = false;
2046 } else {
2047 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2048 "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
2049 BTC_TRACE(trace_buf);
2050 /* common = false; */
2051 common = halbtc8723b2ant_action_wifi_idle_process(
2052 btcoexist);
2053 }
2054 }
2055 }
2056
2057 return common;
2058 }
halbtc8723b2ant_tdma_duration_adjust(IN struct btc_coexist * btcoexist,IN boolean sco_hid,IN boolean tx_pause,IN u8 max_interval)2059 void halbtc8723b2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
2060 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
2061 {
2062 static s32 up, dn, m, n, wait_count;
2063 s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
2064 u8 retry_count = 0;
2065
2066 if (!coex_dm->auto_tdma_adjust) {
2067 coex_dm->auto_tdma_adjust = true;
2068 {
2069 if (sco_hid) {
2070 if (tx_pause) {
2071 if (max_interval == 1) {
2072 halbtc8723b2ant_ps_tdma(
2073 btcoexist, NORMAL_EXEC,
2074 true, 13);
2075 coex_dm->ps_tdma_du_adj_type =
2076 13;
2077 } else if (max_interval == 2) {
2078 halbtc8723b2ant_ps_tdma(
2079 btcoexist, NORMAL_EXEC,
2080 true, 14);
2081 coex_dm->ps_tdma_du_adj_type =
2082 14;
2083 } else if (max_interval == 3) {
2084 halbtc8723b2ant_ps_tdma(
2085 btcoexist, NORMAL_EXEC,
2086 true, 15);
2087 coex_dm->ps_tdma_du_adj_type =
2088 15;
2089 } else {
2090 halbtc8723b2ant_ps_tdma(
2091 btcoexist, NORMAL_EXEC,
2092 true, 15);
2093 coex_dm->ps_tdma_du_adj_type =
2094 15;
2095 }
2096 } else {
2097 if (max_interval == 1) {
2098 halbtc8723b2ant_ps_tdma(
2099 btcoexist, NORMAL_EXEC,
2100 true, 9);
2101 coex_dm->ps_tdma_du_adj_type =
2102 9;
2103 } else if (max_interval == 2) {
2104 halbtc8723b2ant_ps_tdma(
2105 btcoexist, NORMAL_EXEC,
2106 true, 10);
2107 coex_dm->ps_tdma_du_adj_type =
2108 10;
2109 } else if (max_interval == 3) {
2110 halbtc8723b2ant_ps_tdma(
2111 btcoexist, NORMAL_EXEC,
2112 true, 11);
2113 coex_dm->ps_tdma_du_adj_type =
2114 11;
2115 } else {
2116 halbtc8723b2ant_ps_tdma(
2117 btcoexist, NORMAL_EXEC,
2118 true, 11);
2119 coex_dm->ps_tdma_du_adj_type =
2120 11;
2121 }
2122 }
2123 } else {
2124 if (tx_pause) {
2125 if (max_interval == 1) {
2126 halbtc8723b2ant_ps_tdma(
2127 btcoexist, NORMAL_EXEC,
2128 true, 5);
2129 coex_dm->ps_tdma_du_adj_type =
2130 5;
2131 } else if (max_interval == 2) {
2132 halbtc8723b2ant_ps_tdma(
2133 btcoexist, NORMAL_EXEC,
2134 true, 6);
2135 coex_dm->ps_tdma_du_adj_type =
2136 6;
2137 } else if (max_interval == 3) {
2138 halbtc8723b2ant_ps_tdma(
2139 btcoexist, NORMAL_EXEC,
2140 true, 7);
2141 coex_dm->ps_tdma_du_adj_type =
2142 7;
2143 } else {
2144 halbtc8723b2ant_ps_tdma(
2145 btcoexist, NORMAL_EXEC,
2146 true, 7);
2147 coex_dm->ps_tdma_du_adj_type =
2148 7;
2149 }
2150 } else {
2151 if (max_interval == 1) {
2152 halbtc8723b2ant_ps_tdma(
2153 btcoexist, NORMAL_EXEC,
2154 true, 1);
2155 coex_dm->ps_tdma_du_adj_type =
2156 1;
2157 } else if (max_interval == 2) {
2158 halbtc8723b2ant_ps_tdma(
2159 btcoexist, NORMAL_EXEC,
2160 true, 2);
2161 coex_dm->ps_tdma_du_adj_type =
2162 2;
2163 } else if (max_interval == 3) {
2164 halbtc8723b2ant_ps_tdma(
2165 btcoexist, NORMAL_EXEC,
2166 true, 3);
2167 coex_dm->ps_tdma_du_adj_type =
2168 3;
2169 } else {
2170 halbtc8723b2ant_ps_tdma(
2171 btcoexist, NORMAL_EXEC,
2172 true, 3);
2173 coex_dm->ps_tdma_du_adj_type =
2174 3;
2175 }
2176 }
2177 }
2178 }
2179 /* ============ */
2180 up = 0;
2181 dn = 0;
2182 m = 1;
2183 n = 3;
2184 result = 0;
2185 wait_count = 0;
2186 } else {
2187 /* accquire the BT TRx retry count from BT_Info byte2 */
2188 retry_count = coex_sta->bt_retry_cnt;
2189
2190 if ((coex_sta->low_priority_tx) > 1050 ||
2191 (coex_sta->low_priority_rx) > 1250)
2192 retry_count++;
2193
2194 result = 0;
2195 wait_count++;
2196
2197 if (retry_count ==
2198 0) { /* no retry in the last 2-second duration */
2199 up++;
2200 dn--;
2201
2202 if (dn <= 0)
2203 dn = 0;
2204
2205 if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
2206 wait_count = 0;
2207 n = 3;
2208 up = 0;
2209 dn = 0;
2210 result = 1;
2211 }
2212 } else if (retry_count <=
2213 3) { /* <=3 retry in the last 2-second duration */
2214 up--;
2215 dn++;
2216
2217 if (up <= 0)
2218 up = 0;
2219
2220 if (dn == 2) {/* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
2221 if (wait_count <= 2)
2222 m++; /* to avoid loop between the two levels */
2223 else
2224 m = 1;
2225
2226 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2227 m = 20;
2228
2229 n = 3 * m;
2230 up = 0;
2231 dn = 0;
2232 wait_count = 0;
2233 result = -1;
2234 }
2235 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
2236 if (wait_count == 1)
2237 m++; /* to avoid loop between the two levels */
2238 else
2239 m = 1;
2240
2241 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2242 m = 20;
2243
2244 n = 3 * m;
2245 up = 0;
2246 dn = 0;
2247 wait_count = 0;
2248 result = -1;
2249 }
2250
2251 if (max_interval == 1) {
2252 if (tx_pause) {
2253 if (coex_dm->cur_ps_tdma == 71) {
2254 halbtc8723b2ant_ps_tdma(btcoexist,
2255 NORMAL_EXEC, true, 5);
2256 coex_dm->ps_tdma_du_adj_type = 5;
2257 } else if (coex_dm->cur_ps_tdma == 1) {
2258 halbtc8723b2ant_ps_tdma(btcoexist,
2259 NORMAL_EXEC, true, 5);
2260 coex_dm->ps_tdma_du_adj_type = 5;
2261 } else if (coex_dm->cur_ps_tdma == 2) {
2262 halbtc8723b2ant_ps_tdma(btcoexist,
2263 NORMAL_EXEC, true, 6);
2264 coex_dm->ps_tdma_du_adj_type = 6;
2265 } else if (coex_dm->cur_ps_tdma == 3) {
2266 halbtc8723b2ant_ps_tdma(btcoexist,
2267 NORMAL_EXEC, true, 7);
2268 coex_dm->ps_tdma_du_adj_type = 7;
2269 } else if (coex_dm->cur_ps_tdma == 4) {
2270 halbtc8723b2ant_ps_tdma(btcoexist,
2271 NORMAL_EXEC, true, 8);
2272 coex_dm->ps_tdma_du_adj_type = 8;
2273 }
2274 if (coex_dm->cur_ps_tdma == 9) {
2275 halbtc8723b2ant_ps_tdma(btcoexist,
2276 NORMAL_EXEC, true, 13);
2277 coex_dm->ps_tdma_du_adj_type = 13;
2278 } else if (coex_dm->cur_ps_tdma == 10) {
2279 halbtc8723b2ant_ps_tdma(btcoexist,
2280 NORMAL_EXEC, true, 14);
2281 coex_dm->ps_tdma_du_adj_type = 14;
2282 } else if (coex_dm->cur_ps_tdma == 11) {
2283 halbtc8723b2ant_ps_tdma(btcoexist,
2284 NORMAL_EXEC, true, 15);
2285 coex_dm->ps_tdma_du_adj_type = 15;
2286 } else if (coex_dm->cur_ps_tdma == 12) {
2287 halbtc8723b2ant_ps_tdma(btcoexist,
2288 NORMAL_EXEC, true, 16);
2289 coex_dm->ps_tdma_du_adj_type = 16;
2290 }
2291
2292 if (result == -1) {
2293 if (coex_dm->cur_ps_tdma == 5) {
2294 halbtc8723b2ant_ps_tdma(
2295 btcoexist, NORMAL_EXEC,
2296 true, 6);
2297 coex_dm->ps_tdma_du_adj_type =
2298 6;
2299 } else if (coex_dm->cur_ps_tdma == 6) {
2300 halbtc8723b2ant_ps_tdma(
2301 btcoexist, NORMAL_EXEC,
2302 true, 7);
2303 coex_dm->ps_tdma_du_adj_type =
2304 7;
2305 } else if (coex_dm->cur_ps_tdma == 7) {
2306 halbtc8723b2ant_ps_tdma(
2307 btcoexist, NORMAL_EXEC,
2308 true, 8);
2309 coex_dm->ps_tdma_du_adj_type =
2310 8;
2311 } else if (coex_dm->cur_ps_tdma == 13) {
2312 halbtc8723b2ant_ps_tdma(
2313 btcoexist, NORMAL_EXEC,
2314 true, 14);
2315 coex_dm->ps_tdma_du_adj_type =
2316 14;
2317 } else if (coex_dm->cur_ps_tdma == 14) {
2318 halbtc8723b2ant_ps_tdma(
2319 btcoexist, NORMAL_EXEC,
2320 true, 15);
2321 coex_dm->ps_tdma_du_adj_type =
2322 15;
2323 } else if (coex_dm->cur_ps_tdma == 15) {
2324 halbtc8723b2ant_ps_tdma(
2325 btcoexist, NORMAL_EXEC,
2326 true, 16);
2327 coex_dm->ps_tdma_du_adj_type =
2328 16;
2329 }
2330 } else if (result == 1) {
2331 if (coex_dm->cur_ps_tdma == 8) {
2332 halbtc8723b2ant_ps_tdma(
2333 btcoexist, NORMAL_EXEC,
2334 true, 7);
2335 coex_dm->ps_tdma_du_adj_type =
2336 7;
2337 } else if (coex_dm->cur_ps_tdma == 7) {
2338 halbtc8723b2ant_ps_tdma(
2339 btcoexist, NORMAL_EXEC,
2340 true, 6);
2341 coex_dm->ps_tdma_du_adj_type =
2342 6;
2343 } else if (coex_dm->cur_ps_tdma == 6) {
2344 halbtc8723b2ant_ps_tdma(
2345 btcoexist, NORMAL_EXEC,
2346 true, 5);
2347 coex_dm->ps_tdma_du_adj_type =
2348 5;
2349 } else if (coex_dm->cur_ps_tdma == 16) {
2350 halbtc8723b2ant_ps_tdma(
2351 btcoexist, NORMAL_EXEC,
2352 true, 15);
2353 coex_dm->ps_tdma_du_adj_type =
2354 15;
2355 } else if (coex_dm->cur_ps_tdma == 15) {
2356 halbtc8723b2ant_ps_tdma(
2357 btcoexist, NORMAL_EXEC,
2358 true, 14);
2359 coex_dm->ps_tdma_du_adj_type =
2360 14;
2361 } else if (coex_dm->cur_ps_tdma == 14) {
2362 halbtc8723b2ant_ps_tdma(
2363 btcoexist, NORMAL_EXEC,
2364 true, 13);
2365 coex_dm->ps_tdma_du_adj_type =
2366 13;
2367 }
2368 }
2369 } else {
2370 if (coex_dm->cur_ps_tdma == 5) {
2371 halbtc8723b2ant_ps_tdma(btcoexist,
2372 NORMAL_EXEC, true, 71);
2373 coex_dm->ps_tdma_du_adj_type = 71;
2374 } else if (coex_dm->cur_ps_tdma == 6) {
2375 halbtc8723b2ant_ps_tdma(btcoexist,
2376 NORMAL_EXEC, true, 2);
2377 coex_dm->ps_tdma_du_adj_type = 2;
2378 } else if (coex_dm->cur_ps_tdma == 7) {
2379 halbtc8723b2ant_ps_tdma(btcoexist,
2380 NORMAL_EXEC, true, 3);
2381 coex_dm->ps_tdma_du_adj_type = 3;
2382 } else if (coex_dm->cur_ps_tdma == 8) {
2383 halbtc8723b2ant_ps_tdma(btcoexist,
2384 NORMAL_EXEC, true, 4);
2385 coex_dm->ps_tdma_du_adj_type = 4;
2386 }
2387 if (coex_dm->cur_ps_tdma == 13) {
2388 halbtc8723b2ant_ps_tdma(btcoexist,
2389 NORMAL_EXEC, true, 9);
2390 coex_dm->ps_tdma_du_adj_type = 9;
2391 } else if (coex_dm->cur_ps_tdma == 14) {
2392 halbtc8723b2ant_ps_tdma(btcoexist,
2393 NORMAL_EXEC, true, 10);
2394 coex_dm->ps_tdma_du_adj_type = 10;
2395 } else if (coex_dm->cur_ps_tdma == 15) {
2396 halbtc8723b2ant_ps_tdma(btcoexist,
2397 NORMAL_EXEC, true, 11);
2398 coex_dm->ps_tdma_du_adj_type = 11;
2399 } else if (coex_dm->cur_ps_tdma == 16) {
2400 halbtc8723b2ant_ps_tdma(btcoexist,
2401 NORMAL_EXEC, true, 12);
2402 coex_dm->ps_tdma_du_adj_type = 12;
2403 }
2404
2405 if (result == -1) {
2406 if (coex_dm->cur_ps_tdma == 71) {
2407 halbtc8723b2ant_ps_tdma(
2408 btcoexist, NORMAL_EXEC,
2409 true, 1);
2410 coex_dm->ps_tdma_du_adj_type =
2411 1;
2412 } else if (coex_dm->cur_ps_tdma == 1) {
2413 halbtc8723b2ant_ps_tdma(
2414 btcoexist, NORMAL_EXEC,
2415 true, 2);
2416 coex_dm->ps_tdma_du_adj_type =
2417 2;
2418 } else if (coex_dm->cur_ps_tdma == 2) {
2419 halbtc8723b2ant_ps_tdma(
2420 btcoexist, NORMAL_EXEC,
2421 true, 3);
2422 coex_dm->ps_tdma_du_adj_type =
2423 3;
2424 } else if (coex_dm->cur_ps_tdma == 3) {
2425 halbtc8723b2ant_ps_tdma(
2426 btcoexist, NORMAL_EXEC,
2427 true, 4);
2428 coex_dm->ps_tdma_du_adj_type =
2429 4;
2430 } else if (coex_dm->cur_ps_tdma == 9) {
2431 halbtc8723b2ant_ps_tdma(
2432 btcoexist, NORMAL_EXEC,
2433 true, 10);
2434 coex_dm->ps_tdma_du_adj_type =
2435 10;
2436 } else if (coex_dm->cur_ps_tdma == 10) {
2437 halbtc8723b2ant_ps_tdma(
2438 btcoexist, NORMAL_EXEC,
2439 true, 11);
2440 coex_dm->ps_tdma_du_adj_type =
2441 11;
2442 } else if (coex_dm->cur_ps_tdma == 11) {
2443 halbtc8723b2ant_ps_tdma(
2444 btcoexist, NORMAL_EXEC,
2445 true, 12);
2446 coex_dm->ps_tdma_du_adj_type =
2447 12;
2448 }
2449 } else if (result == 1) {
2450 if (coex_dm->cur_ps_tdma == 4) {
2451 halbtc8723b2ant_ps_tdma(
2452 btcoexist, NORMAL_EXEC,
2453 true, 3);
2454 coex_dm->ps_tdma_du_adj_type =
2455 3;
2456 } else if (coex_dm->cur_ps_tdma == 3) {
2457 halbtc8723b2ant_ps_tdma(
2458 btcoexist, NORMAL_EXEC,
2459 true, 2);
2460 coex_dm->ps_tdma_du_adj_type =
2461 2;
2462 } else if (coex_dm->cur_ps_tdma == 2) {
2463 halbtc8723b2ant_ps_tdma(
2464 btcoexist, NORMAL_EXEC,
2465 true, 1);
2466 coex_dm->ps_tdma_du_adj_type =
2467 1;
2468 } else if (coex_dm->cur_ps_tdma == 1) {
2469 halbtc8723b2ant_ps_tdma(
2470 btcoexist, NORMAL_EXEC,
2471 true, 71);
2472 coex_dm->ps_tdma_du_adj_type =
2473 71;
2474 } else if (coex_dm->cur_ps_tdma == 12) {
2475 halbtc8723b2ant_ps_tdma(
2476 btcoexist, NORMAL_EXEC,
2477 true, 11);
2478 coex_dm->ps_tdma_du_adj_type =
2479 11;
2480 } else if (coex_dm->cur_ps_tdma == 11) {
2481 halbtc8723b2ant_ps_tdma(
2482 btcoexist, NORMAL_EXEC,
2483 true, 10);
2484 coex_dm->ps_tdma_du_adj_type =
2485 10;
2486 } else if (coex_dm->cur_ps_tdma == 10) {
2487 halbtc8723b2ant_ps_tdma(
2488 btcoexist, NORMAL_EXEC,
2489 true, 9);
2490 coex_dm->ps_tdma_du_adj_type =
2491 9;
2492 }
2493 }
2494 }
2495 } else if (max_interval == 2) {
2496 if (tx_pause) {
2497 if (coex_dm->cur_ps_tdma == 1) {
2498 halbtc8723b2ant_ps_tdma(btcoexist,
2499 NORMAL_EXEC, true, 6);
2500 coex_dm->ps_tdma_du_adj_type = 6;
2501 } else if (coex_dm->cur_ps_tdma == 2) {
2502 halbtc8723b2ant_ps_tdma(btcoexist,
2503 NORMAL_EXEC, true, 6);
2504 coex_dm->ps_tdma_du_adj_type = 6;
2505 } else if (coex_dm->cur_ps_tdma == 3) {
2506 halbtc8723b2ant_ps_tdma(btcoexist,
2507 NORMAL_EXEC, true, 7);
2508 coex_dm->ps_tdma_du_adj_type = 7;
2509 } else if (coex_dm->cur_ps_tdma == 4) {
2510 halbtc8723b2ant_ps_tdma(btcoexist,
2511 NORMAL_EXEC, true, 8);
2512 coex_dm->ps_tdma_du_adj_type = 8;
2513 }
2514 if (coex_dm->cur_ps_tdma == 9) {
2515 halbtc8723b2ant_ps_tdma(btcoexist,
2516 NORMAL_EXEC, true, 14);
2517 coex_dm->ps_tdma_du_adj_type = 14;
2518 } else if (coex_dm->cur_ps_tdma == 10) {
2519 halbtc8723b2ant_ps_tdma(btcoexist,
2520 NORMAL_EXEC, true, 14);
2521 coex_dm->ps_tdma_du_adj_type = 14;
2522 } else if (coex_dm->cur_ps_tdma == 11) {
2523 halbtc8723b2ant_ps_tdma(btcoexist,
2524 NORMAL_EXEC, true, 15);
2525 coex_dm->ps_tdma_du_adj_type = 15;
2526 } else if (coex_dm->cur_ps_tdma == 12) {
2527 halbtc8723b2ant_ps_tdma(btcoexist,
2528 NORMAL_EXEC, true, 16);
2529 coex_dm->ps_tdma_du_adj_type = 16;
2530 }
2531 if (result == -1) {
2532 if (coex_dm->cur_ps_tdma == 5) {
2533 halbtc8723b2ant_ps_tdma(
2534 btcoexist, NORMAL_EXEC,
2535 true, 6);
2536 coex_dm->ps_tdma_du_adj_type =
2537 6;
2538 } else if (coex_dm->cur_ps_tdma == 6) {
2539 halbtc8723b2ant_ps_tdma(
2540 btcoexist, NORMAL_EXEC,
2541 true, 7);
2542 coex_dm->ps_tdma_du_adj_type =
2543 7;
2544 } else if (coex_dm->cur_ps_tdma == 7) {
2545 halbtc8723b2ant_ps_tdma(
2546 btcoexist, NORMAL_EXEC,
2547 true, 8);
2548 coex_dm->ps_tdma_du_adj_type =
2549 8;
2550 } else if (coex_dm->cur_ps_tdma == 13) {
2551 halbtc8723b2ant_ps_tdma(
2552 btcoexist, NORMAL_EXEC,
2553 true, 14);
2554 coex_dm->ps_tdma_du_adj_type =
2555 14;
2556 } else if (coex_dm->cur_ps_tdma == 14) {
2557 halbtc8723b2ant_ps_tdma(
2558 btcoexist, NORMAL_EXEC,
2559 true, 15);
2560 coex_dm->ps_tdma_du_adj_type =
2561 15;
2562 } else if (coex_dm->cur_ps_tdma == 15) {
2563 halbtc8723b2ant_ps_tdma(
2564 btcoexist, NORMAL_EXEC,
2565 true, 16);
2566 coex_dm->ps_tdma_du_adj_type =
2567 16;
2568 }
2569 } else if (result == 1) {
2570 if (coex_dm->cur_ps_tdma == 8) {
2571 halbtc8723b2ant_ps_tdma(
2572 btcoexist, NORMAL_EXEC,
2573 true, 7);
2574 coex_dm->ps_tdma_du_adj_type =
2575 7;
2576 } else if (coex_dm->cur_ps_tdma == 7) {
2577 halbtc8723b2ant_ps_tdma(
2578 btcoexist, NORMAL_EXEC,
2579 true, 6);
2580 coex_dm->ps_tdma_du_adj_type =
2581 6;
2582 } else if (coex_dm->cur_ps_tdma == 6) {
2583 halbtc8723b2ant_ps_tdma(
2584 btcoexist, NORMAL_EXEC,
2585 true, 6);
2586 coex_dm->ps_tdma_du_adj_type =
2587 6;
2588 } else if (coex_dm->cur_ps_tdma == 16) {
2589 halbtc8723b2ant_ps_tdma(
2590 btcoexist, NORMAL_EXEC,
2591 true, 15);
2592 coex_dm->ps_tdma_du_adj_type =
2593 15;
2594 } else if (coex_dm->cur_ps_tdma == 15) {
2595 halbtc8723b2ant_ps_tdma(
2596 btcoexist, NORMAL_EXEC,
2597 true, 14);
2598 coex_dm->ps_tdma_du_adj_type =
2599 14;
2600 } else if (coex_dm->cur_ps_tdma == 14) {
2601 halbtc8723b2ant_ps_tdma(
2602 btcoexist, NORMAL_EXEC,
2603 true, 14);
2604 coex_dm->ps_tdma_du_adj_type =
2605 14;
2606 }
2607 }
2608 } else {
2609 if (coex_dm->cur_ps_tdma == 5) {
2610 halbtc8723b2ant_ps_tdma(btcoexist,
2611 NORMAL_EXEC, true, 2);
2612 coex_dm->ps_tdma_du_adj_type = 2;
2613 } else if (coex_dm->cur_ps_tdma == 6) {
2614 halbtc8723b2ant_ps_tdma(btcoexist,
2615 NORMAL_EXEC, true, 2);
2616 coex_dm->ps_tdma_du_adj_type = 2;
2617 } else if (coex_dm->cur_ps_tdma == 7) {
2618 halbtc8723b2ant_ps_tdma(btcoexist,
2619 NORMAL_EXEC, true, 3);
2620 coex_dm->ps_tdma_du_adj_type = 3;
2621 } else if (coex_dm->cur_ps_tdma == 8) {
2622 halbtc8723b2ant_ps_tdma(btcoexist,
2623 NORMAL_EXEC, true, 4);
2624 coex_dm->ps_tdma_du_adj_type = 4;
2625 }
2626 if (coex_dm->cur_ps_tdma == 13) {
2627 halbtc8723b2ant_ps_tdma(btcoexist,
2628 NORMAL_EXEC, true, 10);
2629 coex_dm->ps_tdma_du_adj_type = 10;
2630 } else if (coex_dm->cur_ps_tdma == 14) {
2631 halbtc8723b2ant_ps_tdma(btcoexist,
2632 NORMAL_EXEC, true, 10);
2633 coex_dm->ps_tdma_du_adj_type = 10;
2634 } else if (coex_dm->cur_ps_tdma == 15) {
2635 halbtc8723b2ant_ps_tdma(btcoexist,
2636 NORMAL_EXEC, true, 11);
2637 coex_dm->ps_tdma_du_adj_type = 11;
2638 } else if (coex_dm->cur_ps_tdma == 16) {
2639 halbtc8723b2ant_ps_tdma(btcoexist,
2640 NORMAL_EXEC, true, 12);
2641 coex_dm->ps_tdma_du_adj_type = 12;
2642 }
2643 if (result == -1) {
2644 if (coex_dm->cur_ps_tdma == 1) {
2645 halbtc8723b2ant_ps_tdma(
2646 btcoexist, NORMAL_EXEC,
2647 true, 2);
2648 coex_dm->ps_tdma_du_adj_type =
2649 2;
2650 } else if (coex_dm->cur_ps_tdma == 2) {
2651 halbtc8723b2ant_ps_tdma(
2652 btcoexist, NORMAL_EXEC,
2653 true, 3);
2654 coex_dm->ps_tdma_du_adj_type =
2655 3;
2656 } else if (coex_dm->cur_ps_tdma == 3) {
2657 halbtc8723b2ant_ps_tdma(
2658 btcoexist, NORMAL_EXEC,
2659 true, 4);
2660 coex_dm->ps_tdma_du_adj_type =
2661 4;
2662 } else if (coex_dm->cur_ps_tdma == 9) {
2663 halbtc8723b2ant_ps_tdma(
2664 btcoexist, NORMAL_EXEC,
2665 true, 10);
2666 coex_dm->ps_tdma_du_adj_type =
2667 10;
2668 } else if (coex_dm->cur_ps_tdma == 10) {
2669 halbtc8723b2ant_ps_tdma(
2670 btcoexist, NORMAL_EXEC,
2671 true, 11);
2672 coex_dm->ps_tdma_du_adj_type =
2673 11;
2674 } else if (coex_dm->cur_ps_tdma == 11) {
2675 halbtc8723b2ant_ps_tdma(
2676 btcoexist, NORMAL_EXEC,
2677 true, 12);
2678 coex_dm->ps_tdma_du_adj_type =
2679 12;
2680 }
2681 } else if (result == 1) {
2682 if (coex_dm->cur_ps_tdma == 4) {
2683 halbtc8723b2ant_ps_tdma(
2684 btcoexist, NORMAL_EXEC,
2685 true, 3);
2686 coex_dm->ps_tdma_du_adj_type =
2687 3;
2688 } else if (coex_dm->cur_ps_tdma == 3) {
2689 halbtc8723b2ant_ps_tdma(
2690 btcoexist, NORMAL_EXEC,
2691 true, 2);
2692 coex_dm->ps_tdma_du_adj_type =
2693 2;
2694 } else if (coex_dm->cur_ps_tdma == 2) {
2695 halbtc8723b2ant_ps_tdma(
2696 btcoexist, NORMAL_EXEC,
2697 true, 2);
2698 coex_dm->ps_tdma_du_adj_type =
2699 2;
2700 } else if (coex_dm->cur_ps_tdma == 12) {
2701 halbtc8723b2ant_ps_tdma(
2702 btcoexist, NORMAL_EXEC,
2703 true, 11);
2704 coex_dm->ps_tdma_du_adj_type =
2705 11;
2706 } else if (coex_dm->cur_ps_tdma == 11) {
2707 halbtc8723b2ant_ps_tdma(
2708 btcoexist, NORMAL_EXEC,
2709 true, 10);
2710 coex_dm->ps_tdma_du_adj_type =
2711 10;
2712 } else if (coex_dm->cur_ps_tdma == 10) {
2713 halbtc8723b2ant_ps_tdma(
2714 btcoexist, NORMAL_EXEC,
2715 true, 10);
2716 coex_dm->ps_tdma_du_adj_type =
2717 10;
2718 }
2719 }
2720 }
2721 } else if (max_interval == 3) {
2722 if (tx_pause) {
2723 if (coex_dm->cur_ps_tdma == 1) {
2724 halbtc8723b2ant_ps_tdma(btcoexist,
2725 NORMAL_EXEC, true, 7);
2726 coex_dm->ps_tdma_du_adj_type = 7;
2727 } else if (coex_dm->cur_ps_tdma == 2) {
2728 halbtc8723b2ant_ps_tdma(btcoexist,
2729 NORMAL_EXEC, true, 7);
2730 coex_dm->ps_tdma_du_adj_type = 7;
2731 } else if (coex_dm->cur_ps_tdma == 3) {
2732 halbtc8723b2ant_ps_tdma(btcoexist,
2733 NORMAL_EXEC, true, 7);
2734 coex_dm->ps_tdma_du_adj_type = 7;
2735 } else if (coex_dm->cur_ps_tdma == 4) {
2736 halbtc8723b2ant_ps_tdma(btcoexist,
2737 NORMAL_EXEC, true, 8);
2738 coex_dm->ps_tdma_du_adj_type = 8;
2739 }
2740 if (coex_dm->cur_ps_tdma == 9) {
2741 halbtc8723b2ant_ps_tdma(btcoexist,
2742 NORMAL_EXEC, true, 15);
2743 coex_dm->ps_tdma_du_adj_type = 15;
2744 } else if (coex_dm->cur_ps_tdma == 10) {
2745 halbtc8723b2ant_ps_tdma(btcoexist,
2746 NORMAL_EXEC, true, 15);
2747 coex_dm->ps_tdma_du_adj_type = 15;
2748 } else if (coex_dm->cur_ps_tdma == 11) {
2749 halbtc8723b2ant_ps_tdma(btcoexist,
2750 NORMAL_EXEC, true, 15);
2751 coex_dm->ps_tdma_du_adj_type = 15;
2752 } else if (coex_dm->cur_ps_tdma == 12) {
2753 halbtc8723b2ant_ps_tdma(btcoexist,
2754 NORMAL_EXEC, true, 16);
2755 coex_dm->ps_tdma_du_adj_type = 16;
2756 }
2757 if (result == -1) {
2758 if (coex_dm->cur_ps_tdma == 5) {
2759 halbtc8723b2ant_ps_tdma(
2760 btcoexist, NORMAL_EXEC,
2761 true, 7);
2762 coex_dm->ps_tdma_du_adj_type =
2763 7;
2764 } else if (coex_dm->cur_ps_tdma == 6) {
2765 halbtc8723b2ant_ps_tdma(
2766 btcoexist, NORMAL_EXEC,
2767 true, 7);
2768 coex_dm->ps_tdma_du_adj_type =
2769 7;
2770 } else if (coex_dm->cur_ps_tdma == 7) {
2771 halbtc8723b2ant_ps_tdma(
2772 btcoexist, NORMAL_EXEC,
2773 true, 8);
2774 coex_dm->ps_tdma_du_adj_type =
2775 8;
2776 } else if (coex_dm->cur_ps_tdma == 13) {
2777 halbtc8723b2ant_ps_tdma(
2778 btcoexist, NORMAL_EXEC,
2779 true, 15);
2780 coex_dm->ps_tdma_du_adj_type =
2781 15;
2782 } else if (coex_dm->cur_ps_tdma == 14) {
2783 halbtc8723b2ant_ps_tdma(
2784 btcoexist, NORMAL_EXEC,
2785 true, 15);
2786 coex_dm->ps_tdma_du_adj_type =
2787 15;
2788 } else if (coex_dm->cur_ps_tdma == 15) {
2789 halbtc8723b2ant_ps_tdma(
2790 btcoexist, NORMAL_EXEC,
2791 true, 16);
2792 coex_dm->ps_tdma_du_adj_type =
2793 16;
2794 }
2795 } else if (result == 1) {
2796 if (coex_dm->cur_ps_tdma == 8) {
2797 halbtc8723b2ant_ps_tdma(
2798 btcoexist, NORMAL_EXEC,
2799 true, 7);
2800 coex_dm->ps_tdma_du_adj_type =
2801 7;
2802 } else if (coex_dm->cur_ps_tdma == 7) {
2803 halbtc8723b2ant_ps_tdma(
2804 btcoexist, NORMAL_EXEC,
2805 true, 7);
2806 coex_dm->ps_tdma_du_adj_type =
2807 7;
2808 } else if (coex_dm->cur_ps_tdma == 6) {
2809 halbtc8723b2ant_ps_tdma(
2810 btcoexist, NORMAL_EXEC,
2811 true, 7);
2812 coex_dm->ps_tdma_du_adj_type =
2813 7;
2814 } else if (coex_dm->cur_ps_tdma == 16) {
2815 halbtc8723b2ant_ps_tdma(
2816 btcoexist, NORMAL_EXEC,
2817 true, 15);
2818 coex_dm->ps_tdma_du_adj_type =
2819 15;
2820 } else if (coex_dm->cur_ps_tdma == 15) {
2821 halbtc8723b2ant_ps_tdma(
2822 btcoexist, NORMAL_EXEC,
2823 true, 15);
2824 coex_dm->ps_tdma_du_adj_type =
2825 15;
2826 } else if (coex_dm->cur_ps_tdma == 14) {
2827 halbtc8723b2ant_ps_tdma(
2828 btcoexist, NORMAL_EXEC,
2829 true, 15);
2830 coex_dm->ps_tdma_du_adj_type =
2831 15;
2832 }
2833 }
2834 } else {
2835 if (coex_dm->cur_ps_tdma == 5) {
2836 halbtc8723b2ant_ps_tdma(btcoexist,
2837 NORMAL_EXEC, true, 3);
2838 coex_dm->ps_tdma_du_adj_type = 3;
2839 } else if (coex_dm->cur_ps_tdma == 6) {
2840 halbtc8723b2ant_ps_tdma(btcoexist,
2841 NORMAL_EXEC, true, 3);
2842 coex_dm->ps_tdma_du_adj_type = 3;
2843 } else if (coex_dm->cur_ps_tdma == 7) {
2844 halbtc8723b2ant_ps_tdma(btcoexist,
2845 NORMAL_EXEC, true, 3);
2846 coex_dm->ps_tdma_du_adj_type = 3;
2847 } else if (coex_dm->cur_ps_tdma == 8) {
2848 halbtc8723b2ant_ps_tdma(btcoexist,
2849 NORMAL_EXEC, true, 4);
2850 coex_dm->ps_tdma_du_adj_type = 4;
2851 }
2852 if (coex_dm->cur_ps_tdma == 13) {
2853 halbtc8723b2ant_ps_tdma(btcoexist,
2854 NORMAL_EXEC, true, 11);
2855 coex_dm->ps_tdma_du_adj_type = 11;
2856 } else if (coex_dm->cur_ps_tdma == 14) {
2857 halbtc8723b2ant_ps_tdma(btcoexist,
2858 NORMAL_EXEC, true, 11);
2859 coex_dm->ps_tdma_du_adj_type = 11;
2860 } else if (coex_dm->cur_ps_tdma == 15) {
2861 halbtc8723b2ant_ps_tdma(btcoexist,
2862 NORMAL_EXEC, true, 11);
2863 coex_dm->ps_tdma_du_adj_type = 11;
2864 } else if (coex_dm->cur_ps_tdma == 16) {
2865 halbtc8723b2ant_ps_tdma(btcoexist,
2866 NORMAL_EXEC, true, 12);
2867 coex_dm->ps_tdma_du_adj_type = 12;
2868 }
2869 if (result == -1) {
2870 if (coex_dm->cur_ps_tdma == 1) {
2871 halbtc8723b2ant_ps_tdma(
2872 btcoexist, NORMAL_EXEC,
2873 true, 3);
2874 coex_dm->ps_tdma_du_adj_type =
2875 3;
2876 } else if (coex_dm->cur_ps_tdma == 2) {
2877 halbtc8723b2ant_ps_tdma(
2878 btcoexist, NORMAL_EXEC,
2879 true, 3);
2880 coex_dm->ps_tdma_du_adj_type =
2881 3;
2882 } else if (coex_dm->cur_ps_tdma == 3) {
2883 halbtc8723b2ant_ps_tdma(
2884 btcoexist, NORMAL_EXEC,
2885 true, 4);
2886 coex_dm->ps_tdma_du_adj_type =
2887 4;
2888 } else if (coex_dm->cur_ps_tdma == 9) {
2889 halbtc8723b2ant_ps_tdma(
2890 btcoexist, NORMAL_EXEC,
2891 true, 11);
2892 coex_dm->ps_tdma_du_adj_type =
2893 11;
2894 } else if (coex_dm->cur_ps_tdma == 10) {
2895 halbtc8723b2ant_ps_tdma(
2896 btcoexist, NORMAL_EXEC,
2897 true, 11);
2898 coex_dm->ps_tdma_du_adj_type =
2899 11;
2900 } else if (coex_dm->cur_ps_tdma == 11) {
2901 halbtc8723b2ant_ps_tdma(
2902 btcoexist, NORMAL_EXEC,
2903 true, 12);
2904 coex_dm->ps_tdma_du_adj_type =
2905 12;
2906 }
2907 } else if (result == 1) {
2908 if (coex_dm->cur_ps_tdma == 4) {
2909 halbtc8723b2ant_ps_tdma(
2910 btcoexist, NORMAL_EXEC,
2911 true, 3);
2912 coex_dm->ps_tdma_du_adj_type =
2913 3;
2914 } else if (coex_dm->cur_ps_tdma == 3) {
2915 halbtc8723b2ant_ps_tdma(
2916 btcoexist, NORMAL_EXEC,
2917 true, 3);
2918 coex_dm->ps_tdma_du_adj_type =
2919 3;
2920 } else if (coex_dm->cur_ps_tdma == 2) {
2921 halbtc8723b2ant_ps_tdma(
2922 btcoexist, NORMAL_EXEC,
2923 true, 3);
2924 coex_dm->ps_tdma_du_adj_type =
2925 3;
2926 } else if (coex_dm->cur_ps_tdma == 12) {
2927 halbtc8723b2ant_ps_tdma(
2928 btcoexist, NORMAL_EXEC,
2929 true, 11);
2930 coex_dm->ps_tdma_du_adj_type =
2931 11;
2932 } else if (coex_dm->cur_ps_tdma == 11) {
2933 halbtc8723b2ant_ps_tdma(
2934 btcoexist, NORMAL_EXEC,
2935 true, 11);
2936 coex_dm->ps_tdma_du_adj_type =
2937 11;
2938 } else if (coex_dm->cur_ps_tdma == 10) {
2939 halbtc8723b2ant_ps_tdma(
2940 btcoexist, NORMAL_EXEC,
2941 true, 11);
2942 coex_dm->ps_tdma_du_adj_type =
2943 11;
2944 }
2945 }
2946 }
2947 }
2948 }
2949
2950 /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
2951 /* then we have to adjust it back to the previous record one. */
2952 if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2953 boolean scan = false, link = false, roam = false;
2954 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2955 "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
2956 coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2957 BTC_TRACE(trace_buf);
2958
2959 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2960 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2961 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2962
2963 if (!scan && !link && !roam)
2964 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2965 coex_dm->ps_tdma_du_adj_type);
2966 else {
2967 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2968 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2969 BTC_TRACE(trace_buf);
2970 }
2971 }
2972 }
2973
2974 /* SCO only or SCO+PAN(HS) */
halbtc8723b2ant_action_sco(IN struct btc_coexist * btcoexist)2975 void halbtc8723b2ant_action_sco(IN struct btc_coexist *btcoexist)
2976 {
2977 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
2978 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
2979 u8 wifi_rssi_state, bt_rssi_state;
2980 u32 wifi_bw;
2981
2982 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
2983 &prewifi_rssi_state, 2, 15, 0);
2984 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
2985 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
2986 coex_dm->switch_thres_offset, 0);
2987
2988 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2989
2990 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2991
2992 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
2993
2994 if (BTC_RSSI_HIGH(bt_rssi_state))
2995 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2996 else
2997 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2998
2999 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3000
3001 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for SCO quality at 11b/g mode */
3002 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3003 else /* for SCO quality & wifi performance balance at 11n mode */
3004 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3005
3006 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
3007 0x0);
3008 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
3009 0); /* for voice quality */
3010
3011 /* sw mechanism */
3012 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3013 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3014 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3015 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3016 false, false);
3017 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3018 true, 0x4);
3019 } else {
3020 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3021 false, false);
3022 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3023 true, 0x4);
3024 }
3025 } else {
3026 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3027 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3028 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3029 false, false);
3030 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3031 true, 0x4);
3032 } else {
3033 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3034 false, false);
3035 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3036 true, 0x4);
3037 }
3038 }
3039 }
3040
3041
halbtc8723b2ant_action_hid(IN struct btc_coexist * btcoexist)3042 void halbtc8723b2ant_action_hid(IN struct btc_coexist *btcoexist)
3043 {
3044 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
3045 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3046 u8 wifi_rssi_state, bt_rssi_state;
3047 u32 wifi_bw;
3048
3049 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3050 &prewifi_rssi_state, 2, 15, 0);
3051 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3052 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3053 coex_dm->switch_thres_offset, 0);
3054
3055 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3056
3057 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3058
3059 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3060
3061 if (BTC_RSSI_HIGH(bt_rssi_state))
3062 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3063 else
3064 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3065
3066 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3067
3068 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
3069 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3070 else /* for HID quality & wifi performance balance at 11n mode */
3071 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
3072
3073 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
3074 0x0);
3075
3076 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3077 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3078 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
3079 else
3080 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
3081
3082 /* sw mechanism */
3083 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3084 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3085 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3086 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3087 false, false);
3088 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3089 false, 0x18);
3090 } else {
3091 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3092 false, false);
3093 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3094 false, 0x18);
3095 }
3096 } else {
3097 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3098 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3099 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3100 false, false);
3101 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3102 false, 0x18);
3103 } else {
3104 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3105 false, false);
3106 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3107 false, 0x18);
3108 }
3109 }
3110 }
3111
3112 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
halbtc8723b2ant_action_a2dp(IN struct btc_coexist * btcoexist)3113 void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
3114 {
3115 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3116 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3117 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3118 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3119 u32 wifi_bw;
3120 u8 ap_num = 0;
3121
3122 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3123 &prewifi_rssi_state, 2, 15, 0);
3124 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3125 &prewifi_rssi_state1, 2,
3126 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3127 coex_dm->switch_thres_offset, 0);
3128 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3129 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3130 coex_dm->switch_thres_offset, 0);
3131
3132 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
3133
3134 /* define the office environment */
3135 if ((ap_num >= 10) && BTC_RSSI_HIGH(wifi_rssi_state1) &&
3136 BTC_RSSI_HIGH(bt_rssi_state)) {
3137 /* dbg_print(" AP#>10(%d)\n", ap_num); */
3138 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3139 0x0, 0x0);
3140
3141 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
3142 0x0);
3143 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
3144 0x8);
3145 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3146 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3147
3148 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3149
3150 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3151 0x0, 0x0);
3152 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3153
3154 /* sw mechanism */
3155 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3156 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3157 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3158 false, false);
3159 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3160 true, 0x18);
3161 } else {
3162 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3163 false, false);
3164 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3165 true, 0x18);
3166 }
3167 return;
3168
3169 }
3170
3171 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3172 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3173
3174 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3175
3176 if (BTC_RSSI_HIGH(bt_rssi_state))
3177 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3178 else
3179 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3180
3181
3182 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3183 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3184 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3185 0x0, 0x0);
3186 } else {
3187 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3188 13);
3189 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3190 0x4);
3191 }
3192
3193
3194 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3195 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3196 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, false,
3197 1);
3198 else
3199 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 1);
3200
3201 /* sw mechanism */
3202 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3203 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3204 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3205 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3206 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3207 false, false);
3208 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3209 false, 0x18);
3210 } else {
3211 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3212 false, false);
3213 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3214 false, 0x18);
3215 }
3216 } else {
3217 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3218 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3219 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3220 false, false);
3221 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3222 false, 0x18);
3223 } else {
3224 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3225 false, false);
3226 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3227 false, 0x18);
3228 }
3229 }
3230 }
3231
halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist * btcoexist)3232 void halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
3233 {
3234 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3235 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3236 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3237 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3238 u32 wifi_bw;
3239
3240 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3241 &prewifi_rssi_state, 2, 15, 0);
3242 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3243 &prewifi_rssi_state1, 2,
3244 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3245 coex_dm->switch_thres_offset, 0);
3246 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3247 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3248 coex_dm->switch_thres_offset, 0);
3249
3250 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3251
3252 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3253
3254 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3255
3256 if (BTC_RSSI_HIGH(bt_rssi_state))
3257 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3258 else
3259 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3260
3261 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3262 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3263 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3264 0x0, 0x0);
3265 } else {
3266 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3267 13);
3268 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3269 0x4);
3270 }
3271
3272 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2);
3273
3274 /* sw mechanism */
3275 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3276 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3277 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3278 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3279 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3280 false, false);
3281 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3282 false, 0x18);
3283 } else {
3284 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3285 false, false);
3286 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3287 false, 0x18);
3288 }
3289 } else {
3290 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3291 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3292 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3293 false, false);
3294 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3295 false, 0x18);
3296 } else {
3297 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3298 false, false);
3299 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3300 false, 0x18);
3301 }
3302 }
3303 }
3304
halbtc8723b2ant_action_pan_edr(IN struct btc_coexist * btcoexist)3305 void halbtc8723b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
3306 {
3307 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3308 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3309 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3310 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3311 u32 wifi_bw;
3312
3313 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3314 &prewifi_rssi_state, 2, 15, 0);
3315 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3316 &prewifi_rssi_state1, 2,
3317 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3318 coex_dm->switch_thres_offset, 0);
3319 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3320 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3321 coex_dm->switch_thres_offset, 0);
3322
3323 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3324
3325 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3326
3327 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3328
3329 if (BTC_RSSI_HIGH(bt_rssi_state))
3330 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3331 else
3332 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3333
3334 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3335 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3336 10);
3337 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3338 0x0, 0x0);
3339 } else {
3340 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3341 13);
3342 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3343 0x4);
3344 }
3345
3346 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3347 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3348 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3349 else
3350 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
3351
3352 /* sw mechanism */
3353 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3354 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3355 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3356 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3357 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3358 false, false);
3359 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3360 false, 0x18);
3361 } else {
3362 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3363 false, false);
3364 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3365 false, 0x18);
3366 }
3367 } else {
3368 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3369 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3370 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3371 false, false);
3372 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3373 false, 0x18);
3374 } else {
3375 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3376 false, false);
3377 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3378 false, 0x18);
3379 }
3380 }
3381 }
3382
3383
3384 /* PAN(HS) only */
halbtc8723b2ant_action_pan_hs(IN struct btc_coexist * btcoexist)3385 void halbtc8723b2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
3386 {
3387 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3388 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3389 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3390 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3391 u32 wifi_bw;
3392
3393 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3394 &prewifi_rssi_state, 2, 15, 0);
3395 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3396 &prewifi_rssi_state1, 2,
3397 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3398 coex_dm->switch_thres_offset, 0);
3399 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3400 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3401 coex_dm->switch_thres_offset, 0);
3402
3403 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3404
3405 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3406
3407 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3408
3409 if (BTC_RSSI_HIGH(bt_rssi_state))
3410 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3411 else
3412 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3413
3414 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3415
3416 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
3417 0x0);
3418 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3419
3420 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3421 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3422 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3423 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3424 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3425 false, false);
3426 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3427 false, 0x18);
3428 } else {
3429 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3430 false, false);
3431 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3432 false, 0x18);
3433 }
3434 } else {
3435 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3436 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3437 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3438 false, false);
3439 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3440 false, 0x18);
3441 } else {
3442 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3443 false, false);
3444 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3445 false, 0x18);
3446 }
3447 }
3448 }
3449
3450 /* PAN(EDR)+A2DP */
halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist * btcoexist)3451 void halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
3452 {
3453 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3454 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3455 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3456 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3457 u8 ap_num = 0;
3458 u32 wifi_bw;
3459
3460 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3461 &prewifi_rssi_state, 2, 15, 0);
3462 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3463 &prewifi_rssi_state1, 2,
3464 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3465 coex_dm->switch_thres_offset, 0);
3466 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3467 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3468 coex_dm->switch_thres_offset, 0);
3469
3470 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3471
3472 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3473
3474 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3475
3476 if (BTC_RSSI_HIGH(bt_rssi_state))
3477 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3478 else
3479 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3480
3481 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state))
3482 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3483 0x0, 0x0);
3484 else
3485 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3486 0x4);
3487
3488 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3489 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
3490 &ap_num);
3491
3492 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3493 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3494 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3495 12);
3496
3497 if(ap_num < 10)
3498 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 1);
3499 else
3500 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3501
3502 } else {
3503 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3504 13);
3505 if(ap_num < 10)
3506 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 1);
3507 else
3508 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3509 }
3510
3511 /* sw mechanism */
3512 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3513 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3514 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3515 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3516 false, false);
3517 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3518 false, 0x18);
3519 } else {
3520 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
3521 false, false);
3522 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3523 false, 0x18);
3524 }
3525 } else {
3526 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3527 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3528 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3529 false, false);
3530 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3531 false, 0x18);
3532 } else {
3533 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
3534 false, false);
3535 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3536 false, 0x18);
3537 }
3538 }
3539 }
3540
halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist * btcoexist)3541 void halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
3542 {
3543 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3544 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3545 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3546 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3547 u32 wifi_bw;
3548
3549 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3550 &prewifi_rssi_state, 2, 15, 0);
3551 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3552 &prewifi_rssi_state1, 2,
3553 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3554 coex_dm->switch_thres_offset, 0);
3555 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3556 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3557 coex_dm->switch_thres_offset, 0);
3558 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3559
3560 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3561
3562 if (BTC_RSSI_HIGH(bt_rssi_state))
3563 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3564 else
3565 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3566
3567 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3568 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3569 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3570 0x0, 0x0);
3571 } else {
3572 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3573 14);
3574 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3575 0x4);
3576 }
3577
3578 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3579 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3580 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3581 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
3582 3);
3583 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11); */
3584 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
3585 0xfffff, 0x780);
3586 } else {
3587 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
3588 6);
3589 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); */
3590 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
3591 0xfffff, 0x0);
3592 }
3593 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3594 } else {
3595 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3596 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); */
3597 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
3598 0x0);
3599 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3600 }
3601
3602 /* sw mechanism */
3603 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3604 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3605 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3606 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3607 false, false);
3608 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3609 false, 0x18);
3610 } else {
3611 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3612 false, false);
3613 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3614 false, 0x18);
3615 }
3616 } else {
3617 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3618 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3619 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3620 false, false);
3621 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3622 false, 0x18);
3623 } else {
3624 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3625 false, false);
3626 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3627 false, 0x18);
3628 }
3629 }
3630 }
3631
3632 /* HID+A2DP+PAN(EDR) */
halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist * btcoexist)3633 void halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
3634 {
3635 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3636 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3637 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3638 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3639 u32 wifi_bw;
3640
3641 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3642 &prewifi_rssi_state, 2, 15, 0);
3643 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3644 &prewifi_rssi_state1, 2,
3645 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3646 coex_dm->switch_thres_offset, 0);
3647 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
3648 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3649 coex_dm->switch_thres_offset, 0);
3650
3651 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3652
3653 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3654
3655 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3656
3657 if (BTC_RSSI_HIGH(bt_rssi_state))
3658 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3659 else
3660 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3661
3662 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3663 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3664 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3665 0x0, 0x0);
3666 } else {
3667 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3668 14);
3669 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3670 0x4);
3671 }
3672
3673 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3674
3675 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3676 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3677 if (BTC_WIFI_BW_HT40 == wifi_bw)
3678 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3679 true, 3);
3680 else
3681 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
3682 false, 3);
3683 } else
3684 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3685
3686 /* sw mechanism */
3687 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3688 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3689 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3690 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3691 false, false);
3692 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3693 false, 0x18);
3694 } else {
3695 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3696 false, false);
3697 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3698 false, 0x18);
3699 }
3700 } else {
3701 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3702 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3703 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3704 false, false);
3705 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3706 false, 0x18);
3707 } else {
3708 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3709 false, false);
3710 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3711 false, 0x18);
3712 }
3713 }
3714 }
3715
halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist * btcoexist)3716 void halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
3717 {
3718 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
3719 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
3720 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
3721 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
3722 u32 wifi_bw;
3723 u8 ap_num = 0;
3724
3725 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3726 &prewifi_rssi_state, 2, 15, 0);
3727 /* bt_rssi_state = halbtc8723b2ant_bt_rssi_state(2, 29, 0); */
3728 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
3729 &prewifi_rssi_state1, 2,
3730 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
3731 coex_dm->switch_thres_offset, 0);
3732 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 3,
3733 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
3734 coex_dm->switch_thres_offset, 37);
3735
3736 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
3737 &ap_num);
3738
3739 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3740
3741 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x5);
3742
3743 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3744
3745 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3746 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
3747 if (BTC_RSSI_HIGH(bt_rssi_state))
3748 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3749 else if (BTC_RSSI_MEDIUM(bt_rssi_state))
3750 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3751 else
3752 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3753 } else {
3754 /* only 802.11N mode we have to dec bt power to 4 degree */
3755 if (BTC_RSSI_HIGH(bt_rssi_state)) {
3756 /* need to check ap Number of Not */
3757 if (ap_num < 10)
3758 halbtc8723b2ant_dec_bt_pwr(btcoexist,
3759 NORMAL_EXEC, 4);
3760 else
3761 halbtc8723b2ant_dec_bt_pwr(btcoexist,
3762 NORMAL_EXEC, 2);
3763 } else if (BTC_RSSI_MEDIUM(bt_rssi_state))
3764 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3765 else
3766 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3767 }
3768
3769 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
3770 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3771 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3772 0x0, 0x0);
3773 } else {
3774 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
3775 14);
3776 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3777 0x4);
3778 }
3779
3780 if(BTC_RSSI_HIGH(bt_rssi_state)) {
3781 if(ap_num < 10)
3782 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 1);
3783 else
3784 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3785 } else {
3786 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 18);
3787 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
3788 btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
3789 btcoexist->btc_write_4byte(btcoexist, 0x430, 0x0);
3790 btcoexist->btc_write_4byte(btcoexist, 0x434, 0x01010000);
3791
3792 if(ap_num < 10)
3793 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 1);
3794 else
3795 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3796 }
3797
3798 /* sw mechanism */
3799 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3800 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3801 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3802 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3803 false, false);
3804 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3805 false, 0x18);
3806 } else {
3807 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
3808 false, false);
3809 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3810 false, 0x18);
3811 }
3812 } else {
3813 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3814 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3815 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3816 false, false);
3817 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
3818 false, 0x18);
3819 } else {
3820 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
3821 false, false);
3822 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
3823 false, 0x18);
3824 }
3825 }
3826 }
3827
halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist * btcoexist)3828 void halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
3829 {
3830 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3831
3832 /* sw all off */
3833 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
3834 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3835
3836 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
3837 0x0);
3838
3839 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3840 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3841 }
3842
halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist * btcoexist)3843 void halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
3844 {
3845 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3846 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3847
3848 /* sw all off */
3849 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
3850 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3851
3852 /* hw all off */
3853 /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
3854 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3855
3856 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
3857 0x0);
3858 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3859 }
3860
halbtc8723b2ant_run_coexist_mechanism(IN struct btc_coexist * btcoexist)3861 void halbtc8723b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
3862 {
3863 u8 algorithm = 0;
3864 u32 num_of_wifi_link = 0;
3865 u32 wifi_link_status = 0;
3866 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
3867 boolean miracast_plus_bt = false;
3868 boolean scan = false, link = false, roam = false;
3869
3870 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3871 "[BTCoex], RunCoexistMechanism()===>\n");
3872 BTC_TRACE(trace_buf);
3873
3874 if (btcoexist->manual_control) {
3875 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3876 "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
3877 BTC_TRACE(trace_buf);
3878 return;
3879 }
3880
3881 if (coex_sta->under_ips) {
3882 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3883 "[BTCoex], wifi is under IPS !!!\n");
3884 BTC_TRACE(trace_buf);
3885 return;
3886 }
3887
3888 if (coex_sta->bt_whck_test) {
3889 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3890 "[BTCoex], BT is under WHCK TEST!!!\n");
3891 BTC_TRACE(trace_buf);
3892 halbtc8723b2ant_action_bt_whck_test(btcoexist);
3893 return;
3894 }
3895
3896 algorithm = halbtc8723b2ant_action_algorithm(btcoexist);
3897 if (coex_sta->c2h_bt_inquiry_page &&
3898 (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
3899 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3900 "[BTCoex], BT is under inquiry/page scan !!\n");
3901 BTC_TRACE(trace_buf);
3902 halbtc8723b2ant_action_bt_inquiry(btcoexist);
3903 return;
3904 } else {
3905 /*
3906 if(coex_dm->need_recover0x948)
3907 {
3908 coex_dm->need_recover0x948 = false;
3909 btcoexist->btc_write_4byte(btcoexist, 0x948, coex_dm->backup0x948);
3910 }
3911 */
3912 }
3913
3914 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3915 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3916 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3917
3918 if (scan || link || roam) {
3919 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3920 "[BTCoex], WiFi is under Link Process !!\n");
3921 BTC_TRACE(trace_buf);
3922 halbtc8723b2ant_action_wifi_link_process(btcoexist);
3923 return;
3924 }
3925
3926 /* for P2P */
3927
3928 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
3929 &wifi_link_status);
3930 num_of_wifi_link = wifi_link_status >> 16;
3931
3932 if ((num_of_wifi_link >= 2) ||
3933 (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
3934 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3935 "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
3936 num_of_wifi_link, wifi_link_status);
3937 BTC_TRACE(trace_buf);
3938
3939 if (bt_link_info->bt_link_exist)
3940 miracast_plus_bt = true;
3941 else
3942 miracast_plus_bt = false;
3943
3944 btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
3945 &miracast_plus_bt);
3946 halbtc8723b2ant_action_wifi_multi_port(btcoexist);
3947
3948 return;
3949 } else {
3950 miracast_plus_bt = false;
3951 btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
3952 &miracast_plus_bt);
3953 }
3954
3955 coex_dm->cur_algorithm = algorithm;
3956 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
3957 coex_dm->cur_algorithm);
3958 BTC_TRACE(trace_buf);
3959
3960 if (halbtc8723b2ant_is_common_action(btcoexist)) {
3961 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3962 "[BTCoex], Action 2-Ant common.\n");
3963 BTC_TRACE(trace_buf);
3964 coex_dm->auto_tdma_adjust = false;
3965 } else {
3966 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3967 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3968 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
3969 coex_dm->pre_algorithm, coex_dm->cur_algorithm);
3970 BTC_TRACE(trace_buf);
3971 coex_dm->auto_tdma_adjust = false;
3972 }
3973 switch (coex_dm->cur_algorithm) {
3974 case BT_8723B_2ANT_COEX_ALGO_SCO:
3975 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3976 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
3977 BTC_TRACE(trace_buf);
3978 halbtc8723b2ant_action_sco(btcoexist);
3979 break;
3980 case BT_8723B_2ANT_COEX_ALGO_HID:
3981 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3982 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
3983 BTC_TRACE(trace_buf);
3984 halbtc8723b2ant_action_hid(btcoexist);
3985 break;
3986 case BT_8723B_2ANT_COEX_ALGO_A2DP:
3987 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3988 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
3989 BTC_TRACE(trace_buf);
3990 halbtc8723b2ant_action_a2dp(btcoexist);
3991 break;
3992 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
3993 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3994 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3995 BTC_TRACE(trace_buf);
3996 halbtc8723b2ant_action_a2dp_pan_hs(btcoexist);
3997 break;
3998 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
3999 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4000 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
4001 BTC_TRACE(trace_buf);
4002 halbtc8723b2ant_action_pan_edr(btcoexist);
4003 break;
4004 case BT_8723B_2ANT_COEX_ALGO_PANHS:
4005 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4006 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
4007 BTC_TRACE(trace_buf);
4008 halbtc8723b2ant_action_pan_hs(btcoexist);
4009 break;
4010 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
4011 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4012 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
4013 BTC_TRACE(trace_buf);
4014 halbtc8723b2ant_action_pan_edr_a2dp(btcoexist);
4015 break;
4016 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
4017 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4018 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
4019 BTC_TRACE(trace_buf);
4020 halbtc8723b2ant_action_pan_edr_hid(btcoexist);
4021 break;
4022 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
4023 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4024 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
4025 BTC_TRACE(trace_buf);
4026 halbtc8723b2ant_action_hid_a2dp_pan_edr(
4027 btcoexist);
4028 break;
4029 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
4030 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4031 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
4032 BTC_TRACE(trace_buf);
4033 halbtc8723b2ant_action_hid_a2dp(btcoexist);
4034 break;
4035 default:
4036 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4037 "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
4038 BTC_TRACE(trace_buf);
4039 halbtc8723b2ant_coex_all_off(btcoexist);
4040 break;
4041 }
4042 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
4043 }
4044 }
4045
halbtc8723b2ant_wifi_off_hw_cfg(IN struct btc_coexist * btcoexist)4046 void halbtc8723b2ant_wifi_off_hw_cfg(IN struct btc_coexist *btcoexist)
4047 {
4048 boolean is_in_mp_mode = false;
4049 u8 h2c_parameter[2] = {0};
4050 u32 fw_ver = 0;
4051
4052 /* set wlan_act to low */
4053 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
4054
4055 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
4056 0x780); /* WiFi goto standby while GNT_BT 0-->1 */
4057 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4058 if (fw_ver >= 0x180000) {
4059 /* Use H2C to set GNT_BT to HIGH */
4060 h2c_parameter[0] = 1;
4061 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, h2c_parameter);
4062 } else
4063 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
4064
4065 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE,
4066 &is_in_mp_mode);
4067 if (!is_in_mp_mode)
4068 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
4069 0x0); /* BT select s0/s1 is controlled by BT */
4070 else
4071 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
4072 0x1); /* BT select s0/s1 is controlled by WiFi */
4073 }
4074
halbtc8723b2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean back_up)4075 void halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
4076 IN boolean back_up)
4077 {
4078 u8 u8tmp = 0;
4079 u32 vendor;
4080
4081
4082 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4083 "[BTCoex], 2Ant Init HW Config!!\n");
4084 BTC_TRACE(trace_buf);
4085 btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
4086 if (vendor == BTC_VENDOR_LENOVO)
4087 coex_dm->switch_thres_offset = 0;
4088 else if (vendor == BTC_VENDOR_ASUS)
4089 coex_dm->switch_thres_offset = 0;
4090 else
4091 coex_dm->switch_thres_offset = 20;
4092
4093 /* 0xf0[15:12] --> Chip Cut information */
4094 coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
4095 0xf1) & 0xf0) >> 4;
4096
4097 /* backup rf 0x1e value */
4098 coex_dm->bt_rf_0x1e_backup =
4099 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff);
4100
4101 /* 0x790[5:0]=0x5 */
4102 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
4103 u8tmp &= 0xc0;
4104 u8tmp |= 0x5;
4105 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
4106
4107 /* Antenna config */
4108 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true,
4109 false);
4110 coex_sta->dis_ver_info_cnt = 0;
4111
4112 /* PTA parameter */
4113 halbtc8723b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
4114
4115 /* Enable counter statistics */
4116 btcoexist->btc_write_1byte(btcoexist, 0x76e,
4117 0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
4118 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
4119 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
4120 }
4121
4122 /* ************************************************************
4123 * work around function start with wa_halbtc8723b2ant_
4124 * ************************************************************
4125 * ************************************************************
4126 * extern function start with ex_halbtc8723b2ant_
4127 * ************************************************************ */
ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist * btcoexist)4128 void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
4129 {
4130 struct btc_board_info *board_info = &btcoexist->board_info;
4131 u16 u16tmp = 0x0;
4132 u32 value = 0;
4133 u32 u32tmp_1[4];
4134
4135 btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20);
4136
4137 /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
4138 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
4139 btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
4140 DbgPrint("--- TEST 5 ---\n");
4141
4142 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
4143
4144 if (btcoexist->chip_interface == BTC_INTF_USB) {
4145 /* fixed at S0 for USB interface */
4146 board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
4147 } else {
4148 /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
4149 if (board_info->single_ant_path == 0) {
4150 /* set to S1 */
4151 board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
4152 } else if (board_info->single_ant_path == 1) {
4153 /* set to S0 */
4154 board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
4155 }
4156 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
4157 &value);
4158 }
4159 }
4160
ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist * btcoexist)4161 void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
4162 {
4163 struct btc_board_info *board_info = &btcoexist->board_info;
4164 u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
4165
4166 /* */
4167 /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
4168 /* Local setting bit define */
4169 /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
4170 /* BIT1: "0" for internal switch; "1" for external switch */
4171 /* BIT2: "0" for one antenna; "1" for two antenna */
4172 /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
4173 if (btcoexist->chip_interface == BTC_INTF_USB) {
4174 /* fixed at S0 for USB interface */
4175 u8tmp |= 0x1; /* antenna inverse */
4176 btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
4177 } else {
4178 /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
4179 if (board_info->single_ant_path == 0) {
4180 } else if (board_info->single_ant_path == 1) {
4181 /* set to S0 */
4182 u8tmp |= 0x1; /* antenna inverse */
4183 }
4184
4185 if (btcoexist->chip_interface == BTC_INTF_PCI)
4186 btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384,
4187 u8tmp);
4188 else if (btcoexist->chip_interface == BTC_INTF_SDIO)
4189 btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60,
4190 u8tmp);
4191 }
4192 }
4193
ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean wifi_only)4194 void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
4195 IN boolean wifi_only)
4196 {
4197 halbtc8723b2ant_init_hw_config(btcoexist, true);
4198 }
4199
ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist * btcoexist)4200 void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
4201 {
4202 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4203 "[BTCoex], Coex Mechanism Init!!\n");
4204 BTC_TRACE(trace_buf);
4205
4206 halbtc8723b2ant_init_coex_dm(btcoexist);
4207 }
4208
ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist * btcoexist)4209 void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
4210 {
4211 struct btc_board_info *board_info = &btcoexist->board_info;
4212 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
4213 u8 *cli_buf = btcoexist->cli_buf;
4214 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
4215 u32 u32tmp[4];
4216 u32 fa_of_dm, fa_cck;
4217 u32 fw_ver = 0, bt_patch_ver = 0;
4218 static u8 pop_report_in_10s = 0;
4219
4220 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4221 "\r\n ============[BT Coexist info]============");
4222 CL_PRINTF(cli_buf);
4223
4224 if (btcoexist->manual_control) {
4225 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4226 "\r\n ============[Under Manual Control]============");
4227 CL_PRINTF(cli_buf);
4228 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4229 "\r\n ==========================================");
4230 CL_PRINTF(cli_buf);
4231 }
4232
4233 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
4234 "Ant PG number/ Ant mechanism:",
4235 board_info->pg_ant_num, board_info->btdm_ant_num);
4236 CL_PRINTF(cli_buf);
4237
4238 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
4239 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4240 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4241 "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c",
4242 "Version Coex/ Fw/ Patch/ Cut",
4243 glcoex_ver_date_8723b_2ant, glcoex_ver_8723b_2ant, fw_ver,
4244 bt_patch_ver, bt_patch_ver, coex_sta->cut_version + 65);
4245 CL_PRINTF(cli_buf);
4246
4247 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
4248 "Wifi channel informed to BT",
4249 coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
4250 coex_dm->wifi_chnl_info[2]);
4251 CL_PRINTF(cli_buf);
4252
4253 /* wifi status */
4254 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4255 "============[Wifi Status]============");
4256 CL_PRINTF(cli_buf);
4257 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
4258
4259 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4260 "============[BT Status]============");
4261 CL_PRINTF(cli_buf);
4262
4263 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
4264 "BT Abnormal scan",
4265 (coex_sta->bt_abnormal_scan) ? "Yes" : "No");
4266 CL_PRINTF(cli_buf);
4267
4268 pop_report_in_10s++;
4269 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ",
4270 "BT [status/ rssi/ retryCnt/ popCnt]",
4271 ((coex_sta->bt_disabled) ? ("disabled") : ((
4272 coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
4273 : ((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
4274 coex_dm->bt_status) ? "non-connected idle" :
4275 ((BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
4276 ? "connected-idle" : "busy")))),
4277 coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
4278 coex_sta->pop_event_cnt);
4279 CL_PRINTF(cli_buf);
4280
4281 if (pop_report_in_10s >= 5) {
4282 coex_sta->pop_event_cnt = 0;
4283 pop_report_in_10s = 0;
4284 }
4285
4286
4287 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4288 "\r\n %-35s = %d / %d / %d / %d / %d / %d",
4289 "SCO/HID/PAN/A2DP/NameReq/WHQL",
4290 bt_link_info->sco_exist, bt_link_info->hid_exist,
4291 bt_link_info->pan_exist, bt_link_info->a2dp_exist,
4292 coex_sta->c2h_bt_remote_name_req,
4293 coex_sta->bt_whck_test);
4294 CL_PRINTF(cli_buf);
4295
4296 {
4297 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
4298 "BT Role",
4299 (bt_link_info->slave_role) ? "Slave" : "Master");
4300 CL_PRINTF(cli_buf);
4301 }
4302
4303 bt_info_ext = coex_sta->bt_info_ext;
4304 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
4305 "A2DP Rate/Bitpool",
4306 (bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool);
4307 CL_PRINTF(cli_buf);
4308
4309 for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) {
4310 if (coex_sta->bt_info_c2h_cnt[i]) {
4311 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4312 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
4313 glbt_info_src_8723b_2ant[i],
4314 coex_sta->bt_info_c2h[i][0],
4315 coex_sta->bt_info_c2h[i][1],
4316 coex_sta->bt_info_c2h[i][2],
4317 coex_sta->bt_info_c2h[i][3],
4318 coex_sta->bt_info_c2h[i][4],
4319 coex_sta->bt_info_c2h[i][5],
4320 coex_sta->bt_info_c2h[i][6],
4321 coex_sta->bt_info_c2h_cnt[i]);
4322 CL_PRINTF(cli_buf);
4323 }
4324 }
4325
4326 /* Sw mechanism */
4327 if (btcoexist->manual_control)
4328 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4329 "============[Sw mechanism] (before Manual)============");
4330 else
4331 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4332 "============[Sw mechanism]============");
4333
4334 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
4335 "SM1[ShRf/ LpRA/ LimDig]",
4336 coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
4337 coex_dm->limited_dig);
4338 CL_PRINTF(cli_buf);
4339 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
4340 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
4341 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
4342 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
4343 CL_PRINTF(cli_buf);
4344
4345 /* Fw mechanism */
4346 if (btcoexist->manual_control)
4347 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4348 "============[Fw mechanism] (before Manual) ============");
4349 else
4350 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4351 "============[Fw mechanism]============");
4352
4353 ps_tdma_case = coex_dm->cur_ps_tdma;
4354
4355 if (coex_dm->is_switch_to_1dot5_ant)
4356 ps_tdma_case = ps_tdma_case + 100;
4357
4358 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4359 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)",
4360 "PS TDMA",
4361 coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
4362 coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
4363 coex_dm->ps_tdma_para[4], ps_tdma_case,
4364 (coex_dm->cur_ps_tdma_on ? "On" : "Off"),
4365 (coex_dm->auto_tdma_adjust ? "Adj" : "Fix"));
4366 CL_PRINTF(cli_buf);
4367
4368 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
4369 "Coex Table Type",
4370 coex_sta->coex_table_type);
4371 CL_PRINTF(cli_buf);
4372
4373 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
4374 "DecBtPwr/ IgnWlanAct",
4375 coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
4376 CL_PRINTF(cli_buf);
4377
4378 /* Hw setting */
4379 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
4380 "============[Hw setting]============");
4381 CL_PRINTF(cli_buf);
4382
4383 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
4384 "RF-A, 0x1e initVal",
4385 coex_dm->bt_rf_0x1e_backup);
4386 CL_PRINTF(cli_buf);
4387
4388 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
4389 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880);
4390 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4391 "0x778/0x880[29:25]",
4392 u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25);
4393 CL_PRINTF(cli_buf);
4394
4395
4396 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
4397 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
4398 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x765);
4399 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4400 "0x948/ 0x67[5] / 0x765",
4401 u32tmp[0], ((u8tmp[0] & 0x20) >> 5), u8tmp[1]);
4402 CL_PRINTF(cli_buf);
4403
4404 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c);
4405 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930);
4406 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944);
4407 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4408 "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]",
4409 u32tmp[0] & 0x3, u32tmp[1] & 0xff, u32tmp[2] & 0x3);
4410 CL_PRINTF(cli_buf);
4411
4412
4413 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39);
4414 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
4415 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
4416 u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
4417 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4418 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4419 "0x38[11]/0x40/0x4c[24:23]/0x64[0]",
4420 ((u8tmp[0] & 0x8) >> 3), u8tmp[1],
4421 ((u32tmp[0] & 0x01800000) >> 23), u8tmp[2] & 0x1);
4422 CL_PRINTF(cli_buf);
4423
4424 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
4425 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
4426 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4427 "0x550(bcn ctrl)/0x522",
4428 u32tmp[0], u8tmp[0]);
4429 CL_PRINTF(cli_buf);
4430
4431 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
4432 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c);
4433 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
4434 "0xc50(dig)/0x49c(null-drop)",
4435 u32tmp[0] & 0xff, u8tmp[0]);
4436 CL_PRINTF(cli_buf);
4437
4438 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0);
4439 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4);
4440 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8);
4441 u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0);
4442
4443 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b);
4444 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c);
4445
4446 fa_of_dm = ((u32tmp[0] & 0xffff0000) >> 16) + ((u32tmp[1] & 0xffff0000)
4447 >> 16) + (u32tmp[1] & 0xffff) + (u32tmp[2] & 0xffff) + \
4448 ((u32tmp[3] & 0xffff0000) >> 16) + (u32tmp[3] &
4449 0xffff) ;
4450 fa_cck = (u8tmp[0] << 8) + u8tmp[1];
4451
4452 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
4453 "OFDM-CCA/OFDM-FA/CCK-FA",
4454 u32tmp[0] & 0xffff, fa_of_dm, fa_cck);
4455 CL_PRINTF(cli_buf);
4456
4457 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4458 "CRC_OK CCK/11g/11n/11n-Agg",
4459 coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
4460 coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_agg);
4461 CL_PRINTF(cli_buf);
4462
4463 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4464 "CRC_Err CCK/11g/11n/11n-Agg",
4465 coex_sta->crc_err_cck, coex_sta->crc_err_11g,
4466 coex_sta->crc_err_11n, coex_sta->crc_err_11n_agg);
4467 CL_PRINTF(cli_buf);
4468
4469 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
4470 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
4471 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
4472 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
4473 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4474 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4475 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
4476 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
4477 CL_PRINTF(cli_buf);
4478
4479 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4480 "0x770(high-pri rx/tx)",
4481 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
4482 CL_PRINTF(cli_buf);
4483 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4484 "0x774(low-pri rx/tx)",
4485 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
4486 CL_PRINTF(cli_buf);
4487 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1)
4488 /* halbtc8723b2ant_monitor_bt_ctr(btcoexist); */
4489 #endif
4490 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
4491 }
4492
4493
ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist * btcoexist,IN u8 type)4494 void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4495 {
4496 if (BTC_IPS_ENTER == type) {
4497 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4498 "[BTCoex], IPS ENTER notify\n");
4499 BTC_TRACE(trace_buf);
4500 coex_sta->under_ips = true;
4501 halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
4502 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
4503 halbtc8723b2ant_coex_all_off(btcoexist);
4504 } else if (BTC_IPS_LEAVE == type) {
4505 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4506 "[BTCoex], IPS LEAVE notify\n");
4507 BTC_TRACE(trace_buf);
4508 coex_sta->under_ips = false;
4509 halbtc8723b2ant_init_hw_config(btcoexist, false);
4510 halbtc8723b2ant_init_coex_dm(btcoexist);
4511 halbtc8723b2ant_query_bt_info(btcoexist);
4512 }
4513 }
4514
ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist * btcoexist,IN u8 type)4515 void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4516 {
4517 if (BTC_LPS_ENABLE == type) {
4518 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4519 "[BTCoex], LPS ENABLE notify\n");
4520 BTC_TRACE(trace_buf);
4521 coex_sta->under_lps = true;
4522 } else if (BTC_LPS_DISABLE == type) {
4523 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4524 "[BTCoex], LPS DISABLE notify\n");
4525 BTC_TRACE(trace_buf);
4526 coex_sta->under_lps = false;
4527 }
4528 }
4529
ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist * btcoexist,IN u8 type)4530 void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
4531 IN u8 type)
4532 {
4533 u32 u32tmp;
4534 u8 u8tmpa, u8tmpb;
4535
4536
4537
4538 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
4539 u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
4540 u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
4541
4542 if (BTC_SCAN_START == type) {
4543 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4544 "[BTCoex], SCAN START notify\n");
4545 BTC_TRACE(trace_buf);
4546 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
4547 } else if (BTC_SCAN_FINISH == type) {
4548 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4549 "[BTCoex], SCAN FINISH notify\n");
4550 BTC_TRACE(trace_buf);
4551 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
4552 &coex_sta->scan_ap_num);
4553 }
4554
4555 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4556 "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
4557 u32tmp, u8tmpa, u8tmpb);
4558 BTC_TRACE(trace_buf);
4559 }
4560
ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist * btcoexist,IN u8 type)4561 void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
4562 IN u8 type)
4563 {
4564 if (BTC_ASSOCIATE_START == type) {
4565 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4566 "[BTCoex], CONNECT START notify\n");
4567 BTC_TRACE(trace_buf);
4568 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
4569 } else if (BTC_ASSOCIATE_FINISH == type) {
4570 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4571 "[BTCoex], CONNECT FINISH notify\n");
4572 BTC_TRACE(trace_buf);
4573 }
4574 }
4575
ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist * btcoexist,IN u8 type)4576 void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
4577 IN u8 type)
4578 {
4579 u8 h2c_parameter[3] = {0};
4580 u32 wifi_bw;
4581 u8 wifi_central_chnl;
4582 u8 ap_num = 0;
4583
4584 if (BTC_MEDIA_CONNECT == type) {
4585 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4586 "[BTCoex], MEDIA connect notify\n");
4587 BTC_TRACE(trace_buf);
4588 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
4589 } else {
4590 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4591 "[BTCoex], MEDIA disconnect notify\n");
4592 BTC_TRACE(trace_buf);
4593 }
4594
4595 /* only 2.4G we need to inform bt the chnl mask */
4596 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
4597 &wifi_central_chnl);
4598 if ((BTC_MEDIA_CONNECT == type) &&
4599 (wifi_central_chnl <= 14)) {
4600 h2c_parameter[0] = 0x1;
4601 h2c_parameter[1] = wifi_central_chnl;
4602 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
4603 if (BTC_WIFI_BW_HT40 == wifi_bw)
4604 h2c_parameter[2] = 0x30;
4605 else {
4606 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
4607 &ap_num);
4608 if (ap_num < 10)
4609 h2c_parameter[2] = 0x30;
4610 else
4611 h2c_parameter[2] = 0x20;
4612 }
4613 }
4614
4615 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
4616 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
4617 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
4618
4619 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
4620 }
4621
ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist * btcoexist,IN u8 type)4622 void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
4623 IN u8 type)
4624 {
4625 if (type == BTC_PACKET_DHCP) {
4626 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4627 "[BTCoex], DHCP Packet notify\n");
4628 BTC_TRACE(trace_buf);
4629 }
4630 }
4631
ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist * btcoexist,IN u8 * tmp_buf,IN u8 length)4632 void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
4633 IN u8 *tmp_buf, IN u8 length)
4634 {
4635 u8 bt_info = 0;
4636 u8 i, rsp_source = 0;
4637 boolean bt_busy = false, limited_dig = false;
4638 boolean wifi_connected = false;
4639
4640 coex_sta->c2h_bt_info_req_sent = false;
4641
4642 rsp_source = tmp_buf[0] & 0xf;
4643 if (rsp_source >= BT_INFO_SRC_8723B_2ANT_MAX)
4644 rsp_source = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
4645 coex_sta->bt_info_c2h_cnt[rsp_source]++;
4646
4647 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4648 "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
4649 length);
4650 BTC_TRACE(trace_buf);
4651 for (i = 0; i < length; i++) {
4652 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
4653 if (i == 1)
4654 bt_info = tmp_buf[i];
4655 if (i == length - 1) {
4656 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
4657 tmp_buf[i]);
4658 BTC_TRACE(trace_buf);
4659 } else {
4660 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
4661 tmp_buf[i]);
4662 BTC_TRACE(trace_buf);
4663 }
4664 }
4665
4666 if (btcoexist->manual_control) {
4667 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4668 "[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n");
4669 BTC_TRACE(trace_buf);
4670 return;
4671 }
4672
4673 /* if 0xff, it means BT is under WHCK test */
4674 if (bt_info == 0xff)
4675 coex_sta->bt_whck_test = true;
4676 else
4677 coex_sta->bt_whck_test = false;
4678
4679 if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rsp_source) {
4680 coex_sta->bt_retry_cnt = /* [3:0] */
4681 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
4682
4683 if (coex_sta->bt_retry_cnt >= 1)
4684 coex_sta->pop_event_cnt++;
4685
4686 coex_sta->bt_rssi =
4687 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
4688
4689 coex_sta->bt_info_ext =
4690 coex_sta->bt_info_c2h[rsp_source][4];
4691
4692 if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20)
4693 coex_sta->c2h_bt_remote_name_req = true;
4694 else
4695 coex_sta->c2h_bt_remote_name_req = false;
4696
4697 if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49) {
4698 coex_sta->a2dp_bit_pool =
4699 coex_sta->bt_info_c2h[rsp_source][6];
4700 } else
4701 coex_sta->a2dp_bit_pool = 0;
4702
4703 coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2]
4704 & 0x40);
4705 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK,
4706 &coex_sta->bt_tx_rx_mask);
4707 if (coex_sta->bt_tx_rx_mask) {
4708 /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
4709 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4710 "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n");
4711 BTC_TRACE(trace_buf);
4712 btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF,
4713 0x3c, 0x01);
4714 }
4715
4716 /* Here we need to resend some wifi info to BT */
4717 /* because bt is reset and loss of the info. */
4718 if ((coex_sta->bt_info_ext & BIT(1))) {
4719 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4720 "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
4721 BTC_TRACE(trace_buf);
4722 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
4723 &wifi_connected);
4724 if (wifi_connected)
4725 ex_halbtc8723b2ant_media_status_notify(
4726 btcoexist, BTC_MEDIA_CONNECT);
4727 else
4728 ex_halbtc8723b2ant_media_status_notify(
4729 btcoexist, BTC_MEDIA_DISCONNECT);
4730 }
4731
4732 if ((coex_sta->bt_info_ext & BIT(3))) {
4733 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4734 "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
4735 BTC_TRACE(trace_buf);
4736 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC,
4737 false);
4738 } else {
4739 /* BT already NOT ignore Wlan active, do nothing here. */
4740 }
4741 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
4742 if ((coex_sta->bt_info_ext & BIT(4))) {
4743 /* BT auto report already enabled, do nothing */
4744 } else
4745 halbtc8723b2ant_bt_auto_report(btcoexist, FORCE_EXEC,
4746 true);
4747 #endif
4748 }
4749
4750 /* check BIT2 first ==> check if bt is under inquiry or page scan */
4751 if (bt_info & BT_INFO_8723B_2ANT_B_INQ_PAGE)
4752 coex_sta->c2h_bt_inquiry_page = true;
4753 else
4754 coex_sta->c2h_bt_inquiry_page = false;
4755
4756 /* set link exist status */
4757 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
4758 coex_sta->bt_link_exist = false;
4759 coex_sta->pan_exist = false;
4760 coex_sta->a2dp_exist = false;
4761 coex_sta->hid_exist = false;
4762 coex_sta->sco_exist = false;
4763 } else { /* connection exists */
4764 coex_sta->bt_link_exist = true;
4765 if (bt_info & BT_INFO_8723B_2ANT_B_FTP)
4766 coex_sta->pan_exist = true;
4767 else
4768 coex_sta->pan_exist = false;
4769 if (bt_info & BT_INFO_8723B_2ANT_B_A2DP)
4770 coex_sta->a2dp_exist = true;
4771 else
4772 coex_sta->a2dp_exist = false;
4773 if (bt_info & BT_INFO_8723B_2ANT_B_HID)
4774 coex_sta->hid_exist = true;
4775 else
4776 coex_sta->hid_exist = false;
4777 if (bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO)
4778 coex_sta->sco_exist = true;
4779 else
4780 coex_sta->sco_exist = false;
4781
4782 if ((coex_sta->hid_exist == false) &&
4783 (coex_sta->c2h_bt_inquiry_page == false) &&
4784 (coex_sta->sco_exist == false)) {
4785 if (coex_sta->high_priority_tx +
4786 coex_sta->high_priority_rx >= 160) {
4787 coex_sta->hid_exist = true;
4788 bt_info = bt_info | 0x28;
4789 }
4790 }
4791 }
4792
4793 halbtc8723b2ant_update_bt_link_info(btcoexist);
4794
4795 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
4796 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4797 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4798 "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
4799 BTC_TRACE(trace_buf);
4800 } else if (bt_info ==
4801 BT_INFO_8723B_2ANT_B_CONNECTION) { /* connection exists but no busy */
4802 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
4803 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4804 "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
4805 BTC_TRACE(trace_buf);
4806 } else if ((bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
4807 (bt_info & BT_INFO_8723B_2ANT_B_SCO_BUSY)) {
4808 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
4809 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4810 "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
4811 BTC_TRACE(trace_buf);
4812 } else if (bt_info & BT_INFO_8723B_2ANT_B_ACL_BUSY) {
4813 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
4814 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4815 "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
4816 BTC_TRACE(trace_buf);
4817 } else {
4818 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_MAX;
4819 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4820 "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
4821 BTC_TRACE(trace_buf);
4822 }
4823
4824 if ((BT_8723B_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
4825 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
4826 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
4827 bt_busy = true;
4828 limited_dig = true;
4829 } else {
4830 bt_busy = false;
4831 limited_dig = false;
4832 }
4833
4834 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
4835
4836 coex_dm->limited_dig = limited_dig;
4837 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
4838
4839 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
4840 }
4841
ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist * btcoexist)4842 void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist)
4843 {
4844 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
4845 BTC_TRACE(trace_buf);
4846
4847 halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
4848 /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
4849 /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 */
4850 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
4851
4852 ex_halbtc8723b2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4853 }
4854
ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist * btcoexist,IN u8 pnp_state)4855 void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
4856 IN u8 pnp_state)
4857 {
4858 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
4859 BTC_TRACE(trace_buf);
4860
4861 if (BTC_WIFI_PNP_SLEEP == pnp_state) {
4862 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4863 "[BTCoex], Pnp notify to SLEEP\n");
4864 BTC_TRACE(trace_buf);
4865
4866 /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
4867 /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
4868 /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
4869 coex_sta->under_ips = false;
4870 coex_sta->under_lps = false;
4871 } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
4872 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4873 "[BTCoex], Pnp notify to WAKE UP\n");
4874 BTC_TRACE(trace_buf);
4875 halbtc8723b2ant_init_hw_config(btcoexist, false);
4876 halbtc8723b2ant_init_coex_dm(btcoexist);
4877 halbtc8723b2ant_query_bt_info(btcoexist);
4878 }
4879 }
4880
ex_halbtc8723b2ant_periodical(IN struct btc_coexist * btcoexist)4881 void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist)
4882 {
4883 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
4884
4885 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4886 "[BTCoex], ==========================Periodical===========================\n");
4887 BTC_TRACE(trace_buf);
4888 if (coex_sta->dis_ver_info_cnt <= 5) {
4889 coex_sta->dis_ver_info_cnt += 1;
4890 if (coex_sta->dis_ver_info_cnt == 3) {
4891 /* Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial */
4892 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4893 "[BTCoex], Set GNT_BT control by PTA\n");
4894 BTC_TRACE(trace_buf);
4895 halbtc8723b2ant_set_ant_path(btcoexist,
4896 BTC_ANT_WIFI_AT_MAIN, false, false);
4897 }
4898 }
4899
4900 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
4901 halbtc8723b2ant_query_bt_info(btcoexist);
4902 halbtc8723b2ant_monitor_bt_enable_disable(btcoexist);
4903 #else
4904 halbtc8723b2ant_monitor_bt_ctr(btcoexist);
4905 halbtc8723b2ant_monitor_wifi_ctr(btcoexist);
4906
4907 /* for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist */
4908 if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) &&
4909 (bt_link_info->hid_exist == true))
4910 bt_link_info->hid_exist = false;
4911
4912 if (halbtc8723b2ant_is_wifi_status_changed(btcoexist) ||
4913 coex_dm->auto_tdma_adjust)
4914 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
4915 #endif
4916 }
4917
4918 #endif
4919
4920 #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
4921
4922