1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 21 #ifndef _RTW_IO_H_ 22 #define _RTW_IO_H_ 23 24 #define NUM_IOREQ 8 25 26 #ifdef PLATFORM_WINDOWS 27 #define MAX_PROT_SZ 64 28 #endif 29 #ifdef PLATFORM_LINUX 30 #define MAX_PROT_SZ (64-16) 31 #endif 32 33 #define _IOREADY 0 34 #define _IO_WAIT_COMPLETE 1 35 #define _IO_WAIT_RSP 2 36 37 // IO COMMAND TYPE 38 #define _IOSZ_MASK_ (0x7F) 39 #define _IO_WRITE_ BIT(7) 40 #define _IO_FIXED_ BIT(8) 41 #define _IO_BURST_ BIT(9) 42 #define _IO_BYTE_ BIT(10) 43 #define _IO_HW_ BIT(11) 44 #define _IO_WORD_ BIT(12) 45 #define _IO_SYNC_ BIT(13) 46 #define _IO_CMDMASK_ (0x1F80) 47 48 49 /* 50 For prompt mode accessing, caller shall free io_req 51 Otherwise, io_handler will free io_req 52 */ 53 54 55 56 // IO STATUS TYPE 57 #define _IO_ERR_ BIT(2) 58 #define _IO_SUCCESS_ BIT(1) 59 #define _IO_DONE_ BIT(0) 60 61 62 #define IO_RD32 (_IO_SYNC_ | _IO_WORD_) 63 #define IO_RD16 (_IO_SYNC_ | _IO_HW_) 64 #define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) 65 66 #define IO_RD32_ASYNC (_IO_WORD_) 67 #define IO_RD16_ASYNC (_IO_HW_) 68 #define IO_RD8_ASYNC (_IO_BYTE_) 69 70 #define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) 71 #define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) 72 #define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) 73 74 #define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) 75 #define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) 76 #define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) 77 78 /* 79 80 Only Sync. burst accessing is provided. 81 82 */ 83 84 #define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) 85 #define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) 86 87 88 89 //below is for the intf_option bit defition... 90 91 #define _INTF_ASYNC_ BIT(0) //support async io 92 93 struct intf_priv; 94 struct intf_hdl; 95 struct io_queue; 96 97 struct _io_ops 98 { 99 u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); 100 u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); 101 u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); 102 103 int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); 104 int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); 105 int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); 106 int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); 107 108 int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); 109 int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); 110 int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); 111 112 void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 113 void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 114 115 void (*_sync_irp_protocol_rw)(struct io_queue *pio_q); 116 117 u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); 118 119 u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 120 u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); 121 122 u32 (*_write_scsi)(struct intf_hdl *pintfhdl,u32 cnt, u8 *pmem); 123 124 void (*_read_port_cancel)(struct intf_hdl *pintfhdl); 125 void (*_write_port_cancel)(struct intf_hdl *pintfhdl); 126 127 #ifdef CONFIG_SDIO_HCI 128 u8 (*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr); 129 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 130 u8 (*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr); 131 u16 (*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr); 132 u32 (*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr); 133 int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); 134 int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); 135 int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); 136 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 137 #endif 138 139 }; 140 141 struct io_req { 142 _list list; 143 u32 addr; 144 volatile u32 val; 145 u32 command; 146 u32 status; 147 u8 *pbuf; 148 _sema sema; 149 150 #ifdef PLATFORM_OS_CE 151 #ifdef CONFIG_USB_HCI 152 // URB handler for rtw_write_mem 153 USB_TRANSFER usb_transfer_write_mem; 154 #endif 155 #endif 156 157 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); 158 u8 *cnxt; 159 160 #ifdef PLATFORM_OS_XP 161 PMDL pmdl; 162 PIRP pirp; 163 164 #ifdef CONFIG_SDIO_HCI 165 PSDBUS_REQUEST_PACKET sdrp; 166 #endif 167 168 #endif 169 170 171 }; 172 173 struct intf_hdl { 174 175 /* 176 u32 intf_option; 177 u32 bus_status; 178 u32 do_flush; 179 u8 *adapter; 180 u8 *intf_dev; 181 struct intf_priv *pintfpriv; 182 u8 cnt; 183 void (*intf_hdl_init)(u8 *priv); 184 void (*intf_hdl_unload)(u8 *priv); 185 void (*intf_hdl_open)(u8 *priv); 186 void (*intf_hdl_close)(u8 *priv); 187 struct _io_ops io_ops; 188 //u8 intf_status;//moved to struct intf_priv 189 u16 len; 190 u16 done_len; 191 */ 192 _adapter *padapter; 193 struct dvobj_priv *pintf_dev;// pointer to &(padapter->dvobjpriv); 194 195 struct _io_ops io_ops; 196 197 }; 198 199 struct reg_protocol_rd { 200 201 #ifdef CONFIG_LITTLE_ENDIAN 202 203 //DW1 204 u32 NumOfTrans:4; 205 u32 Reserved1:4; 206 u32 Reserved2:24; 207 //DW2 208 u32 ByteCount:7; 209 u32 WriteEnable:1; //0:read, 1:write 210 u32 FixOrContinuous:1; //0:continuous, 1: Fix 211 u32 BurstMode:1; 212 u32 Byte1Access:1; 213 u32 Byte2Access:1; 214 u32 Byte4Access:1; 215 u32 Reserved3:3; 216 u32 Reserved4:16; 217 //DW3 218 u32 BusAddress; 219 //DW4 220 //u32 Value; 221 #else 222 223 224 //DW1 225 u32 Reserved1 :4; 226 u32 NumOfTrans :4; 227 228 u32 Reserved2 :24; 229 230 //DW2 231 u32 WriteEnable : 1; 232 u32 ByteCount :7; 233 234 235 u32 Reserved3 : 3; 236 u32 Byte4Access : 1; 237 238 u32 Byte2Access : 1; 239 u32 Byte1Access : 1; 240 u32 BurstMode :1 ; 241 u32 FixOrContinuous : 1; 242 243 u32 Reserved4 : 16; 244 245 //DW3 246 u32 BusAddress; 247 248 //DW4 249 //u32 Value; 250 251 #endif 252 253 }; 254 255 256 struct reg_protocol_wt { 257 258 259 #ifdef CONFIG_LITTLE_ENDIAN 260 261 //DW1 262 u32 NumOfTrans:4; 263 u32 Reserved1:4; 264 u32 Reserved2:24; 265 //DW2 266 u32 ByteCount:7; 267 u32 WriteEnable:1; //0:read, 1:write 268 u32 FixOrContinuous:1; //0:continuous, 1: Fix 269 u32 BurstMode:1; 270 u32 Byte1Access:1; 271 u32 Byte2Access:1; 272 u32 Byte4Access:1; 273 u32 Reserved3:3; 274 u32 Reserved4:16; 275 //DW3 276 u32 BusAddress; 277 //DW4 278 u32 Value; 279 280 #else 281 //DW1 282 u32 Reserved1 :4; 283 u32 NumOfTrans :4; 284 285 u32 Reserved2 :24; 286 287 //DW2 288 u32 WriteEnable : 1; 289 u32 ByteCount :7; 290 291 u32 Reserved3 : 3; 292 u32 Byte4Access : 1; 293 294 u32 Byte2Access : 1; 295 u32 Byte1Access : 1; 296 u32 BurstMode :1 ; 297 u32 FixOrContinuous : 1; 298 299 u32 Reserved4 : 16; 300 301 //DW3 302 u32 BusAddress; 303 304 //DW4 305 u32 Value; 306 307 #endif 308 309 }; 310 #ifdef CONFIG_PCI_HCI 311 #define MAX_CONTINUAL_IO_ERR 4 312 #endif 313 314 #ifdef CONFIG_USB_HCI 315 #define MAX_CONTINUAL_IO_ERR 4 316 #endif 317 318 #ifdef CONFIG_SDIO_HCI 319 #define SD_IO_TRY_CNT (8) 320 #define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT 321 #endif 322 323 #ifdef CONFIG_GSPI_HCI 324 #define SD_IO_TRY_CNT (8) 325 #define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT 326 #endif 327 328 329 int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj); 330 void rtw_reset_continual_io_error(struct dvobj_priv *dvobj); 331 332 /* 333 Below is the data structure used by _io_handler 334 335 */ 336 337 struct io_queue { 338 _lock lock; 339 _list free_ioreqs; 340 _list pending; //The io_req list that will be served in the single protocol read/write. 341 _list processing; 342 u8 *free_ioreqs_buf; // 4-byte aligned 343 u8 *pallocated_free_ioreqs_buf; 344 struct intf_hdl intf; 345 }; 346 347 struct io_priv{ 348 349 _adapter *padapter; 350 351 struct intf_hdl intf; 352 353 }; 354 355 extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); 356 extern void sync_ioreq_enqueue(struct io_req *preq,struct io_queue *ioqueue); 357 extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); 358 359 360 extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue); 361 extern struct io_req *alloc_ioreq(struct io_queue *pio_q); 362 363 extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl); 364 extern void unregister_intf_hdl(struct intf_hdl *pintfhdl); 365 366 extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 367 extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 368 369 extern u8 _rtw_read8(_adapter *adapter, u32 addr); 370 extern u16 _rtw_read16(_adapter *adapter, u32 addr); 371 extern u32 _rtw_read32(_adapter *adapter, u32 addr); 372 extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 373 extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 374 extern void _rtw_read_port_cancel(_adapter *adapter); 375 376 377 extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val); 378 extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val); 379 extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); 380 extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); 381 382 #ifdef CONFIG_SDIO_HCI 383 u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr); 384 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 385 u8 _rtw_sd_iread8(_adapter *adapter, u32 addr); 386 u16 _rtw_sd_iread16(_adapter *adapter, u32 addr); 387 u32 _rtw_sd_iread32(_adapter *adapter, u32 addr); 388 int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val); 389 int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val); 390 int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val); 391 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 392 #endif /* CONFIG_SDIO_HCI */ 393 394 extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); 395 extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); 396 extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val); 397 398 extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 399 extern u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 400 u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms); 401 extern void _rtw_write_port_cancel(_adapter *adapter); 402 403 #ifdef DBG_IO 404 bool match_read_sniff_ranges(u32 addr, u16 len); 405 bool match_write_sniff_ranges(u32 addr, u16 len); 406 bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask); 407 bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask); 408 409 extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line); 410 extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line); 411 extern u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line); 412 413 extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); 414 extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); 415 extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); 416 extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line); 417 418 #ifdef CONFIG_SDIO_HCI 419 u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line); 420 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 421 u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line); 422 u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line); 423 u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line); 424 int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); 425 int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); 426 int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); 427 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 428 #endif /* CONFIG_SDIO_HCI */ 429 430 #define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __FUNCTION__, __LINE__) 431 #define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __FUNCTION__, __LINE__) 432 #define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __FUNCTION__, __LINE__) 433 #define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) 434 #define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) 435 #define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) 436 437 #define rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__) 438 #define rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__) 439 #define rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__) 440 #define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__) 441 442 #define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) 443 #define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) 444 #define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) 445 446 #define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem) 447 #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem) 448 #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) 449 #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) 450 451 #ifdef CONFIG_SDIO_HCI 452 #define rtw_sd_f0_read8(adapter, addr) dbg_rtw_sd_f0_read8((adapter), (addr), __func__, __LINE__) 453 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 454 #define rtw_sd_iread8(adapter, addr) dbg_rtw_sd_iread8((adapter), (addr), __func__, __LINE__) 455 #define rtw_sd_iread16(adapter, addr) dbg_rtw_sd_iread16((adapter), (addr), __func__, __LINE__) 456 #define rtw_sd_iread32(adapter, addr) dbg_rtw_sd_iread32((adapter), (addr), __func__, __LINE__) 457 #define rtw_sd_iwrite8(adapter, addr, val) dbg_rtw_sd_iwrite8((adapter), (addr), (val), __func__, __LINE__) 458 #define rtw_sd_iwrite16(adapter, addr, val) dbg_rtw_sd_iwrite16((adapter), (addr), (val), __func__, __LINE__) 459 #define rtw_sd_iwrite32(adapter, addr, val) dbg_rtw_sd_iwrite32((adapter), (addr), (val), __func__, __LINE__) 460 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 461 #endif /* CONFIG_SDIO_HCI */ 462 463 #else /* DBG_IO */ 464 #define match_read_sniff_ranges(addr, len) _FALSE 465 #define match_write_sniff_ranges(addr, len) _FALSE 466 #define match_rf_read_sniff_ranges(path, addr, mask) _FALSE 467 #define match_rf_write_sniff_ranges(path, addr, mask) _FALSE 468 #define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) 469 #define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) 470 #define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) 471 #define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) 472 #define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) 473 #define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) 474 475 #define rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val)) 476 #define rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val)) 477 #define rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val)) 478 #define rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data)) 479 480 #define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) 481 #define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) 482 #define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) 483 484 #define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem)) 485 #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem)) 486 #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) 487 #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) 488 489 #ifdef CONFIG_SDIO_HCI 490 #define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr)) 491 #ifdef CONFIG_SDIO_INDIRECT_ACCESS 492 #define rtw_sd_iread8(adapter, addr) _rtw_sd_iread8((adapter), (addr)) 493 #define rtw_sd_iread16(adapter, addr) _rtw_sd_iread16((adapter), (addr)) 494 #define rtw_sd_iread32(adapter, addr) _rtw_sd_iread32((adapter), (addr)) 495 #define rtw_sd_iwrite8(adapter, addr, val) _rtw_sd_iwrite8((adapter), (addr), (val)) 496 #define rtw_sd_iwrite16(adapter, addr, val) _rtw_sd_iwrite16((adapter), (addr), (val)) 497 #define rtw_sd_iwrite32(adapter, addr, val) _rtw_sd_iwrite32((adapter), (addr), (val)) 498 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */ 499 #endif /* CONFIG_SDIO_HCI */ 500 501 #endif /* DBG_IO */ 502 503 extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); 504 505 //ioreq 506 extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval); 507 extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval); 508 extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval); 509 extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val); 510 extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val); 511 extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val); 512 513 514 extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff, 515 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 516 extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff, 517 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 518 extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff, 519 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 520 521 extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 522 extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 523 524 extern void async_write8(_adapter *adapter, u32 addr, u8 val, 525 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 526 extern void async_write16(_adapter *adapter, u32 addr, u16 val, 527 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 528 extern void async_write32(_adapter *adapter, u32 addr, u32 val, 529 void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 530 531 extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 532 extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); 533 534 535 int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter,struct _io_ops *pops)); 536 537 538 extern uint alloc_io_queue(_adapter *adapter); 539 extern void free_io_queue(_adapter *adapter); 540 extern void async_bus_io(struct io_queue *pio_q); 541 extern void bus_sync_io(struct io_queue *pio_q); 542 extern u32 _ioreq2rwmem(struct io_queue *pio_q); 543 extern void dev_power_down(_adapter * Adapter, u8 bpwrup); 544 545 /* 546 #define RTL_R8(reg) rtw_read8(padapter, reg) 547 #define RTL_R16(reg) rtw_read16(padapter, reg) 548 #define RTL_R32(reg) rtw_read32(padapter, reg) 549 #define RTL_W8(reg, val8) rtw_write8(padapter, reg, val8) 550 #define RTL_W16(reg, val16) rtw_write16(padapter, reg, val16) 551 #define RTL_W32(reg, val32) rtw_write32(padapter, reg, val32) 552 */ 553 554 /* 555 #define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8) 556 #define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16) 557 #define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32) 558 559 #define RTL_WRITE_BB(reg, val32) phy_SetUsbBBReg(padapter, reg, val32) 560 #define RTL_READ_BB(reg) phy_QueryUsbBBReg(padapter, reg) 561 */ 562 563 #define PlatformEFIOWrite1Byte(_a,_b,_c) \ 564 rtw_write8(_a,_b,_c) 565 #define PlatformEFIOWrite2Byte(_a,_b,_c) \ 566 rtw_write16(_a,_b,_c) 567 #define PlatformEFIOWrite4Byte(_a,_b,_c) \ 568 rtw_write32(_a,_b,_c) 569 570 #define PlatformEFIORead1Byte(_a,_b) \ 571 rtw_read8(_a,_b) 572 #define PlatformEFIORead2Byte(_a,_b) \ 573 rtw_read16(_a,_b) 574 #define PlatformEFIORead4Byte(_a,_b) \ 575 rtw_read32(_a,_b) 576 577 #endif //_RTL8711_IO_H_ 578 579