1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ************************************************************
3 * Description:
4 *
5 * This file is for RTL8192E Co-exist mechanism
6 *
7 * History
8 * 2012/11/15 Cosa first check in.
9 *
10 * ************************************************************ */
11
12 /* ************************************************************
13 * include files
14 * ************************************************************ */
15 #include "Mp_Precomp.h"
16
17
18 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
19
20 #if (RTL8192E_SUPPORT == 1)
21 /* ************************************************************
22 * Global variables, these are static variables
23 * ************************************************************ */
24 static u8 *trace_buf = &gl_btc_trace_buf[0];
25 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
26 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
27 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
28 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
29
30 const char *const glbt_info_src_8192e_2ant[] = {
31 "BT Info[wifi fw]",
32 "BT Info[bt rsp]",
33 "BT Info[bt auto report]",
34 };
35
36 u32 glcoex_ver_date_8192e_2ant = 20130912;
37 u32 glcoex_ver_8192e_2ant = 0x35;
38
39 /* ************************************************************
40 * local function proto type if needed
41 * ************************************************************
42 * ************************************************************
43 * local function start with halbtc8192e2ant_
44 * ************************************************************ */
halbtc8192e2ant_bt_rssi_state(u8 level_num,u8 rssi_thresh,u8 rssi_thresh1)45 u8 halbtc8192e2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
46 {
47 s32 bt_rssi = 0;
48 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
49
50 bt_rssi = coex_sta->bt_rssi;
51
52 if (level_num == 2) {
53 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
54 (coex_sta->pre_bt_rssi_state ==
55 BTC_RSSI_STATE_STAY_LOW)) {
56 if (bt_rssi >= (rssi_thresh +
57 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
58 bt_rssi_state = BTC_RSSI_STATE_HIGH;
59 else
60 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
61 } else {
62 if (bt_rssi < rssi_thresh)
63 bt_rssi_state = BTC_RSSI_STATE_LOW;
64 else
65 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
66 }
67 } else if (level_num == 3) {
68 if (rssi_thresh > rssi_thresh1) {
69 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
70 "[BTCoex], BT Rssi thresh error!!\n");
71 BTC_TRACE(trace_buf);
72 return coex_sta->pre_bt_rssi_state;
73 }
74
75 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
76 (coex_sta->pre_bt_rssi_state ==
77 BTC_RSSI_STATE_STAY_LOW)) {
78 if (bt_rssi >= (rssi_thresh +
79 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
80 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
81 else
82 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
83 } else if ((coex_sta->pre_bt_rssi_state ==
84 BTC_RSSI_STATE_MEDIUM) ||
85 (coex_sta->pre_bt_rssi_state ==
86 BTC_RSSI_STATE_STAY_MEDIUM)) {
87 if (bt_rssi >= (rssi_thresh1 +
88 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
89 bt_rssi_state = BTC_RSSI_STATE_HIGH;
90 else if (bt_rssi < rssi_thresh)
91 bt_rssi_state = BTC_RSSI_STATE_LOW;
92 else
93 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
94 } else {
95 if (bt_rssi < rssi_thresh1)
96 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
97 else
98 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
99 }
100 }
101
102 coex_sta->pre_bt_rssi_state = bt_rssi_state;
103
104 return bt_rssi_state;
105 }
106
halbtc8192e2ant_wifi_rssi_state(IN struct btc_coexist * btcoexist,IN u8 index,IN u8 level_num,IN u8 rssi_thresh,IN u8 rssi_thresh1)107 u8 halbtc8192e2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
108 IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
109 {
110 s32 wifi_rssi = 0;
111 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
112
113 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
114
115 if (level_num == 2) {
116 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
117 ||
118 (coex_sta->pre_wifi_rssi_state[index] ==
119 BTC_RSSI_STATE_STAY_LOW)) {
120 if (wifi_rssi >= (rssi_thresh +
121 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
122 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
123 else
124 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
125 } else {
126 if (wifi_rssi < rssi_thresh)
127 wifi_rssi_state = BTC_RSSI_STATE_LOW;
128 else
129 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
130 }
131 } else if (level_num == 3) {
132 if (rssi_thresh > rssi_thresh1) {
133 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
134 "[BTCoex], wifi RSSI thresh error!!\n");
135 BTC_TRACE(trace_buf);
136 return coex_sta->pre_wifi_rssi_state[index];
137 }
138
139 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
140 ||
141 (coex_sta->pre_wifi_rssi_state[index] ==
142 BTC_RSSI_STATE_STAY_LOW)) {
143 if (wifi_rssi >= (rssi_thresh +
144 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
145 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
146 else
147 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
148 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
149 BTC_RSSI_STATE_MEDIUM) ||
150 (coex_sta->pre_wifi_rssi_state[index] ==
151 BTC_RSSI_STATE_STAY_MEDIUM)) {
152 if (wifi_rssi >= (rssi_thresh1 +
153 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
154 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
155 else if (wifi_rssi < rssi_thresh)
156 wifi_rssi_state = BTC_RSSI_STATE_LOW;
157 else
158 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
159 } else {
160 if (wifi_rssi < rssi_thresh1)
161 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
162 else
163 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
164 }
165 }
166
167 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
168
169 return wifi_rssi_state;
170 }
171
halbtc8192e2ant_monitor_bt_enable_disable(IN struct btc_coexist * btcoexist)172 void halbtc8192e2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
173 {
174 static u32 bt_disable_cnt = 0;
175 boolean bt_active = true, bt_disabled = false;
176
177 /* This function check if bt is disabled */
178
179 if (coex_sta->high_priority_tx == 0 &&
180 coex_sta->high_priority_rx == 0 &&
181 coex_sta->low_priority_tx == 0 &&
182 coex_sta->low_priority_rx == 0)
183 bt_active = false;
184 if (coex_sta->high_priority_tx == 0xffff &&
185 coex_sta->high_priority_rx == 0xffff &&
186 coex_sta->low_priority_tx == 0xffff &&
187 coex_sta->low_priority_rx == 0xffff)
188 bt_active = false;
189 if (bt_active) {
190 bt_disable_cnt = 0;
191 bt_disabled = false;
192 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
193 &bt_disabled);
194 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
195 "[BTCoex], BT is enabled !!\n");
196 BTC_TRACE(trace_buf);
197 } else {
198 bt_disable_cnt++;
199 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
200 "[BTCoex], bt all counters=0, %d times!!\n",
201 bt_disable_cnt);
202 BTC_TRACE(trace_buf);
203 if (bt_disable_cnt >= 2) {
204 bt_disabled = true;
205 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
206 &bt_disabled);
207 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
208 "[BTCoex], BT is disabled !!\n");
209 BTC_TRACE(trace_buf);
210 }
211 }
212 if (coex_sta->bt_disabled != bt_disabled) {
213 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
214 "[BTCoex], BT is from %s to %s!!\n",
215 (coex_sta->bt_disabled ? "disabled" : "enabled"),
216 (bt_disabled ? "disabled" : "enabled"));
217 BTC_TRACE(trace_buf);
218 coex_sta->bt_disabled = bt_disabled;
219 if (!bt_disabled) {
220 } else {
221 }
222 }
223 }
224
halbtc8192e2ant_decide_ra_mask(IN struct btc_coexist * btcoexist,IN u8 ss_type,IN u32 ra_mask_type)225 u32 halbtc8192e2ant_decide_ra_mask(IN struct btc_coexist *btcoexist,
226 IN u8 ss_type, IN u32 ra_mask_type)
227 {
228 u32 dis_ra_mask = 0x0;
229
230 switch (ra_mask_type) {
231 case 0: /* normal mode */
232 if (ss_type == 2)
233 dis_ra_mask = 0x0; /* enable 2ss */
234 else
235 dis_ra_mask = 0xfff00000; /* disable 2ss */
236 break;
237 case 1: /* disable cck 1/2 */
238 if (ss_type == 2)
239 dis_ra_mask = 0x00000003; /* enable 2ss */
240 else
241 dis_ra_mask = 0xfff00003; /* disable 2ss */
242 break;
243 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
244 if (ss_type == 2)
245 dis_ra_mask = 0x0001f1f7; /* enable 2ss */
246 else
247 dis_ra_mask = 0xfff1f1f7; /* disable 2ss */
248 break;
249 default:
250 break;
251 }
252
253 return dis_ra_mask;
254 }
255
halbtc8192e2ant_update_ra_mask(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u32 dis_rate_mask)256 void halbtc8192e2ant_update_ra_mask(IN struct btc_coexist *btcoexist,
257 IN boolean force_exec, IN u32 dis_rate_mask)
258 {
259 coex_dm->cur_ra_mask = dis_rate_mask;
260
261 if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
262 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
263 &coex_dm->cur_ra_mask);
264 coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
265 }
266
halbtc8192e2ant_auto_rate_fallback_retry(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)267 void halbtc8192e2ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
268 IN boolean force_exec, IN u8 type)
269 {
270 boolean wifi_under_b_mode = false;
271
272 coex_dm->cur_arfr_type = type;
273
274 if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
275 switch (coex_dm->cur_arfr_type) {
276 case 0: /* normal mode */
277 btcoexist->btc_write_4byte(btcoexist, 0x430,
278 coex_dm->backup_arfr_cnt1);
279 btcoexist->btc_write_4byte(btcoexist, 0x434,
280 coex_dm->backup_arfr_cnt2);
281 break;
282 case 1:
283 btcoexist->btc_get(btcoexist,
284 BTC_GET_BL_WIFI_UNDER_B_MODE,
285 &wifi_under_b_mode);
286 if (wifi_under_b_mode) {
287 btcoexist->btc_write_4byte(btcoexist,
288 0x430, 0x0);
289 btcoexist->btc_write_4byte(btcoexist,
290 0x434, 0x01010101);
291 } else {
292 btcoexist->btc_write_4byte(btcoexist,
293 0x430, 0x0);
294 btcoexist->btc_write_4byte(btcoexist,
295 0x434, 0x04030201);
296 }
297 break;
298 default:
299 break;
300 }
301 }
302
303 coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
304 }
305
halbtc8192e2ant_retry_limit(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)306 void halbtc8192e2ant_retry_limit(IN struct btc_coexist *btcoexist,
307 IN boolean force_exec, IN u8 type)
308 {
309 coex_dm->cur_retry_limit_type = type;
310
311 if (force_exec ||
312 (coex_dm->pre_retry_limit_type !=
313 coex_dm->cur_retry_limit_type)) {
314 switch (coex_dm->cur_retry_limit_type) {
315 case 0: /* normal mode */
316 btcoexist->btc_write_2byte(btcoexist, 0x42a,
317 coex_dm->backup_retry_limit);
318 break;
319 case 1: /* retry limit=8 */
320 btcoexist->btc_write_2byte(btcoexist, 0x42a,
321 0x0808);
322 break;
323 default:
324 break;
325 }
326 }
327
328 coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
329 }
330
halbtc8192e2ant_ampdu_max_time(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)331 void halbtc8192e2ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
332 IN boolean force_exec, IN u8 type)
333 {
334 coex_dm->cur_ampdu_time_type = type;
335
336 if (force_exec ||
337 (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
338 switch (coex_dm->cur_ampdu_time_type) {
339 case 0: /* normal mode */
340 btcoexist->btc_write_1byte(btcoexist, 0x456,
341 coex_dm->backup_ampdu_max_time);
342 break;
343 case 1: /* AMPDU timw = 0x38 * 32us */
344 btcoexist->btc_write_1byte(btcoexist, 0x456,
345 0x38);
346 break;
347 default:
348 break;
349 }
350 }
351
352 coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
353 }
354
halbtc8192e2ant_limited_tx(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 ra_mask_type,IN u8 arfr_type,IN u8 retry_limit_type,IN u8 ampdu_time_type)355 void halbtc8192e2ant_limited_tx(IN struct btc_coexist *btcoexist,
356 IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
357 IN u8 retry_limit_type, IN u8 ampdu_time_type)
358 {
359 u32 dis_ra_mask = 0x0;
360
361 coex_dm->cur_ra_mask_type = ra_mask_type;
362 dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist,
363 coex_dm->cur_ss_type, ra_mask_type);
364 halbtc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask);
365
366 halbtc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec,
367 arfr_type);
368 halbtc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
369 halbtc8192e2ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
370 }
371
halbtc8192e2ant_limited_rx(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rej_ap_agg_pkt,IN boolean bt_ctrl_agg_buf_size,IN u8 agg_buf_size)372 void halbtc8192e2ant_limited_rx(IN struct btc_coexist *btcoexist,
373 IN boolean force_exec, IN boolean rej_ap_agg_pkt,
374 IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
375 {
376 boolean reject_rx_agg = rej_ap_agg_pkt;
377 boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
378 u8 rx_agg_size = agg_buf_size;
379
380 /* ============================================ */
381 /* Rx Aggregation related setting */
382 /* ============================================ */
383 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
384 &reject_rx_agg);
385 /* decide BT control aggregation buf size or not */
386 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
387 &bt_ctrl_rx_agg_size);
388 /* aggregation buf size, only work when BT control Rx aggregation size. */
389 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
390 /* real update aggregation setting */
391 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
392
393
394 }
395
halbtc8192e2ant_monitor_bt_ctr(IN struct btc_coexist * btcoexist)396 void halbtc8192e2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
397 {
398 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
399 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
400
401 reg_hp_txrx = 0x770;
402 reg_lp_txrx = 0x774;
403
404 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
405 reg_hp_tx = u32tmp & MASKLWORD;
406 reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
407
408 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
409 reg_lp_tx = u32tmp & MASKLWORD;
410 reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
411
412 coex_sta->high_priority_tx = reg_hp_tx;
413 coex_sta->high_priority_rx = reg_hp_rx;
414 coex_sta->low_priority_tx = reg_lp_tx;
415 coex_sta->low_priority_rx = reg_lp_rx;
416
417 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
418 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
419 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
420 BTC_TRACE(trace_buf);
421 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
422 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
423 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
424 BTC_TRACE(trace_buf);
425
426 /* reset counter */
427 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
428 }
429
halbtc8192e2ant_query_bt_info(IN struct btc_coexist * btcoexist)430 void halbtc8192e2ant_query_bt_info(IN struct btc_coexist *btcoexist)
431 {
432 u8 h2c_parameter[1] = {0};
433
434 coex_sta->c2h_bt_info_req_sent = true;
435
436 h2c_parameter[0] |= BIT(0); /* trigger */
437
438 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
439 }
440
halbtc8192e2ant_is_wifi_status_changed(IN struct btc_coexist * btcoexist)441 boolean halbtc8192e2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
442 {
443 static boolean pre_wifi_busy = false, pre_under_4way = false,
444 pre_bt_hs_on = false;
445 boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
446 boolean wifi_connected = false;
447
448 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
449 &wifi_connected);
450 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
451 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
452 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
453 &under_4way);
454
455 if (wifi_connected) {
456 if (wifi_busy != pre_wifi_busy) {
457 pre_wifi_busy = wifi_busy;
458 return true;
459 }
460 if (under_4way != pre_under_4way) {
461 pre_under_4way = under_4way;
462 return true;
463 }
464 if (bt_hs_on != pre_bt_hs_on) {
465 pre_bt_hs_on = bt_hs_on;
466 return true;
467 }
468 }
469
470 return false;
471 }
472
halbtc8192e2ant_update_bt_link_info(IN struct btc_coexist * btcoexist)473 void halbtc8192e2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
474 {
475 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
476 boolean bt_hs_on = false;
477
478 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
479
480 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
481 bt_link_info->sco_exist = coex_sta->sco_exist;
482 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
483 bt_link_info->pan_exist = coex_sta->pan_exist;
484 bt_link_info->hid_exist = coex_sta->hid_exist;
485
486 /* work around for HS mode. */
487 if (bt_hs_on) {
488 bt_link_info->pan_exist = true;
489 bt_link_info->bt_link_exist = true;
490 }
491
492 /* check if Sco only */
493 if (bt_link_info->sco_exist &&
494 !bt_link_info->a2dp_exist &&
495 !bt_link_info->pan_exist &&
496 !bt_link_info->hid_exist)
497 bt_link_info->sco_only = true;
498 else
499 bt_link_info->sco_only = false;
500
501 /* check if A2dp only */
502 if (!bt_link_info->sco_exist &&
503 bt_link_info->a2dp_exist &&
504 !bt_link_info->pan_exist &&
505 !bt_link_info->hid_exist)
506 bt_link_info->a2dp_only = true;
507 else
508 bt_link_info->a2dp_only = false;
509
510 /* check if Pan only */
511 if (!bt_link_info->sco_exist &&
512 !bt_link_info->a2dp_exist &&
513 bt_link_info->pan_exist &&
514 !bt_link_info->hid_exist)
515 bt_link_info->pan_only = true;
516 else
517 bt_link_info->pan_only = false;
518
519 /* check if Hid only */
520 if (!bt_link_info->sco_exist &&
521 !bt_link_info->a2dp_exist &&
522 !bt_link_info->pan_exist &&
523 bt_link_info->hid_exist)
524 bt_link_info->hid_only = true;
525 else
526 bt_link_info->hid_only = false;
527 }
528
halbtc8192e2ant_action_algorithm(IN struct btc_coexist * btcoexist)529 u8 halbtc8192e2ant_action_algorithm(IN struct btc_coexist *btcoexist)
530 {
531 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
532 struct btc_stack_info *stack_info = &btcoexist->stack_info;
533 boolean bt_hs_on = false;
534 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
535 u8 num_of_diff_profile = 0;
536
537 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
538
539 if (!bt_link_info->bt_link_exist) {
540 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
541 "[BTCoex], No BT link exists!!!\n");
542 BTC_TRACE(trace_buf);
543 return algorithm;
544 }
545
546 if (bt_link_info->sco_exist)
547 num_of_diff_profile++;
548 if (bt_link_info->hid_exist)
549 num_of_diff_profile++;
550 if (bt_link_info->pan_exist)
551 num_of_diff_profile++;
552 if (bt_link_info->a2dp_exist)
553 num_of_diff_profile++;
554
555 if (num_of_diff_profile == 1) {
556 if (bt_link_info->sco_exist) {
557 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
558 "[BTCoex], SCO only\n");
559 BTC_TRACE(trace_buf);
560 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
561 } else {
562 if (bt_link_info->hid_exist) {
563 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
564 "[BTCoex], HID only\n");
565 BTC_TRACE(trace_buf);
566 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
567 } else if (bt_link_info->a2dp_exist) {
568 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
569 "[BTCoex], A2DP only\n");
570 BTC_TRACE(trace_buf);
571 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
572 } else if (bt_link_info->pan_exist) {
573 if (bt_hs_on) {
574 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
575 "[BTCoex], PAN(HS) only\n");
576 BTC_TRACE(trace_buf);
577 algorithm =
578 BT_8192E_2ANT_COEX_ALGO_PANHS;
579 } else {
580 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
581 "[BTCoex], PAN(EDR) only\n");
582 BTC_TRACE(trace_buf);
583 algorithm =
584 BT_8192E_2ANT_COEX_ALGO_PANEDR;
585 }
586 }
587 }
588 } else if (num_of_diff_profile == 2) {
589 if (bt_link_info->sco_exist) {
590 if (bt_link_info->hid_exist) {
591 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
592 "[BTCoex], SCO + HID\n");
593 BTC_TRACE(trace_buf);
594 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
595 } else if (bt_link_info->a2dp_exist) {
596 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
597 "[BTCoex], SCO + A2DP ==> SCO\n");
598 BTC_TRACE(trace_buf);
599 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
600 } else if (bt_link_info->pan_exist) {
601 if (bt_hs_on) {
602 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
603 "[BTCoex], SCO + PAN(HS)\n");
604 BTC_TRACE(trace_buf);
605 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
606 } else {
607 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
608 "[BTCoex], SCO + PAN(EDR)\n");
609 BTC_TRACE(trace_buf);
610 algorithm =
611 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
612 }
613 }
614 } else {
615 if (bt_link_info->hid_exist &&
616 bt_link_info->a2dp_exist) {
617 if (stack_info->num_of_hid >= 2) {
618 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
619 "[BTCoex], HID*2 + A2DP\n");
620 BTC_TRACE(trace_buf);
621 algorithm =
622 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
623 } else {
624 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
625 "[BTCoex], HID + A2DP\n");
626 BTC_TRACE(trace_buf);
627 algorithm =
628 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
629 }
630 } else if (bt_link_info->hid_exist &&
631 bt_link_info->pan_exist) {
632 if (bt_hs_on) {
633 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
634 "[BTCoex], HID + PAN(HS)\n");
635 BTC_TRACE(trace_buf);
636 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
637 } else {
638 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
639 "[BTCoex], HID + PAN(EDR)\n");
640 BTC_TRACE(trace_buf);
641 algorithm =
642 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
643 }
644 } else if (bt_link_info->pan_exist &&
645 bt_link_info->a2dp_exist) {
646 if (bt_hs_on) {
647 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
648 "[BTCoex], A2DP + PAN(HS)\n");
649 BTC_TRACE(trace_buf);
650 algorithm =
651 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
652 } else {
653 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
654 "[BTCoex], A2DP + PAN(EDR)\n");
655 BTC_TRACE(trace_buf);
656 algorithm =
657 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
658 }
659 }
660 }
661 } else if (num_of_diff_profile == 3) {
662 if (bt_link_info->sco_exist) {
663 if (bt_link_info->hid_exist &&
664 bt_link_info->a2dp_exist) {
665 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
666 "[BTCoex], SCO + HID + A2DP ==> HID\n");
667 BTC_TRACE(trace_buf);
668 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
669 } else if (bt_link_info->hid_exist &&
670 bt_link_info->pan_exist) {
671 if (bt_hs_on) {
672 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
673 "[BTCoex], SCO + HID + PAN(HS)\n");
674 BTC_TRACE(trace_buf);
675 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
676 } else {
677 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
678 "[BTCoex], SCO + HID + PAN(EDR)\n");
679 BTC_TRACE(trace_buf);
680 algorithm =
681 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
682 }
683 } else if (bt_link_info->pan_exist &&
684 bt_link_info->a2dp_exist) {
685 if (bt_hs_on) {
686 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
687 "[BTCoex], SCO + A2DP + PAN(HS)\n");
688 BTC_TRACE(trace_buf);
689 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
690 } else {
691 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
692 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
693 BTC_TRACE(trace_buf);
694 algorithm =
695 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
696 }
697 }
698 } else {
699 if (bt_link_info->hid_exist &&
700 bt_link_info->pan_exist &&
701 bt_link_info->a2dp_exist) {
702 if (bt_hs_on) {
703 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
704 "[BTCoex], HID + A2DP + PAN(HS)\n");
705 BTC_TRACE(trace_buf);
706 algorithm =
707 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
708 } else {
709 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
710 "[BTCoex], HID + A2DP + PAN(EDR)\n");
711 BTC_TRACE(trace_buf);
712 algorithm =
713 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
714 }
715 }
716 }
717 } else if (num_of_diff_profile >= 3) {
718 if (bt_link_info->sco_exist) {
719 if (bt_link_info->hid_exist &&
720 bt_link_info->pan_exist &&
721 bt_link_info->a2dp_exist) {
722 if (bt_hs_on) {
723 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
724 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
725 BTC_TRACE(trace_buf);
726 } else {
727 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
728 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
729 BTC_TRACE(trace_buf);
730 algorithm =
731 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
732 }
733 }
734 }
735 }
736
737 return algorithm;
738 }
739
halbtc8192e2ant_set_fw_dac_swing_level(IN struct btc_coexist * btcoexist,IN u8 dac_swing_lvl)740 void halbtc8192e2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
741 IN u8 dac_swing_lvl)
742 {
743 u8 h2c_parameter[1] = {0};
744
745 /* There are several type of dacswing */
746 /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
747 h2c_parameter[0] = dac_swing_lvl;
748
749 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
750 }
751
halbtc8192e2ant_set_fw_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN u8 dec_bt_pwr_lvl)752 void halbtc8192e2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
753 IN u8 dec_bt_pwr_lvl)
754 {
755 u8 h2c_parameter[1] = {0};
756
757 h2c_parameter[0] = dec_bt_pwr_lvl;
758
759 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
760 }
761
halbtc8192e2ant_dec_bt_pwr(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 dec_bt_pwr_lvl)762 void halbtc8192e2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
763 IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
764 {
765 coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
766
767 if (!force_exec) {
768 #if 0 /* work around, avoid h2c command fail. */
769 if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
770 return;
771 #endif
772 }
773 halbtc8192e2ant_set_fw_dec_bt_pwr(btcoexist,
774 coex_dm->cur_bt_dec_pwr_lvl);
775
776 coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
777 }
778
halbtc8192e2ant_set_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean enable_auto_report)779 void halbtc8192e2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
780 IN boolean enable_auto_report)
781 {
782 u8 h2c_parameter[1] = {0};
783
784 h2c_parameter[0] = 0;
785
786 if (enable_auto_report)
787 h2c_parameter[0] |= BIT(0);
788
789 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
790 }
791
halbtc8192e2ant_bt_auto_report(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable_auto_report)792 void halbtc8192e2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
793 IN boolean force_exec, IN boolean enable_auto_report)
794 {
795 coex_dm->cur_bt_auto_report = enable_auto_report;
796
797 if (!force_exec) {
798 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
799 return;
800 }
801 halbtc8192e2ant_set_bt_auto_report(btcoexist,
802 coex_dm->cur_bt_auto_report);
803
804 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
805 }
806
halbtc8192e2ant_fw_dac_swing_lvl(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 fw_dac_swing_lvl)807 void halbtc8192e2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
808 IN boolean force_exec, IN u8 fw_dac_swing_lvl)
809 {
810 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
811
812 if (!force_exec) {
813 if (coex_dm->pre_fw_dac_swing_lvl ==
814 coex_dm->cur_fw_dac_swing_lvl)
815 return;
816 }
817
818 halbtc8192e2ant_set_fw_dac_swing_level(btcoexist,
819 coex_dm->cur_fw_dac_swing_lvl);
820
821 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
822 }
823
halbtc8192e2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist * btcoexist,IN boolean rx_rf_shrink_on)824 void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
825 IN boolean rx_rf_shrink_on)
826 {
827 if (rx_rf_shrink_on) {
828 /* Shrink RF Rx LPF corner */
829 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
830 "[BTCoex], Shrink RF Rx LPF corner!!\n");
831 BTC_TRACE(trace_buf);
832 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
833 0xffffc);
834 } else {
835 /* Resume RF Rx LPF corner */
836 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
837 if (btcoexist->initilized) {
838 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
839 "[BTCoex], Resume RF Rx LPF corner!!\n");
840 BTC_TRACE(trace_buf);
841 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
842 0xfffff, coex_dm->bt_rf_0x1e_backup);
843 }
844 }
845 }
846
halbtc8192e2ant_rf_shrink(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean rx_rf_shrink_on)847 void halbtc8192e2ant_rf_shrink(IN struct btc_coexist *btcoexist,
848 IN boolean force_exec, IN boolean rx_rf_shrink_on)
849 {
850 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
851
852 if (!force_exec) {
853 if (coex_dm->pre_rf_rx_lpf_shrink ==
854 coex_dm->cur_rf_rx_lpf_shrink)
855 return;
856 }
857 halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
858 coex_dm->cur_rf_rx_lpf_shrink);
859
860 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
861 }
862
halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist * btcoexist,IN boolean low_penalty_ra)863 void halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
864 *btcoexist, IN boolean low_penalty_ra)
865 {
866 u8 h2c_parameter[6] = {0};
867
868 h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
869
870 if (low_penalty_ra) {
871 h2c_parameter[1] |= BIT(0);
872 h2c_parameter[2] =
873 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
874 h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
875 h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
876 h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
877 }
878
879 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
880 }
881
halbtc8192e2ant_low_penalty_ra(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean low_penalty_ra)882 void halbtc8192e2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
883 IN boolean force_exec, IN boolean low_penalty_ra)
884 {
885 coex_dm->cur_low_penalty_ra = low_penalty_ra;
886
887 if (!force_exec) {
888 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
889 return;
890 }
891 halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
892 coex_dm->cur_low_penalty_ra);
893
894 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
895 }
896
halbtc8192e2ant_set_dac_swing_reg(IN struct btc_coexist * btcoexist,IN u32 level)897 void halbtc8192e2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
898 IN u32 level)
899 {
900 u8 val = (u8)level;
901
902 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
903 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
904 BTC_TRACE(trace_buf);
905 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
906 }
907
halbtc8192e2ant_set_sw_full_time_dac_swing(IN struct btc_coexist * btcoexist,IN boolean sw_dac_swing_on,IN u32 sw_dac_swing_lvl)908 void halbtc8192e2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
909 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
910 {
911 if (sw_dac_swing_on)
912 halbtc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
913 else
914 halbtc8192e2ant_set_dac_swing_reg(btcoexist, 0x18);
915 }
916
917
halbtc8192e2ant_dac_swing(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean dac_swing_on,IN u32 dac_swing_lvl)918 void halbtc8192e2ant_dac_swing(IN struct btc_coexist *btcoexist,
919 IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
920 {
921 coex_dm->cur_dac_swing_on = dac_swing_on;
922 coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
923
924 if (!force_exec) {
925 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
926 (coex_dm->pre_dac_swing_lvl ==
927 coex_dm->cur_dac_swing_lvl))
928 return;
929 }
930 delay_ms(30);
931 halbtc8192e2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
932 dac_swing_lvl);
933
934 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
935 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
936 }
937
halbtc8192e2ant_set_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean adc_back_off)938 void halbtc8192e2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
939 IN boolean adc_back_off)
940 {
941 if (adc_back_off) {
942 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
943 "[BTCoex], BB BackOff Level On!\n");
944 BTC_TRACE(trace_buf);
945 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
946 } else {
947 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
948 "[BTCoex], BB BackOff Level Off!\n");
949 BTC_TRACE(trace_buf);
950 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
951 }
952 }
953
halbtc8192e2ant_adc_back_off(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean adc_back_off)954 void halbtc8192e2ant_adc_back_off(IN struct btc_coexist *btcoexist,
955 IN boolean force_exec, IN boolean adc_back_off)
956 {
957 coex_dm->cur_adc_back_off = adc_back_off;
958
959 if (!force_exec) {
960 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
961 return;
962 }
963 halbtc8192e2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
964
965 coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
966 }
967
halbtc8192e2ant_set_agc_table(IN struct btc_coexist * btcoexist,IN boolean agc_table_en)968 void halbtc8192e2ant_set_agc_table(IN struct btc_coexist *btcoexist,
969 IN boolean agc_table_en)
970 {
971 /* =================BB AGC Gain Table */
972 if (agc_table_en) {
973 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
974 "[BTCoex], BB Agc Table On!\n");
975 BTC_TRACE(trace_buf);
976 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
977 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
978 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
979 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
980 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
981 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
982 } else {
983 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
984 "[BTCoex], BB Agc Table Off!\n");
985 BTC_TRACE(trace_buf);
986 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
987 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
988 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
989 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
990 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
991 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
992 }
993 }
994
halbtc8192e2ant_agc_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean agc_table_en)995 void halbtc8192e2ant_agc_table(IN struct btc_coexist *btcoexist,
996 IN boolean force_exec, IN boolean agc_table_en)
997 {
998 coex_dm->cur_agc_table_en = agc_table_en;
999
1000 if (!force_exec) {
1001 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1002 return;
1003 }
1004 halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1005
1006 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1007 }
1008
halbtc8192e2ant_set_coex_table(IN struct btc_coexist * btcoexist,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)1009 void halbtc8192e2ant_set_coex_table(IN struct btc_coexist *btcoexist,
1010 IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
1011 {
1012 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1013
1014 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1015
1016 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1017
1018 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1019 }
1020
halbtc8192e2ant_coex_table(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u32 val0x6c0,IN u32 val0x6c4,IN u32 val0x6c8,IN u8 val0x6cc)1021 void halbtc8192e2ant_coex_table(IN struct btc_coexist *btcoexist,
1022 IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
1023 IN u32 val0x6c8, IN u8 val0x6cc)
1024 {
1025 coex_dm->cur_val0x6c0 = val0x6c0;
1026 coex_dm->cur_val0x6c4 = val0x6c4;
1027 coex_dm->cur_val0x6c8 = val0x6c8;
1028 coex_dm->cur_val0x6cc = val0x6cc;
1029
1030 if (!force_exec) {
1031 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1032 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1033 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1034 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1035 return;
1036 }
1037 halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
1038 val0x6cc);
1039
1040 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1041 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1042 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1043 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1044 }
1045
halbtc8192e2ant_coex_table_with_type(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 type)1046 void halbtc8192e2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
1047 IN boolean force_exec, IN u8 type)
1048 {
1049 switch (type) {
1050 case 0:
1051 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1052 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3);
1053 break;
1054 case 1:
1055 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1056 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3);
1057 break;
1058 case 2:
1059 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1060 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3);
1061 break;
1062 case 3:
1063 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1064 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3);
1065 break;
1066 case 4:
1067 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1068 0xdfffdfff, 0x5ffb5ffb, 0xffffff, 0x3);
1069 break;
1070
1071 default:
1072 break;
1073 }
1074 }
1075
halbtc8192e2ant_set_fw_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean enable)1076 void halbtc8192e2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1077 IN boolean enable)
1078 {
1079 u8 h2c_parameter[1] = {0};
1080
1081 if (enable) {
1082 h2c_parameter[0] |= BIT(0); /* function enable */
1083 }
1084
1085 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1086 }
1087
halbtc8192e2ant_ignore_wlan_act(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean enable)1088 void halbtc8192e2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1089 IN boolean force_exec, IN boolean enable)
1090 {
1091 coex_dm->cur_ignore_wlan_act = enable;
1092
1093 if (!force_exec) {
1094 if (coex_dm->pre_ignore_wlan_act ==
1095 coex_dm->cur_ignore_wlan_act)
1096 return;
1097 }
1098 halbtc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1099
1100 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1101 }
1102
halbtc8192e2ant_set_fw_pstdma(IN struct btc_coexist * btcoexist,IN u8 byte1,IN u8 byte2,IN u8 byte3,IN u8 byte4,IN u8 byte5)1103 void halbtc8192e2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1104 IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1105 {
1106 u8 h2c_parameter[5] = {0};
1107
1108 h2c_parameter[0] = byte1;
1109 h2c_parameter[1] = byte2;
1110 h2c_parameter[2] = byte3;
1111 h2c_parameter[3] = byte4;
1112 h2c_parameter[4] = byte5;
1113
1114 coex_dm->ps_tdma_para[0] = byte1;
1115 coex_dm->ps_tdma_para[1] = byte2;
1116 coex_dm->ps_tdma_para[2] = byte3;
1117 coex_dm->ps_tdma_para[3] = byte4;
1118 coex_dm->ps_tdma_para[4] = byte5;
1119
1120 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1121 }
1122
halbtc8192e2ant_sw_mechanism1(IN struct btc_coexist * btcoexist,IN boolean shrink_rx_lpf,IN boolean low_penalty_ra,IN boolean limited_dig,IN boolean bt_lna_constrain)1123 void halbtc8192e2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
1124 IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
1125 IN boolean limited_dig, IN boolean bt_lna_constrain)
1126 {
1127 /*
1128 u32 wifi_bw;
1129
1130 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1131
1132 if(BTC_WIFI_BW_HT40 != wifi_bw)
1133 {
1134 if (shrink_rx_lpf)
1135 shrink_rx_lpf = false;
1136 }
1137 */
1138
1139 halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1140 /* halbtc8192e2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); */
1141 }
1142
halbtc8192e2ant_sw_mechanism2(IN struct btc_coexist * btcoexist,IN boolean agc_table_shift,IN boolean adc_back_off,IN boolean sw_dac_swing,IN u32 dac_swing_lvl)1143 void halbtc8192e2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
1144 IN boolean agc_table_shift, IN boolean adc_back_off,
1145 IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
1146 {
1147 halbtc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
1148 /* halbtc8192e2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
1149 halbtc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1150 dac_swing_lvl);
1151 }
1152
halbtc8192e2ant_set_ant_path(IN struct btc_coexist * btcoexist,IN u8 ant_pos_type,IN boolean init_hwcfg,IN boolean wifi_off)1153 void halbtc8192e2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1154 IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1155 {
1156 u32 u32tmp = 0;
1157
1158 if (init_hwcfg) {
1159 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
1160 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
1161 if (btcoexist->chip_interface == BTC_INTF_USB)
1162 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1163 else
1164 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1165
1166 /* 0x4c[27][24]='00', Set Antenna to BB */
1167 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1168 u32tmp &= ~BIT(24);
1169 u32tmp &= ~BIT(27);
1170 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1171 } else if (wifi_off) {
1172 if (btcoexist->chip_interface == BTC_INTF_USB)
1173 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1174 else
1175 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1176
1177 /* 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 */
1178 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1179 u32tmp |= BIT(24);
1180 u32tmp |= BIT(27);
1181 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1182 }
1183
1184 /* ext switch setting */
1185 switch (ant_pos_type) {
1186 case BTC_ANT_PATH_WIFI:
1187 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1188 break;
1189 case BTC_ANT_PATH_BT:
1190 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1191 break;
1192 default:
1193 case BTC_ANT_PATH_PTA:
1194 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1195 break;
1196 }
1197 }
1198
halbtc8192e2ant_ps_tdma(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN boolean turn_on,IN u8 type)1199 void halbtc8192e2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1200 IN boolean force_exec, IN boolean turn_on, IN u8 type)
1201 {
1202 coex_dm->cur_ps_tdma_on = turn_on;
1203 coex_dm->cur_ps_tdma = type;
1204
1205 if (!force_exec) {
1206 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1207 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1208 return;
1209 }
1210 if (turn_on) {
1211 switch (type) {
1212 case 1:
1213 default:
1214 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1215 0x1a, 0x1a, 0xe1, 0x90);
1216 break;
1217 case 2:
1218 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1219 0x12, 0x12, 0xe1, 0x90);
1220 break;
1221 case 3:
1222 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1223 0x1c, 0x3, 0xf1, 0x90);
1224 break;
1225 case 4:
1226 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1227 0x10, 0x3, 0xf1, 0x90);
1228 break;
1229 case 5:
1230 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1231 0x1a, 0x1a, 0x60, 0x90);
1232 break;
1233 case 6:
1234 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1235 0x12, 0x12, 0x60, 0x90);
1236 break;
1237 case 7:
1238 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1239 0x1c, 0x3, 0x70, 0x90);
1240 break;
1241 case 8:
1242 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xa3,
1243 0x10, 0x3, 0x70, 0x90);
1244 break;
1245 case 9:
1246 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1247 0x1a, 0x1a, 0xe1, 0x10);
1248 break;
1249 case 10:
1250 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1251 0x12, 0x12, 0xe1, 0x10);
1252 break;
1253 case 11:
1254 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1255 0x1c, 0x3, 0xf1, 0x10);
1256 break;
1257 case 12:
1258 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1259 0x10, 0x3, 0xf1, 0x10);
1260 break;
1261 case 13:
1262 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1263 0x1a, 0x1a, 0xe0, 0x10);
1264 break;
1265 case 14:
1266 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1267 0x12, 0x12, 0xe0, 0x10);
1268 break;
1269 case 15:
1270 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1271 0x1c, 0x3, 0xf0, 0x10);
1272 break;
1273 case 16:
1274 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1275 0x12, 0x3, 0xf0, 0x10);
1276 break;
1277 case 17:
1278 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61,
1279 0x20, 0x03, 0x10, 0x10);
1280 break;
1281 case 18:
1282 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1283 0x5, 0x5, 0xe1, 0x90);
1284 break;
1285 case 19:
1286 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1287 0x25, 0x25, 0xe1, 0x90);
1288 break;
1289 case 20:
1290 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1291 0x25, 0x25, 0x60, 0x90);
1292 break;
1293 case 21:
1294 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1295 0x15, 0x03, 0x70, 0x90);
1296 break;
1297 case 71:
1298 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1299 0x1a, 0x1a, 0xe1, 0x90);
1300 break;
1301 }
1302 } else {
1303 /* disable PS tdma */
1304 switch (type) {
1305 default:
1306 case 0: /* ANT2PTA, 0x778=1 */
1307 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x8,
1308 0x0, 0x0, 0x0, 0x0);
1309 halbtc8192e2ant_set_ant_path(btcoexist,
1310 BTC_ANT_PATH_PTA, false, false);
1311 break;
1312 case 1: /* ANT2BT, 0x778=3 */
1313 halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x0,
1314 0x0, 0x0, 0x8, 0x0);
1315 delay_ms(5);
1316 halbtc8192e2ant_set_ant_path(btcoexist,
1317 BTC_ANT_PATH_BT, false, false);
1318 break;
1319
1320 }
1321 }
1322
1323 /* update pre state */
1324 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1325 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1326 }
1327
halbtc8192e2ant_set_switch_ss_type(IN struct btc_coexist * btcoexist,IN u8 ss_type)1328 void halbtc8192e2ant_set_switch_ss_type(IN struct btc_coexist *btcoexist,
1329 IN u8 ss_type)
1330 {
1331 u8 mimo_ps = BTC_MIMO_PS_DYNAMIC;
1332 u32 dis_ra_mask = 0x0;
1333
1334 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1335 "[BTCoex], REAL set SS Type = %d\n", ss_type);
1336 BTC_TRACE(trace_buf);
1337
1338 dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist, ss_type,
1339 coex_dm->cur_ra_mask_type);
1340 halbtc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask);
1341
1342 if (ss_type == 1) {
1343 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1344 /* switch ofdm path */
1345 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1346 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1347 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1348 /* switch cck patch */
1349 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); */
1350 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); */
1351 mimo_ps = BTC_MIMO_PS_STATIC;
1352 } else if (ss_type == 2) {
1353 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1354 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1355 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1356 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1357 /* remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu */
1358 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); */
1359 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); */
1360 mimo_ps = BTC_MIMO_PS_DYNAMIC;
1361 }
1362
1363 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS,
1364 &mimo_ps); /* set rx 1ss or 2ss */
1365 }
1366
halbtc8192e2ant_switch_ss_type(IN struct btc_coexist * btcoexist,IN boolean force_exec,IN u8 new_ss_type)1367 void halbtc8192e2ant_switch_ss_type(IN struct btc_coexist *btcoexist,
1368 IN boolean force_exec, IN u8 new_ss_type)
1369 {
1370 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1371 "[BTCoex], %s Switch SS Type = %d\n",
1372 (force_exec ? "force to" : ""), new_ss_type);
1373 BTC_TRACE(trace_buf);
1374 coex_dm->cur_ss_type = new_ss_type;
1375
1376 if (!force_exec) {
1377 if (coex_dm->pre_ss_type == coex_dm->cur_ss_type)
1378 return;
1379 }
1380 halbtc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type);
1381
1382 coex_dm->pre_ss_type = coex_dm->cur_ss_type;
1383 }
1384
halbtc8192e2ant_coex_all_off(IN struct btc_coexist * btcoexist)1385 void halbtc8192e2ant_coex_all_off(IN struct btc_coexist *btcoexist)
1386 {
1387 /* fw all off */
1388 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1389 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1390 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1391
1392 /* sw all off */
1393 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1394 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1395
1396 /* hw all off */
1397 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1398 }
1399
halbtc8192e2ant_init_coex_dm(IN struct btc_coexist * btcoexist)1400 void halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
1401 {
1402 /* force to reset coex mechanism */
1403
1404 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1405 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1406 halbtc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
1407
1408 halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1409 halbtc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2);
1410
1411 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1412 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1413 }
1414
halbtc8192e2ant_action_bt_inquiry(IN struct btc_coexist * btcoexist)1415 void halbtc8192e2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
1416 {
1417 boolean low_pwr_disable = true;
1418
1419 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1420 &low_pwr_disable);
1421
1422 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1423
1424 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1425 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1426 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1427 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1428
1429 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1430 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1431 }
1432
halbtc8192e2ant_is_common_action(IN struct btc_coexist * btcoexist)1433 boolean halbtc8192e2ant_is_common_action(IN struct btc_coexist *btcoexist)
1434 {
1435 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1436 boolean common = false, wifi_connected = false, wifi_busy = false;
1437 boolean bt_hs_on = false, low_pwr_disable = false;
1438
1439 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1440 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1441 &wifi_connected);
1442 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1443
1444 if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1445 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1446 else
1447 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1448
1449 if (!wifi_connected) {
1450 low_pwr_disable = false;
1451 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1452 &low_pwr_disable);
1453
1454 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1455 "[BTCoex], Wifi non-connected idle!!\n");
1456 BTC_TRACE(trace_buf);
1457
1458 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1459 coex_dm->bt_status) ||
1460 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1461 coex_dm->bt_status)) {
1462 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1463 2);
1464 halbtc8192e2ant_coex_table_with_type(btcoexist,
1465 NORMAL_EXEC, 1);
1466 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1467 0);
1468 } else {
1469 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1470 1);
1471 halbtc8192e2ant_coex_table_with_type(btcoexist,
1472 NORMAL_EXEC, 0);
1473 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1474 1);
1475 }
1476
1477 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1478 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1479
1480 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
1481 false);
1482 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
1483 0x18);
1484
1485 common = true;
1486 } else {
1487 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1488 coex_dm->bt_status) {
1489 low_pwr_disable = false;
1490 btcoexist->btc_set(btcoexist,
1491 BTC_SET_ACT_DISABLE_LOW_POWER,
1492 &low_pwr_disable);
1493
1494 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1495 "[BTCoex], Wifi connected + BT non connected-idle!!\n");
1496 BTC_TRACE(trace_buf);
1497
1498 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1499 2);
1500 halbtc8192e2ant_coex_table_with_type(btcoexist,
1501 NORMAL_EXEC, 1);
1502 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1503 0);
1504 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1505 6);
1506 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1507
1508 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
1509 false, false);
1510 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1511 false, 0x18);
1512
1513 common = true;
1514 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1515 coex_dm->bt_status) {
1516 low_pwr_disable = true;
1517 btcoexist->btc_set(btcoexist,
1518 BTC_SET_ACT_DISABLE_LOW_POWER,
1519 &low_pwr_disable);
1520
1521 if (bt_hs_on)
1522 return false;
1523 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1524 "[BTCoex], Wifi connected + BT connected-idle!!\n");
1525 BTC_TRACE(trace_buf);
1526
1527 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1528 2);
1529 halbtc8192e2ant_coex_table_with_type(btcoexist,
1530 NORMAL_EXEC, 1);
1531 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1532 0);
1533 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1534 6);
1535 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1536
1537 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
1538 false, false);
1539 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1540 false, 0x18);
1541
1542 common = true;
1543 } else {
1544 low_pwr_disable = true;
1545 btcoexist->btc_set(btcoexist,
1546 BTC_SET_ACT_DISABLE_LOW_POWER,
1547 &low_pwr_disable);
1548
1549 if (wifi_busy) {
1550 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1551 "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
1552 BTC_TRACE(trace_buf);
1553 common = false;
1554 } else {
1555 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1556 "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
1557 BTC_TRACE(trace_buf);
1558
1559 halbtc8192e2ant_switch_ss_type(btcoexist,
1560 NORMAL_EXEC, 1);
1561 halbtc8192e2ant_coex_table_with_type(btcoexist,
1562 NORMAL_EXEC, 2);
1563 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1564 true, 21);
1565 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist,
1566 NORMAL_EXEC, 6);
1567 halbtc8192e2ant_dec_bt_pwr(btcoexist,
1568 NORMAL_EXEC, 0);
1569 halbtc8192e2ant_sw_mechanism1(btcoexist, false,
1570 false, false, false);
1571 halbtc8192e2ant_sw_mechanism2(btcoexist, false,
1572 false, false, 0x18);
1573 common = true;
1574 }
1575 }
1576 }
1577
1578 return common;
1579 }
halbtc8192e2ant_tdma_duration_adjust(IN struct btc_coexist * btcoexist,IN boolean sco_hid,IN boolean tx_pause,IN u8 max_interval)1580 void halbtc8192e2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
1581 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
1582 {
1583 static s32 up, dn, m, n, wait_count;
1584 s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
1585 u8 retry_count = 0;
1586
1587
1588 if (!coex_dm->auto_tdma_adjust) {
1589 coex_dm->auto_tdma_adjust = true;
1590 {
1591 if (sco_hid) {
1592 if (tx_pause) {
1593 if (max_interval == 1) {
1594 halbtc8192e2ant_ps_tdma(
1595 btcoexist, NORMAL_EXEC,
1596 true, 13);
1597 coex_dm->ps_tdma_du_adj_type =
1598 13;
1599 } else if (max_interval == 2) {
1600 halbtc8192e2ant_ps_tdma(
1601 btcoexist, NORMAL_EXEC,
1602 true, 14);
1603 coex_dm->ps_tdma_du_adj_type =
1604 14;
1605 } else if (max_interval == 3) {
1606 halbtc8192e2ant_ps_tdma(
1607 btcoexist, NORMAL_EXEC,
1608 true, 15);
1609 coex_dm->ps_tdma_du_adj_type =
1610 15;
1611 } else {
1612 halbtc8192e2ant_ps_tdma(
1613 btcoexist, NORMAL_EXEC,
1614 true, 15);
1615 coex_dm->ps_tdma_du_adj_type =
1616 15;
1617 }
1618 } else {
1619 if (max_interval == 1) {
1620 halbtc8192e2ant_ps_tdma(
1621 btcoexist, NORMAL_EXEC,
1622 true, 9);
1623 coex_dm->ps_tdma_du_adj_type =
1624 9;
1625 } else if (max_interval == 2) {
1626 halbtc8192e2ant_ps_tdma(
1627 btcoexist, NORMAL_EXEC,
1628 true, 10);
1629 coex_dm->ps_tdma_du_adj_type =
1630 10;
1631 } else if (max_interval == 3) {
1632 halbtc8192e2ant_ps_tdma(
1633 btcoexist, NORMAL_EXEC,
1634 true, 11);
1635 coex_dm->ps_tdma_du_adj_type =
1636 11;
1637 } else {
1638 halbtc8192e2ant_ps_tdma(
1639 btcoexist, NORMAL_EXEC,
1640 true, 11);
1641 coex_dm->ps_tdma_du_adj_type =
1642 11;
1643 }
1644 }
1645 } else {
1646 if (tx_pause) {
1647 if (max_interval == 1) {
1648 halbtc8192e2ant_ps_tdma(
1649 btcoexist, NORMAL_EXEC,
1650 true, 5);
1651 coex_dm->ps_tdma_du_adj_type =
1652 5;
1653 } else if (max_interval == 2) {
1654 halbtc8192e2ant_ps_tdma(
1655 btcoexist, NORMAL_EXEC,
1656 true, 6);
1657 coex_dm->ps_tdma_du_adj_type =
1658 6;
1659 } else if (max_interval == 3) {
1660 halbtc8192e2ant_ps_tdma(
1661 btcoexist, NORMAL_EXEC,
1662 true, 7);
1663 coex_dm->ps_tdma_du_adj_type =
1664 7;
1665 } else {
1666 halbtc8192e2ant_ps_tdma(
1667 btcoexist, NORMAL_EXEC,
1668 true, 7);
1669 coex_dm->ps_tdma_du_adj_type =
1670 7;
1671 }
1672 } else {
1673 if (max_interval == 1) {
1674 halbtc8192e2ant_ps_tdma(
1675 btcoexist, NORMAL_EXEC,
1676 true, 1);
1677 coex_dm->ps_tdma_du_adj_type =
1678 1;
1679 } else if (max_interval == 2) {
1680 halbtc8192e2ant_ps_tdma(
1681 btcoexist, NORMAL_EXEC,
1682 true, 2);
1683 coex_dm->ps_tdma_du_adj_type =
1684 2;
1685 } else if (max_interval == 3) {
1686 halbtc8192e2ant_ps_tdma(
1687 btcoexist, NORMAL_EXEC,
1688 true, 3);
1689 coex_dm->ps_tdma_du_adj_type =
1690 3;
1691 } else {
1692 halbtc8192e2ant_ps_tdma(
1693 btcoexist, NORMAL_EXEC,
1694 true, 3);
1695 coex_dm->ps_tdma_du_adj_type =
1696 3;
1697 }
1698 }
1699 }
1700 }
1701 /* ============ */
1702 up = 0;
1703 dn = 0;
1704 m = 1;
1705 n = 3;
1706 result = 0;
1707 wait_count = 0;
1708 } else {
1709 /* accquire the BT TRx retry count from BT_Info byte2 */
1710 retry_count = coex_sta->bt_retry_cnt;
1711 result = 0;
1712 wait_count++;
1713
1714 if (retry_count ==
1715 0) { /* no retry in the last 2-second duration */
1716 up++;
1717 dn--;
1718
1719 if (dn <= 0)
1720 dn = 0;
1721
1722 if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
1723 wait_count = 0;
1724 n = 3;
1725 up = 0;
1726 dn = 0;
1727 result = 1;
1728 }
1729 } else if (retry_count <=
1730 3) { /* <=3 retry in the last 2-second duration */
1731 up--;
1732 dn++;
1733
1734 if (up <= 0)
1735 up = 0;
1736
1737 if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
1738 if (wait_count <= 2)
1739 m++; /* to avoid loop between the two levels */
1740 else
1741 m = 1;
1742
1743 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
1744 m = 20;
1745
1746 n = 3 * m;
1747 up = 0;
1748 dn = 0;
1749 wait_count = 0;
1750 result = -1;
1751 }
1752 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
1753 if (wait_count == 1)
1754 m++; /* to avoid loop between the two levels */
1755 else
1756 m = 1;
1757
1758 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
1759 m = 20;
1760
1761 n = 3 * m;
1762 up = 0;
1763 dn = 0;
1764 wait_count = 0;
1765 result = -1;
1766 }
1767
1768 if (max_interval == 1) {
1769 if (tx_pause) {
1770 if (coex_dm->cur_ps_tdma == 71) {
1771 halbtc8192e2ant_ps_tdma(btcoexist,
1772 NORMAL_EXEC, true, 5);
1773 coex_dm->ps_tdma_du_adj_type = 5;
1774 } else if (coex_dm->cur_ps_tdma == 1) {
1775 halbtc8192e2ant_ps_tdma(btcoexist,
1776 NORMAL_EXEC, true, 5);
1777 coex_dm->ps_tdma_du_adj_type = 5;
1778 } else if (coex_dm->cur_ps_tdma == 2) {
1779 halbtc8192e2ant_ps_tdma(btcoexist,
1780 NORMAL_EXEC, true, 6);
1781 coex_dm->ps_tdma_du_adj_type = 6;
1782 } else if (coex_dm->cur_ps_tdma == 3) {
1783 halbtc8192e2ant_ps_tdma(btcoexist,
1784 NORMAL_EXEC, true, 7);
1785 coex_dm->ps_tdma_du_adj_type = 7;
1786 } else if (coex_dm->cur_ps_tdma == 4) {
1787 halbtc8192e2ant_ps_tdma(btcoexist,
1788 NORMAL_EXEC, true, 8);
1789 coex_dm->ps_tdma_du_adj_type = 8;
1790 }
1791 if (coex_dm->cur_ps_tdma == 9) {
1792 halbtc8192e2ant_ps_tdma(btcoexist,
1793 NORMAL_EXEC, true, 13);
1794 coex_dm->ps_tdma_du_adj_type = 13;
1795 } else if (coex_dm->cur_ps_tdma == 10) {
1796 halbtc8192e2ant_ps_tdma(btcoexist,
1797 NORMAL_EXEC, true, 14);
1798 coex_dm->ps_tdma_du_adj_type = 14;
1799 } else if (coex_dm->cur_ps_tdma == 11) {
1800 halbtc8192e2ant_ps_tdma(btcoexist,
1801 NORMAL_EXEC, true, 15);
1802 coex_dm->ps_tdma_du_adj_type = 15;
1803 } else if (coex_dm->cur_ps_tdma == 12) {
1804 halbtc8192e2ant_ps_tdma(btcoexist,
1805 NORMAL_EXEC, true, 16);
1806 coex_dm->ps_tdma_du_adj_type = 16;
1807 }
1808
1809 if (result == -1) {
1810 if (coex_dm->cur_ps_tdma == 5) {
1811 halbtc8192e2ant_ps_tdma(
1812 btcoexist, NORMAL_EXEC,
1813 true, 6);
1814 coex_dm->ps_tdma_du_adj_type =
1815 6;
1816 } else if (coex_dm->cur_ps_tdma == 6) {
1817 halbtc8192e2ant_ps_tdma(
1818 btcoexist, NORMAL_EXEC,
1819 true, 7);
1820 coex_dm->ps_tdma_du_adj_type =
1821 7;
1822 } else if (coex_dm->cur_ps_tdma == 7) {
1823 halbtc8192e2ant_ps_tdma(
1824 btcoexist, NORMAL_EXEC,
1825 true, 8);
1826 coex_dm->ps_tdma_du_adj_type =
1827 8;
1828 } else if (coex_dm->cur_ps_tdma == 13) {
1829 halbtc8192e2ant_ps_tdma(
1830 btcoexist, NORMAL_EXEC,
1831 true, 14);
1832 coex_dm->ps_tdma_du_adj_type =
1833 14;
1834 } else if (coex_dm->cur_ps_tdma == 14) {
1835 halbtc8192e2ant_ps_tdma(
1836 btcoexist, NORMAL_EXEC,
1837 true, 15);
1838 coex_dm->ps_tdma_du_adj_type =
1839 15;
1840 } else if (coex_dm->cur_ps_tdma == 15) {
1841 halbtc8192e2ant_ps_tdma(
1842 btcoexist, NORMAL_EXEC,
1843 true, 16);
1844 coex_dm->ps_tdma_du_adj_type =
1845 16;
1846 }
1847 } else if (result == 1) {
1848 if (coex_dm->cur_ps_tdma == 8) {
1849 halbtc8192e2ant_ps_tdma(
1850 btcoexist, NORMAL_EXEC,
1851 true, 7);
1852 coex_dm->ps_tdma_du_adj_type =
1853 7;
1854 } else if (coex_dm->cur_ps_tdma == 7) {
1855 halbtc8192e2ant_ps_tdma(
1856 btcoexist, NORMAL_EXEC,
1857 true, 6);
1858 coex_dm->ps_tdma_du_adj_type =
1859 6;
1860 } else if (coex_dm->cur_ps_tdma == 6) {
1861 halbtc8192e2ant_ps_tdma(
1862 btcoexist, NORMAL_EXEC,
1863 true, 5);
1864 coex_dm->ps_tdma_du_adj_type =
1865 5;
1866 } else if (coex_dm->cur_ps_tdma == 16) {
1867 halbtc8192e2ant_ps_tdma(
1868 btcoexist, NORMAL_EXEC,
1869 true, 15);
1870 coex_dm->ps_tdma_du_adj_type =
1871 15;
1872 } else if (coex_dm->cur_ps_tdma == 15) {
1873 halbtc8192e2ant_ps_tdma(
1874 btcoexist, NORMAL_EXEC,
1875 true, 14);
1876 coex_dm->ps_tdma_du_adj_type =
1877 14;
1878 } else if (coex_dm->cur_ps_tdma == 14) {
1879 halbtc8192e2ant_ps_tdma(
1880 btcoexist, NORMAL_EXEC,
1881 true, 13);
1882 coex_dm->ps_tdma_du_adj_type =
1883 13;
1884 }
1885 }
1886 } else {
1887 if (coex_dm->cur_ps_tdma == 5) {
1888 halbtc8192e2ant_ps_tdma(btcoexist,
1889 NORMAL_EXEC, true, 71);
1890 coex_dm->ps_tdma_du_adj_type = 71;
1891 } else if (coex_dm->cur_ps_tdma == 6) {
1892 halbtc8192e2ant_ps_tdma(btcoexist,
1893 NORMAL_EXEC, true, 2);
1894 coex_dm->ps_tdma_du_adj_type = 2;
1895 } else if (coex_dm->cur_ps_tdma == 7) {
1896 halbtc8192e2ant_ps_tdma(btcoexist,
1897 NORMAL_EXEC, true, 3);
1898 coex_dm->ps_tdma_du_adj_type = 3;
1899 } else if (coex_dm->cur_ps_tdma == 8) {
1900 halbtc8192e2ant_ps_tdma(btcoexist,
1901 NORMAL_EXEC, true, 4);
1902 coex_dm->ps_tdma_du_adj_type = 4;
1903 }
1904 if (coex_dm->cur_ps_tdma == 13) {
1905 halbtc8192e2ant_ps_tdma(btcoexist,
1906 NORMAL_EXEC, true, 9);
1907 coex_dm->ps_tdma_du_adj_type = 9;
1908 } else if (coex_dm->cur_ps_tdma == 14) {
1909 halbtc8192e2ant_ps_tdma(btcoexist,
1910 NORMAL_EXEC, true, 10);
1911 coex_dm->ps_tdma_du_adj_type = 10;
1912 } else if (coex_dm->cur_ps_tdma == 15) {
1913 halbtc8192e2ant_ps_tdma(btcoexist,
1914 NORMAL_EXEC, true, 11);
1915 coex_dm->ps_tdma_du_adj_type = 11;
1916 } else if (coex_dm->cur_ps_tdma == 16) {
1917 halbtc8192e2ant_ps_tdma(btcoexist,
1918 NORMAL_EXEC, true, 12);
1919 coex_dm->ps_tdma_du_adj_type = 12;
1920 }
1921
1922 if (result == -1) {
1923 if (coex_dm->cur_ps_tdma == 71) {
1924 halbtc8192e2ant_ps_tdma(
1925 btcoexist, NORMAL_EXEC,
1926 true, 1);
1927 coex_dm->ps_tdma_du_adj_type =
1928 1;
1929 } else if (coex_dm->cur_ps_tdma == 1) {
1930 halbtc8192e2ant_ps_tdma(
1931 btcoexist, NORMAL_EXEC,
1932 true, 2);
1933 coex_dm->ps_tdma_du_adj_type =
1934 2;
1935 } else if (coex_dm->cur_ps_tdma == 2) {
1936 halbtc8192e2ant_ps_tdma(
1937 btcoexist, NORMAL_EXEC,
1938 true, 3);
1939 coex_dm->ps_tdma_du_adj_type =
1940 3;
1941 } else if (coex_dm->cur_ps_tdma == 3) {
1942 halbtc8192e2ant_ps_tdma(
1943 btcoexist, NORMAL_EXEC,
1944 true, 4);
1945 coex_dm->ps_tdma_du_adj_type =
1946 4;
1947 } else if (coex_dm->cur_ps_tdma == 9) {
1948 halbtc8192e2ant_ps_tdma(
1949 btcoexist, NORMAL_EXEC,
1950 true, 10);
1951 coex_dm->ps_tdma_du_adj_type =
1952 10;
1953 } else if (coex_dm->cur_ps_tdma == 10) {
1954 halbtc8192e2ant_ps_tdma(
1955 btcoexist, NORMAL_EXEC,
1956 true, 11);
1957 coex_dm->ps_tdma_du_adj_type =
1958 11;
1959 } else if (coex_dm->cur_ps_tdma == 11) {
1960 halbtc8192e2ant_ps_tdma(
1961 btcoexist, NORMAL_EXEC,
1962 true, 12);
1963 coex_dm->ps_tdma_du_adj_type =
1964 12;
1965 }
1966 } else if (result == 1) {
1967 if (coex_dm->cur_ps_tdma == 4) {
1968 halbtc8192e2ant_ps_tdma(
1969 btcoexist, NORMAL_EXEC,
1970 true, 3);
1971 coex_dm->ps_tdma_du_adj_type =
1972 3;
1973 } else if (coex_dm->cur_ps_tdma == 3) {
1974 halbtc8192e2ant_ps_tdma(
1975 btcoexist, NORMAL_EXEC,
1976 true, 2);
1977 coex_dm->ps_tdma_du_adj_type =
1978 2;
1979 } else if (coex_dm->cur_ps_tdma == 2) {
1980 halbtc8192e2ant_ps_tdma(
1981 btcoexist, NORMAL_EXEC,
1982 true, 1);
1983 coex_dm->ps_tdma_du_adj_type =
1984 1;
1985 } else if (coex_dm->cur_ps_tdma == 1) {
1986 halbtc8192e2ant_ps_tdma(
1987 btcoexist, NORMAL_EXEC,
1988 true, 71);
1989 coex_dm->ps_tdma_du_adj_type =
1990 71;
1991 } else if (coex_dm->cur_ps_tdma == 12) {
1992 halbtc8192e2ant_ps_tdma(
1993 btcoexist, NORMAL_EXEC,
1994 true, 11);
1995 coex_dm->ps_tdma_du_adj_type =
1996 11;
1997 } else if (coex_dm->cur_ps_tdma == 11) {
1998 halbtc8192e2ant_ps_tdma(
1999 btcoexist, NORMAL_EXEC,
2000 true, 10);
2001 coex_dm->ps_tdma_du_adj_type =
2002 10;
2003 } else if (coex_dm->cur_ps_tdma == 10) {
2004 halbtc8192e2ant_ps_tdma(
2005 btcoexist, NORMAL_EXEC,
2006 true, 9);
2007 coex_dm->ps_tdma_du_adj_type =
2008 9;
2009 }
2010 }
2011 }
2012 } else if (max_interval == 2) {
2013 if (tx_pause) {
2014 if (coex_dm->cur_ps_tdma == 1) {
2015 halbtc8192e2ant_ps_tdma(btcoexist,
2016 NORMAL_EXEC, true, 6);
2017 coex_dm->ps_tdma_du_adj_type = 6;
2018 } else if (coex_dm->cur_ps_tdma == 2) {
2019 halbtc8192e2ant_ps_tdma(btcoexist,
2020 NORMAL_EXEC, true, 6);
2021 coex_dm->ps_tdma_du_adj_type = 6;
2022 } else if (coex_dm->cur_ps_tdma == 3) {
2023 halbtc8192e2ant_ps_tdma(btcoexist,
2024 NORMAL_EXEC, true, 7);
2025 coex_dm->ps_tdma_du_adj_type = 7;
2026 } else if (coex_dm->cur_ps_tdma == 4) {
2027 halbtc8192e2ant_ps_tdma(btcoexist,
2028 NORMAL_EXEC, true, 8);
2029 coex_dm->ps_tdma_du_adj_type = 8;
2030 }
2031 if (coex_dm->cur_ps_tdma == 9) {
2032 halbtc8192e2ant_ps_tdma(btcoexist,
2033 NORMAL_EXEC, true, 14);
2034 coex_dm->ps_tdma_du_adj_type = 14;
2035 } else if (coex_dm->cur_ps_tdma == 10) {
2036 halbtc8192e2ant_ps_tdma(btcoexist,
2037 NORMAL_EXEC, true, 14);
2038 coex_dm->ps_tdma_du_adj_type = 14;
2039 } else if (coex_dm->cur_ps_tdma == 11) {
2040 halbtc8192e2ant_ps_tdma(btcoexist,
2041 NORMAL_EXEC, true, 15);
2042 coex_dm->ps_tdma_du_adj_type = 15;
2043 } else if (coex_dm->cur_ps_tdma == 12) {
2044 halbtc8192e2ant_ps_tdma(btcoexist,
2045 NORMAL_EXEC, true, 16);
2046 coex_dm->ps_tdma_du_adj_type = 16;
2047 }
2048 if (result == -1) {
2049 if (coex_dm->cur_ps_tdma == 5) {
2050 halbtc8192e2ant_ps_tdma(
2051 btcoexist, NORMAL_EXEC,
2052 true, 6);
2053 coex_dm->ps_tdma_du_adj_type =
2054 6;
2055 } else if (coex_dm->cur_ps_tdma == 6) {
2056 halbtc8192e2ant_ps_tdma(
2057 btcoexist, NORMAL_EXEC,
2058 true, 7);
2059 coex_dm->ps_tdma_du_adj_type =
2060 7;
2061 } else if (coex_dm->cur_ps_tdma == 7) {
2062 halbtc8192e2ant_ps_tdma(
2063 btcoexist, NORMAL_EXEC,
2064 true, 8);
2065 coex_dm->ps_tdma_du_adj_type =
2066 8;
2067 } else if (coex_dm->cur_ps_tdma == 13) {
2068 halbtc8192e2ant_ps_tdma(
2069 btcoexist, NORMAL_EXEC,
2070 true, 14);
2071 coex_dm->ps_tdma_du_adj_type =
2072 14;
2073 } else if (coex_dm->cur_ps_tdma == 14) {
2074 halbtc8192e2ant_ps_tdma(
2075 btcoexist, NORMAL_EXEC,
2076 true, 15);
2077 coex_dm->ps_tdma_du_adj_type =
2078 15;
2079 } else if (coex_dm->cur_ps_tdma == 15) {
2080 halbtc8192e2ant_ps_tdma(
2081 btcoexist, NORMAL_EXEC,
2082 true, 16);
2083 coex_dm->ps_tdma_du_adj_type =
2084 16;
2085 }
2086 } else if (result == 1) {
2087 if (coex_dm->cur_ps_tdma == 8) {
2088 halbtc8192e2ant_ps_tdma(
2089 btcoexist, NORMAL_EXEC,
2090 true, 7);
2091 coex_dm->ps_tdma_du_adj_type =
2092 7;
2093 } else if (coex_dm->cur_ps_tdma == 7) {
2094 halbtc8192e2ant_ps_tdma(
2095 btcoexist, NORMAL_EXEC,
2096 true, 6);
2097 coex_dm->ps_tdma_du_adj_type =
2098 6;
2099 } else if (coex_dm->cur_ps_tdma == 6) {
2100 halbtc8192e2ant_ps_tdma(
2101 btcoexist, NORMAL_EXEC,
2102 true, 6);
2103 coex_dm->ps_tdma_du_adj_type =
2104 6;
2105 } else if (coex_dm->cur_ps_tdma == 16) {
2106 halbtc8192e2ant_ps_tdma(
2107 btcoexist, NORMAL_EXEC,
2108 true, 15);
2109 coex_dm->ps_tdma_du_adj_type =
2110 15;
2111 } else if (coex_dm->cur_ps_tdma == 15) {
2112 halbtc8192e2ant_ps_tdma(
2113 btcoexist, NORMAL_EXEC,
2114 true, 14);
2115 coex_dm->ps_tdma_du_adj_type =
2116 14;
2117 } else if (coex_dm->cur_ps_tdma == 14) {
2118 halbtc8192e2ant_ps_tdma(
2119 btcoexist, NORMAL_EXEC,
2120 true, 14);
2121 coex_dm->ps_tdma_du_adj_type =
2122 14;
2123 }
2124 }
2125 } else {
2126 if (coex_dm->cur_ps_tdma == 5) {
2127 halbtc8192e2ant_ps_tdma(btcoexist,
2128 NORMAL_EXEC, true, 2);
2129 coex_dm->ps_tdma_du_adj_type = 2;
2130 } else if (coex_dm->cur_ps_tdma == 6) {
2131 halbtc8192e2ant_ps_tdma(btcoexist,
2132 NORMAL_EXEC, true, 2);
2133 coex_dm->ps_tdma_du_adj_type = 2;
2134 } else if (coex_dm->cur_ps_tdma == 7) {
2135 halbtc8192e2ant_ps_tdma(btcoexist,
2136 NORMAL_EXEC, true, 3);
2137 coex_dm->ps_tdma_du_adj_type = 3;
2138 } else if (coex_dm->cur_ps_tdma == 8) {
2139 halbtc8192e2ant_ps_tdma(btcoexist,
2140 NORMAL_EXEC, true, 4);
2141 coex_dm->ps_tdma_du_adj_type = 4;
2142 }
2143 if (coex_dm->cur_ps_tdma == 13) {
2144 halbtc8192e2ant_ps_tdma(btcoexist,
2145 NORMAL_EXEC, true, 10);
2146 coex_dm->ps_tdma_du_adj_type = 10;
2147 } else if (coex_dm->cur_ps_tdma == 14) {
2148 halbtc8192e2ant_ps_tdma(btcoexist,
2149 NORMAL_EXEC, true, 10);
2150 coex_dm->ps_tdma_du_adj_type = 10;
2151 } else if (coex_dm->cur_ps_tdma == 15) {
2152 halbtc8192e2ant_ps_tdma(btcoexist,
2153 NORMAL_EXEC, true, 11);
2154 coex_dm->ps_tdma_du_adj_type = 11;
2155 } else if (coex_dm->cur_ps_tdma == 16) {
2156 halbtc8192e2ant_ps_tdma(btcoexist,
2157 NORMAL_EXEC, true, 12);
2158 coex_dm->ps_tdma_du_adj_type = 12;
2159 }
2160 if (result == -1) {
2161 if (coex_dm->cur_ps_tdma == 1) {
2162 halbtc8192e2ant_ps_tdma(
2163 btcoexist, NORMAL_EXEC,
2164 true, 2);
2165 coex_dm->ps_tdma_du_adj_type =
2166 2;
2167 } else if (coex_dm->cur_ps_tdma == 2) {
2168 halbtc8192e2ant_ps_tdma(
2169 btcoexist, NORMAL_EXEC,
2170 true, 3);
2171 coex_dm->ps_tdma_du_adj_type =
2172 3;
2173 } else if (coex_dm->cur_ps_tdma == 3) {
2174 halbtc8192e2ant_ps_tdma(
2175 btcoexist, NORMAL_EXEC,
2176 true, 4);
2177 coex_dm->ps_tdma_du_adj_type =
2178 4;
2179 } else if (coex_dm->cur_ps_tdma == 9) {
2180 halbtc8192e2ant_ps_tdma(
2181 btcoexist, NORMAL_EXEC,
2182 true, 10);
2183 coex_dm->ps_tdma_du_adj_type =
2184 10;
2185 } else if (coex_dm->cur_ps_tdma == 10) {
2186 halbtc8192e2ant_ps_tdma(
2187 btcoexist, NORMAL_EXEC,
2188 true, 11);
2189 coex_dm->ps_tdma_du_adj_type =
2190 11;
2191 } else if (coex_dm->cur_ps_tdma == 11) {
2192 halbtc8192e2ant_ps_tdma(
2193 btcoexist, NORMAL_EXEC,
2194 true, 12);
2195 coex_dm->ps_tdma_du_adj_type =
2196 12;
2197 }
2198 } else if (result == 1) {
2199 if (coex_dm->cur_ps_tdma == 4) {
2200 halbtc8192e2ant_ps_tdma(
2201 btcoexist, NORMAL_EXEC,
2202 true, 3);
2203 coex_dm->ps_tdma_du_adj_type =
2204 3;
2205 } else if (coex_dm->cur_ps_tdma == 3) {
2206 halbtc8192e2ant_ps_tdma(
2207 btcoexist, NORMAL_EXEC,
2208 true, 2);
2209 coex_dm->ps_tdma_du_adj_type =
2210 2;
2211 } else if (coex_dm->cur_ps_tdma == 2) {
2212 halbtc8192e2ant_ps_tdma(
2213 btcoexist, NORMAL_EXEC,
2214 true, 2);
2215 coex_dm->ps_tdma_du_adj_type =
2216 2;
2217 } else if (coex_dm->cur_ps_tdma == 12) {
2218 halbtc8192e2ant_ps_tdma(
2219 btcoexist, NORMAL_EXEC,
2220 true, 11);
2221 coex_dm->ps_tdma_du_adj_type =
2222 11;
2223 } else if (coex_dm->cur_ps_tdma == 11) {
2224 halbtc8192e2ant_ps_tdma(
2225 btcoexist, NORMAL_EXEC,
2226 true, 10);
2227 coex_dm->ps_tdma_du_adj_type =
2228 10;
2229 } else if (coex_dm->cur_ps_tdma == 10) {
2230 halbtc8192e2ant_ps_tdma(
2231 btcoexist, NORMAL_EXEC,
2232 true, 10);
2233 coex_dm->ps_tdma_du_adj_type =
2234 10;
2235 }
2236 }
2237 }
2238 } else if (max_interval == 3) {
2239 if (tx_pause) {
2240 if (coex_dm->cur_ps_tdma == 1) {
2241 halbtc8192e2ant_ps_tdma(btcoexist,
2242 NORMAL_EXEC, true, 7);
2243 coex_dm->ps_tdma_du_adj_type = 7;
2244 } else if (coex_dm->cur_ps_tdma == 2) {
2245 halbtc8192e2ant_ps_tdma(btcoexist,
2246 NORMAL_EXEC, true, 7);
2247 coex_dm->ps_tdma_du_adj_type = 7;
2248 } else if (coex_dm->cur_ps_tdma == 3) {
2249 halbtc8192e2ant_ps_tdma(btcoexist,
2250 NORMAL_EXEC, true, 7);
2251 coex_dm->ps_tdma_du_adj_type = 7;
2252 } else if (coex_dm->cur_ps_tdma == 4) {
2253 halbtc8192e2ant_ps_tdma(btcoexist,
2254 NORMAL_EXEC, true, 8);
2255 coex_dm->ps_tdma_du_adj_type = 8;
2256 }
2257 if (coex_dm->cur_ps_tdma == 9) {
2258 halbtc8192e2ant_ps_tdma(btcoexist,
2259 NORMAL_EXEC, true, 15);
2260 coex_dm->ps_tdma_du_adj_type = 15;
2261 } else if (coex_dm->cur_ps_tdma == 10) {
2262 halbtc8192e2ant_ps_tdma(btcoexist,
2263 NORMAL_EXEC, true, 15);
2264 coex_dm->ps_tdma_du_adj_type = 15;
2265 } else if (coex_dm->cur_ps_tdma == 11) {
2266 halbtc8192e2ant_ps_tdma(btcoexist,
2267 NORMAL_EXEC, true, 15);
2268 coex_dm->ps_tdma_du_adj_type = 15;
2269 } else if (coex_dm->cur_ps_tdma == 12) {
2270 halbtc8192e2ant_ps_tdma(btcoexist,
2271 NORMAL_EXEC, true, 16);
2272 coex_dm->ps_tdma_du_adj_type = 16;
2273 }
2274 if (result == -1) {
2275 if (coex_dm->cur_ps_tdma == 5) {
2276 halbtc8192e2ant_ps_tdma(
2277 btcoexist, NORMAL_EXEC,
2278 true, 7);
2279 coex_dm->ps_tdma_du_adj_type =
2280 7;
2281 } else if (coex_dm->cur_ps_tdma == 6) {
2282 halbtc8192e2ant_ps_tdma(
2283 btcoexist, NORMAL_EXEC,
2284 true, 7);
2285 coex_dm->ps_tdma_du_adj_type =
2286 7;
2287 } else if (coex_dm->cur_ps_tdma == 7) {
2288 halbtc8192e2ant_ps_tdma(
2289 btcoexist, NORMAL_EXEC,
2290 true, 8);
2291 coex_dm->ps_tdma_du_adj_type =
2292 8;
2293 } else if (coex_dm->cur_ps_tdma == 13) {
2294 halbtc8192e2ant_ps_tdma(
2295 btcoexist, NORMAL_EXEC,
2296 true, 15);
2297 coex_dm->ps_tdma_du_adj_type =
2298 15;
2299 } else if (coex_dm->cur_ps_tdma == 14) {
2300 halbtc8192e2ant_ps_tdma(
2301 btcoexist, NORMAL_EXEC,
2302 true, 15);
2303 coex_dm->ps_tdma_du_adj_type =
2304 15;
2305 } else if (coex_dm->cur_ps_tdma == 15) {
2306 halbtc8192e2ant_ps_tdma(
2307 btcoexist, NORMAL_EXEC,
2308 true, 16);
2309 coex_dm->ps_tdma_du_adj_type =
2310 16;
2311 }
2312 } else if (result == 1) {
2313 if (coex_dm->cur_ps_tdma == 8) {
2314 halbtc8192e2ant_ps_tdma(
2315 btcoexist, NORMAL_EXEC,
2316 true, 7);
2317 coex_dm->ps_tdma_du_adj_type =
2318 7;
2319 } else if (coex_dm->cur_ps_tdma == 7) {
2320 halbtc8192e2ant_ps_tdma(
2321 btcoexist, NORMAL_EXEC,
2322 true, 7);
2323 coex_dm->ps_tdma_du_adj_type =
2324 7;
2325 } else if (coex_dm->cur_ps_tdma == 6) {
2326 halbtc8192e2ant_ps_tdma(
2327 btcoexist, NORMAL_EXEC,
2328 true, 7);
2329 coex_dm->ps_tdma_du_adj_type =
2330 7;
2331 } else if (coex_dm->cur_ps_tdma == 16) {
2332 halbtc8192e2ant_ps_tdma(
2333 btcoexist, NORMAL_EXEC,
2334 true, 15);
2335 coex_dm->ps_tdma_du_adj_type =
2336 15;
2337 } else if (coex_dm->cur_ps_tdma == 15) {
2338 halbtc8192e2ant_ps_tdma(
2339 btcoexist, NORMAL_EXEC,
2340 true, 15);
2341 coex_dm->ps_tdma_du_adj_type =
2342 15;
2343 } else if (coex_dm->cur_ps_tdma == 14) {
2344 halbtc8192e2ant_ps_tdma(
2345 btcoexist, NORMAL_EXEC,
2346 true, 15);
2347 coex_dm->ps_tdma_du_adj_type =
2348 15;
2349 }
2350 }
2351 } else {
2352 if (coex_dm->cur_ps_tdma == 5) {
2353 halbtc8192e2ant_ps_tdma(btcoexist,
2354 NORMAL_EXEC, true, 3);
2355 coex_dm->ps_tdma_du_adj_type = 3;
2356 } else if (coex_dm->cur_ps_tdma == 6) {
2357 halbtc8192e2ant_ps_tdma(btcoexist,
2358 NORMAL_EXEC, true, 3);
2359 coex_dm->ps_tdma_du_adj_type = 3;
2360 } else if (coex_dm->cur_ps_tdma == 7) {
2361 halbtc8192e2ant_ps_tdma(btcoexist,
2362 NORMAL_EXEC, true, 3);
2363 coex_dm->ps_tdma_du_adj_type = 3;
2364 } else if (coex_dm->cur_ps_tdma == 8) {
2365 halbtc8192e2ant_ps_tdma(btcoexist,
2366 NORMAL_EXEC, true, 4);
2367 coex_dm->ps_tdma_du_adj_type = 4;
2368 }
2369 if (coex_dm->cur_ps_tdma == 13) {
2370 halbtc8192e2ant_ps_tdma(btcoexist,
2371 NORMAL_EXEC, true, 11);
2372 coex_dm->ps_tdma_du_adj_type = 11;
2373 } else if (coex_dm->cur_ps_tdma == 14) {
2374 halbtc8192e2ant_ps_tdma(btcoexist,
2375 NORMAL_EXEC, true, 11);
2376 coex_dm->ps_tdma_du_adj_type = 11;
2377 } else if (coex_dm->cur_ps_tdma == 15) {
2378 halbtc8192e2ant_ps_tdma(btcoexist,
2379 NORMAL_EXEC, true, 11);
2380 coex_dm->ps_tdma_du_adj_type = 11;
2381 } else if (coex_dm->cur_ps_tdma == 16) {
2382 halbtc8192e2ant_ps_tdma(btcoexist,
2383 NORMAL_EXEC, true, 12);
2384 coex_dm->ps_tdma_du_adj_type = 12;
2385 }
2386 if (result == -1) {
2387 if (coex_dm->cur_ps_tdma == 1) {
2388 halbtc8192e2ant_ps_tdma(
2389 btcoexist, NORMAL_EXEC,
2390 true, 3);
2391 coex_dm->ps_tdma_du_adj_type =
2392 3;
2393 } else if (coex_dm->cur_ps_tdma == 2) {
2394 halbtc8192e2ant_ps_tdma(
2395 btcoexist, NORMAL_EXEC,
2396 true, 3);
2397 coex_dm->ps_tdma_du_adj_type =
2398 3;
2399 } else if (coex_dm->cur_ps_tdma == 3) {
2400 halbtc8192e2ant_ps_tdma(
2401 btcoexist, NORMAL_EXEC,
2402 true, 4);
2403 coex_dm->ps_tdma_du_adj_type =
2404 4;
2405 } else if (coex_dm->cur_ps_tdma == 9) {
2406 halbtc8192e2ant_ps_tdma(
2407 btcoexist, NORMAL_EXEC,
2408 true, 11);
2409 coex_dm->ps_tdma_du_adj_type =
2410 11;
2411 } else if (coex_dm->cur_ps_tdma == 10) {
2412 halbtc8192e2ant_ps_tdma(
2413 btcoexist, NORMAL_EXEC,
2414 true, 11);
2415 coex_dm->ps_tdma_du_adj_type =
2416 11;
2417 } else if (coex_dm->cur_ps_tdma == 11) {
2418 halbtc8192e2ant_ps_tdma(
2419 btcoexist, NORMAL_EXEC,
2420 true, 12);
2421 coex_dm->ps_tdma_du_adj_type =
2422 12;
2423 }
2424 } else if (result == 1) {
2425 if (coex_dm->cur_ps_tdma == 4) {
2426 halbtc8192e2ant_ps_tdma(
2427 btcoexist, NORMAL_EXEC,
2428 true, 3);
2429 coex_dm->ps_tdma_du_adj_type =
2430 3;
2431 } else if (coex_dm->cur_ps_tdma == 3) {
2432 halbtc8192e2ant_ps_tdma(
2433 btcoexist, NORMAL_EXEC,
2434 true, 3);
2435 coex_dm->ps_tdma_du_adj_type =
2436 3;
2437 } else if (coex_dm->cur_ps_tdma == 2) {
2438 halbtc8192e2ant_ps_tdma(
2439 btcoexist, NORMAL_EXEC,
2440 true, 3);
2441 coex_dm->ps_tdma_du_adj_type =
2442 3;
2443 } else if (coex_dm->cur_ps_tdma == 12) {
2444 halbtc8192e2ant_ps_tdma(
2445 btcoexist, NORMAL_EXEC,
2446 true, 11);
2447 coex_dm->ps_tdma_du_adj_type =
2448 11;
2449 } else if (coex_dm->cur_ps_tdma == 11) {
2450 halbtc8192e2ant_ps_tdma(
2451 btcoexist, NORMAL_EXEC,
2452 true, 11);
2453 coex_dm->ps_tdma_du_adj_type =
2454 11;
2455 } else if (coex_dm->cur_ps_tdma == 10) {
2456 halbtc8192e2ant_ps_tdma(
2457 btcoexist, NORMAL_EXEC,
2458 true, 11);
2459 coex_dm->ps_tdma_du_adj_type =
2460 11;
2461 }
2462 }
2463 }
2464 }
2465 }
2466
2467 /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
2468 /* then we have to adjust it back to the previous record one. */
2469 if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2470 boolean scan = false, link = false, roam = false;
2471 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2472 "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
2473 coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2474 BTC_TRACE(trace_buf);
2475
2476 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2477 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2478 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2479
2480 if (!scan && !link && !roam)
2481 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2482 coex_dm->ps_tdma_du_adj_type);
2483 else {
2484 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2485 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2486 BTC_TRACE(trace_buf);
2487 }
2488 }
2489 }
2490
2491 /* SCO only or SCO+PAN(HS) */
halbtc8192e2ant_action_sco(IN struct btc_coexist * btcoexist)2492 void halbtc8192e2ant_action_sco(IN struct btc_coexist *btcoexist)
2493 {
2494 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2495 u32 wifi_bw;
2496
2497 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2498 0);
2499
2500 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2501 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2502
2503 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2504
2505 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2506
2507 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2508
2509 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2510 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2511 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2512 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2513 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2514 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2515 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2516 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2517 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2518 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2519 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2520 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2521 }
2522
2523 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2524
2525 /* sw mechanism */
2526 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2527 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2528 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2529 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2530 false, false);
2531 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2532 false, 0x6);
2533 } else {
2534 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2535 false, false);
2536 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2537 false, 0x6);
2538 }
2539 } else {
2540 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2541 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2542 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2543 false, false);
2544 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2545 false, 0x6);
2546 } else {
2547 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2548 false, false);
2549 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2550 false, 0x6);
2551 }
2552 }
2553 }
2554
halbtc8192e2ant_action_sco_pan(IN struct btc_coexist * btcoexist)2555 void halbtc8192e2ant_action_sco_pan(IN struct btc_coexist *btcoexist)
2556 {
2557 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2558 u32 wifi_bw;
2559
2560 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2561 0);
2562
2563 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2564 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2565
2566 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2567
2568 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2569
2570 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2571
2572 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2573 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2574 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2575 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2576 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2577 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2578 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2579 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2580 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2581 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2582 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2583 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2584 }
2585
2586 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2587
2588 /* sw mechanism */
2589 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2590 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2591 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2592 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2593 false, false);
2594 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2595 false, 0x6);
2596 } else {
2597 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2598 false, false);
2599 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2600 false, 0x6);
2601 }
2602 } else {
2603 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2604 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2605 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2606 false, false);
2607 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2608 false, 0x6);
2609 } else {
2610 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2611 false, false);
2612 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2613 false, 0x6);
2614 }
2615 }
2616 }
2617
halbtc8192e2ant_action_hid(IN struct btc_coexist * btcoexist)2618 void halbtc8192e2ant_action_hid(IN struct btc_coexist *btcoexist)
2619 {
2620 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2621 u32 wifi_bw;
2622
2623 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2624 0);
2625 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2626
2627 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2628 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2629
2630 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2631
2632 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2633
2634 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2635
2636 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2637 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2638 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2639 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2640 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2641 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2642 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2643 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2644 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2645 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2646 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2647 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2648 }
2649
2650 /* sw mechanism */
2651 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2652 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2653 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2654 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2655 false, false);
2656 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2657 false, 0x18);
2658 } else {
2659 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2660 false, false);
2661 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2662 false, 0x18);
2663 }
2664 } else {
2665 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2666 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2667 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2668 false, false);
2669 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2670 false, 0x18);
2671 } else {
2672 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2673 false, false);
2674 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2675 false, 0x18);
2676 }
2677 }
2678 }
2679
2680 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
halbtc8192e2ant_action_a2dp(IN struct btc_coexist * btcoexist)2681 void halbtc8192e2ant_action_a2dp(IN struct btc_coexist *btcoexist)
2682 {
2683 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2684 u32 wifi_bw;
2685 boolean long_dist = false;
2686
2687 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2688 0);
2689 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2690
2691 if ((bt_rssi_state == BTC_RSSI_STATE_LOW ||
2692 bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2693 (wifi_rssi_state == BTC_RSSI_STATE_LOW ||
2694 wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2695 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2696 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2697 BTC_TRACE(trace_buf);
2698 long_dist = true;
2699 }
2700 if (long_dist) {
2701 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
2702 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2703 0x4);
2704 } else {
2705 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2706 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2707 0x8);
2708 }
2709
2710 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2711
2712 if (long_dist)
2713 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2714 else
2715 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2716
2717
2718 if (long_dist) {
2719 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2720 coex_dm->auto_tdma_adjust = false;
2721 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2722 } else {
2723 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2724 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2725 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2726 true, 1);
2727 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2728 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2729 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2730 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2731 false, 1);
2732 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2733 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2734 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2735 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2736 false, 1);
2737 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2738 }
2739 }
2740
2741 /* sw mechanism */
2742 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2743 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2744 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2745 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2746 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2747 false, false);
2748 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2749 false, 0x18);
2750 } else {
2751 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2752 false, false);
2753 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2754 false, 0x18);
2755 }
2756 } else {
2757 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2758 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2759 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2760 false, false);
2761 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2762 false, 0x18);
2763 } else {
2764 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2765 false, false);
2766 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2767 false, 0x18);
2768 }
2769 }
2770 }
2771
halbtc8192e2ant_action_a2dp_pan_hs(IN struct btc_coexist * btcoexist)2772 void halbtc8192e2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
2773 {
2774 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2775 u32 wifi_bw;
2776
2777 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2778 0);
2779 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2780
2781 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2782 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2783
2784 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2785 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2786
2787 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2788 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2789 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2790 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2791 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2792 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2793 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2794 2);
2795 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2796 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2797 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2798 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2799 2);
2800 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2801 }
2802
2803 /* sw mechanism */
2804 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2805 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2806 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2807 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2808 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2809 false, false);
2810 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2811 true, 0x6);
2812 } else {
2813 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2814 false, false);
2815 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2816 true, 0x6);
2817 }
2818 } else {
2819 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2820 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2821 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2822 false, false);
2823 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2824 true, 0x6);
2825 } else {
2826 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2827 false, false);
2828 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2829 true, 0x6);
2830 }
2831 }
2832 }
2833
halbtc8192e2ant_action_pan_edr(IN struct btc_coexist * btcoexist)2834 void halbtc8192e2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
2835 {
2836 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2837 u32 wifi_bw;
2838
2839 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2840 0);
2841 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2842
2843 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2844 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2845
2846 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2847
2848 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2849
2850 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2851 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2852 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2853 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2854 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2855 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2856 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2857 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2858 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2859 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2860 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2861 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2862 }
2863
2864 /* sw mechanism */
2865 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2866 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2867 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2868 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2869 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2870 false, false);
2871 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2872 false, 0x18);
2873 } else {
2874 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2875 false, false);
2876 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2877 false, 0x18);
2878 }
2879 } else {
2880 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2881 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2882 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2883 false, false);
2884 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2885 false, 0x18);
2886 } else {
2887 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2888 false, false);
2889 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2890 false, 0x18);
2891 }
2892 }
2893 }
2894
2895 /* PAN(HS) only */
halbtc8192e2ant_action_pan_hs(IN struct btc_coexist * btcoexist)2896 void halbtc8192e2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
2897 {
2898 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2899 u32 wifi_bw;
2900
2901 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2902 0);
2903 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2904
2905 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2906 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2907
2908 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2909
2910 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2911
2912 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2913 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW))
2914 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2915 else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2916 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM))
2917 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2918 else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2919 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2920 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2921 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2922
2923 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2924 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2925 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2926 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2927 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2928 false, false);
2929 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2930 false, 0x18);
2931 } else {
2932 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2933 false, false);
2934 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2935 false, 0x18);
2936 }
2937 } else {
2938 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2939 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2940 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2941 false, false);
2942 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2943 false, 0x18);
2944 } else {
2945 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2946 false, false);
2947 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2948 false, 0x18);
2949 }
2950 }
2951 }
2952
2953 /* PAN(EDR)+A2DP */
halbtc8192e2ant_action_pan_edr_a2dp(IN struct btc_coexist * btcoexist)2954 void halbtc8192e2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
2955 {
2956 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2957 u32 wifi_bw;
2958
2959 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2960 0);
2961 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2962
2963 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2964 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2965
2966 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2967
2968 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2969
2970 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2971
2972 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2973 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2974 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2975 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
2976 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2977 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2978 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2979 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2980 3);
2981 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2982 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2983 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2984 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2985 3);
2986 }
2987
2988 /* sw mechanism */
2989 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2990 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2991 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2992 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2993 false, false);
2994 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2995 false, 0x18);
2996 } else {
2997 halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2998 false, false);
2999 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3000 false, 0x18);
3001 }
3002 } else {
3003 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3004 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3005 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3006 false, false);
3007 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3008 false, 0x18);
3009 } else {
3010 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3011 false, false);
3012 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3013 false, 0x18);
3014 }
3015 }
3016 }
3017
halbtc8192e2ant_action_pan_edr_hid(IN struct btc_coexist * btcoexist)3018 void halbtc8192e2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
3019 {
3020 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3021 u32 wifi_bw;
3022
3023 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3024 0);
3025 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3026
3027 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3028
3029 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
3030 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3031
3032 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3033
3034 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3035
3036 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3037 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3038 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3039 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
3040 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3041 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3042 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3043 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3044 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3045 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3046 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3047 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3048 }
3049
3050 /* sw mechanism */
3051 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3052 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3053 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3054 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3055 false, false);
3056 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3057 false, 0x18);
3058 } else {
3059 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3060 false, false);
3061 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3062 false, 0x18);
3063 }
3064 } else {
3065 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3066 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3067 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3068 false, false);
3069 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3070 false, 0x18);
3071 } else {
3072 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3073 false, false);
3074 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3075 false, 0x18);
3076 }
3077 }
3078 }
3079
3080 /* HID+A2DP+PAN(EDR) */
halbtc8192e2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist * btcoexist)3081 void halbtc8192e2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
3082 {
3083 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3084 u32 wifi_bw;
3085
3086 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3087 0);
3088 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3089
3090 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
3091 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3092
3093 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3094
3095 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3096
3097 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3098
3099 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3100 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3101 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3102 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3103 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3104 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3105 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3106 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3107 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3108 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3109 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3110 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3111 }
3112
3113 /* sw mechanism */
3114 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3115 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3116 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3117 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3118 false, false);
3119 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3120 false, 0x18);
3121 } else {
3122 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3123 false, false);
3124 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3125 false, 0x18);
3126 }
3127 } else {
3128 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3129 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3130 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3131 false, false);
3132 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3133 false, 0x18);
3134 } else {
3135 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3136 false, false);
3137 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3138 false, 0x18);
3139 }
3140 }
3141 }
3142
halbtc8192e2ant_action_hid_a2dp(IN struct btc_coexist * btcoexist)3143 void halbtc8192e2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
3144 {
3145 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3146 u32 wifi_bw;
3147
3148 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3149 0);
3150 bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3151
3152 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
3153 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3154
3155 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3156
3157 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3158
3159 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3160 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3161 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3162 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3163 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3164 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3165 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3166 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3167 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3168 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3169 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3170 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3171 }
3172
3173 /* sw mechanism */
3174 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3175 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3176 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3177 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3178 false, false);
3179 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3180 false, 0x18);
3181 } else {
3182 halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3183 false, false);
3184 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3185 false, 0x18);
3186 }
3187 } else {
3188 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3189 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3190 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3191 false, false);
3192 halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3193 false, 0x18);
3194 } else {
3195 halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3196 false, false);
3197 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3198 false, 0x18);
3199 }
3200 }
3201 }
3202
halbtc8192e2ant_run_coexist_mechanism(IN struct btc_coexist * btcoexist)3203 void halbtc8192e2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
3204 {
3205 u8 algorithm = 0;
3206
3207 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3208 "[BTCoex], RunCoexistMechanism()===>\n");
3209 BTC_TRACE(trace_buf);
3210
3211 if (btcoexist->manual_control) {
3212 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3213 "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
3214 BTC_TRACE(trace_buf);
3215 return;
3216 }
3217
3218 if (coex_sta->under_ips) {
3219 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3220 "[BTCoex], wifi is under IPS !!!\n");
3221 BTC_TRACE(trace_buf);
3222 return;
3223 }
3224
3225 algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3226 if (coex_sta->c2h_bt_inquiry_page &&
3227 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3228 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3229 "[BTCoex], BT is under inquiry/page scan !!\n");
3230 BTC_TRACE(trace_buf);
3231 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3232 return;
3233 }
3234
3235 coex_dm->cur_algorithm = algorithm;
3236 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
3237 coex_dm->cur_algorithm);
3238 BTC_TRACE(trace_buf);
3239
3240 if (halbtc8192e2ant_is_common_action(btcoexist)) {
3241 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3242 "[BTCoex], Action 2-Ant common.\n");
3243 BTC_TRACE(trace_buf);
3244 coex_dm->auto_tdma_adjust = false;
3245 } else {
3246 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3247 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3248 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
3249 coex_dm->pre_algorithm, coex_dm->cur_algorithm);
3250 BTC_TRACE(trace_buf);
3251 coex_dm->auto_tdma_adjust = false;
3252 }
3253 switch (coex_dm->cur_algorithm) {
3254 case BT_8192E_2ANT_COEX_ALGO_SCO:
3255 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3256 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
3257 BTC_TRACE(trace_buf);
3258 halbtc8192e2ant_action_sco(btcoexist);
3259 break;
3260 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3261 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3262 "[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3263 BTC_TRACE(trace_buf);
3264 halbtc8192e2ant_action_sco_pan(btcoexist);
3265 break;
3266 case BT_8192E_2ANT_COEX_ALGO_HID:
3267 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3268 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
3269 BTC_TRACE(trace_buf);
3270 halbtc8192e2ant_action_hid(btcoexist);
3271 break;
3272 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3273 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3274 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
3275 BTC_TRACE(trace_buf);
3276 halbtc8192e2ant_action_a2dp(btcoexist);
3277 break;
3278 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3279 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3280 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3281 BTC_TRACE(trace_buf);
3282 halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3283 break;
3284 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3285 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3286 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
3287 BTC_TRACE(trace_buf);
3288 halbtc8192e2ant_action_pan_edr(btcoexist);
3289 break;
3290 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3291 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3292 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
3293 BTC_TRACE(trace_buf);
3294 halbtc8192e2ant_action_pan_hs(btcoexist);
3295 break;
3296 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3297 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3298 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
3299 BTC_TRACE(trace_buf);
3300 halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3301 break;
3302 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3303 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3304 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3305 BTC_TRACE(trace_buf);
3306 halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3307 break;
3308 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3309 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3310 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3311 BTC_TRACE(trace_buf);
3312 halbtc8192e2ant_action_hid_a2dp_pan_edr(
3313 btcoexist);
3314 break;
3315 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3316 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3317 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
3318 BTC_TRACE(trace_buf);
3319 halbtc8192e2ant_action_hid_a2dp(btcoexist);
3320 break;
3321 default:
3322 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3323 "[BTCoex], Action 2-Ant, algorithm = unknown!!\n");
3324 BTC_TRACE(trace_buf);
3325 break;
3326 }
3327 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3328 }
3329 }
3330
halbtc8192e2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean back_up)3331 void halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3332 IN boolean back_up)
3333 {
3334 u16 u16tmp = 0;
3335 u8 u8tmp = 0;
3336
3337 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3338 "[BTCoex], 2Ant Init HW Config!!\n");
3339 BTC_TRACE(trace_buf);
3340
3341 if (back_up) {
3342 /* backup rf 0x1e value */
3343 coex_dm->bt_rf_0x1e_backup =
3344 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e,
3345 0xfffff);
3346
3347 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3348 0x430);
3349 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3350 0x434);
3351 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
3352 btcoexist, 0x42a);
3353 coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
3354 btcoexist, 0x456);
3355 }
3356
3357 /* antenna sw ctrl to bt */
3358 halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, false);
3359
3360 halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3361
3362 /* antenna switch control parameter */
3363 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3364
3365 /* coex parameters */
3366 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3367 /* 0x790[5:0]=0x5 */
3368 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3369 u8tmp &= 0xc0;
3370 u8tmp |= 0x5;
3371 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3372
3373 /* enable counter statistics */
3374 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3375
3376 /* enable PTA */
3377 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3378 /* enable mailbox interface */
3379 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3380 u16tmp |= BIT(9);
3381 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3382
3383 /* enable PTA I2C mailbox */
3384 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3385 u8tmp |= BIT(4);
3386 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3387
3388 /* enable bt clock when wifi is disabled. */
3389 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3390 u8tmp |= BIT(0);
3391 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3392 /* enable bt clock when suspend. */
3393 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3394 u8tmp |= BIT(0);
3395 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3396 }
3397
3398 /* ************************************************************
3399 * work around function start with wa_halbtc8192e2ant_
3400 * ************************************************************
3401 * ************************************************************
3402 * extern function start with ex_halbtc8192e2ant_
3403 * ************************************************************ */
ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist * btcoexist)3404 void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist)
3405 {
3406 }
3407
ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist * btcoexist,IN boolean wifi_only)3408 void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3409 IN boolean wifi_only)
3410 {
3411 halbtc8192e2ant_init_hw_config(btcoexist, true);
3412 }
3413
ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist * btcoexist)3414 void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
3415 {
3416 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3417 "[BTCoex], Coex Mechanism Init!!\n");
3418 BTC_TRACE(trace_buf);
3419
3420 halbtc8192e2ant_init_coex_dm(btcoexist);
3421 }
3422
ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist * btcoexist)3423 void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist)
3424 {
3425 struct btc_board_info *board_info = &btcoexist->board_info;
3426 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3427 u8 *cli_buf = btcoexist->cli_buf;
3428 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3429 u16 u16tmp[4];
3430 u32 u32tmp[4];
3431 u32 fw_ver = 0, bt_patch_ver = 0;
3432
3433 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3434 "\r\n ============[BT Coexist info]============");
3435 CL_PRINTF(cli_buf);
3436
3437 if (btcoexist->manual_control) {
3438 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3439 "\r\n ============[Under Manual Control]============");
3440 CL_PRINTF(cli_buf);
3441 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3442 "\r\n ==========================================");
3443 CL_PRINTF(cli_buf);
3444 }
3445
3446 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3447 "Ant PG number/ Ant mechanism:",
3448 board_info->pg_ant_num, board_info->btdm_ant_num);
3449 CL_PRINTF(cli_buf);
3450
3451 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3452 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3453 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3454 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3455 "CoexVer/ FwVer/ PatchVer",
3456 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, fw_ver,
3457 bt_patch_ver, bt_patch_ver);
3458 CL_PRINTF(cli_buf);
3459
3460 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3461 "Wifi channel informed to BT",
3462 coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
3463 coex_dm->wifi_chnl_info[2]);
3464 CL_PRINTF(cli_buf);
3465
3466 /* wifi status */
3467 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3468 "============[Wifi Status]============");
3469 CL_PRINTF(cli_buf);
3470 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
3471
3472 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3473 "============[BT Status]============");
3474 CL_PRINTF(cli_buf);
3475
3476 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3477 "BT [status/ rssi/ retryCnt]",
3478 ((coex_sta->bt_disabled) ? ("disabled") : ((
3479 coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
3480 : ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3481 coex_dm->bt_status) ? "non-connected idle" :
3482 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
3483 ? "connected-idle" : "busy")))),
3484 coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3485 CL_PRINTF(cli_buf);
3486
3487 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3488 "SCO/HID/PAN/A2DP",
3489 stack_info->sco_exist, stack_info->hid_exist,
3490 stack_info->pan_exist, stack_info->a2dp_exist);
3491 CL_PRINTF(cli_buf);
3492 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3493
3494 bt_info_ext = coex_sta->bt_info_ext;
3495 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3496 "BT Info A2DP rate",
3497 (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate");
3498 CL_PRINTF(cli_buf);
3499
3500 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3501 if (coex_sta->bt_info_c2h_cnt[i]) {
3502 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3503 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
3504 glbt_info_src_8192e_2ant[i],
3505 coex_sta->bt_info_c2h[i][0],
3506 coex_sta->bt_info_c2h[i][1],
3507 coex_sta->bt_info_c2h[i][2],
3508 coex_sta->bt_info_c2h[i][3],
3509 coex_sta->bt_info_c2h[i][4],
3510 coex_sta->bt_info_c2h[i][5],
3511 coex_sta->bt_info_c2h[i][6],
3512 coex_sta->bt_info_c2h_cnt[i]);
3513 CL_PRINTF(cli_buf);
3514 }
3515 }
3516
3517 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3518 coex_dm->cur_ss_type);
3519 CL_PRINTF(cli_buf);
3520
3521 /* Sw mechanism */
3522 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3523 "============[Sw mechanism]============");
3524 CL_PRINTF(cli_buf);
3525 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3526 "SM1[ShRf/ LpRA/ LimDig]",
3527 coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
3528 coex_dm->limited_dig);
3529 CL_PRINTF(cli_buf);
3530 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3531 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3532 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3533 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3534 CL_PRINTF(cli_buf);
3535
3536 /* Fw mechanism */
3537 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3538 "============[Fw mechanism]============");
3539 CL_PRINTF(cli_buf);
3540
3541 ps_tdma_case = coex_dm->cur_ps_tdma;
3542 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3543 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3544 "PS TDMA",
3545 coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
3546 coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
3547 coex_dm->ps_tdma_para[4], ps_tdma_case,
3548 coex_dm->auto_tdma_adjust);
3549 CL_PRINTF(cli_buf);
3550
3551 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3552 "DecBtPwr/ IgnWlanAct",
3553 coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
3554 CL_PRINTF(cli_buf);
3555
3556 /* Hw setting */
3557 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3558 "============[Hw setting]============");
3559 CL_PRINTF(cli_buf);
3560
3561 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3562 "RF-A, 0x1e initVal",
3563 coex_dm->bt_rf_0x1e_backup);
3564 CL_PRINTF(cli_buf);
3565
3566 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3567 "backup ARFR1/ARFR2/RL/AMaxTime",
3568 coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2,
3569 coex_dm->backup_retry_limit,
3570 coex_dm->backup_ampdu_max_time);
3571 CL_PRINTF(cli_buf);
3572
3573 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3574 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3575 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3576 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3577 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3578 "0x430/0x434/0x42a/0x456",
3579 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3580 CL_PRINTF(cli_buf);
3581
3582 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3583 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3584 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3585 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3586 "0xc04/ 0xd04/ 0x90c",
3587 u32tmp[0], u32tmp[1], u32tmp[2]);
3588 CL_PRINTF(cli_buf);
3589
3590 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3591 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778",
3592 u8tmp[0]);
3593 CL_PRINTF(cli_buf);
3594
3595 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3596 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3597 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3598 "0x92c/ 0x930",
3599 (u8tmp[0]), u32tmp[0]);
3600 CL_PRINTF(cli_buf);
3601
3602 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3603 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3604 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3605 "0x40/ 0x4f",
3606 u8tmp[0], u8tmp[1]);
3607 CL_PRINTF(cli_buf);
3608
3609 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3610 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3611 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3612 "0x550(bcn ctrl)/0x522",
3613 u32tmp[0], u8tmp[0]);
3614 CL_PRINTF(cli_buf);
3615
3616 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3617 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
3618 u32tmp[0]);
3619 CL_PRINTF(cli_buf);
3620
3621 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3622 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3623 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3624 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3625 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3626 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3627 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3628 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3629 CL_PRINTF(cli_buf);
3630
3631 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3632 "0x770(hp rx[31:16]/tx[15:0])",
3633 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3634 CL_PRINTF(cli_buf);
3635 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3636 "0x774(lp rx[31:16]/tx[15:0])",
3637 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3638 CL_PRINTF(cli_buf);
3639 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3640 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3641 #endif
3642 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3643 }
3644
3645
ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist * btcoexist,IN u8 type)3646 void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
3647 {
3648 if (BTC_IPS_ENTER == type) {
3649 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3650 "[BTCoex], IPS ENTER notify\n");
3651 BTC_TRACE(trace_buf);
3652 coex_sta->under_ips = true;
3653 halbtc8192e2ant_coex_all_off(btcoexist);
3654 halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false,
3655 true);
3656 } else if (BTC_IPS_LEAVE == type) {
3657 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3658 "[BTCoex], IPS LEAVE notify\n");
3659 BTC_TRACE(trace_buf);
3660 coex_sta->under_ips = false;
3661 }
3662 }
3663
ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist * btcoexist,IN u8 type)3664 void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
3665 {
3666 if (BTC_LPS_ENABLE == type) {
3667 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3668 "[BTCoex], LPS ENABLE notify\n");
3669 BTC_TRACE(trace_buf);
3670 coex_sta->under_lps = true;
3671 } else if (BTC_LPS_DISABLE == type) {
3672 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3673 "[BTCoex], LPS DISABLE notify\n");
3674 BTC_TRACE(trace_buf);
3675 coex_sta->under_lps = false;
3676 }
3677 }
3678
ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist * btcoexist,IN u8 type)3679 void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
3680 IN u8 type)
3681 {
3682 if (BTC_SCAN_START == type) {
3683 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3684 "[BTCoex], SCAN START notify\n");
3685 BTC_TRACE(trace_buf);
3686 } else if (BTC_SCAN_FINISH == type) {
3687 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3688 "[BTCoex], SCAN FINISH notify\n");
3689 BTC_TRACE(trace_buf);
3690 }
3691 }
3692
ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist * btcoexist,IN u8 type)3693 void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
3694 IN u8 type)
3695 {
3696 if (BTC_ASSOCIATE_START == type) {
3697 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3698 "[BTCoex], CONNECT START notify\n");
3699 BTC_TRACE(trace_buf);
3700 } else if (BTC_ASSOCIATE_FINISH == type) {
3701 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3702 "[BTCoex], CONNECT FINISH notify\n");
3703 BTC_TRACE(trace_buf);
3704 }
3705 }
3706
ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist * btcoexist,IN u8 type)3707 void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
3708 IN u8 type)
3709 {
3710 u8 h2c_parameter[3] = {0};
3711 u32 wifi_bw;
3712 u8 wifi_central_chnl;
3713
3714 if (btcoexist->manual_control ||
3715 btcoexist->stop_coex_dm ||
3716 coex_sta->bt_disabled)
3717 return;
3718
3719 if (BTC_MEDIA_CONNECT == type) {
3720 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3721 "[BTCoex], MEDIA connect notify\n");
3722 BTC_TRACE(trace_buf);
3723 } else {
3724 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3725 "[BTCoex], MEDIA disconnect notify\n");
3726 BTC_TRACE(trace_buf);
3727 }
3728
3729 /* only 2.4G we need to inform bt the chnl mask */
3730 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3731 &wifi_central_chnl);
3732 if ((BTC_MEDIA_CONNECT == type) &&
3733 (wifi_central_chnl <= 14)) {
3734 h2c_parameter[0] = 0x1;
3735 h2c_parameter[1] = wifi_central_chnl;
3736 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3737 if (BTC_WIFI_BW_HT40 == wifi_bw)
3738 h2c_parameter[2] = 0x30;
3739 else
3740 h2c_parameter[2] = 0x20;
3741 }
3742
3743 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3744 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3745 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3746
3747 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3748 }
3749
ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist * btcoexist,IN u8 type)3750 void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
3751 IN u8 type)
3752 {
3753 if (type == BTC_PACKET_DHCP) {
3754 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3755 "[BTCoex], DHCP Packet notify\n");
3756 BTC_TRACE(trace_buf);
3757 }
3758 }
3759
ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist * btcoexist,IN u8 * tmp_buf,IN u8 length)3760 void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
3761 IN u8 *tmp_buf, IN u8 length)
3762 {
3763 u8 bt_info = 0;
3764 u8 i, rsp_source = 0;
3765 boolean bt_busy = false, limited_dig = false;
3766 boolean wifi_connected = false;
3767
3768 coex_sta->c2h_bt_info_req_sent = false;
3769
3770 rsp_source = tmp_buf[0] & 0xf;
3771 if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
3772 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
3773 coex_sta->bt_info_c2h_cnt[rsp_source]++;
3774
3775 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3776 "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
3777 length);
3778 BTC_TRACE(trace_buf);
3779 for (i = 0; i < length; i++) {
3780 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
3781 if (i == 1)
3782 bt_info = tmp_buf[i];
3783 if (i == length - 1) {
3784 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
3785 tmp_buf[i]);
3786 BTC_TRACE(trace_buf);
3787 } else {
3788 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
3789 tmp_buf[i]);
3790 BTC_TRACE(trace_buf);
3791 }
3792 }
3793
3794 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
3795 coex_sta->bt_retry_cnt = /* [3:0] */
3796 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
3797
3798 coex_sta->bt_rssi =
3799 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
3800
3801 coex_sta->bt_info_ext =
3802 coex_sta->bt_info_c2h[rsp_source][4];
3803
3804 /* Here we need to resend some wifi info to BT */
3805 /* because bt is reset and loss of the info. */
3806 if ((coex_sta->bt_info_ext & BIT(1))) {
3807 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3808 "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
3809 BTC_TRACE(trace_buf);
3810 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3811 &wifi_connected);
3812 if (wifi_connected)
3813 ex_halbtc8192e2ant_media_status_notify(
3814 btcoexist, BTC_MEDIA_CONNECT);
3815 else
3816 ex_halbtc8192e2ant_media_status_notify(
3817 btcoexist, BTC_MEDIA_DISCONNECT);
3818 }
3819
3820 if ((coex_sta->bt_info_ext & BIT(3))) {
3821 if (!btcoexist->manual_control &&
3822 !btcoexist->stop_coex_dm) {
3823 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3824 "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
3825 BTC_TRACE(trace_buf);
3826 halbtc8192e2ant_ignore_wlan_act(btcoexist,
3827 FORCE_EXEC, false);
3828 }
3829 } else {
3830 /* BT already NOT ignore Wlan active, do nothing here. */
3831 }
3832
3833 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3834 if ((coex_sta->bt_info_ext & BIT(4))) {
3835 /* BT auto report already enabled, do nothing */
3836 } else
3837 halbtc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC,
3838 true);
3839 #endif
3840 }
3841
3842 /* check BIT2 first ==> check if bt is under inquiry or page scan */
3843 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
3844 coex_sta->c2h_bt_inquiry_page = true;
3845 else
3846 coex_sta->c2h_bt_inquiry_page = false;
3847
3848 /* set link exist status */
3849 if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
3850 coex_sta->bt_link_exist = false;
3851 coex_sta->pan_exist = false;
3852 coex_sta->a2dp_exist = false;
3853 coex_sta->hid_exist = false;
3854 coex_sta->sco_exist = false;
3855 } else { /* connection exists */
3856 coex_sta->bt_link_exist = true;
3857 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
3858 coex_sta->pan_exist = true;
3859 else
3860 coex_sta->pan_exist = false;
3861 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
3862 coex_sta->a2dp_exist = true;
3863 else
3864 coex_sta->a2dp_exist = false;
3865 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
3866 coex_sta->hid_exist = true;
3867 else
3868 coex_sta->hid_exist = false;
3869 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
3870 coex_sta->sco_exist = true;
3871 else
3872 coex_sta->sco_exist = false;
3873 }
3874
3875 halbtc8192e2ant_update_bt_link_info(btcoexist);
3876
3877 if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
3878 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3879 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3880 "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
3881 BTC_TRACE(trace_buf);
3882 } else if (bt_info ==
3883 BT_INFO_8192E_2ANT_B_CONNECTION) { /* connection exists but no busy */
3884 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
3885 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3886 "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
3887 BTC_TRACE(trace_buf);
3888 } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
3889 (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
3890 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
3891 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3892 "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
3893 BTC_TRACE(trace_buf);
3894 } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) {
3895 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
3896 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3897 "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
3898 BTC_TRACE(trace_buf);
3899 } else {
3900 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
3901 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3902 "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
3903 BTC_TRACE(trace_buf);
3904 }
3905
3906 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
3907 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
3908 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
3909 bt_busy = true;
3910 limited_dig = true;
3911 } else {
3912 bt_busy = false;
3913 limited_dig = false;
3914 }
3915
3916 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3917
3918 coex_dm->limited_dig = limited_dig;
3919 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3920
3921 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3922 }
3923
ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist * btcoexist)3924 void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist)
3925 {
3926 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
3927 BTC_TRACE(trace_buf);
3928
3929 halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
3930 halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3931 ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
3932 }
3933
ex_halbtc8192e2ant_periodical(IN struct btc_coexist * btcoexist)3934 void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist)
3935 {
3936 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3937 halbtc8192e2ant_query_bt_info(btcoexist);
3938 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3939 halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
3940 #else
3941 if (halbtc8192e2ant_is_wifi_status_changed(btcoexist) ||
3942 coex_dm->auto_tdma_adjust)
3943 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3944 #endif
3945 }
3946
3947 #endif
3948
3949 #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
3950
3951