1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 #ifndef __RTL8188E_XMIT_H__ 21 #define __RTL8188E_XMIT_H__ 22 23 24 25 26 //For 88e early mode 27 #define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) 28 #define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) 29 #define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) 30 #define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) 31 #define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) 32 #define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) 33 #define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) 34 35 // 36 //defined for TX DESC Operation 37 // 38 39 #define MAX_TID (15) 40 41 //OFFSET 0 42 #define OFFSET_SZ 0 43 #define OFFSET_SHT 16 44 #define BMC BIT(24) 45 #define LSG BIT(26) 46 #define FSG BIT(27) 47 #define OWN BIT(31) 48 49 50 //OFFSET 4 51 #define PKT_OFFSET_SZ 0 52 #define QSEL_SHT 8 53 #define RATE_ID_SHT 16 54 #define NAVUSEHDR BIT(20) 55 #define SEC_TYPE_SHT 22 56 #define PKT_OFFSET_SHT 26 57 58 //OFFSET 8 59 #define AGG_EN BIT(12) 60 #define AGG_BK BIT(16) 61 #define AMPDU_DENSITY_SHT 20 62 #define ANTSEL_A BIT(24) 63 #define ANTSEL_B BIT(25) 64 #define TX_ANT_CCK_SHT 26 65 #define TX_ANTL_SHT 28 66 #define TX_ANT_HT_SHT 30 67 68 //OFFSET 12 69 #define SEQ_SHT 16 70 #define EN_HWSEQ BIT(31) 71 72 //OFFSET 16 73 #define QOS BIT(6) 74 #define HW_SSN BIT(7) 75 #define USERATE BIT(8) 76 #define DISDATAFB BIT(10) 77 #define CTS_2_SELF BIT(11) 78 #define RTS_EN BIT(12) 79 #define HW_RTS_EN BIT(13) 80 #define DATA_SHORT BIT(24) 81 #define PWR_STATUS_SHT 15 82 #define DATA_SC_SHT 20 83 #define DATA_BW BIT(25) 84 85 //OFFSET 20 86 #define RTY_LMT_EN BIT(17) 87 88 89 //OFFSET 20 90 #define SGI BIT(6) 91 #define USB_TXAGG_NUM_SHT 24 92 93 typedef struct txdesc_88e 94 { 95 //Offset 0 96 u32 pktlen:16; 97 u32 offset:8; 98 u32 bmc:1; 99 u32 htc:1; 100 u32 ls:1; 101 u32 fs:1; 102 u32 linip:1; 103 u32 noacm:1; 104 u32 gf:1; 105 u32 own:1; 106 107 //Offset 4 108 u32 macid:6; 109 u32 rsvd0406:2; 110 u32 qsel:5; 111 u32 rd_nav_ext:1; 112 u32 lsig_txop_en:1; 113 u32 pifs:1; 114 u32 rate_id:4; 115 u32 navusehdr:1; 116 u32 en_desc_id:1; 117 u32 sectype:2; 118 u32 rsvd0424:2; 119 u32 pkt_offset:5; // unit: 8 bytes 120 u32 rsvd0431:1; 121 122 //Offset 8 123 u32 rts_rc:6; 124 u32 data_rc:6; 125 u32 agg_en:1; 126 u32 rd_en:1; 127 u32 bar_rty_th:2; 128 u32 bk:1; 129 u32 morefrag:1; 130 u32 raw:1; 131 u32 ccx:1; 132 u32 ampdu_density:3; 133 u32 bt_null:1; 134 u32 ant_sel_a:1; 135 u32 ant_sel_b:1; 136 u32 tx_ant_cck:2; 137 u32 tx_antl:2; 138 u32 tx_ant_ht:2; 139 140 //Offset 12 141 u32 nextheadpage:8; 142 u32 tailpage:8; 143 u32 seq:12; 144 u32 cpu_handle:1; 145 u32 tag1:1; 146 u32 trigger_int:1; 147 u32 hwseq_en:1; 148 149 //Offset 16 150 u32 rtsrate:5; 151 u32 ap_dcfe:1; 152 u32 hwseq_sel:2; 153 u32 userate:1; 154 u32 disrtsfb:1; 155 u32 disdatafb:1; 156 u32 cts2self:1; 157 u32 rtsen:1; 158 u32 hw_rts_en:1; 159 u32 port_id:1; 160 u32 pwr_status:3; 161 u32 wait_dcts:1; 162 u32 cts2ap_en:1; 163 u32 data_sc:2; 164 u32 data_stbc:2; 165 u32 data_short:1; 166 u32 data_bw:1; 167 u32 rts_short:1; 168 u32 rts_bw:1; 169 u32 rts_sc:2; 170 u32 vcs_stbc:2; 171 172 //Offset 20 173 u32 datarate:6; 174 u32 sgi:1; 175 u32 try_rate:1; 176 u32 data_ratefb_lmt:5; 177 u32 rts_ratefb_lmt:4; 178 u32 rty_lmt_en:1; 179 u32 data_rt_lmt:6; 180 u32 usb_txagg_num:8; 181 182 //Offset 24 183 u32 txagg_a:5; 184 u32 txagg_b:5; 185 u32 use_max_len:1; 186 u32 max_agg_num:5; 187 u32 mcsg1_max_len:4; 188 u32 mcsg2_max_len:4; 189 u32 mcsg3_max_len:4; 190 u32 mcs7_sgi_max_len:4; 191 192 //Offset 28 193 u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) 194 u32 sw0:8; /* offset 30 */ 195 u32 sw1:4; 196 u32 mcs15_sgi_max_len:4; 197 }TXDESC_8188E, *PTXDESC_8188E; 198 199 #define txdesc_set_ccx_sw_88e(txdesc, value) \ 200 do { \ 201 ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ 202 ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ 203 } while (0) 204 205 struct txrpt_ccx_88e { 206 /* offset 0 */ 207 u8 tag1:1; 208 u8 pkt_num:3; 209 u8 txdma_underflow:1; 210 u8 int_bt:1; 211 u8 int_tri:1; 212 u8 int_ccx:1; 213 214 /* offset 1 */ 215 u8 mac_id:6; 216 u8 pkt_ok:1; 217 u8 bmc:1; 218 219 /* offset 2 */ 220 u8 retry_cnt:6; 221 u8 lifetime_over:1; 222 u8 retry_over:1; 223 224 /* offset 3 */ 225 u8 ccx_qtime0; 226 u8 ccx_qtime1; 227 228 /* offset 5 */ 229 u8 final_data_rate; 230 231 /* offset 6 */ 232 u8 sw1:4; 233 u8 qsel:4; 234 235 /* offset 7 */ 236 u8 sw0; 237 }; 238 239 #define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) 240 #define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) 241 242 #define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) 243 244 void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, 245 u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); 246 void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); 247 248 #if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) 249 s32 rtl8188es_init_xmit_priv(PADAPTER padapter); 250 void rtl8188es_free_xmit_priv(PADAPTER padapter); 251 s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 252 s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 253 s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 254 thread_return rtl8188es_xmit_thread(thread_context context); 255 s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); 256 257 #ifdef CONFIG_SDIO_TX_TASKLET 258 void rtl8188es_xmit_tasklet(void *priv); 259 #endif 260 #endif 261 262 #ifdef CONFIG_USB_HCI 263 s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); 264 void rtl8188eu_free_xmit_priv(PADAPTER padapter); 265 s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 266 s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 267 s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 268 s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); 269 void rtl8188eu_xmit_tasklet(void *priv); 270 s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 271 #endif 272 273 #ifdef CONFIG_PCI_HCI 274 s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); 275 void rtl8188ee_free_xmit_priv(PADAPTER padapter); 276 void rtl8188ee_xmitframe_resume(_adapter *padapter); 277 s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 278 s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 279 s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 280 void rtl8188ee_xmit_tasklet(void *priv); 281 #endif 282 283 284 285 #ifdef CONFIG_TX_EARLY_MODE 286 void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); 287 #endif 288 289 #ifdef CONFIG_XMIT_ACK 290 void dump_txrpt_ccx_88e(void *buf); 291 void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); 292 #else 293 #define dump_txrpt_ccx_88e(buf) do {} while(0) 294 #define handle_txrpt_ccx_88e(adapter, buf) do {} while(0) 295 #endif //CONFIG_XMIT_ACK 296 297 void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); 298 #endif //__RTL8188E_XMIT_H__ 299 300