1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20
21 //============================================================
22 // include files
23 //============================================================
24
25 #include "mp_precomp.h"
26 #include "phydm_precomp.h"
27
28 const u2Byte dB_Invert_Table[12][8] = {
29 { 1, 1, 1, 2, 2, 2, 2, 3},
30 { 3, 3, 4, 4, 4, 5, 6, 6},
31 { 7, 8, 9, 10, 11, 13, 14, 16},
32 { 18, 20, 22, 25, 28, 32, 35, 40},
33 { 45, 50, 56, 63, 71, 79, 89, 100},
34 { 112, 126, 141, 158, 178, 200, 224, 251},
35 { 282, 316, 355, 398, 447, 501, 562, 631},
36 { 708, 794, 891, 1000, 1122, 1259, 1413, 1585},
37 { 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981},
38 { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000},
39 { 11220, 12589, 14125, 15849, 17783, 19953, 22387, 25119},
40 { 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}
41 };
42
43
44 //============================================================
45 // Local Function predefine.
46 //============================================================
47
48 /* START------------COMMON INFO RELATED--------------- */
49
50 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
51 VOID
52 ODM_UpdateInitRateWorkItemCallback(
53 IN PVOID pContext
54 );
55 #endif
56
57 VOID
58 odm_GlobalAdapterCheck(
59 IN VOID
60 );
61
62 //move to odm_PowerTacking.h by YuChen
63
64
65
66 VOID
67 odm_UpdatePowerTrainingState(
68 IN PDM_ODM_T pDM_Odm
69 );
70
71 //============================================================
72 //3 Export Interface
73 //============================================================
74
75 /*Y = 10*log(X)*/
76 s4Byte
ODM_PWdB_Conversion(IN s4Byte X,IN u4Byte TotalBit,IN u4Byte DecimalBit)77 ODM_PWdB_Conversion(
78 IN s4Byte X,
79 IN u4Byte TotalBit,
80 IN u4Byte DecimalBit
81 )
82 {
83 s4Byte Y, integer = 0, decimal = 0;
84 u4Byte i;
85
86 if(X == 0)
87 X = 1; // log2(x), x can't be 0
88
89 for(i = (TotalBit-1); i > 0; i--)
90 {
91 if(X & BIT(i))
92 {
93 integer = i;
94 if(i > 0)
95 decimal = (X & BIT(i-1))?2:0; //decimal is 0.5dB*3=1.5dB~=2dB
96 break;
97 }
98 }
99
100 Y = 3*(integer-DecimalBit)+decimal; //10*log(x)=3*log2(x),
101
102 return Y;
103 }
104
105 s4Byte
ODM_SignConversion(IN s4Byte value,IN u4Byte TotalBit)106 ODM_SignConversion(
107 IN s4Byte value,
108 IN u4Byte TotalBit
109 )
110 {
111 if(value&BIT(TotalBit-1))
112 value -= BIT(TotalBit);
113 return value;
114 }
115
116 VOID
ODM_InitMpDriverStatus(IN PDM_ODM_T pDM_Odm)117 ODM_InitMpDriverStatus(
118 IN PDM_ODM_T pDM_Odm
119 )
120 {
121 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
122
123 // Decide when compile time
124 #if(MP_DRIVER == 1)
125 pDM_Odm->mp_mode = TRUE;
126 #else
127 pDM_Odm->mp_mode = FALSE;
128 #endif
129
130 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
131
132 PADAPTER Adapter = pDM_Odm->Adapter;
133
134 // Update information every period
135 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
136
137 #else
138
139 // MP mode is always false at AP side
140 pDM_Odm->mp_mode = FALSE;
141
142 #endif
143 }
144
145 VOID
ODM_UpdateMpDriverStatus(IN PDM_ODM_T pDM_Odm)146 ODM_UpdateMpDriverStatus(
147 IN PDM_ODM_T pDM_Odm
148 )
149 {
150 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
151
152 // Do nothing.
153
154 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
155 PADAPTER Adapter = pDM_Odm->Adapter;
156
157 // Update information erery period
158 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
159
160 #else
161
162 // Do nothing.
163
164 #endif
165 }
166
167 VOID
PHYDM_InitTRXAntennaSetting(IN PDM_ODM_T pDM_Odm)168 PHYDM_InitTRXAntennaSetting(
169 IN PDM_ODM_T pDM_Odm
170 )
171 {
172 #if ((RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1))
173
174 if (pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_RTL8822B)) {
175 u1Byte RxAnt = 0, TxAnt = 0;
176
177 RxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH, pDM_Odm), ODM_BIT(BB_RX_PATH, pDM_Odm));
178 TxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_TX_PATH, pDM_Odm), ODM_BIT(BB_TX_PATH, pDM_Odm));
179 pDM_Odm->TRXAntStatus = (RxAnt << 4) + TxAnt;
180 }
181 #endif
182 }
183
184 VOID
phydm_Init_cck_setting(IN PDM_ODM_T pDM_Odm)185 phydm_Init_cck_setting(
186 IN PDM_ODM_T pDM_Odm
187 )
188 {
189 u4Byte value_824,value_82c;
190
191 pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm));
192
193 #if (RTL8192E_SUPPORT == 1)
194 if(pDM_Odm->SupportICType & (ODM_RTL8192E))
195 {
196 /* 0x824[9] = 0x82C[9] = 0xA80[7] these regiaters settinh should be equal or CCK RSSI report may inaccurate */
197 value_824 = ODM_GetBBReg(pDM_Odm, 0x824, BIT9);
198 value_82c = ODM_GetBBReg(pDM_Odm, 0x82c, BIT9);
199
200 if(value_824 != value_82c)
201 {
202 ODM_SetBBReg(pDM_Odm, 0x82c , BIT9, value_824);
203 }
204 ODM_SetBBReg(pDM_Odm, 0xa80 , BIT7, value_824);
205 pDM_Odm->cck_agc_report_type = (BOOLEAN)value_824;
206 }
207 #endif
208
209 #if (RTL8703B_SUPPORT == 1)
210 if (pDM_Odm->SupportICType & (ODM_RTL8703B)) {
211
212 pDM_Odm->cck_agc_report_type = ODM_GetBBReg(pDM_Odm, 0x950, BIT11) ? 1 : 0; /*1: 4bit LNA , 0: 3bit LNA */
213
214 if (pDM_Odm->cck_agc_report_type != 1) {
215 DbgPrint("[Warning] 8703B CCK should be 4bit LNA, ie. 0x950[11] = 1\n");
216 /**/
217 }
218 }
219 #endif
220
221 }
222
223 VOID
odm_CommonInfoSelfInit(IN PDM_ODM_T pDM_Odm)224 odm_CommonInfoSelfInit(
225 IN PDM_ODM_T pDM_Odm
226 )
227 {
228 phydm_Init_cck_setting(pDM_Odm);
229 pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm));
230 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
231 pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp;
232 #endif
233
234 PHYDM_InitDebugSetting(pDM_Odm);
235 ODM_InitMpDriverStatus(pDM_Odm);
236 PHYDM_InitTRXAntennaSetting(pDM_Odm);
237
238 pDM_Odm->TxRate = 0xFF;
239
240 pDM_Odm->number_linked_client = 0;
241 pDM_Odm->pre_number_linked_client = 0;
242 pDM_Odm->number_active_client = 0;
243 pDM_Odm->pre_number_active_client = 0;
244
245 }
246
247 VOID
odm_CommonInfoSelfUpdate(IN PDM_ODM_T pDM_Odm)248 odm_CommonInfoSelfUpdate(
249 IN PDM_ODM_T pDM_Odm
250 )
251 {
252 u1Byte EntryCnt = 0, num_active_client = 0;
253 u4Byte i, OneEntry_MACID = 0, ma_rx_tp = 0;
254 PSTA_INFO_T pEntry;
255
256 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
257
258 PADAPTER Adapter = pDM_Odm->Adapter;
259 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
260
261 pEntry = pDM_Odm->pODM_StaInfo[0];
262 if(pMgntInfo->mAssoc)
263 {
264 pEntry->bUsed=TRUE;
265 for (i=0; i<6; i++)
266 pEntry->MacAddr[i] = pMgntInfo->Bssid[i];
267 }
268 else
269 {
270 pEntry->bUsed=FALSE;
271 for (i=0; i<6; i++)
272 pEntry->MacAddr[i] = 0;
273 }
274
275 //STA mode is linked to AP
276 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter))
277 pDM_Odm->bsta_state = TRUE;
278 else
279 pDM_Odm->bsta_state = FALSE;
280 #endif
281
282 /* THis variable cannot be used because it is wrong*/
283 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
284 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
285 {
286 if (*(pDM_Odm->pSecChOffset) == 1)
287 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
288 else if (*(pDM_Odm->pSecChOffset) == 2)
289 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
290 } else if (*(pDM_Odm->pBandWidth) == ODM_BW80M) {
291 if (*(pDM_Odm->pSecChOffset) == 1)
292 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 6;
293 else if (*(pDM_Odm->pSecChOffset) == 2)
294 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 6;
295 } else
296 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
297 #else
298 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) {
299 if (*(pDM_Odm->pSecChOffset) == 1)
300 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
301 else if (*(pDM_Odm->pSecChOffset) == 2)
302 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
303 } else
304 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
305 #endif
306
307 for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
308 {
309 pEntry = pDM_Odm->pODM_StaInfo[i];
310 if(IS_STA_VALID(pEntry))
311 {
312 EntryCnt++;
313 if(EntryCnt==1)
314 {
315 OneEntry_MACID=i;
316 }
317
318 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
319 ma_rx_tp = (pEntry->rx_byte_cnt_LowMAW)<<3; /* low moving average RX TP ( bit /sec)*/
320
321 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("ClientTP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp));
322
323 if (ma_rx_tp > ACTIVE_TP_THRESHOLD)
324 num_active_client++;
325 #endif
326 }
327 }
328
329 if(EntryCnt == 1)
330 {
331 pDM_Odm->bOneEntryOnly = TRUE;
332 pDM_Odm->OneEntry_MACID=OneEntry_MACID;
333 }
334 else
335 pDM_Odm->bOneEntryOnly = FALSE;
336
337 pDM_Odm->pre_number_linked_client = pDM_Odm->number_linked_client;
338 pDM_Odm->pre_number_active_client = pDM_Odm->number_active_client;
339
340 pDM_Odm->number_linked_client = EntryCnt;
341 pDM_Odm->number_active_client = num_active_client;
342
343 /* Update MP driver status*/
344 ODM_UpdateMpDriverStatus(pDM_Odm);
345 }
346
347 VOID
odm_CommonInfoSelfReset(IN PDM_ODM_T pDM_Odm)348 odm_CommonInfoSelfReset(
349 IN PDM_ODM_T pDM_Odm
350 )
351 {
352 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
353 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0;
354 #endif
355 }
356
357 PVOID
PhyDM_Get_Structure(IN PDM_ODM_T pDM_Odm,IN u1Byte Structure_Type)358 PhyDM_Get_Structure(
359 IN PDM_ODM_T pDM_Odm,
360 IN u1Byte Structure_Type
361 )
362
363 {
364 PVOID pStruct = NULL;
365 #if RTL8195A_SUPPORT
366 switch (Structure_Type){
367 case PHYDM_FALSEALMCNT:
368 pStruct = &FalseAlmCnt;
369 break;
370
371 case PHYDM_CFOTRACK:
372 pStruct = &DM_CfoTrack;
373 break;
374
375 case PHYDM_ADAPTIVITY:
376 pStruct = &(pDM_Odm->Adaptivity);
377 break;
378
379 default:
380 break;
381 }
382
383 #else
384 switch (Structure_Type){
385 case PHYDM_FALSEALMCNT:
386 pStruct = &(pDM_Odm->FalseAlmCnt);
387 break;
388
389 case PHYDM_CFOTRACK:
390 pStruct = &(pDM_Odm->DM_CfoTrack);
391 break;
392
393 case PHYDM_ADAPTIVITY:
394 pStruct = &(pDM_Odm->Adaptivity);
395 break;
396
397 default:
398 break;
399 }
400
401 #endif
402 return pStruct;
403 }
404
405 VOID
odm_HWSetting(IN PDM_ODM_T pDM_Odm)406 odm_HWSetting(
407 IN PDM_ODM_T pDM_Odm
408 )
409 {
410 #if (RTL8821A_SUPPORT == 1)
411 if(pDM_Odm->SupportICType & ODM_RTL8821)
412 odm_HWSetting_8821A(pDM_Odm);
413 #endif
414
415 }
416
417 //
418 // 2011/09/21 MH Add to describe different team necessary resource allocate??
419 //
420 VOID
ODM_DMInit(IN PDM_ODM_T pDM_Odm)421 ODM_DMInit(
422 IN PDM_ODM_T pDM_Odm
423 )
424 {
425 odm_CommonInfoSelfInit(pDM_Odm);
426 odm_DIGInit(pDM_Odm);
427 Phydm_NHMCounterStatisticsInit(pDM_Odm);
428 Phydm_AdaptivityInit(pDM_Odm);
429 phydm_ra_info_init(pDM_Odm);
430 odm_RateAdaptiveMaskInit(pDM_Odm);
431 odm_RA_ParaAdjust_init(pDM_Odm);
432 ODM_CfoTrackingInit(pDM_Odm);
433 ODM_EdcaTurboInit(pDM_Odm);
434 odm_RSSIMonitorInit(pDM_Odm);
435 phydm_rf_init(pDM_Odm);
436 odm_AntennaDiversityInit(pDM_Odm);
437 odm_AutoChannelSelectInit(pDM_Odm);
438 odm_PathDiversityInit(pDM_Odm);
439 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
440 phydm_Beamforming_Init(pDM_Odm);
441 #endif
442
443 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
444 {
445 odm_DynamicBBPowerSavingInit(pDM_Odm);
446 odm_DynamicTxPowerInit(pDM_Odm);
447
448 #if (RTL8188E_SUPPORT == 1)
449 if(pDM_Odm->SupportICType==ODM_RTL8188E)
450 {
451 odm_PrimaryCCA_Init(pDM_Odm);
452 ODM_RAInfo_Init_all(pDM_Odm);
453 }
454 #endif
455
456 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
457
458 #if (RTL8723B_SUPPORT == 1)
459 if(pDM_Odm->SupportICType == ODM_RTL8723B)
460 odm_SwAntDetectInit(pDM_Odm);
461 #endif
462
463 #if (RTL8192E_SUPPORT == 1)
464 if(pDM_Odm->SupportICType==ODM_RTL8192E)
465 odm_PrimaryCCA_Check_Init(pDM_Odm);
466 #endif
467
468 #endif
469
470 }
471
472 }
473
474 VOID
ODM_DMReset(IN PDM_ODM_T pDM_Odm)475 ODM_DMReset(
476 IN PDM_ODM_T pDM_Odm
477 )
478 {
479 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
480
481 ODM_AntDivReset(pDM_Odm);
482 phydm_setEDCCAThresholdAPI(pDM_Odm, pDM_DigTable->CurIGValue);
483 ODM_DMWatchdog(pDM_Odm);
484 }
485
486
487 VOID
phydm_support_ablity_debug(IN PVOID pDM_VOID,IN u4Byte * const dm_value,IN u4Byte * _used,OUT char * output,IN u4Byte * _out_len)488 phydm_support_ablity_debug(
489 IN PVOID pDM_VOID,
490 IN u4Byte *const dm_value,
491 IN u4Byte *_used,
492 OUT char *output,
493 IN u4Byte *_out_len
494 )
495 {
496 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
497 u4Byte pre_support_ability;
498 u4Byte used = *_used;
499 u4Byte out_len = *_out_len;
500
501 pre_support_ability = pDM_Odm->SupportAbility ;
502 PHYDM_SNPRINTF((output+used, out_len-used,"\n%s\n", "================================"));
503 if(dm_value[0] == 100)
504 {
505 PHYDM_SNPRINTF((output+used, out_len-used, "[Supportablity] PhyDM Selection\n"));
506 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
507 PHYDM_SNPRINTF((output+used, out_len-used, "00. (( %s ))DIG \n", ((pDM_Odm->SupportAbility & ODM_BB_DIG)?("V"):(".")) ));
508 PHYDM_SNPRINTF((output+used, out_len-used, "01. (( %s ))RA_MASK \n", ((pDM_Odm->SupportAbility & ODM_BB_RA_MASK)?("V"):(".")) ));
509 PHYDM_SNPRINTF((output+used, out_len-used, "02. (( %s ))DYNAMIC_TXPWR \n", ((pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)?("V"):(".")) ));
510 PHYDM_SNPRINTF((output+used, out_len-used, "03. (( %s ))FA_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_FA_CNT)?("V"):(".")) ));
511 PHYDM_SNPRINTF((output+used, out_len-used, "04. (( %s ))RSSI_MONITOR \n", ((pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)?("V"):(".")) ));
512 PHYDM_SNPRINTF((output+used, out_len-used, "05. (( %s ))CCK_PD \n", ((pDM_Odm->SupportAbility & ODM_BB_CCK_PD)?("V"):(".")) ));
513 PHYDM_SNPRINTF((output+used, out_len-used, "06. (( %s ))ANT_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)?("V"):(".")) ));
514 PHYDM_SNPRINTF((output+used, out_len-used, "07. (( %s ))PWR_SAVE \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)?("V"):(".")) ));
515 PHYDM_SNPRINTF((output+used, out_len-used, "08. (( %s ))PWR_TRAIN \n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)?("V"):(".")) ));
516 PHYDM_SNPRINTF((output+used, out_len-used, "09. (( %s ))RATE_ADAPTIVE \n", ((pDM_Odm->SupportAbility & ODM_BB_RATE_ADAPTIVE)?("V"):(".")) ));
517 PHYDM_SNPRINTF((output+used, out_len-used, "10. (( %s ))PATH_DIV \n", ((pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)?("V"):("."))));
518 PHYDM_SNPRINTF((output+used, out_len-used, "11. (( %s ))PSD \n", ((pDM_Odm->SupportAbility & ODM_BB_PSD)?("V"):(".")) ));
519 PHYDM_SNPRINTF((output+used, out_len-used, "12. (( %s ))RXHP \n", ((pDM_Odm->SupportAbility & ODM_BB_RXHP)?("V"):(".")) ));
520 PHYDM_SNPRINTF((output+used, out_len-used, "13. (( %s ))ADAPTIVITY \n", ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)?("V"):(".")) ));
521 PHYDM_SNPRINTF((output+used, out_len-used, "14. (( %s ))CFO_TRACKING \n", ((pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)?("V"):(".")) ));
522 PHYDM_SNPRINTF((output+used, out_len-used, "15. (( %s ))NHM_CNT \n", ((pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)?("V"):(".")) ));
523 PHYDM_SNPRINTF((output+used, out_len-used, "16. (( %s ))PRIMARY_CCA \n", ((pDM_Odm->SupportAbility & ODM_BB_PRIMARY_CCA)?("V"):(".")) ));
524 PHYDM_SNPRINTF((output+used, out_len-used, "20. (( %s ))EDCA_TURBO \n", ((pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)?("V"):(".")) ));
525 PHYDM_SNPRINTF((output+used, out_len-used, "21. (( %s ))EARLY_MODE \n", ((pDM_Odm->SupportAbility & ODM_MAC_EARLY_MODE)?("V"):(".")) ));
526 PHYDM_SNPRINTF((output+used, out_len-used, "24. (( %s ))TX_PWR_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)?("V"):(".")) ));
527 PHYDM_SNPRINTF((output+used, out_len-used, "25. (( %s ))RX_GAIN_TRACK \n", ((pDM_Odm->SupportAbility & ODM_RF_RX_GAIN_TRACK)?("V"):(".")) ));
528 PHYDM_SNPRINTF((output+used, out_len-used, "26. (( %s ))RF_CALIBRATION \n", ((pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)?("V"):(".")) ));
529 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
530 }
531 /*
532 else if(dm_value[0] == 101)
533 {
534 pDM_Odm->SupportAbility = 0 ;
535 DbgPrint("Disable all SupportAbility components \n");
536 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "Disable all SupportAbility components"));
537 }
538 */
539 else
540 {
541
542 if(dm_value[1] == 1) //enable
543 {
544 pDM_Odm->SupportAbility |= BIT(dm_value[0]) ;
545 if(BIT(dm_value[0]) & ODM_BB_PATH_DIV)
546 {
547 odm_PathDiversityInit(pDM_Odm);
548 }
549 }
550 else if(dm_value[1] == 2) //disable
551 {
552 pDM_Odm->SupportAbility &= ~(BIT(dm_value[0])) ;
553 }
554 else
555 {
556 //DbgPrint("\n[Warning!!!] 1:enable, 2:disable \n\n");
557 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "[Warning!!!] 1:enable, 2:disable"));
558 }
559 }
560 PHYDM_SNPRINTF((output+used, out_len-used,"pre-SupportAbility = 0x%x\n", pre_support_ability ));
561 PHYDM_SNPRINTF((output+used, out_len-used,"Curr-SupportAbility = 0x%x\n", pDM_Odm->SupportAbility ));
562 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
563 }
564
565 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
566 //
567 //tmp modify for LC Only
568 //
569 VOID
ODM_DMWatchdog_LPS(IN PDM_ODM_T pDM_Odm)570 ODM_DMWatchdog_LPS(
571 IN PDM_ODM_T pDM_Odm
572 )
573 {
574 odm_CommonInfoSelfUpdate(pDM_Odm);
575 odm_FalseAlarmCounterStatistics(pDM_Odm);
576 odm_RSSIMonitorCheck(pDM_Odm);
577 odm_DIGbyRSSI_LPS(pDM_Odm);
578 odm_CCKPacketDetectionThresh(pDM_Odm);
579 odm_CommonInfoSelfReset(pDM_Odm);
580
581 if(*(pDM_Odm->pbPowerSaving)==TRUE)
582 return;
583 }
584 #endif
585 //
586 // 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
587 // You can not add any dummy function here, be care, you can only use DM structure
588 // to perform any new ODM_DM.
589 //
590 VOID
ODM_DMWatchdog(IN PDM_ODM_T pDM_Odm)591 ODM_DMWatchdog(
592 IN PDM_ODM_T pDM_Odm
593 )
594 {
595 ODM_AsocEntry_Init(pDM_Odm);
596 odm_CommonInfoSelfUpdate(pDM_Odm);
597 phydm_BasicDbgMessage(pDM_Odm);
598 odm_HWSetting(pDM_Odm);
599
600 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
601 {
602 prtl8192cd_priv priv = pDM_Odm->priv;
603 if( (priv->auto_channel != 0) && (priv->auto_channel != 2) )//if ACS running, do not do FA/CCA counter read
604 return;
605 }
606 #endif
607 odm_FalseAlarmCounterStatistics(pDM_Odm);
608 phydm_NoisyDetection(pDM_Odm);
609
610 odm_RSSIMonitorCheck(pDM_Odm);
611
612 phydm_receiver_blocking(pDM_Odm);
613
614 if(*(pDM_Odm->pbPowerSaving) == TRUE)
615 {
616 odm_DIGbyRSSI_LPS(pDM_Odm);
617 {
618 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
619 Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
620 }
621 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n"));
622 return;
623 }
624
625 Phydm_CheckAdaptivity(pDM_Odm);
626 odm_UpdatePowerTrainingState(pDM_Odm);
627 odm_DIG(pDM_Odm);
628 {
629 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
630 Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
631 }
632 odm_CCKPacketDetectionThresh(pDM_Odm);
633 phydm_ra_dynamic_retry_limit(pDM_Odm);
634 odm_RefreshRateAdaptiveMask(pDM_Odm);
635 odm_RefreshBasicRateMask(pDM_Odm);
636 odm_DynamicBBPowerSaving(pDM_Odm);
637 odm_EdcaTurboCheck(pDM_Odm);
638 odm_PathDiversity(pDM_Odm);
639 ODM_CfoTracking(pDM_Odm);
640 odm_DynamicTxPower(pDM_Odm);
641 odm_AntennaDiversity(pDM_Odm);
642 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
643 phydm_Beamforming_Watchdog(pDM_Odm);
644 #endif
645
646 phydm_rf_watchdog(pDM_Odm);
647
648 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
649 {
650
651 #if (RTL8188E_SUPPORT == 1)
652 if(pDM_Odm->SupportICType==ODM_RTL8188E)
653 odm_DynamicPrimaryCCA(pDM_Odm);
654 #endif
655
656 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
657
658 #if (RTL8192E_SUPPORT == 1)
659 if(pDM_Odm->SupportICType==ODM_RTL8192E)
660 odm_DynamicPrimaryCCA_Check(pDM_Odm);
661 #endif
662 #endif
663 }
664
665 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
666 odm_dtc(pDM_Odm);
667 #endif
668
669 odm_CommonInfoSelfReset(pDM_Odm);
670
671 }
672
673
674 //
675 // Init /.. Fixed HW value. Only init time.
676 //
677 VOID
ODM_CmnInfoInit(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN u4Byte Value)678 ODM_CmnInfoInit(
679 IN PDM_ODM_T pDM_Odm,
680 IN ODM_CMNINFO_E CmnInfo,
681 IN u4Byte Value
682 )
683 {
684 //
685 // This section is used for init value
686 //
687 switch (CmnInfo)
688 {
689 //
690 // Fixed ODM value.
691 //
692 case ODM_CMNINFO_ABILITY:
693 pDM_Odm->SupportAbility = (u4Byte)Value;
694 break;
695
696 case ODM_CMNINFO_RF_TYPE:
697 pDM_Odm->RFType = (u1Byte)Value;
698 break;
699
700 case ODM_CMNINFO_PLATFORM:
701 pDM_Odm->SupportPlatform = (u1Byte)Value;
702 break;
703
704 case ODM_CMNINFO_INTERFACE:
705 pDM_Odm->SupportInterface = (u1Byte)Value;
706 break;
707
708 case ODM_CMNINFO_MP_TEST_CHIP:
709 pDM_Odm->bIsMPChip= (u1Byte)Value;
710 break;
711
712 case ODM_CMNINFO_IC_TYPE:
713 pDM_Odm->SupportICType = Value;
714 break;
715
716 case ODM_CMNINFO_CUT_VER:
717 pDM_Odm->CutVersion = (u1Byte)Value;
718 break;
719
720 case ODM_CMNINFO_FAB_VER:
721 pDM_Odm->FabVersion = (u1Byte)Value;
722 break;
723
724 case ODM_CMNINFO_RFE_TYPE:
725 pDM_Odm->RFEType = (u1Byte)Value;
726 break;
727
728 case ODM_CMNINFO_RF_ANTENNA_TYPE:
729 pDM_Odm->AntDivType= (u1Byte)Value;
730 break;
731
732 case ODM_CMNINFO_BOARD_TYPE:
733 pDM_Odm->BoardType = (u1Byte)Value;
734 break;
735
736 case ODM_CMNINFO_PACKAGE_TYPE:
737 pDM_Odm->PackageType = (u1Byte)Value;
738 break;
739
740 case ODM_CMNINFO_EXT_LNA:
741 pDM_Odm->ExtLNA = (u1Byte)Value;
742 break;
743
744 case ODM_CMNINFO_5G_EXT_LNA:
745 pDM_Odm->ExtLNA5G = (u1Byte)Value;
746 break;
747
748 case ODM_CMNINFO_EXT_PA:
749 pDM_Odm->ExtPA = (u1Byte)Value;
750 break;
751
752 case ODM_CMNINFO_5G_EXT_PA:
753 pDM_Odm->ExtPA5G = (u1Byte)Value;
754 break;
755
756 case ODM_CMNINFO_GPA:
757 pDM_Odm->TypeGPA= (ODM_TYPE_GPA_E)Value;
758 break;
759 case ODM_CMNINFO_APA:
760 pDM_Odm->TypeAPA= (ODM_TYPE_APA_E)Value;
761 break;
762 case ODM_CMNINFO_GLNA:
763 pDM_Odm->TypeGLNA= (ODM_TYPE_GLNA_E)Value;
764 break;
765 case ODM_CMNINFO_ALNA:
766 pDM_Odm->TypeALNA= (ODM_TYPE_ALNA_E)Value;
767 break;
768
769 case ODM_CMNINFO_EXT_TRSW:
770 pDM_Odm->ExtTRSW = (u1Byte)Value;
771 break;
772 case ODM_CMNINFO_EXT_LNA_GAIN:
773 pDM_Odm->ExtLNAGain = (u1Byte)Value;
774 break;
775 case ODM_CMNINFO_PATCH_ID:
776 pDM_Odm->PatchID = (u1Byte)Value;
777 break;
778 case ODM_CMNINFO_BINHCT_TEST:
779 pDM_Odm->bInHctTest = (BOOLEAN)Value;
780 break;
781 case ODM_CMNINFO_BWIFI_TEST:
782 pDM_Odm->bWIFITest = (BOOLEAN)Value;
783 break;
784 case ODM_CMNINFO_SMART_CONCURRENT:
785 pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value;
786 break;
787 case ODM_CMNINFO_DOMAIN_CODE_2G:
788 pDM_Odm->odm_Regulation2_4G = (u1Byte)Value;
789 break;
790 case ODM_CMNINFO_DOMAIN_CODE_5G:
791 pDM_Odm->odm_Regulation5G = (u1Byte)Value;
792 break;
793 case ODM_CMNINFO_CONFIG_BB_RF:
794 pDM_Odm->ConfigBBRF = (BOOLEAN)Value;
795 break;
796 case ODM_CMNINFO_IQKFWOFFLOAD:
797 pDM_Odm->IQKFWOffload = (u1Byte)Value;
798 break;
799 //To remove the compiler warning, must add an empty default statement to handle the other values.
800 default:
801 //do nothing
802 break;
803
804 }
805
806 }
807
808
809 VOID
ODM_CmnInfoHook(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN PVOID pValue)810 ODM_CmnInfoHook(
811 IN PDM_ODM_T pDM_Odm,
812 IN ODM_CMNINFO_E CmnInfo,
813 IN PVOID pValue
814 )
815 {
816 //
817 // Hook call by reference pointer.
818 //
819 switch (CmnInfo)
820 {
821 //
822 // Dynamic call by reference pointer.
823 //
824 case ODM_CMNINFO_MAC_PHY_MODE:
825 pDM_Odm->pMacPhyMode = (u1Byte *)pValue;
826 break;
827
828 case ODM_CMNINFO_TX_UNI:
829 pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
830 break;
831
832 case ODM_CMNINFO_RX_UNI:
833 pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
834 break;
835
836 case ODM_CMNINFO_WM_MODE:
837 pDM_Odm->pWirelessMode = (u1Byte *)pValue;
838 break;
839
840 case ODM_CMNINFO_BAND:
841 pDM_Odm->pBandType = (u1Byte *)pValue;
842 break;
843
844 case ODM_CMNINFO_SEC_CHNL_OFFSET:
845 pDM_Odm->pSecChOffset = (u1Byte *)pValue;
846 break;
847
848 case ODM_CMNINFO_SEC_MODE:
849 pDM_Odm->pSecurity = (u1Byte *)pValue;
850 break;
851
852 case ODM_CMNINFO_BW:
853 pDM_Odm->pBandWidth = (u1Byte *)pValue;
854 break;
855
856 case ODM_CMNINFO_CHNL:
857 pDM_Odm->pChannel = (u1Byte *)pValue;
858 break;
859
860 case ODM_CMNINFO_DMSP_GET_VALUE:
861 pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue;
862 break;
863
864 case ODM_CMNINFO_BUDDY_ADAPTOR:
865 pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue;
866 break;
867
868 case ODM_CMNINFO_DMSP_IS_MASTER:
869 pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue;
870 break;
871
872 case ODM_CMNINFO_SCAN:
873 pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue;
874 break;
875
876 case ODM_CMNINFO_POWER_SAVING:
877 pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue;
878 break;
879
880 case ODM_CMNINFO_ONE_PATH_CCA:
881 pDM_Odm->pOnePathCCA = (u1Byte *)pValue;
882 break;
883
884 case ODM_CMNINFO_DRV_STOP:
885 pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue;
886 break;
887
888 case ODM_CMNINFO_PNP_IN:
889 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue;
890 break;
891
892 case ODM_CMNINFO_INIT_ON:
893 pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue;
894 break;
895
896 case ODM_CMNINFO_ANT_TEST:
897 pDM_Odm->pAntennaTest = (u1Byte *)pValue;
898 break;
899
900 case ODM_CMNINFO_NET_CLOSED:
901 pDM_Odm->pbNet_closed = (BOOLEAN *)pValue;
902 break;
903
904 case ODM_CMNINFO_FORCED_RATE:
905 pDM_Odm->pForcedDataRate = (pu2Byte)pValue;
906 break;
907
908 case ODM_CMNINFO_FORCED_IGI_LB:
909 pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue;
910 break;
911
912 case ODM_CMNINFO_P2P_LINK:
913 pDM_Odm->DM_DigTable.bP2PInProcess = (u1Byte *)pValue;
914 break;
915
916 case ODM_CMNINFO_IS1ANTENNA:
917 pDM_Odm->pIs1Antenna = (BOOLEAN *)pValue;
918 break;
919
920 case ODM_CMNINFO_RFDEFAULTPATH:
921 pDM_Odm->pRFDefaultPath= (u1Byte *)pValue;
922 break;
923
924 case ODM_CMNINFO_FCS_MODE:
925 pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue;
926 break;
927
928 //case ODM_CMNINFO_RTSTA_AID:
929 // pDM_Odm->pAidMap = (u1Byte *)pValue;
930 // break;
931
932 //case ODM_CMNINFO_BT_COEXIST:
933 // pDM_Odm->BTCoexist = (BOOLEAN *)pValue;
934
935 //case ODM_CMNINFO_STA_STATUS:
936 //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue;
937 //break;
938
939 //case ODM_CMNINFO_PHY_STATUS:
940 // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue;
941 // break;
942
943 //case ODM_CMNINFO_MAC_STATUS:
944 // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue;
945 // break;
946 //To remove the compiler warning, must add an empty default statement to handle the other values.
947 default:
948 //do nothing
949 break;
950
951 }
952
953 }
954
955
956 VOID
ODM_CmnInfoPtrArrayHook(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN u2Byte Index,IN PVOID pValue)957 ODM_CmnInfoPtrArrayHook(
958 IN PDM_ODM_T pDM_Odm,
959 IN ODM_CMNINFO_E CmnInfo,
960 IN u2Byte Index,
961 IN PVOID pValue
962 )
963 {
964 //
965 // Hook call by reference pointer.
966 //
967 switch (CmnInfo)
968 {
969 //
970 // Dynamic call by reference pointer.
971 //
972 case ODM_CMNINFO_STA_STATUS:
973 pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue;
974
975 if (IS_STA_VALID(pDM_Odm->pODM_StaInfo[Index]))
976 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
977 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->AssociatedMacId] = Index; /*AssociatedMacId are unique bttween different Adapter*/
978 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
979 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->aid] = Index;
980 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
981 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->mac_id] = Index;
982 #endif
983
984 break;
985 //To remove the compiler warning, must add an empty default statement to handle the other values.
986 default:
987 //do nothing
988 break;
989 }
990
991 }
992
993
994 //
995 // Update Band/CHannel/.. The values are dynamic but non-per-packet.
996 //
997 VOID
ODM_CmnInfoUpdate(IN PDM_ODM_T pDM_Odm,IN u4Byte CmnInfo,IN u8Byte Value)998 ODM_CmnInfoUpdate(
999 IN PDM_ODM_T pDM_Odm,
1000 IN u4Byte CmnInfo,
1001 IN u8Byte Value
1002 )
1003 {
1004 //
1005 // This init variable may be changed in run time.
1006 //
1007 switch (CmnInfo)
1008 {
1009 case ODM_CMNINFO_LINK_IN_PROGRESS:
1010 pDM_Odm->bLinkInProcess = (BOOLEAN)Value;
1011 break;
1012
1013 case ODM_CMNINFO_ABILITY:
1014 pDM_Odm->SupportAbility = (u4Byte)Value;
1015 break;
1016
1017 case ODM_CMNINFO_RF_TYPE:
1018 pDM_Odm->RFType = (u1Byte)Value;
1019 break;
1020
1021 case ODM_CMNINFO_WIFI_DIRECT:
1022 pDM_Odm->bWIFI_Direct = (BOOLEAN)Value;
1023 break;
1024
1025 case ODM_CMNINFO_WIFI_DISPLAY:
1026 pDM_Odm->bWIFI_Display = (BOOLEAN)Value;
1027 break;
1028
1029 case ODM_CMNINFO_LINK:
1030 pDM_Odm->bLinked = (BOOLEAN)Value;
1031 break;
1032
1033 case ODM_CMNINFO_STATION_STATE:
1034 pDM_Odm->bsta_state = (BOOLEAN)Value;
1035 break;
1036
1037 case ODM_CMNINFO_RSSI_MIN:
1038 pDM_Odm->RSSI_Min= (u1Byte)Value;
1039 break;
1040
1041 case ODM_CMNINFO_DBG_COMP:
1042 pDM_Odm->DebugComponents = Value;
1043 break;
1044
1045 case ODM_CMNINFO_DBG_LEVEL:
1046 pDM_Odm->DebugLevel = (u4Byte)Value;
1047 break;
1048 case ODM_CMNINFO_RA_THRESHOLD_HIGH:
1049 pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value;
1050 break;
1051
1052 case ODM_CMNINFO_RA_THRESHOLD_LOW:
1053 pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value;
1054 break;
1055 #if defined(BT_30_SUPPORT) && (BT_30_SUPPORT == 1)
1056 // The following is for BT HS mode and BT coexist mechanism.
1057 case ODM_CMNINFO_BT_ENABLED:
1058 pDM_Odm->bBtEnabled = (BOOLEAN)Value;
1059 break;
1060
1061 case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
1062 pDM_Odm->bBtConnectProcess = (BOOLEAN)Value;
1063 break;
1064
1065 case ODM_CMNINFO_BT_HS_RSSI:
1066 pDM_Odm->btHsRssi = (u1Byte)Value;
1067 break;
1068
1069 case ODM_CMNINFO_BT_OPERATION:
1070 pDM_Odm->bBtHsOperation = (BOOLEAN)Value;
1071 break;
1072
1073 case ODM_CMNINFO_BT_LIMITED_DIG:
1074 pDM_Odm->bBtLimitedDig = (BOOLEAN)Value;
1075 break;
1076
1077 case ODM_CMNINFO_BT_DIG:
1078 pDM_Odm->btHsDigVal = (u1Byte)Value;
1079 break;
1080
1081 case ODM_CMNINFO_BT_BUSY:
1082 pDM_Odm->bBtBusy = (BOOLEAN)Value;
1083 break;
1084
1085 case ODM_CMNINFO_BT_DISABLE_EDCA:
1086 pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value;
1087 break;
1088 #endif
1089
1090 #if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23
1091 #ifdef UNIVERSAL_REPEATER
1092 case ODM_CMNINFO_VXD_LINK:
1093 pDM_Odm->VXD_bLinked= (BOOLEAN)Value;
1094 break;
1095 #endif
1096 #endif
1097
1098 case ODM_CMNINFO_AP_TOTAL_NUM:
1099 pDM_Odm->APTotalNum = (u1Byte)Value;
1100 break;
1101
1102 /*
1103 case ODM_CMNINFO_OP_MODE:
1104 pDM_Odm->OPMode = (u1Byte)Value;
1105 break;
1106
1107 case ODM_CMNINFO_WM_MODE:
1108 pDM_Odm->WirelessMode = (u1Byte)Value;
1109 break;
1110
1111 case ODM_CMNINFO_BAND:
1112 pDM_Odm->BandType = (u1Byte)Value;
1113 break;
1114
1115 case ODM_CMNINFO_SEC_CHNL_OFFSET:
1116 pDM_Odm->SecChOffset = (u1Byte)Value;
1117 break;
1118
1119 case ODM_CMNINFO_SEC_MODE:
1120 pDM_Odm->Security = (u1Byte)Value;
1121 break;
1122
1123 case ODM_CMNINFO_BW:
1124 pDM_Odm->BandWidth = (u1Byte)Value;
1125 break;
1126
1127 case ODM_CMNINFO_CHNL:
1128 pDM_Odm->Channel = (u1Byte)Value;
1129 break;
1130 */
1131 default:
1132 //do nothing
1133 break;
1134 }
1135
1136
1137 }
1138
1139
1140 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1141 VOID
ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm)1142 ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm )
1143 {
1144
1145 PADAPTER pAdapter = pDM_Odm->Adapter;
1146 #if USE_WORKITEM
1147 #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)
1148 ODM_InitializeWorkItem( pDM_Odm,
1149 &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B,
1150 (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback,
1151 (PVOID)pAdapter,
1152 "AntennaSwitchWorkitem");
1153 #endif
1154 #if ((RTL8192C_SUPPORT == 1) && (defined(CONFIG_SW_ANTENNA_DIVERSITY)))
1155 ODM_InitializeWorkItem( pDM_Odm,
1156 &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem,
1157 (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback,
1158 (PVOID)pAdapter,
1159 "AntennaSwitchWorkitem");
1160 #endif
1161
1162 ODM_InitializeWorkItem(
1163 pDM_Odm,
1164 &(pDM_Odm->PathDivSwitchWorkitem),
1165 (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback,
1166 (PVOID)pAdapter,
1167 "SWAS_WorkItem");
1168
1169 ODM_InitializeWorkItem(
1170 pDM_Odm,
1171 &(pDM_Odm->CCKPathDiversityWorkitem),
1172 (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback,
1173 (PVOID)pAdapter,
1174 "CCKTXPathDiversityWorkItem");
1175
1176 ODM_InitializeWorkItem(
1177 pDM_Odm,
1178 &(pDM_Odm->MPT_DIGWorkitem),
1179 (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback,
1180 (PVOID)pAdapter,
1181 "MPT_DIGWorkitem");
1182
1183 ODM_InitializeWorkItem(
1184 pDM_Odm,
1185 &(pDM_Odm->RaRptWorkitem),
1186 (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback,
1187 (PVOID)pAdapter,
1188 "RaRptWorkitem");
1189
1190 #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) )
1191 ODM_InitializeWorkItem(
1192 pDM_Odm,
1193 &(pDM_Odm->FastAntTrainingWorkitem),
1194 (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback,
1195 (PVOID)pAdapter,
1196 "FastAntTrainingWorkitem");
1197 #endif
1198 ODM_InitializeWorkItem(
1199 pDM_Odm,
1200 &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem),
1201 (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback,
1202 (PVOID)pAdapter,
1203 "PSDRXHP_WorkItem");
1204
1205 #endif /*#if USE_WORKITEM*/
1206
1207 #if (BEAMFORMING_SUPPORT == 1)
1208 ODM_InitializeWorkItem(
1209 pDM_Odm,
1210 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem),
1211 (RT_WORKITEM_CALL_BACK)halComTxbf_EnterWorkItemCallback,
1212 (PVOID)pAdapter,
1213 "Txbf_EnterWorkItem");
1214
1215 ODM_InitializeWorkItem(
1216 pDM_Odm,
1217 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem),
1218 (RT_WORKITEM_CALL_BACK)halComTxbf_LeaveWorkItemCallback,
1219 (PVOID)pAdapter,
1220 "Txbf_LeaveWorkItem");
1221
1222 ODM_InitializeWorkItem(
1223 pDM_Odm,
1224 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem),
1225 (RT_WORKITEM_CALL_BACK)halComTxbf_FwNdpaWorkItemCallback,
1226 (PVOID)pAdapter,
1227 "Txbf_FwNdpaWorkItem");
1228
1229 ODM_InitializeWorkItem(
1230 pDM_Odm,
1231 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem),
1232 (RT_WORKITEM_CALL_BACK)halComTxbf_ClkWorkItemCallback,
1233 (PVOID)pAdapter,
1234 "Txbf_ClkWorkItem");
1235
1236 ODM_InitializeWorkItem(
1237 pDM_Odm,
1238 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem),
1239 (RT_WORKITEM_CALL_BACK)halComTxbf_RateWorkItemCallback,
1240 (PVOID)pAdapter,
1241 "Txbf_RateWorkItem");
1242
1243 ODM_InitializeWorkItem(
1244 pDM_Odm,
1245 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem),
1246 (RT_WORKITEM_CALL_BACK)halComTxbf_StatusWorkItemCallback,
1247 (PVOID)pAdapter,
1248 "Txbf_StatusWorkItem");
1249
1250 ODM_InitializeWorkItem(
1251 pDM_Odm,
1252 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem),
1253 (RT_WORKITEM_CALL_BACK)halComTxbf_ResetTxPathWorkItemCallback,
1254 (PVOID)pAdapter,
1255 "Txbf_ResetTxPathWorkItem");
1256
1257 ODM_InitializeWorkItem(
1258 pDM_Odm,
1259 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem),
1260 (RT_WORKITEM_CALL_BACK)halComTxbf_GetTxRateWorkItemCallback,
1261 (PVOID)pAdapter,
1262 "Txbf_GetTxRateWorkItem");
1263 #endif
1264 }
1265
1266 VOID
ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm)1267 ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm )
1268 {
1269 #if USE_WORKITEM
1270 #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)
1271 ODM_FreeWorkItem(&(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B));
1272 #endif
1273 #if ((RTL8192C_SUPPORT == 1) && (defined(CONFIG_SW_ANTENNA_DIVERSITY)))
1274 ODM_FreeWorkItem(&(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem));
1275 #endif
1276 ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem));
1277 ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem));
1278 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
1279 ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem));
1280 #endif
1281 ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem));
1282 ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem));
1283 ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem));
1284 /*ODM_FreeWorkItem((&pDM_Odm->sbdcnt_workitem));*/
1285 #endif
1286
1287 #if (BEAMFORMING_SUPPORT == 1)
1288 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem));
1289 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem));
1290 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem));
1291 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem));
1292 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem));
1293 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem));
1294 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem));
1295 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem));
1296
1297 #endif
1298
1299 }
1300 #endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
1301
1302 /*
1303 VOID
1304 odm_FindMinimumRSSI(
1305 IN PDM_ODM_T pDM_Odm
1306 )
1307 {
1308 u4Byte i;
1309 u1Byte RSSI_Min = 0xFF;
1310
1311 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1312 {
1313 // if(pDM_Odm->pODM_StaInfo[i] != NULL)
1314 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1315 {
1316 if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min)
1317 {
1318 RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave;
1319 }
1320 }
1321 }
1322
1323 pDM_Odm->RSSI_Min = RSSI_Min;
1324
1325 }
1326
1327 VOID
1328 odm_IsLinked(
1329 IN PDM_ODM_T pDM_Odm
1330 )
1331 {
1332 u4Byte i;
1333 BOOLEAN Linked = FALSE;
1334
1335 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1336 {
1337 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1338 {
1339 Linked = TRUE;
1340 break;
1341 }
1342
1343 }
1344
1345 pDM_Odm->bLinked = Linked;
1346 }
1347 */
1348
1349 VOID
ODM_InitAllTimers(IN PDM_ODM_T pDM_Odm)1350 ODM_InitAllTimers(
1351 IN PDM_ODM_T pDM_Odm
1352 )
1353 {
1354 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1355 ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER);
1356 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1357 ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer,
1358 (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer");
1359 #endif
1360
1361 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1362 #ifdef MP_TEST
1363 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1364 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1365 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1366 #endif
1367 #elif(DM_ODM_SUPPORT_TYPE == ODM_WIN)
1368 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1369 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1370 #endif
1371
1372 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1373 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer,
1374 (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer");
1375 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer,
1376 (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer");
1377 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer,
1378 (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer");
1379 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer,
1380 (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer");
1381 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer,
1382 (RT_TIMER_CALL_BACK)phydm_sbd_callback, NULL, "SbdTimer");
1383 #if (BEAMFORMING_SUPPORT == 1)
1384 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer,
1385 (RT_TIMER_CALL_BACK)halComTxbf_FwNdpaTimerCallback, NULL, "Txbf_FwNdpaTimer");
1386
1387 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer,
1388 (RT_TIMER_CALL_BACK)Beamforming_SWTimerCallback, NULL, "BeamformingTimer");
1389 #endif
1390
1391 #endif
1392
1393
1394 }
1395
1396 VOID
ODM_CancelAllTimers(IN PDM_ODM_T pDM_Odm)1397 ODM_CancelAllTimers(
1398 IN PDM_ODM_T pDM_Odm
1399 )
1400 {
1401 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1402 //
1403 // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in
1404 // win7 platform.
1405 //
1406 HAL_ADAPTER_STS_CHK(pDM_Odm)
1407 #endif
1408
1409 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1410 ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER);
1411 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1412 ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1413 #endif
1414
1415 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1416 #ifdef MP_TEST
1417 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1418 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1419 #endif
1420 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1421 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1422 #endif
1423
1424 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1425 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1426 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1427 ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1428 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1429 ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1430 ODM_CancelTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer);
1431 #if (BEAMFORMING_SUPPORT == 1)
1432 ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer);
1433 ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer);
1434 #endif
1435
1436 #endif
1437
1438 }
1439
1440
1441 VOID
ODM_ReleaseAllTimers(IN PDM_ODM_T pDM_Odm)1442 ODM_ReleaseAllTimers(
1443 IN PDM_ODM_T pDM_Odm
1444 )
1445 {
1446 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1447 ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER);
1448 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1449 ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1450 #endif
1451
1452 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1453 #ifdef MP_TEST
1454 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1455 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1456 #endif
1457 #elif(DM_ODM_SUPPORT_TYPE == ODM_WIN)
1458 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1459 #endif
1460
1461 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1462 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1463 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1464 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1465 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1466 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1467 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer);
1468 #if (BEAMFORMING_SUPPORT == 1)
1469 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer);
1470 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer);
1471 #endif
1472 #endif
1473
1474 }
1475
1476
1477 //3============================================================
1478 //3 Tx Power Tracking
1479 //3============================================================
1480
1481
1482
1483
1484 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1485 VOID
ODM_InitAllThreads(IN PDM_ODM_T pDM_Odm)1486 ODM_InitAllThreads(
1487 IN PDM_ODM_T pDM_Odm
1488 )
1489 {
1490 #ifdef TPT_THREAD
1491 kTPT_task_init(pDM_Odm->priv);
1492 #endif
1493 }
1494
1495 VOID
ODM_StopAllThreads(IN PDM_ODM_T pDM_Odm)1496 ODM_StopAllThreads(
1497 IN PDM_ODM_T pDM_Odm
1498 )
1499 {
1500 #ifdef TPT_THREAD
1501 kTPT_task_stop(pDM_Odm->priv);
1502 #endif
1503 }
1504 #endif
1505
1506
1507 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
1508 //
1509 // 2011/07/26 MH Add an API for testing IQK fail case.
1510 //
1511 BOOLEAN
ODM_CheckPowerStatus(IN PADAPTER Adapter)1512 ODM_CheckPowerStatus(
1513 IN PADAPTER Adapter)
1514 {
1515
1516 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1517 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1518 RT_RF_POWER_STATE rtState;
1519 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1520
1521 // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1522 if (pMgntInfo->init_adpt_in_progress == TRUE)
1523 {
1524 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter\n"));
1525 return TRUE;
1526 }
1527
1528 //
1529 // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
1530 //
1531 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
1532 if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
1533 {
1534 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
1535 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
1536 return FALSE;
1537 }
1538 return TRUE;
1539 }
1540 #elif( DM_ODM_SUPPORT_TYPE == ODM_AP)
1541 BOOLEAN
ODM_CheckPowerStatus(IN PADAPTER Adapter)1542 ODM_CheckPowerStatus(
1543 IN PADAPTER Adapter)
1544 {
1545 /*
1546 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1547 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1548 RT_RF_POWER_STATE rtState;
1549 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1550
1551 // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1552 if (pMgntInfo->init_adpt_in_progress == TRUE)
1553 {
1554 ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
1555 return TRUE;
1556 }
1557
1558 //
1559 // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
1560 //
1561 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
1562 if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
1563 {
1564 ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
1565 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
1566 return FALSE;
1567 }
1568 */
1569 return TRUE;
1570 }
1571 #endif
1572
1573 // need to ODM CE Platform
1574 //move to here for ANT detection mechanism using
1575
1576 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE))
1577 u4Byte
GetPSDData(IN PDM_ODM_T pDM_Odm,unsigned int point,u1Byte initial_gain_psd)1578 GetPSDData(
1579 IN PDM_ODM_T pDM_Odm,
1580 unsigned int point,
1581 u1Byte initial_gain_psd)
1582 {
1583 //unsigned int val, rfval;
1584 //int psd_report;
1585 u4Byte psd_report;
1586
1587 //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1588 //Debug Message
1589 //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord);
1590 //DbgPrint("Reg908 = 0x%x\n",val);
1591 //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord);
1592 //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
1593 //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval);
1594 //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n",
1595 //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval);
1596
1597 //Set DCO frequency index, offset=(40MHz/SamplePts)*point
1598 ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
1599
1600 //Start PSD calculation, Reg808[22]=0->1
1601 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1);
1602 //Need to wait for HW PSD report
1603 ODM_StallExecution(1000);
1604 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);
1605 //Read PSD report, Reg8B4[15:0]
1606 psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;
1607
1608 #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX))
1609 psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c);
1610 #else
1611 psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c);
1612 #endif
1613
1614 return psd_report;
1615
1616 }
1617 #endif
1618
1619 u4Byte
odm_ConvertTo_dB(u4Byte Value)1620 odm_ConvertTo_dB(
1621 u4Byte Value)
1622 {
1623 u1Byte i;
1624 u1Byte j;
1625 u4Byte dB;
1626
1627 Value = Value & 0xFFFF;
1628
1629 for (i = 0; i < 12; i++)
1630 {
1631 if (Value <= dB_Invert_Table[i][7])
1632 {
1633 break;
1634 }
1635 }
1636
1637 if (i >= 12)
1638 {
1639 return (96); // maximum 96 dB
1640 }
1641
1642 for (j = 0; j < 8; j++)
1643 {
1644 if (Value <= dB_Invert_Table[i][j])
1645 {
1646 break;
1647 }
1648 }
1649
1650 dB = (i << 3) + j + 1;
1651
1652 return (dB);
1653 }
1654
1655 u4Byte
odm_ConvertTo_linear(u4Byte Value)1656 odm_ConvertTo_linear(
1657 u4Byte Value)
1658 {
1659 u1Byte i;
1660 u1Byte j;
1661 u4Byte linear;
1662
1663 Value = Value & 0xFF;
1664
1665 i = (u1Byte)((Value - 1) >> 3);
1666 j = (u1Byte)(Value-1) - (i << 3);
1667
1668 linear = dB_Invert_Table[i][j];
1669
1670 return (linear);
1671 }
1672
1673 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1674 VOID
ODM_UpdateInitRateWorkItemCallback(IN PVOID pContext)1675 ODM_UpdateInitRateWorkItemCallback(
1676 IN PVOID pContext
1677 )
1678 {
1679 PADAPTER Adapter = (PADAPTER)pContext;
1680 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1681 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1682
1683 u1Byte p = 0;
1684
1685 if(pDM_Odm->SupportICType == ODM_RTL8821)
1686 {
1687 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1688 }
1689 else if(pDM_Odm->SupportICType == ODM_RTL8812)
1690 {
1691 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) //DOn't know how to include &c
1692 {
1693 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
1694 }
1695 }
1696 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1697 {
1698 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1699 }
1700 else if(pDM_Odm->SupportICType == ODM_RTL8192E)
1701 {
1702 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) //DOn't know how to include &c
1703 {
1704 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
1705 }
1706 }
1707 else if(pDM_Odm->SupportICType == ODM_RTL8188E)
1708 {
1709 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1710 }
1711 }
1712 #endif
1713
1714 //
1715 // ODM multi-port consideration, added by Roger, 2013.10.01.
1716 //
1717 VOID
ODM_AsocEntry_Init(IN PDM_ODM_T pDM_Odm)1718 ODM_AsocEntry_Init(
1719 IN PDM_ODM_T pDM_Odm
1720 )
1721 {
1722 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1723 PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter);
1724 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter);
1725 PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc;
1726 u1Byte TotalAssocEntryNum = 0;
1727 u1Byte index = 0;
1728
1729
1730 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]);
1731 pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum;
1732
1733 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1734 TotalAssocEntryNum +=1;
1735
1736 while(pLoopAdapter)
1737 {
1738 for (index = 0; index <ASSOCIATE_ENTRY_NUM; index++)
1739 {
1740 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, TotalAssocEntryNum+index, &pLoopAdapter->MgntInfo.AsocEntry[index]);
1741 pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index;
1742 }
1743
1744 TotalAssocEntryNum+= index;
1745 if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter)))
1746 pLoopAdapter->RASupport = TRUE;
1747 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1748 }
1749 #endif
1750 }
1751
1752 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1753 /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
odm_dtc(PDM_ODM_T pDM_Odm)1754 void odm_dtc(PDM_ODM_T pDM_Odm)
1755 {
1756 #ifdef CONFIG_DM_RESP_TXAGC
1757 #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */
1758 #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */
1759
1760 /* RSSI vs TX power step mapping: decade TX power */
1761 static const u8 dtc_table_down[]={
1762 DTC_BASE,
1763 (DTC_BASE+5),
1764 (DTC_BASE+10),
1765 (DTC_BASE+15),
1766 (DTC_BASE+20),
1767 (DTC_BASE+25)
1768 };
1769
1770 /* RSSI vs TX power step mapping: increase TX power */
1771 static const u8 dtc_table_up[]={
1772 DTC_DWN_BASE,
1773 (DTC_DWN_BASE-5),
1774 (DTC_DWN_BASE-10),
1775 (DTC_DWN_BASE-15),
1776 (DTC_DWN_BASE-15),
1777 (DTC_DWN_BASE-20),
1778 (DTC_DWN_BASE-20),
1779 (DTC_DWN_BASE-25),
1780 (DTC_DWN_BASE-25),
1781 (DTC_DWN_BASE-30),
1782 (DTC_DWN_BASE-35)
1783 };
1784
1785 u8 i;
1786 u8 dtc_steps=0;
1787 u8 sign;
1788 u8 resp_txagc=0;
1789
1790 #if 0
1791 /* As DIG is disabled, DTC is also disable */
1792 if(!(pDM_Odm->SupportAbility & ODM_XXXXXX))
1793 return;
1794 #endif
1795
1796 if (DTC_BASE < pDM_Odm->RSSI_Min) {
1797 /* need to decade the CTS TX power */
1798 sign = 1;
1799 for (i=0;i<ARRAY_SIZE(dtc_table_down);i++)
1800 {
1801 if ((dtc_table_down[i] >= pDM_Odm->RSSI_Min) || (dtc_steps >= 6))
1802 break;
1803 else
1804 dtc_steps++;
1805 }
1806 }
1807 #if 0
1808 else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min)
1809 {
1810 /* needs to increase the CTS TX power */
1811 sign = 0;
1812 dtc_steps = 1;
1813 for (i=0;i<ARRAY_SIZE(dtc_table_up);i++)
1814 {
1815 if ((dtc_table_up[i] <= pDM_Odm->RSSI_Min) || (dtc_steps>=10))
1816 break;
1817 else
1818 dtc_steps++;
1819 }
1820 }
1821 #endif
1822 else
1823 {
1824 sign = 0;
1825 dtc_steps = 0;
1826 }
1827
1828 resp_txagc = dtc_steps | (sign << 4);
1829 resp_txagc = resp_txagc | (resp_txagc << 5);
1830 ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc);
1831
1832 DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n",
1833 __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps);
1834 #endif /* CONFIG_RESP_TXAGC_ADJUST */
1835 }
1836
1837 #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
1838
1839 VOID
odm_UpdatePowerTrainingState(IN PDM_ODM_T pDM_Odm)1840 odm_UpdatePowerTrainingState(
1841 IN PDM_ODM_T pDM_Odm
1842 )
1843 {
1844 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1845 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT);
1846 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
1847 u4Byte score = 0;
1848
1849 if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN))
1850 return;
1851
1852 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n"));
1853 pDM_Odm->bChangeState = FALSE;
1854
1855 // Debug command
1856 if(pDM_Odm->ForcePowerTrainingState)
1857 {
1858 if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining)
1859 {
1860 pDM_Odm->bChangeState = TRUE;
1861 pDM_Odm->bDisablePowerTraining = TRUE;
1862 }
1863 else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining)
1864 {
1865 pDM_Odm->bChangeState = TRUE;
1866 pDM_Odm->bDisablePowerTraining = FALSE;
1867 }
1868
1869 pDM_Odm->PT_score = 0;
1870 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
1871 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
1872 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n",
1873 pDM_Odm->ForcePowerTrainingState));
1874 return;
1875 }
1876
1877 if(!pDM_Odm->bLinked)
1878 return;
1879
1880 // First connect
1881 if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE))
1882 {
1883 pDM_Odm->PT_score = 0;
1884 pDM_Odm->bChangeState = TRUE;
1885 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
1886 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
1887 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n"));
1888 return;
1889 }
1890
1891 // Compute score
1892 if(pDM_Odm->NHM_cnt_0 >= 215)
1893 score = 2;
1894 else if(pDM_Odm->NHM_cnt_0 >= 190)
1895 score = 1; // unknow state
1896 else
1897 {
1898 u4Byte RX_Pkt_Cnt;
1899
1900 RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK);
1901
1902 if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt))
1903 {
1904 if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all)
1905 score = 0;
1906 else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all)
1907 score = 1;
1908 else
1909 score = 2;
1910 }
1911 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n",
1912 RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all));
1913 }
1914 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n",
1915 (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK)));
1916 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n",
1917 pDM_Odm->NHM_cnt_0, score));
1918
1919 // smoothing
1920 pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2);
1921 score = (pDM_Odm->PT_score + 32) >> 6;
1922 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n",
1923 pDM_Odm->PT_score, score));
1924
1925 // Mode decision
1926 if(score == 2)
1927 {
1928 if(pDM_Odm->bDisablePowerTraining)
1929 {
1930 pDM_Odm->bChangeState = TRUE;
1931 pDM_Odm->bDisablePowerTraining = FALSE;
1932 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
1933 }
1934 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n"));
1935 }
1936 else if(score == 0)
1937 {
1938 if(!pDM_Odm->bDisablePowerTraining)
1939 {
1940 pDM_Odm->bChangeState = TRUE;
1941 pDM_Odm->bDisablePowerTraining = TRUE;
1942 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
1943 }
1944 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n"));
1945 }
1946
1947 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
1948 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
1949 #endif
1950 }
1951
1952
1953
1954 /*===========================================================*/
1955 /* The following is for compile only*/
1956 /*===========================================================*/
1957 /*#define TARGET_CHNL_NUM_2G_5G 59*/
1958 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1959
GetRightChnlPlaceforIQK(u1Byte chnl)1960 u1Byte GetRightChnlPlaceforIQK(u1Byte chnl)
1961 {
1962 u1Byte channel_all[TARGET_CHNL_NUM_2G_5G] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100,
1963 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165};
1964 u1Byte place = chnl;
1965
1966
1967 if (chnl > 14) {
1968 for (place = 14; place < sizeof(channel_all); place++) {
1969 if (channel_all[place] == chnl)
1970 return place-13;
1971 }
1972 }
1973
1974 return 0;
1975 }
1976
1977 VOID
FillH2CCmd92C(IN PADAPTER Adapter,IN u1Byte ElementID,IN u4Byte CmdLen,IN pu1Byte pCmdBuffer)1978 FillH2CCmd92C(
1979 IN PADAPTER Adapter,
1980 IN u1Byte ElementID,
1981 IN u4Byte CmdLen,
1982 IN pu1Byte pCmdBuffer
1983 )
1984 {}
1985 VOID
PHY_SetTxPowerLevel8192C(IN PADAPTER Adapter,IN u1Byte channel)1986 PHY_SetTxPowerLevel8192C(
1987 IN PADAPTER Adapter,
1988 IN u1Byte channel
1989 )
1990 {
1991 }
1992 #endif
1993 /*===========================================================*/
1994
1995 VOID
phydm_NoisyDetection(IN PDM_ODM_T pDM_Odm)1996 phydm_NoisyDetection(
1997 IN PDM_ODM_T pDM_Odm
1998 )
1999 {
2000 u4Byte Total_FA_Cnt, Total_CCA_Cnt;
2001 u4Byte Score = 0, i, Score_Smooth;
2002
2003 Total_CCA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_CCA_all;
2004 Total_FA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_all;
2005
2006 /*
2007 if( Total_FA_Cnt*16>=Total_CCA_Cnt*14 ) // 87.5
2008
2009 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*12 ) // 75
2010
2011 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*10 ) // 56.25
2012
2013 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*8 ) // 50
2014
2015 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*7 ) // 43.75
2016
2017 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*6 ) // 37.5
2018
2019 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*5 ) // 31.25%
2020
2021 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*4 ) // 25%
2022
2023 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*3 ) // 18.75%
2024
2025 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*2 ) // 12.5%
2026
2027 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*1 ) // 6.25%
2028 */
2029 for(i=0;i<=16;i++)
2030 {
2031 if( Total_FA_Cnt*16>=Total_CCA_Cnt*(16-i) )
2032 {
2033 Score = 16-i;
2034 break;
2035 }
2036 }
2037
2038 // NoisyDecision_Smooth = NoisyDecision_Smooth>>1 + (Score<<3)>>1;
2039 pDM_Odm->NoisyDecision_Smooth = (pDM_Odm->NoisyDecision_Smooth>>1) + (Score<<2);
2040
2041 // Round the NoisyDecision_Smooth: +"3" comes from (2^3)/2-1
2042 Score_Smooth = (Total_CCA_Cnt>=300)?((pDM_Odm->NoisyDecision_Smooth+3)>>3):0;
2043
2044 pDM_Odm->NoisyDecision = (Score_Smooth>=3)?1:0;
2045 /*
2046 switch(Score_Smooth)
2047 {
2048 case 0:
2049 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2050 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=0%%\n"));
2051 break;
2052 case 1:
2053 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2054 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=6.25%%\n"));
2055 break;
2056 case 2:
2057 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2058 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=12.5%%\n"));
2059 break;
2060 case 3:
2061 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2062 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=18.75%%\n"));
2063 break;
2064 case 4:
2065 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2066 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=25%%\n"));
2067 break;
2068 case 5:
2069 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2070 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=31.25%%\n"));
2071 break;
2072 case 6:
2073 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2074 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=37.5%%\n"));
2075 break;
2076 case 7:
2077 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2078 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=43.75%%\n"));
2079 break;
2080 case 8:
2081 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2082 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=50%%\n"));
2083 break;
2084 case 9:
2085 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2086 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=56.25%%\n"));
2087 break;
2088 case 10:
2089 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2090 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=62.5%%\n"));
2091 break;
2092 case 11:
2093 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2094 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=68.75%%\n"));
2095 break;
2096 case 12:
2097 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2098 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=75%%\n"));
2099 break;
2100 case 13:
2101 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2102 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=81.25%%\n"));
2103 break;
2104 case 14:
2105 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2106 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=87.5%%\n"));
2107 break;
2108 case 15:
2109 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2110 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=93.75%%\n"));
2111 break;
2112 case 16:
2113 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2114 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=100%%\n"));
2115 break;
2116 default:
2117 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2118 ("[NoisyDetection] Unknown Value!! Need Check!!\n"));
2119 }
2120 */
2121 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2122 ("[NoisyDetection] Total_CCA_Cnt=%d, Total_FA_Cnt=%d, NoisyDecision_Smooth=%d, Score=%d, Score_Smooth=%d, pDM_Odm->NoisyDecision=%d\n",
2123 Total_CCA_Cnt, Total_FA_Cnt, pDM_Odm->NoisyDecision_Smooth, Score, Score_Smooth, pDM_Odm->NoisyDecision));
2124
2125 }
2126
2127 VOID
phydm_set_nbi_reg(IN PVOID pDM_VOID,IN u4Byte tone_idx_tmp,IN u4Byte bw)2128 phydm_set_nbi_reg(
2129 IN PVOID pDM_VOID,
2130 IN u4Byte tone_idx_tmp,
2131 IN u4Byte bw
2132 )
2133 {
2134 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2135 u4Byte nbi_table_128[NBI_TABLE_SIZE_128] = {25, 55, 85, 115, 135, 155, 185, 205, 225, 245, /*1~10*/ /*tone_idx X 10*/
2136 265, 285, 305, 335, 355, 375, 395, 415, 435, 455, /*11~20*/
2137 485, 505, 525, 555, 585, 615, 635}; /*21~27*/
2138
2139 u4Byte nbi_table_256[NBI_TABLE_SIZE_256] = { 25, 55, 85, 115, 135, 155, 175, 195, 225, 245, /*1~10*/
2140 265, 285, 305, 325, 345, 365, 385, 405, 425, 445, /*11~20*/
2141 465, 485, 505, 525, 545, 565, 585, 605, 625, 645, /*21~30*/
2142 665, 695, 715, 735, 755, 775, 795, 815, 835, 855, /*31~40*/
2143 875, 895, 915, 935, 955, 975, 995, 1015, 1035, 1055, /*41~50*/
2144 1085, 1105, 1125, 1145, 1175, 1195, 1225, 1255, 1275}; /*51~59*/
2145
2146 u4Byte reg_idx = 0;
2147 u4Byte i;
2148 u1Byte nbi_table_idx = FFT_128_TYPE;
2149
2150 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2151
2152 nbi_table_idx = FFT_128_TYPE;
2153 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_1_SERIES) {
2154
2155 nbi_table_idx = FFT_256_TYPE;
2156 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_2_SERIES) {
2157
2158 if (bw == 80)
2159 nbi_table_idx = FFT_256_TYPE;
2160 else /*20M, 40M*/
2161 nbi_table_idx = FFT_128_TYPE;
2162 }
2163
2164 if (nbi_table_idx == FFT_128_TYPE) {
2165
2166 for (i = 0; i < NBI_TABLE_SIZE_128; i++) {
2167 if (tone_idx_tmp < nbi_table_128[i]) {
2168 reg_idx = i+1;
2169 break;
2170 }
2171 }
2172
2173 } else if (nbi_table_idx == FFT_256_TYPE) {
2174
2175 for (i = 0; i < NBI_TABLE_SIZE_256; i++) {
2176 if (tone_idx_tmp < nbi_table_256[i]) {
2177 reg_idx = i+1;
2178 break;
2179 }
2180 }
2181 }
2182
2183 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2184 ODM_SetBBReg(pDM_Odm, 0xc40, 0x1f000000, reg_idx);
2185 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Set tone idx: Reg0xC40[28:24] = ((0x%x))\n", reg_idx));
2186 /**/
2187 } else {
2188 ODM_SetBBReg(pDM_Odm, 0x87c, 0xfc000, reg_idx);
2189 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Set tone idx: Reg0x87C[19:14] = ((0x%x))\n", reg_idx));
2190 /**/
2191 }
2192 }
2193
2194 u1Byte
phydm_calculate_fc(IN PVOID pDM_VOID,IN u4Byte channel,IN u4Byte bw,IN u4Byte Second_ch,IN OUT u4Byte * fc_in)2195 phydm_calculate_fc(
2196 IN PVOID pDM_VOID,
2197 IN u4Byte channel,
2198 IN u4Byte bw,
2199 IN u4Byte Second_ch,
2200 IN OUT u4Byte *fc_in
2201 )
2202 {
2203 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2204 u4Byte fc = *fc_in;
2205 u4Byte start_ch_per_40m[NUM_START_CH_40M] = {36, 44, 52, 60, 100, 108, 116, 124, 132, 140, 149, 157, 165, 173};
2206 u4Byte start_ch_per_80m[NUM_START_CH_80M] = {36, 52, 100, 116, 132, 149, 165};
2207 pu4Byte p_start_ch = &(start_ch_per_40m[0]);
2208 u4Byte num_start_channel = NUM_START_CH_40M;
2209 u4Byte channel_offset = 0;
2210 u4Byte i;
2211
2212 /*2.4G*/
2213 if (channel <= 14 && channel > 0) {
2214
2215 if (bw == 80) {
2216 return SET_ERROR;
2217 }
2218
2219 fc = 2412 + (channel - 1)*5;
2220
2221 if (bw == 40 && (Second_ch == PHYDM_ABOVE)) {
2222
2223 if (channel >= 10) {
2224 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CH = ((%d)), Scnd_CH = ((%d)) Error Setting\n", channel, Second_ch));
2225 return SET_ERROR;
2226 }
2227 fc += 10;
2228 } else if (bw == 40 && (Second_ch == PHYDM_BELOW)) {
2229
2230 if (channel <= 2) {
2231 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CH = ((%d)), Scnd_CH = ((%d)) Error Setting\n", channel, Second_ch));
2232 return SET_ERROR;
2233 }
2234 fc -= 10;
2235 }
2236 }
2237 /*5G*/
2238 else if (channel >= 36 && channel <= 177) {
2239
2240 if (bw != 20) {
2241
2242 if (bw == 40) {
2243 num_start_channel = NUM_START_CH_40M;
2244 p_start_ch = &(start_ch_per_40m[0]);
2245 channel_offset = CH_OFFSET_40M;
2246 } else if (bw == 80) {
2247 num_start_channel = NUM_START_CH_80M;
2248 p_start_ch = &(start_ch_per_80m[0]);
2249 channel_offset = CH_OFFSET_80M;
2250 }
2251
2252 for (i = 0; i < (num_start_channel - 1); i++) {
2253
2254 if (channel < p_start_ch[i+1]) {
2255 channel = p_start_ch[i] + channel_offset;
2256 break;
2257 }
2258 }
2259 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Mod_CH = ((%d))\n", channel));
2260 }
2261
2262 fc = 5180 + (channel-36)*5;
2263
2264 } else {
2265 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CH = ((%d)) Error Setting\n", channel));
2266 return SET_ERROR;
2267 }
2268
2269 *fc_in = fc;
2270
2271 return SET_SUCCESS;
2272 }
2273
2274 u1Byte
phydm_calculate_intf_distance(IN PVOID pDM_VOID,IN u4Byte bw,IN u4Byte fc,IN u4Byte f_interference,IN OUT u4Byte * p_tone_idx_tmp_in)2275 phydm_calculate_intf_distance(
2276 IN PVOID pDM_VOID,
2277 IN u4Byte bw,
2278 IN u4Byte fc,
2279 IN u4Byte f_interference,
2280 IN OUT u4Byte *p_tone_idx_tmp_in
2281 )
2282 {
2283 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2284 u4Byte bw_up, bw_low;
2285 u4Byte int_distance;
2286 u4Byte tone_idx_tmp;
2287 u1Byte set_result = SET_NO_NEED;
2288
2289 bw_up = fc + bw/2;
2290 bw_low = fc - bw/2;
2291
2292 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, fc, bw_up, f_interference));
2293
2294 if ((f_interference >= bw_low) && (f_interference <= bw_up)) {
2295
2296 int_distance = (fc >= f_interference) ? (fc - f_interference) : (f_interference - fc);
2297 tone_idx_tmp = (int_distance<<5); /* =10*(int_distance /0.3125) */
2298 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("int_distance = ((%d MHz)) Mhz, tone_idx_tmp = ((%d.%d))\n", int_distance, (tone_idx_tmp/10), (tone_idx_tmp%10)));
2299 *p_tone_idx_tmp_in = tone_idx_tmp;
2300 set_result = SET_SUCCESS;
2301 }
2302
2303 return set_result;
2304
2305 }
2306
2307 VOID
phydm_nbi_enable(IN PVOID pDM_VOID,IN u4Byte enable)2308 phydm_nbi_enable(
2309 IN PVOID pDM_VOID,
2310 IN u4Byte enable
2311 )
2312 {
2313 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2314 u4Byte reg_value = 0;
2315
2316 reg_value = (enable == NBI_ENABLE) ? 1 : 0;
2317
2318 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
2319 ODM_SetBBReg(pDM_Odm, 0xc40, BIT9, reg_value);
2320 else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
2321 ODM_SetBBReg(pDM_Odm, 0x87c, BIT(13), reg_value);
2322
2323 }
2324
2325 u1Byte
phydm_nbi_setting(IN PVOID pDM_VOID,IN u4Byte enable,IN u4Byte channel,IN u4Byte bw,IN u4Byte f_interference,IN u4Byte Second_ch)2326 phydm_nbi_setting(
2327 IN PVOID pDM_VOID,
2328 IN u4Byte enable,
2329 IN u4Byte channel,
2330 IN u4Byte bw,
2331 IN u4Byte f_interference,
2332 IN u4Byte Second_ch
2333 )
2334 {
2335 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2336 u4Byte fc = 2412;
2337 u4Byte tone_idx_tmp;
2338 u1Byte set_result = SET_SUCCESS;
2339
2340 if (enable == NBI_DISABLE)
2341 set_result = SET_SUCCESS;
2342
2343 else {
2344
2345 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
2346 channel, bw, f_interference, (((Second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "Don't care" : (Second_ch == PHYDM_ABOVE) ? "H" : "L")));
2347
2348 /*calculate fc*/
2349 if (phydm_calculate_fc(pDM_Odm, channel, bw, Second_ch, &fc) == SET_ERROR)
2350 set_result = SET_ERROR;
2351
2352 else {
2353 /*calculate interference distance*/
2354 if (phydm_calculate_intf_distance(pDM_Odm, bw, fc, f_interference, &tone_idx_tmp) == SET_SUCCESS) {
2355
2356 phydm_set_nbi_reg(pDM_Odm, tone_idx_tmp, bw);
2357 set_result = SET_SUCCESS;
2358 } else
2359 set_result = SET_NO_NEED;
2360 }
2361 }
2362
2363 if (set_result == SET_SUCCESS)
2364 phydm_nbi_enable(pDM_Odm, enable);
2365 else
2366 phydm_nbi_enable(pDM_Odm, NBI_DISABLE);
2367
2368 return set_result;
2369 }
2370
2371 void
phydm_receiver_blocking(IN PVOID pDM_VOID)2372 phydm_receiver_blocking(
2373 IN PVOID pDM_VOID
2374 )
2375 {
2376 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2377 PADAPTER Adapter = pDM_Odm->Adapter;
2378 u4Byte channel = *pDM_Odm->pChannel;
2379 u1Byte bw = *pDM_Odm->pBandWidth;
2380 u1Byte set_result = 0;
2381 u4Byte total_tp;
2382
2383 total_tp = Adapter->dvobj->traffic_stat.cur_tx_tp + Adapter->dvobj->traffic_stat.cur_rx_tp;
2384
2385 if (total_tp == 0)
2386 pDM_Odm->consecutive_idlel_time = pDM_Odm->consecutive_idlel_time + PHYDM_WATCH_DOG_PERIOD;
2387 else
2388 pDM_Odm->consecutive_idlel_time = 0;
2389
2390 if (pDM_Odm->consecutive_idlel_time > 8 && pDM_Odm->mp_mode == false && pDM_Odm->Adaptivity_enable == true) {
2391 if ((bw == ODM_BW20M) && (channel == 1)) {
2392 set_result = phydm_nbi_setting(pDM_Odm, NBI_ENABLE, channel, 20, 2410, PHYDM_DONT_CARE);
2393 pDM_Odm->is_nbi_enable = true;
2394 } else if ((bw == ODM_BW20M) && (channel == 13)) {
2395 set_result = phydm_nbi_setting(pDM_Odm, NBI_ENABLE, channel, 20, 2473, PHYDM_DONT_CARE);
2396 pDM_Odm->is_nbi_enable = true;
2397 } else if ((!pDM_Odm->pbScanInProcess) && channel != 1 && channel != 13) {
2398 phydm_nbi_enable(pDM_Odm, NBI_DISABLE);
2399 ODM_SetBBReg(pDM_Odm, 0xc40, 0x1f000000, 0x1f);
2400 pDM_Odm->is_nbi_enable = false;
2401 }
2402 } else {
2403 if (pDM_Odm->is_nbi_enable) {
2404 phydm_nbi_enable(pDM_Odm, NBI_DISABLE);
2405 ODM_SetBBReg(pDM_Odm, 0xc40, 0x1f000000, 0x1f);
2406 pDM_Odm->is_nbi_enable = false;
2407 }
2408 }
2409 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD,
2410 ("[NBI set result: %s]\n", (set_result == SET_SUCCESS ? "Success" : (set_result == SET_NO_NEED ? "No need" : "Error"))));
2411 }
2412
2413