xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/btc/HalBtc8821aCsr2Ant.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1 /* SPDX-License-Identifier: GPL-2.0 */
2 //============================================================
3 // Description:
4 //
5 // This file is for RTL8821A_CSR_CSR Co-exist mechanism
6 //
7 // History
8 // 2012/08/22 Cosa first check in.
9 // 2012/11/14 Cosa Revise for 8821A_CSR 2Ant out sourcing.
10 //
11 //============================================================
12 
13 //============================================================
14 // include files
15 //============================================================
16 #include "Mp_Precomp.h"
17 
18 #if WPP_SOFTWARE_TRACE
19 #include "HalBtcCsr8821a2Ant.tmh"
20 #endif
21 
22 #define _BTCOEX_CSR 1
23 
24 #ifndef rtw_warn_on
25 	#define rtw_warn_on(condition) do {} while (0)
26 #endif
27 
28 #if(BT_30_SUPPORT == 1)
29 //============================================================
30 // Global variables, these are static variables
31 //============================================================
32 static COEX_DM_8821A_CSR_2ANT	GLCoexDm8821aCsr2Ant;
33 static PCOEX_DM_8821A_CSR_2ANT 	pCoexDm=&GLCoexDm8821aCsr2Ant;
34 static COEX_STA_8821A_CSR_2ANT	GLCoexSta8821aCsr2Ant;
35 static PCOEX_STA_8821A_CSR_2ANT	pCoexSta=&GLCoexSta8821aCsr2Ant;
36 
37 const char *const GLBtInfoSrc8821aCsr2Ant[]={
38 	"BT Info[wifi fw]",
39 	"BT Info[bt rsp]",
40 	"BT Info[bt auto report]",
41 };
42 
43 u4Byte GLCoexVerDate8821aCsr2Ant=20140901;
44 u4Byte GLCoexVer8821aCsr2Ant=0x51;
45 
46 //============================================================
47 // local function proto type if needed
48 //============================================================
49 //============================================================
50 // local function start with halbtc8821aCsr2ant_
51 //============================================================
52 u1Byte
halbtc8821aCsr2ant_BtRssiState(u1Byte levelNum,u1Byte rssiThresh,u1Byte rssiThresh1)53 halbtc8821aCsr2ant_BtRssiState(
54 	u1Byte			levelNum,
55 	u1Byte			rssiThresh,
56 	u1Byte			rssiThresh1
57 	)
58 {
59 	s4Byte			btRssi=0;
60 	u1Byte			btRssiState=pCoexSta->preBtRssiState;
61 
62 	btRssi = pCoexSta->btRssi;
63 
64 	if(levelNum == 2)
65 	{
66 		if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
67 			(pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
68 		{
69 			if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
70 			{
71 				btRssiState = BTC_RSSI_STATE_HIGH;
72 			}
73 			else
74 			{
75 				btRssiState = BTC_RSSI_STATE_STAY_LOW;
76 			}
77 		}
78 		else
79 		{
80 			if(btRssi < rssiThresh)
81 			{
82 				btRssiState = BTC_RSSI_STATE_LOW;
83 			}
84 			else
85 			{
86 				btRssiState = BTC_RSSI_STATE_STAY_HIGH;
87 			}
88 		}
89 	}
90 	else if(levelNum == 3)
91 	{
92 		if(rssiThresh > rssiThresh1)
93 		{
94 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n"));
95 			return pCoexSta->preBtRssiState;
96 		}
97 
98 		if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
99 			(pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
100 		{
101 			if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
102 			{
103 				btRssiState = BTC_RSSI_STATE_MEDIUM;
104 			}
105 			else
106 			{
107 				btRssiState = BTC_RSSI_STATE_STAY_LOW;
108 			}
109 		}
110 		else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
111 			(pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM))
112 		{
113 			if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
114 			{
115 				btRssiState = BTC_RSSI_STATE_HIGH;
116 			}
117 			else if(btRssi < rssiThresh)
118 			{
119 				btRssiState = BTC_RSSI_STATE_LOW;
120 			}
121 			else
122 			{
123 				btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
124 			}
125 		}
126 		else
127 		{
128 			if(btRssi < rssiThresh1)
129 			{
130 				btRssiState = BTC_RSSI_STATE_MEDIUM;
131 			}
132 			else
133 			{
134 				btRssiState = BTC_RSSI_STATE_STAY_HIGH;
135 			}
136 		}
137 	}
138 
139 	pCoexSta->preBtRssiState = btRssiState;
140 
141 	return btRssiState;
142 }
143 
144 u1Byte
halbtc8821aCsr2ant_WifiRssiState(IN PBTC_COEXIST pBtCoexist,IN u1Byte index,IN u1Byte levelNum,IN u1Byte rssiThresh,IN u1Byte rssiThresh1)145 halbtc8821aCsr2ant_WifiRssiState(
146 	IN	PBTC_COEXIST		pBtCoexist,
147 	IN	u1Byte			index,
148 	IN	u1Byte			levelNum,
149 	IN	u1Byte			rssiThresh,
150 	IN	u1Byte			rssiThresh1
151 	)
152 {
153 	s4Byte			wifiRssi=0;
154 	u1Byte			wifiRssiState=pCoexSta->preWifiRssiState[index];
155 
156 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
157 
158 	if(levelNum == 2)
159 	{
160 		if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
161 			(pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
162 		{
163 			if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
164 			{
165 				wifiRssiState = BTC_RSSI_STATE_HIGH;
166 			}
167 			else
168 			{
169 				wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
170 			}
171 		}
172 		else
173 		{
174 			if(wifiRssi < rssiThresh)
175 			{
176 				wifiRssiState = BTC_RSSI_STATE_LOW;
177 			}
178 			else
179 			{
180 				wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
181 			}
182 		}
183 	}
184 	else if(levelNum == 3)
185 	{
186 		if(rssiThresh > rssiThresh1)
187 		{
188 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n"));
189 			return pCoexSta->preWifiRssiState[index];
190 		}
191 
192 		if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
193 			(pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
194 		{
195 			if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
196 			{
197 				wifiRssiState = BTC_RSSI_STATE_MEDIUM;
198 			}
199 			else
200 			{
201 				wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
202 			}
203 		}
204 		else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
205 			(pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))
206 		{
207 			if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT))
208 			{
209 				wifiRssiState = BTC_RSSI_STATE_HIGH;
210 			}
211 			else if(wifiRssi < rssiThresh)
212 			{
213 				wifiRssiState = BTC_RSSI_STATE_LOW;
214 			}
215 			else
216 			{
217 				wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
218 			}
219 		}
220 		else
221 		{
222 			if(wifiRssi < rssiThresh1)
223 			{
224 				wifiRssiState = BTC_RSSI_STATE_MEDIUM;
225 			}
226 			else
227 			{
228 				wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
229 			}
230 		}
231 	}
232 
233 	pCoexSta->preWifiRssiState[index] = wifiRssiState;
234 
235 	return wifiRssiState;
236 }
237 
238 VOID
halbtc8821aCsr2ant_MonitorBtEnableDisable(IN PBTC_COEXIST pBtCoexist)239 halbtc8821aCsr2ant_MonitorBtEnableDisable(
240 	IN 	PBTC_COEXIST		pBtCoexist
241 	)
242 {
243 	static BOOLEAN	bPreBtDisabled=FALSE;
244 	static u4Byte	btDisableCnt=0;
245 	BOOLEAN			bBtActive=TRUE, bBtDisabled=FALSE;
246 
247 	// This function check if bt is disabled
248 
249 	if(	pCoexSta->highPriorityTx == 0 &&
250 		pCoexSta->highPriorityRx == 0 &&
251 		pCoexSta->lowPriorityTx == 0 &&
252 		pCoexSta->lowPriorityRx == 0)
253 	{
254 		bBtActive = FALSE;
255 	}
256 	if(	pCoexSta->highPriorityTx == 0xffff &&
257 		pCoexSta->highPriorityRx == 0xffff &&
258 		pCoexSta->lowPriorityTx == 0xffff &&
259 		pCoexSta->lowPriorityRx == 0xffff)
260 	{
261 		bBtActive = FALSE;
262 	}
263 	if(bBtActive)
264 	{
265 		btDisableCnt = 0;
266 		bBtDisabled = FALSE;
267 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
268 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n"));
269 	}
270 	else
271 	{
272 		btDisableCnt++;
273 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n",
274 				btDisableCnt));
275 		if(btDisableCnt >= 2)
276 		{
277 			bBtDisabled = TRUE;
278 			pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
279 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n"));
280 		}
281 	}
282 	if(bPreBtDisabled != bBtDisabled)
283 	{
284 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n",
285 			(bPreBtDisabled ? "disabled":"enabled"),
286 			(bBtDisabled ? "disabled":"enabled")));
287 		bPreBtDisabled = bBtDisabled;
288 		if(!bBtDisabled)
289 		{
290 		}
291 		else
292 		{
293 		}
294 	}
295 }
296 
297 VOID
halbtc8821aCsr2ant_MonitorBtCtr(IN PBTC_COEXIST pBtCoexist)298 halbtc8821aCsr2ant_MonitorBtCtr(
299 	IN	PBTC_COEXIST		pBtCoexist
300 	)
301 {
302 	u4Byte 			regHPTxRx, regLPTxRx, u4Tmp;
303 	u4Byte			regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0;
304 	u1Byte			u1Tmp;
305 
306 	regHPTxRx = 0x770;
307 	regLPTxRx = 0x774;
308 
309 	u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx);
310 	regHPTx = u4Tmp & bMaskLWord;
311 	regHPRx = (u4Tmp & bMaskHWord)>>16;
312 
313 	u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx);
314 	regLPTx = u4Tmp & bMaskLWord;
315 	regLPRx = (u4Tmp & bMaskHWord)>>16;
316 
317 	pCoexSta->highPriorityTx = regHPTx;
318 	pCoexSta->highPriorityRx = regHPRx;
319 	pCoexSta->lowPriorityTx = regLPTx;
320 	pCoexSta->lowPriorityRx = regLPRx;
321 
322 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
323 		regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx));
324 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
325 		regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx));
326 
327 	// reset counter
328 	pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x5d);
329 }
330 
331 VOID
halbtc8821aCsr2ant_UpdateRaMask(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u4Byte disRateMask)332 halbtc8821aCsr2ant_UpdateRaMask(
333 	IN	PBTC_COEXIST		pBtCoexist,
334 	IN	BOOLEAN				bForceExec,
335 	IN	u4Byte				disRateMask
336 	)
337 {
338 	pCoexDm->curRaMask = disRateMask;
339 
340 	if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask))
341 	{
342 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask);
343 	}
344 	pCoexDm->preRaMask = pCoexDm->curRaMask;
345 }
346 
347 VOID
halbtc8821aCsr2ant_AutoRateFallbackRetry(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte type)348 halbtc8821aCsr2ant_AutoRateFallbackRetry(
349 	IN	PBTC_COEXIST		pBtCoexist,
350 	IN	BOOLEAN				bForceExec,
351 	IN	u1Byte				type
352 	)
353 {
354 	BOOLEAN	bWifiUnderBMode=FALSE;
355 
356 	pCoexDm->curArfrType = type;
357 
358 	if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType))
359 	{
360 		switch(pCoexDm->curArfrType)
361 		{
362 			case 0:	// normal mode
363 				pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1);
364 				pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2);
365 				break;
366 			case 1:
367 				pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode);
368 				if(bWifiUnderBMode)
369 				{
370 					pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0);
371 					pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101);
372 				}
373 				else
374 				{
375 					pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0);
376 					pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201);
377 				}
378 				break;
379 			default:
380 				break;
381 		}
382 	}
383 
384 	pCoexDm->preArfrType = pCoexDm->curArfrType;
385 }
386 
387 VOID
halbtc8821aCsr2ant_RetryLimit(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte type)388 halbtc8821aCsr2ant_RetryLimit(
389 	IN	PBTC_COEXIST		pBtCoexist,
390 	IN	BOOLEAN				bForceExec,
391 	IN	u1Byte				type
392 	)
393 {
394 	pCoexDm->curRetryLimitType = type;
395 
396 	if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType))
397 	{
398 		switch(pCoexDm->curRetryLimitType)
399 		{
400 			case 0:	// normal mode
401 				pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit);
402 				break;
403 			case 1:	// retry limit=8
404 				pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808);
405 				break;
406 			default:
407 				break;
408 		}
409 	}
410 
411 	pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType;
412 }
413 
414 VOID
halbtc8821aCsr2ant_AmpduMaxTime(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte type)415 halbtc8821aCsr2ant_AmpduMaxTime(
416 	IN	PBTC_COEXIST		pBtCoexist,
417 	IN	BOOLEAN				bForceExec,
418 	IN	u1Byte				type
419 	)
420 {
421 	pCoexDm->curAmpduTimeType = type;
422 
423 	if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType))
424 	{
425 		switch(pCoexDm->curAmpduTimeType)
426 		{
427 			case 0:	// normal mode
428 				pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime);
429 				break;
430 			case 1:	// AMPDU timw = 0x38 * 32us
431 				pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38);
432 				break;
433 			case 2:
434 				pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x17);
435 				break;
436 			default:
437 				break;
438 		}
439 	}
440 
441 	pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType;
442 }
443 
444 VOID
halbtc8821aCsr2Ant_AmpduMaxNum(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte type)445 halbtc8821aCsr2Ant_AmpduMaxNum(
446 	IN	PBTC_COEXIST		pBtCoexist,
447 	IN	BOOLEAN				bForceExec,
448 	IN	u1Byte				type
449 	)
450 {
451 	pCoexDm->curAmpduNumType = type;
452 
453 	if( bForceExec || (pCoexDm->preAmpduNumType != pCoexDm->curAmpduNumType))
454 	{
455 		switch(pCoexDm->curAmpduNumType)
456 		{
457 			case 0:	// normal mode
458 				pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, pCoexDm->backupAmpduMaxNum);
459 				break;
460 			case 1:
461 				pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x0808);
462 				break;
463 			case 2:
464 				pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x1f1f);
465 				break;
466 			default:
467 				break;
468 		}
469 	}
470 
471 	pCoexDm->preAmpduNumType = pCoexDm->curAmpduNumType;
472 
473 }
474 
475 VOID
halbtc8821aCsr2ant_LimitedTx(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte raMaskType,IN u1Byte arfrType,IN u1Byte retryLimitType,IN u1Byte ampduTimeType,IN u1Byte ampduNumType)476 halbtc8821aCsr2ant_LimitedTx(
477 	IN	PBTC_COEXIST		pBtCoexist,
478 	IN	BOOLEAN				bForceExec,
479 	IN	u1Byte				raMaskType,
480 	IN	u1Byte				arfrType,
481 	IN	u1Byte				retryLimitType,
482 	IN	u1Byte				ampduTimeType,
483 	IN	u1Byte				ampduNumType
484 	)
485 {
486 	switch(raMaskType)
487 	{
488 		case 0:	// normal mode
489 			halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0);
490 			break;
491 		case 1:	// disable cck 1/2
492 			halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003);
493 			break;
494 		case 2:	// disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4
495 			halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7);
496 			break;
497 		default:
498 			break;
499 	}
500 
501 	halbtc8821aCsr2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType);
502 	halbtc8821aCsr2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType);
503 	halbtc8821aCsr2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType);
504 	halbtc8821aCsr2Ant_AmpduMaxNum(pBtCoexist, bForceExec, ampduNumType);
505 }
506 
507 
508 
509 VOID
halbtc8821aCsr2ant_LimitedRx(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bRejApAggPkt,IN BOOLEAN bBtCtrlAggBufSize,IN u1Byte aggBufSize)510 halbtc8821aCsr2ant_LimitedRx(
511 	IN	PBTC_COEXIST		pBtCoexist,
512 	IN	BOOLEAN				bForceExec,
513 	IN	BOOLEAN				bRejApAggPkt,
514 	IN	BOOLEAN				bBtCtrlAggBufSize,
515 	IN	u1Byte				aggBufSize
516 	)
517 {
518 	BOOLEAN	bRejectRxAgg=bRejApAggPkt;
519 	BOOLEAN	bBtCtrlRxAggSize=bBtCtrlAggBufSize;
520 	u1Byte	rxAggSize=aggBufSize;
521 
522 	//============================================
523 	//	Rx Aggregation related setting
524 	//============================================
525 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
526 	// decide BT control aggregation buf size or not
527 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
528 	// aggregation buf size, only work when BT control Rx aggregation size.
529 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
530 	// real update aggregation setting
531 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
532 }
533 
534 VOID
halbtc8821aCsr2ant_QueryBtInfo(IN PBTC_COEXIST pBtCoexist)535 halbtc8821aCsr2ant_QueryBtInfo(
536 	IN	PBTC_COEXIST		pBtCoexist
537 	)
538 {
539 	u1Byte			H2C_Parameter[1] ={0};
540 
541 	pCoexSta->bC2hBtInfoReqSent = TRUE;
542 
543 	H2C_Parameter[0] |= BIT0;	// trigger
544 
545 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
546 		H2C_Parameter[0]));
547 
548 	rtw_warn_on(_BTCOEX_CSR);
549 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
550 }
551 
552 u1Byte
halbtc8821aCsr2ant_ActionAlgorithm(IN PBTC_COEXIST pBtCoexist)553 halbtc8821aCsr2ant_ActionAlgorithm(
554 	IN	PBTC_COEXIST		pBtCoexist
555 	)
556 {
557 	PBTC_STACK_INFO		pStackInfo=&pBtCoexist->stackInfo;
558 	BOOLEAN				bBtHsOn=FALSE;
559 	u1Byte				algorithm=BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED;
560 	u1Byte				numOfDiffProfile=0;
561 
562 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
563 
564 	//sync StackInfo with BT firmware and stack
565 	pStackInfo->bHidExist = pCoexSta->bHidExist;
566 	pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
567 	pStackInfo->bScoExist = pCoexSta->bScoExist;
568 	pStackInfo->bPanExist = pCoexSta->bPanExist;
569 	pStackInfo->bA2dpExist = pCoexSta->bA2dpExist;
570 
571 	if(!pStackInfo->bBtLinkExist)
572 	{
573 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n"));
574 		return algorithm;
575 	}
576 
577 	if(pStackInfo->bScoExist)
578 		numOfDiffProfile++;
579 	if(pStackInfo->bHidExist)
580 		numOfDiffProfile++;
581 	if(pStackInfo->bPanExist)
582 		numOfDiffProfile++;
583 	if(pStackInfo->bA2dpExist)
584 		numOfDiffProfile++;
585 
586 	if(numOfDiffProfile == 1)
587 	{
588 		if(pStackInfo->bScoExist)
589 		{
590 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n"));
591 			algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO;
592 		}
593 		else
594 		{
595 			if(pStackInfo->bHidExist)
596 			{
597 				RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n"));
598 				algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID;
599 			}
600 			else if(pStackInfo->bA2dpExist)
601 			{
602 				RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n"));
603 				algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP;
604 			}
605 			else if(pStackInfo->bPanExist)
606 			{
607 				if(bBtHsOn)
608 				{
609 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n"));
610 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANHS;
611 				}
612 				else
613 				{
614 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n"));
615 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR;
616 				}
617 			}
618 		}
619 	}
620 	else if(numOfDiffProfile == 2)
621 	{
622 		if(pStackInfo->bScoExist)
623 		{
624 			if(pStackInfo->bHidExist)
625 			{
626 				RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n"));
627 				algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
628 			}
629 			else if(pStackInfo->bA2dpExist)
630 			{
631 				RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n"));
632 				algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
633 			}
634 			else if(pStackInfo->bPanExist)
635 			{
636 				if(bBtHsOn)
637 				{
638 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n"));
639 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO;
640 				}
641 				else
642 				{
643 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n"));
644 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
645 				}
646 			}
647 		}
648 		else
649 		{
650 			if( pStackInfo->bHidExist &&
651 				pStackInfo->bA2dpExist )
652 			{
653 				if(pStackInfo->numOfHid >= 2)
654 				{
655 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n"));
656 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
657 				}
658 				else
659 				{
660 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n"));
661 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP;
662 				}
663 			}
664 			else if( pStackInfo->bHidExist &&
665 				pStackInfo->bPanExist )
666 			{
667 				if(bBtHsOn)
668 				{
669 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n"));
670 					algorithm =  BT_8821A_CSR_2ANT_COEX_ALGO_HID;
671 				}
672 				else
673 				{
674 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n"));
675 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
676 				}
677 			}
678 			else if( pStackInfo->bPanExist &&
679 				pStackInfo->bA2dpExist )
680 			{
681 				if(bBtHsOn)
682 				{
683 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n"));
684 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS;
685 				}
686 				else
687 				{
688 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n"));
689 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP;
690 				}
691 			}
692 		}
693 	}
694 	else if(numOfDiffProfile == 3)
695 	{
696 		if(pStackInfo->bScoExist)
697 		{
698 			if( pStackInfo->bHidExist &&
699 				pStackInfo->bA2dpExist )
700 			{
701 				RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n"));
702 				algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
703 			}
704 			else if( pStackInfo->bHidExist &&
705 				pStackInfo->bPanExist )
706 			{
707 				if(bBtHsOn)
708 				{
709 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n"));
710 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
711 				}
712 				else
713 				{
714 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n"));
715 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
716 				}
717 			}
718 			else if( pStackInfo->bPanExist &&
719 				pStackInfo->bA2dpExist )
720 			{
721 				if(bBtHsOn)
722 				{
723 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n"));
724 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
725 				}
726 				else
727 				{
728 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"));
729 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
730 				}
731 			}
732 		}
733 		else
734 		{
735 			if( pStackInfo->bHidExist &&
736 				pStackInfo->bPanExist &&
737 				pStackInfo->bA2dpExist )
738 			{
739 				if(bBtHsOn)
740 				{
741 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n"));
742 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP;
743 				}
744 				else
745 				{
746 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n"));
747 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
748 				}
749 			}
750 		}
751 	}
752 	else if(numOfDiffProfile >= 3)
753 	{
754 		if(pStackInfo->bScoExist)
755 		{
756 			if( pStackInfo->bHidExist &&
757 				pStackInfo->bPanExist &&
758 				pStackInfo->bA2dpExist )
759 			{
760 				if(bBtHsOn)
761 				{
762 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"));
763 
764 				}
765 				else
766 				{
767 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"));
768 					algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID;
769 				}
770 			}
771 		}
772 	}
773 
774 	return algorithm;
775 }
776 
777 BOOLEAN
halbtc8821aCsr2ant_NeedToDecBtPwr(IN PBTC_COEXIST pBtCoexist)778 halbtc8821aCsr2ant_NeedToDecBtPwr(
779 	IN	PBTC_COEXIST		pBtCoexist
780 	)
781 {
782 	BOOLEAN		bRet=FALSE;
783 	BOOLEAN		bBtHsOn=FALSE, bWifiConnected=FALSE;
784 	s4Byte		btHsRssi=0;
785 	u1Byte 		btRssiState;
786 
787 	if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn))
788 		return FALSE;
789 	if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected))
790 		return FALSE;
791 	if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi))
792 		return FALSE;
793 
794 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
795 
796 	if(bWifiConnected)
797 	{
798 		if(bBtHsOn)
799 		{
800 			if(btHsRssi > 37)
801 			{
802 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for HS mode!!\n"));
803 				bRet = TRUE;
804 			}
805 		}
806 		else
807 		{
808 			if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
809 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
810 			{
811 
812 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Need to decrease bt power for Wifi is connected!!\n"));
813 				bRet = TRUE;
814 			}
815 		}
816 	}
817 
818 	return bRet;
819 }
820 
821 VOID
halbtc8821aCsr2ant_SetFwDacSwingLevel(IN PBTC_COEXIST pBtCoexist,IN u1Byte dacSwingLvl)822 halbtc8821aCsr2ant_SetFwDacSwingLevel(
823 	IN	PBTC_COEXIST		pBtCoexist,
824 	IN	u1Byte			dacSwingLvl
825 	)
826 {
827 	u1Byte			H2C_Parameter[1] ={0};
828 
829 	// There are several type of dacswing
830 	// 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
831 	H2C_Parameter[0] = dacSwingLvl;
832 
833 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl));
834 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0]));
835 
836 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
837 }
838 
839 VOID
halbtc8821aCsr2ant_SetFwDecBtPwr(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bDecBtPwr)840 halbtc8821aCsr2ant_SetFwDecBtPwr(
841 	IN	PBTC_COEXIST		pBtCoexist,
842 	IN	BOOLEAN			bDecBtPwr
843 	)
844 {
845 	u1Byte			H2C_Parameter[1] ={0};
846 
847 	H2C_Parameter[0] = 0;
848 
849 	if(bDecBtPwr)
850 	{
851 		H2C_Parameter[0] |= BIT1;
852 	}
853 
854 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power : %s, FW write 0x62=0x%x\n",
855 		(bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0]));
856 
857 	rtw_warn_on(_BTCOEX_CSR);
858 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
859 }
860 
861 VOID
halbtc8821aCsr2ant_DecBtPwr(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bDecBtPwr)862 halbtc8821aCsr2ant_DecBtPwr(
863 	IN	PBTC_COEXIST		pBtCoexist,
864 	IN	BOOLEAN			bForceExec,
865 	IN	BOOLEAN			bDecBtPwr
866 	)
867 {
868 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power = %s\n",
869 		(bForceExec? "force to":""), ((bDecBtPwr)? "ON":"OFF")));
870 	pCoexDm->bCurDecBtPwr = bDecBtPwr;
871 
872 	if(!bForceExec)
873 	{
874 		if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr)
875 			return;
876 	}
877 
878 	/* TODO: may CSR consider to decrease BT power? */
879 	//halbtc8821aCsr2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr);
880 
881 	pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr;
882 }
883 
884 VOID
halbtc8821aCsr2ant_SetBtAutoReport(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bEnableAutoReport)885 halbtc8821aCsr2ant_SetBtAutoReport(
886 	IN	PBTC_COEXIST		pBtCoexist,
887 	IN	BOOLEAN			bEnableAutoReport
888 	)
889 {
890 	u1Byte			H2C_Parameter[1] ={0};
891 
892 	H2C_Parameter[0] = 0;
893 
894 	if(bEnableAutoReport)
895 	{
896 		H2C_Parameter[0] |= BIT0;
897 	}
898 
899 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
900 		(bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0]));
901 
902 	rtw_warn_on(_BTCOEX_CSR);
903 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter);
904 }
905 
906 VOID
halbtc8821aCsr2ant_BtAutoReport(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bEnableAutoReport)907 halbtc8821aCsr2ant_BtAutoReport(
908 	IN	PBTC_COEXIST		pBtCoexist,
909 	IN	BOOLEAN			bForceExec,
910 	IN	BOOLEAN			bEnableAutoReport
911 	)
912 {
913 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n",
914 		(bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled")));
915 	pCoexDm->bCurBtAutoReport = bEnableAutoReport;
916 
917 	if(!bForceExec)
918 	{
919 		if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport)
920 			return;
921 	}
922 	//halbtc8821aCsr2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport);
923 
924 	pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport;
925 }
926 
927 VOID
halbtc8821aCsr2ant_FwDacSwingLvl(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte fwDacSwingLvl)928 halbtc8821aCsr2ant_FwDacSwingLvl(
929 	IN	PBTC_COEXIST		pBtCoexist,
930 	IN	BOOLEAN			bForceExec,
931 	IN	u1Byte			fwDacSwingLvl
932 	)
933 {
934 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n",
935 		(bForceExec? "force to":""), fwDacSwingLvl));
936 	pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
937 
938 	if(!bForceExec)
939 	{
940 		if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
941 			return;
942 	}
943 
944 	halbtc8821aCsr2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
945 
946 	pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
947 }
948 
949 VOID
halbtc8821aCsr2ant_SetSwRfRxLpfCorner(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bRxRfShrinkOn)950 halbtc8821aCsr2ant_SetSwRfRxLpfCorner(
951 	IN	PBTC_COEXIST		pBtCoexist,
952 	IN	BOOLEAN			bRxRfShrinkOn
953 	)
954 {
955 	if(bRxRfShrinkOn)
956 	{
957 		//Shrink RF Rx LPF corner
958 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
959 		pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
960 	}
961 	else
962 	{
963 		//Resume RF Rx LPF corner
964 		// After initialized, we can use pCoexDm->btRf0x1eBackup
965 		if(pBtCoexist->bInitilized)
966 		{
967 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
968 			pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
969 		}
970 	}
971 }
972 
973 VOID
halbtc8821aCsr2ant_RfShrink(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bRxRfShrinkOn)974 halbtc8821aCsr2ant_RfShrink(
975 	IN	PBTC_COEXIST		pBtCoexist,
976 	IN	BOOLEAN			bForceExec,
977 	IN	BOOLEAN			bRxRfShrinkOn
978 	)
979 {
980 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
981 		(bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
982 	pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
983 
984 	if(!bForceExec)
985 	{
986 		if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
987 			return;
988 	}
989 	halbtc8821aCsr2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
990 
991 	pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
992 }
993 
994 VOID
halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bLowPenaltyRa)995 halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive(
996 	IN	PBTC_COEXIST		pBtCoexist,
997 	IN	BOOLEAN			bLowPenaltyRa
998 	)
999 {
1000 	u1Byte			H2C_Parameter[6] ={0};
1001 
1002 	H2C_Parameter[0] = 0x6;	// opCode, 0x6= Retry_Penalty
1003 
1004 	if(bLowPenaltyRa)
1005 	{
1006 		H2C_Parameter[1] |= BIT0;
1007 		H2C_Parameter[2] = 0x00;  //normal rate except MCS7/6/5, OFDM54/48/36
1008 		H2C_Parameter[3] = 0xf7;  //MCS7 or OFDM54
1009 		H2C_Parameter[4] = 0xf8;  //MCS6 or OFDM48
1010 		H2C_Parameter[5] = 0xf9;	//MCS5 or OFDM36
1011 	}
1012 
1013 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s",
1014 		(bLowPenaltyRa? "ON!!":"OFF!!") ));
1015 
1016 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
1017 }
1018 
1019 VOID
halbtc8821aCsr2ant_LowPenaltyRa(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bLowPenaltyRa)1020 halbtc8821aCsr2ant_LowPenaltyRa(
1021 	IN	PBTC_COEXIST		pBtCoexist,
1022 	IN	BOOLEAN			bForceExec,
1023 	IN	BOOLEAN			bLowPenaltyRa
1024 	)
1025 {
1026 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
1027 		(bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
1028 	pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
1029 
1030 	if(!bForceExec)
1031 	{
1032 		if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
1033 			return;
1034 	}
1035 	halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
1036 
1037 	pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
1038 }
1039 
1040 VOID
halbtc8821aCsr2ant_SetDacSwingReg(IN PBTC_COEXIST pBtCoexist,IN u4Byte level)1041 halbtc8821aCsr2ant_SetDacSwingReg(
1042 	IN	PBTC_COEXIST		pBtCoexist,
1043 	IN	u4Byte			level
1044 	)
1045 {
1046 	u1Byte	val=(u1Byte)level;
1047 
1048 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level));
1049 	pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val);
1050 }
1051 
1052 VOID
halbtc8821aCsr2ant_SetSwFullTimeDacSwing(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bSwDacSwingOn,IN u4Byte swDacSwingLvl)1053 halbtc8821aCsr2ant_SetSwFullTimeDacSwing(
1054 	IN	PBTC_COEXIST		pBtCoexist,
1055 	IN	BOOLEAN			bSwDacSwingOn,
1056 	IN	u4Byte			swDacSwingLvl
1057 	)
1058 {
1059 	if(bSwDacSwingOn)
1060 	{
1061 		halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
1062 	}
1063 	else
1064 	{
1065 		halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, 0x18);
1066 	}
1067 }
1068 
1069 
1070 VOID
halbtc8821aCsr2ant_DacSwing(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bDacSwingOn,IN u4Byte dacSwingLvl)1071 halbtc8821aCsr2ant_DacSwing(
1072 	IN	PBTC_COEXIST		pBtCoexist,
1073 	IN	BOOLEAN			bForceExec,
1074 	IN	BOOLEAN			bDacSwingOn,
1075 	IN	u4Byte			dacSwingLvl
1076 	)
1077 {
1078 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",
1079 		(bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));
1080 	pCoexDm->bCurDacSwingOn = bDacSwingOn;
1081 	pCoexDm->curDacSwingLvl = dacSwingLvl;
1082 
1083 	if(!bForceExec)
1084 	{
1085 		if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
1086 			(pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )
1087 			return;
1088 	}
1089 	delay_ms(30);
1090 	halbtc8821aCsr2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
1091 
1092 	pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
1093 	pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
1094 }
1095 
1096 VOID
halbtc8821aCsr2ant_SetAdcBackOff(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAdcBackOff)1097 halbtc8821aCsr2ant_SetAdcBackOff(
1098 	IN	PBTC_COEXIST		pBtCoexist,
1099 	IN	BOOLEAN			bAdcBackOff
1100 	)
1101 {
1102 	if(bAdcBackOff)
1103 	{
1104 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n"));
1105 		pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3);
1106 	}
1107 	else
1108 	{
1109 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n"));
1110 		pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1);
1111 	}
1112 }
1113 
1114 VOID
halbtc8821aCsr2ant_AdcBackOff(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bAdcBackOff)1115 halbtc8821aCsr2ant_AdcBackOff(
1116 	IN	PBTC_COEXIST		pBtCoexist,
1117 	IN	BOOLEAN			bForceExec,
1118 	IN	BOOLEAN			bAdcBackOff
1119 	)
1120 {
1121 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n",
1122 		(bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));
1123 	pCoexDm->bCurAdcBackOff = bAdcBackOff;
1124 
1125 	if(!bForceExec)
1126 	{
1127 		if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff)
1128 			return;
1129 	}
1130 	halbtc8821aCsr2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);
1131 
1132 	pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;
1133 }
1134 
1135 VOID
halbtc8821aCsr2ant_SetAgcTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAgcTableEn)1136 halbtc8821aCsr2ant_SetAgcTable(
1137 	IN	PBTC_COEXIST		pBtCoexist,
1138 	IN	BOOLEAN			bAgcTableEn
1139 	)
1140 {
1141 	u1Byte		rssiAdjustVal=0;
1142 
1143 	pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
1144 	if(bAgcTableEn)
1145 	{
1146 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n"));
1147 		pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff,  0x28F4B);
1148 		pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff,  0x10AB2);
1149 		rssiAdjustVal = 8;
1150 	}
1151 	else
1152 	{
1153 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n"));
1154 		pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x2884B);
1155 		pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x104B2);
1156 	}
1157 	pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
1158 
1159 	// set rssiAdjustVal for wifi module.
1160 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
1161 }
1162 
1163 VOID
halbtc8821aCsr2ant_AgcTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bAgcTableEn)1164 halbtc8821aCsr2ant_AgcTable(
1165 	IN	PBTC_COEXIST		pBtCoexist,
1166 	IN	BOOLEAN			bForceExec,
1167 	IN	BOOLEAN			bAgcTableEn
1168 	)
1169 {
1170 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n",
1171 		(bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));
1172 	pCoexDm->bCurAgcTableEn = bAgcTableEn;
1173 
1174 	if(!bForceExec)
1175 	{
1176 		if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
1177 			return;
1178 	}
1179 	halbtc8821aCsr2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
1180 
1181 	pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
1182 }
1183 
1184 VOID
halbtc8821aCsr2ant_SetCoexTable(IN PBTC_COEXIST pBtCoexist,IN u4Byte val0x6c0,IN u4Byte val0x6c4,IN u4Byte val0x6c8,IN u1Byte val0x6cc)1185 halbtc8821aCsr2ant_SetCoexTable(
1186 	IN	PBTC_COEXIST	pBtCoexist,
1187 	IN	u4Byte		val0x6c0,
1188 	IN	u4Byte		val0x6c4,
1189 	IN	u4Byte		val0x6c8,
1190 	IN	u1Byte		val0x6cc
1191 	)
1192 {
1193 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0));
1194 	pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
1195 
1196 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));
1197 	pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
1198 
1199 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
1200 	pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
1201 
1202 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
1203 	pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
1204 }
1205 
1206 VOID
halbtc8821aCsr2ant_CoexTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u4Byte val0x6c0,IN u4Byte val0x6c4,IN u4Byte val0x6c8,IN u1Byte val0x6cc)1207 halbtc8821aCsr2ant_CoexTable(
1208 	IN	PBTC_COEXIST		pBtCoexist,
1209 	IN	BOOLEAN			bForceExec,
1210 	IN	u4Byte			val0x6c0,
1211 	IN	u4Byte			val0x6c4,
1212 	IN	u4Byte			val0x6c8,
1213 	IN	u1Byte			val0x6cc
1214 	)
1215 {
1216 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
1217 		(bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc));
1218 	pCoexDm->curVal0x6c0 = val0x6c0;
1219 	pCoexDm->curVal0x6c4 = val0x6c4;
1220 	pCoexDm->curVal0x6c8 = val0x6c8;
1221 	pCoexDm->curVal0x6cc = val0x6cc;
1222 
1223 	if(!bForceExec)
1224 	{
1225 		if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
1226 			(pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
1227 			(pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
1228 			(pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
1229 			return;
1230 	}
1231 	halbtc8821aCsr2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
1232 
1233 	pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
1234 	pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
1235 	pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
1236 	pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
1237 }
1238 
1239 VOID
halbtc8821aCsr2ant_SetFwIgnoreWlanAct(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bEnable)1240 halbtc8821aCsr2ant_SetFwIgnoreWlanAct(
1241 	IN	PBTC_COEXIST		pBtCoexist,
1242 	IN	BOOLEAN			bEnable
1243 	)
1244 {
1245 	u1Byte			H2C_Parameter[1] ={0};
1246 
1247 	if(bEnable)
1248 	{
1249 		H2C_Parameter[0] |= BIT0;		// function enable
1250 	}
1251 
1252 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
1253 		H2C_Parameter[0]));
1254 
1255 	rtw_warn_on(_BTCOEX_CSR);
1256 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
1257 }
1258 
1259 VOID
halbtc8821aCsr2ant_IgnoreWlanAct(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bEnable)1260 halbtc8821aCsr2ant_IgnoreWlanAct(
1261 	IN	PBTC_COEXIST		pBtCoexist,
1262 	IN	BOOLEAN			bForceExec,
1263 	IN	BOOLEAN			bEnable
1264 	)
1265 {
1266 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n",
1267 		(bForceExec? "force to":""), (bEnable? "ON":"OFF")));
1268 	pCoexDm->bCurIgnoreWlanAct = bEnable;
1269 
1270 	if(!bForceExec)
1271 	{
1272 		if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
1273 			return;
1274 	}
1275 	//halbtc8821aCsr2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
1276 
1277 	pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
1278 }
1279 
1280 VOID
halbtc8821aCsr2ant_SetFwPstdma(IN PBTC_COEXIST pBtCoexist,IN u1Byte byte1,IN u1Byte byte2,IN u1Byte byte3,IN u1Byte byte4,IN u1Byte byte5)1281 halbtc8821aCsr2ant_SetFwPstdma(
1282 	IN	PBTC_COEXIST		pBtCoexist,
1283 	IN	u1Byte			byte1,
1284 	IN	u1Byte			byte2,
1285 	IN	u1Byte			byte3,
1286 	IN	u1Byte			byte4,
1287 	IN	u1Byte			byte5
1288 	)
1289 {
1290 	u1Byte			H2C_Parameter[6] ={0};
1291 
1292 	H2C_Parameter[0] = byte1;
1293 	H2C_Parameter[1] = byte2;
1294 	H2C_Parameter[2] = byte3;
1295 	H2C_Parameter[3] = byte4;
1296 	H2C_Parameter[4] = byte5;
1297 	H2C_Parameter[5] = 0x01;
1298 
1299 	pCoexDm->psTdmaPara[0] = byte1;
1300 	pCoexDm->psTdmaPara[1] = byte2;
1301 	pCoexDm->psTdmaPara[2] = byte3;
1302 	pCoexDm->psTdmaPara[3] = byte4;
1303 	pCoexDm->psTdmaPara[4] = byte5;
1304 	pCoexDm->psTdmaPara[5] = 0x01;
1305 
1306 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(6bytes)=0x%x%08x%02x\n",
1307 		H2C_Parameter[0],
1308 		H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4], H2C_Parameter[5]));
1309 
1310 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 6, H2C_Parameter);
1311 }
1312 
1313 VOID
halbtc8821aCsr2ant_SwMechanism1(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bShrinkRxLPF,IN BOOLEAN bLowPenaltyRA,IN BOOLEAN bLimitedDIG,IN BOOLEAN bBTLNAConstrain)1314 halbtc8821aCsr2ant_SwMechanism1(
1315 	IN	PBTC_COEXIST	pBtCoexist,
1316 	IN	BOOLEAN		bShrinkRxLPF,
1317 	IN	BOOLEAN 	bLowPenaltyRA,
1318 	IN	BOOLEAN		bLimitedDIG,
1319 	IN	BOOLEAN		bBTLNAConstrain
1320 	)
1321 {
1322 	u4Byte	wifiBw;
1323 
1324 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1325 
1326 	if(BTC_WIFI_BW_HT40 != wifiBw)  //only shrink RF Rx LPF for HT40
1327 	{
1328 		if (bShrinkRxLPF)
1329 			bShrinkRxLPF = FALSE;
1330 	}
1331 
1332 	 halbtc8821aCsr2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
1333 	halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
1334 
1335   	//no limited DIG
1336 	//halbtc8821aCsr2ant_SetBtLnaConstrain(pBtCoexist, NORMAL_EXEC, bBTLNAConstrain);
1337 }
1338 
1339 VOID
halbtc8821aCsr2ant_SwMechanism2(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAGCTableShift,IN BOOLEAN bADCBackOff,IN BOOLEAN bSWDACSwing,IN u4Byte dacSwingLvl)1340 halbtc8821aCsr2ant_SwMechanism2(
1341 	IN	PBTC_COEXIST	pBtCoexist,
1342 	IN	BOOLEAN		bAGCTableShift,
1343 	IN	BOOLEAN 	bADCBackOff,
1344 	IN	BOOLEAN		bSWDACSwing,
1345 	IN	u4Byte		dacSwingLvl
1346 	)
1347 {
1348 	//halbtc8821aCsr2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
1349 	halbtc8821aCsr2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff);
1350 	halbtc8821aCsr2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
1351 }
1352 
1353 VOID
halbtc8821aCsr2ant_SetAntPath(IN PBTC_COEXIST pBtCoexist,IN u1Byte antPosType,IN BOOLEAN bInitHwCfg,IN BOOLEAN bWifiOff)1354 halbtc8821aCsr2ant_SetAntPath(
1355 	IN	PBTC_COEXIST		pBtCoexist,
1356 	IN	u1Byte				antPosType,
1357 	IN	BOOLEAN				bInitHwCfg,
1358 	IN	BOOLEAN				bWifiOff
1359 	)
1360 {
1361 	PBTC_BOARD_INFO 	pBoardInfo=&pBtCoexist->boardInfo;
1362 	u4Byte				u4Tmp=0;
1363 	u1Byte				H2C_Parameter[2] ={0};
1364 
1365 	if(bInitHwCfg)
1366 	{
1367 		// 0x4c[23]=0, 0x4c[24]=1  Antenna control by WL/BT
1368 		u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1369 		u4Tmp &=~BIT23;
1370 		u4Tmp |= BIT24;
1371 		pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1372 
1373 		pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x974, 0x3ff);
1374 		pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77);
1375 
1376 		if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT)
1377 		{
1378 			//tell firmware "antenna inverse"  ==> WRONG firmware antenna control code.==>need fw to fix
1379 			H2C_Parameter[0] = 1;
1380 			H2C_Parameter[1] = 1;
1381 			pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
1382 		}
1383 		else
1384 		{
1385 			//tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix
1386 			H2C_Parameter[0] = 0;
1387 			H2C_Parameter[1] = 1;
1388 			pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
1389 		}
1390 	}
1391 
1392 	// ext switch setting
1393 	switch(antPosType)
1394 	{
1395 		case BTC_ANT_WIFI_AT_MAIN:
1396 			pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1);
1397 			break;
1398 		case BTC_ANT_WIFI_AT_AUX:
1399 			pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2);
1400 			break;
1401 	}
1402 }
1403 
1404 VOID
halbtc8821aCsr2ant_PsTdma(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bTurnOn,IN u1Byte type)1405 halbtc8821aCsr2ant_PsTdma(
1406 	IN	PBTC_COEXIST		pBtCoexist,
1407 	IN	BOOLEAN			bForceExec,
1408 	IN	BOOLEAN			bTurnOn,
1409 	IN	u1Byte			type
1410 	)
1411 {
1412 	BOOLEAN			bTurnOnByCnt=FALSE;
1413 	u1Byte			psTdmaTypeByCnt=0;
1414 
1415 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn %s PS TDMA, type=%d\n",
1416 		(bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type));
1417 	pCoexDm->bCurPsTdmaOn = bTurnOn;
1418 	pCoexDm->curPsTdma = type;
1419 
1420 	if(!bForceExec)
1421 	{
1422 		if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
1423 			(pCoexDm->prePsTdma == pCoexDm->curPsTdma) )
1424 			return;
1425 	}
1426 	if(bTurnOn)
1427 	{
1428 		switch(type)
1429 		{
1430 			case 1:
1431 			default:
1432 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1433 				break;
1434 			case 2:
1435 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1436 				break;
1437 			case 3:
1438 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
1439 				break;
1440 			case 4:
1441 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90);
1442 				break;
1443 			case 5:
1444 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1445 				break;
1446 			case 6:
1447 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1448 				break;
1449 			case 7:
1450 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
1451 				break;
1452 			case 8:
1453 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90);
1454 				break;
1455 			case 9:
1456 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1457 				break;
1458 			case 10:
1459 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1460 				break;
1461 			case 11:
1462 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90);
1463 				break;
1464 			case 12:
1465 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1466 				break;
1467 			case 13:
1468 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1469 				break;
1470 			case 14:
1471 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1472 				break;
1473 			case 15:
1474 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90);
1475 				break;
1476 			case 16:
1477 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90);
1478 				break;
1479 			case 17:
1480 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90);
1481 				break;
1482 			case 18:
1483 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1484 				break;
1485 			case 19:
1486 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
1487 				break;
1488 			case 20:
1489 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
1490 				break;
1491 			case 21:
1492 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
1493 				break;
1494 			case 22:	//ad2dp master
1495 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x11, 0x11, 0x21, 0x10);
1496 				break;
1497 			case 23:	//a2dp slave
1498 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x12, 0x12, 0x20, 0x10);
1499 				break;
1500 			case 71:
1501 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1502 				break;
1503 		}
1504 	}
1505 	else
1506 	{
1507 		// disable PS tdma
1508 		switch(type)
1509 		{
1510 			case 0:
1511 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1512 				break;
1513 			case 1:
1514 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0);
1515 				break;
1516 			default:
1517 				halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1518 				break;
1519 		}
1520 	}
1521 
1522 	// update pre state
1523 	pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
1524 	pCoexDm->prePsTdma = pCoexDm->curPsTdma;
1525 }
1526 
1527 VOID
halbtc8821aCsr2ant_CoexAllOff(IN PBTC_COEXIST pBtCoexist)1528 halbtc8821aCsr2ant_CoexAllOff(
1529 	IN	PBTC_COEXIST		pBtCoexist
1530 	)
1531 {
1532 	// fw all off
1533 	halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1534 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1535 	halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
1536 
1537 	// sw all off
1538 	halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1539 	halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1540 
1541 	// hw all off
1542 	halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3);
1543 }
1544 
1545 VOID
halbtc8821aCsr2ant_CoexUnder5G(IN PBTC_COEXIST pBtCoexist)1546 halbtc8821aCsr2ant_CoexUnder5G(
1547 	IN	PBTC_COEXIST		pBtCoexist
1548 	)
1549 {
1550 	halbtc8821aCsr2ant_CoexAllOff(pBtCoexist);
1551 
1552 	halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE);
1553 }
1554 
1555 VOID
halbtc8821aCsr2ant_InitCoexDm(IN PBTC_COEXIST pBtCoexist)1556 halbtc8821aCsr2ant_InitCoexDm(
1557 	IN	PBTC_COEXIST		pBtCoexist
1558 	)
1559 {
1560 	// force to reset coex mechanism
1561 	halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3);
1562 
1563 	halbtc8821aCsr2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1);
1564 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1565 	halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, FALSE);
1566 
1567 	halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1568 	halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1569 }
1570 
1571 VOID
halbtc8821aCsr2ant_BtInquiryPage(IN PBTC_COEXIST pBtCoexist)1572 halbtc8821aCsr2ant_BtInquiryPage(
1573 	IN	PBTC_COEXIST		pBtCoexist
1574 	)
1575 {
1576 	BOOLEAN	bLowPwrDisable=TRUE;
1577 
1578 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1579 
1580 	halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
1581 	halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
1582 }
1583 BOOLEAN
halbtc8821aCsr2ant_IsCommonAction(IN PBTC_COEXIST pBtCoexist)1584 halbtc8821aCsr2ant_IsCommonAction(
1585 	IN	PBTC_COEXIST		pBtCoexist
1586 	)
1587 {
1588 	BOOLEAN			bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE;
1589 	BOOLEAN			bLowPwrDisable=FALSE;
1590 
1591 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1592 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1593 
1594 	if(!bWifiConnected &&
1595 		BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)
1596 	{
1597 		bLowPwrDisable = FALSE;
1598 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1599 
1600 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT IPS!!\n"));
1601 
1602 
1603 		halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1604 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1605 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
1606 
1607  		halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1608 		halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1609 		halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
1610 		halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
1611 
1612 		bCommon = TRUE;
1613 	}
1614 	else if(bWifiConnected &&
1615 			(BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) )
1616 	{
1617 		bLowPwrDisable = FALSE;
1618 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1619 
1620 		if(bWifiBusy)
1621 		{
1622 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT IPS!!\n"));
1623 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1624 		}
1625 		else
1626 		{
1627 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT IPS!!\n"));
1628 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1629 		}
1630 
1631 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1632 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
1633 
1634 		halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1635 		halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1636 		halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
1637 		halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
1638 
1639 		bCommon = TRUE;
1640 	}
1641 	else if(!bWifiConnected &&
1642 		(BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) )
1643 	{
1644 		bLowPwrDisable = TRUE;
1645 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1646 
1647 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT LPS!!\n"));
1648 
1649 		halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1650 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1651 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
1652 
1653 		halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1654 		halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1655 		halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
1656 		halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
1657 
1658 		bCommon = TRUE;
1659 	}
1660 	else if(bWifiConnected &&
1661 		(BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) )
1662 	{
1663 		bLowPwrDisable = TRUE;
1664 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1665 
1666 		if(bWifiBusy)
1667 		{
1668 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT LPS!!\n"));
1669 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1670 		}
1671 		else
1672 		{
1673 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT LPS!!\n"));
1674 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1675 		}
1676 
1677 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1678 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
1679 
1680 		halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE);
1681 		halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1682 		halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
1683 		halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
1684 
1685 		bCommon = TRUE;
1686 	}
1687 	else if(!bWifiConnected &&
1688 			(BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) )
1689 	{
1690 		bLowPwrDisable = FALSE;
1691 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1692 
1693 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi IPS + BT Busy!!\n"));
1694 
1695 		//halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1696 		halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0);
1697 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1698 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
1699 
1700 		halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1701 		halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1702 		halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
1703 		halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
1704 
1705 		bCommon = TRUE;
1706 	}
1707 	else
1708 	{
1709 		bLowPwrDisable = TRUE;
1710 		pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1711 
1712 		if(bWifiBusy)
1713 		{
1714 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Busy + BT Busy!!\n"));
1715 	  		bCommon = FALSE;
1716 		}
1717 		else
1718 		{
1719 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi LPS + BT Busy!!\n"));
1720 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21);
1721 
1722 			if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
1723 				halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
1724 			else
1725 				halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
1726 
1727 			bCommon = TRUE;
1728 		}
1729 
1730 		halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE);
1731 	}
1732 
1733 	if (bCommon == TRUE)
1734 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
1735 
1736 	return bCommon;
1737 }
1738 VOID
halbtc8821aCsr2ant_TdmaDurationAdjust(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bScoHid,IN BOOLEAN bTxPause,IN u1Byte maxInterval)1739 halbtc8821aCsr2ant_TdmaDurationAdjust(
1740 	IN	PBTC_COEXIST		pBtCoexist,
1741 	IN	BOOLEAN			bScoHid,
1742 	IN	BOOLEAN			bTxPause,
1743 	IN	u1Byte			maxInterval
1744 	)
1745 {
1746 	static s4Byte		up,dn,m,n,WaitCount;
1747 	s4Byte			result;   //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration
1748 	u1Byte			retryCount=0;
1749 
1750 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n"));
1751 
1752 	if(pCoexDm->bResetTdmaAdjust)
1753 	{
1754 		pCoexDm->bResetTdmaAdjust = FALSE;
1755 		RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n"));
1756 		{
1757 			if(bScoHid)
1758 			{
1759 				if(bTxPause)
1760 				{
1761 					if(maxInterval == 1)
1762 					{
1763 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
1764 						pCoexDm->psTdmaDuAdjType = 13;
1765 					}
1766 					else if(maxInterval == 2)
1767 					{
1768 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
1769 						pCoexDm->psTdmaDuAdjType = 14;
1770 					}
1771 					else if(maxInterval == 3)
1772 					{
1773 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
1774 						pCoexDm->psTdmaDuAdjType = 15;
1775 					}
1776 					else
1777 					{
1778 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
1779 						pCoexDm->psTdmaDuAdjType = 15;
1780 					}
1781 				}
1782 				else
1783 				{
1784 					if(maxInterval == 1)
1785 					{
1786 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
1787 						pCoexDm->psTdmaDuAdjType = 9;
1788 					}
1789 					else if(maxInterval == 2)
1790 					{
1791 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
1792 						pCoexDm->psTdmaDuAdjType = 10;
1793 					}
1794 					else if(maxInterval == 3)
1795 					{
1796 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
1797 						pCoexDm->psTdmaDuAdjType = 11;
1798 					}
1799 					else
1800 					{
1801 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
1802 						pCoexDm->psTdmaDuAdjType = 11;
1803 					}
1804 				}
1805 			}
1806 			else
1807 			{
1808 				if(bTxPause)
1809 				{
1810 					if(maxInterval == 1)
1811 					{
1812 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
1813 						pCoexDm->psTdmaDuAdjType = 5;
1814 					}
1815 					else if(maxInterval == 2)
1816 					{
1817 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
1818 						pCoexDm->psTdmaDuAdjType = 6;
1819 					}
1820 					else if(maxInterval == 3)
1821 					{
1822 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
1823 						pCoexDm->psTdmaDuAdjType = 7;
1824 					}
1825 					else
1826 					{
1827 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
1828 						pCoexDm->psTdmaDuAdjType = 7;
1829 					}
1830 				}
1831 				else
1832 				{
1833 					if(maxInterval == 1)
1834 					{
1835 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
1836 						pCoexDm->psTdmaDuAdjType = 1;
1837 					}
1838 					else if(maxInterval == 2)
1839 					{
1840 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
1841 						pCoexDm->psTdmaDuAdjType = 2;
1842 					}
1843 					else if(maxInterval == 3)
1844 					{
1845 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
1846 						pCoexDm->psTdmaDuAdjType = 3;
1847 					}
1848 					else
1849 					{
1850 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
1851 						pCoexDm->psTdmaDuAdjType = 3;
1852 					}
1853 				}
1854 			}
1855 		}
1856 		//============
1857 		up = 0;
1858 		dn = 0;
1859 		m = 1;
1860 		n= 3;
1861 		result = 0;
1862 		WaitCount = 0;
1863 	}
1864 	else
1865 	{
1866 		//accquire the BT TRx retry count from BT_Info byte2
1867 		retryCount = pCoexSta->btRetryCnt;
1868 		RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount));
1869 		RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n",
1870 			up, dn, m, n, WaitCount));
1871 		result = 0;
1872 		WaitCount++;
1873 
1874 		if(retryCount == 0)  // no retry in the last 2-second duration
1875 		{
1876 			up++;
1877 			dn--;
1878 
1879 			if (dn <= 0)
1880 				dn = 0;
1881 
1882 			if(up >= n)	// if �s�� n ��2�� retry count��0, �h�ռeWiFi duration
1883 			{
1884 				WaitCount = 0;
1885 				n = 3;
1886 				up = 0;
1887 				dn = 0;
1888 				result = 1;
1889 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n"));
1890 			}
1891 		}
1892 		else if (retryCount <= 3)	// <=3 retry in the last 2-second duration
1893 		{
1894 			up--;
1895 			dn++;
1896 
1897 			if (up <= 0)
1898 				up = 0;
1899 
1900 			if (dn == 2)	// if �s�� 2 ��2�� retry count< 3, �h�կ�WiFi duration
1901 			{
1902 				if (WaitCount <= 2)
1903 					m++; // �קK�@���b���level���Ӧ^
1904 				else
1905 					m = 1;
1906 
1907 				if ( m >= 20) //m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration.
1908 					m = 20;
1909 
1910 				n = 3*m;
1911 				up = 0;
1912 				dn = 0;
1913 				WaitCount = 0;
1914 				result = -1;
1915 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
1916 			}
1917 		}
1918 		else  //retry count > 3, �u�n1�� retry count > 3, �h�կ�WiFi duration
1919 		{
1920 			if (WaitCount == 1)
1921 				m++; // �קK�@���b���level���Ӧ^
1922 			else
1923 				m = 1;
1924 
1925 			if ( m >= 20) //m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration.
1926 				m = 20;
1927 
1928 			n = 3*m;
1929 			up = 0;
1930 			dn = 0;
1931 			WaitCount = 0;
1932 			result = -1;
1933 			RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n"));
1934 		}
1935 
1936 		RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval));
1937 		if(maxInterval == 1)
1938 		{
1939 			if(bTxPause)
1940 			{
1941 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
1942 
1943 				if(pCoexDm->curPsTdma == 71)
1944 				{
1945 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
1946 					pCoexDm->psTdmaDuAdjType = 5;
1947 				}
1948 				else if(pCoexDm->curPsTdma == 1)
1949 				{
1950 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
1951 					pCoexDm->psTdmaDuAdjType = 5;
1952 				}
1953 				else if(pCoexDm->curPsTdma == 2)
1954 				{
1955 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
1956 					pCoexDm->psTdmaDuAdjType = 6;
1957 				}
1958 				else if(pCoexDm->curPsTdma == 3)
1959 				{
1960 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
1961 					pCoexDm->psTdmaDuAdjType = 7;
1962 				}
1963 				else if(pCoexDm->curPsTdma == 4)
1964 				{
1965 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
1966 					pCoexDm->psTdmaDuAdjType = 8;
1967 				}
1968 				if(pCoexDm->curPsTdma == 9)
1969 				{
1970 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
1971 					pCoexDm->psTdmaDuAdjType = 13;
1972 				}
1973 				else if(pCoexDm->curPsTdma == 10)
1974 				{
1975 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
1976 					pCoexDm->psTdmaDuAdjType = 14;
1977 				}
1978 				else if(pCoexDm->curPsTdma == 11)
1979 				{
1980 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
1981 					pCoexDm->psTdmaDuAdjType = 15;
1982 				}
1983 				else if(pCoexDm->curPsTdma == 12)
1984 				{
1985 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
1986 					pCoexDm->psTdmaDuAdjType = 16;
1987 				}
1988 
1989 				if(result == -1)
1990 				{
1991 					if(pCoexDm->curPsTdma == 5)
1992 					{
1993 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
1994 						pCoexDm->psTdmaDuAdjType = 6;
1995 					}
1996 					else if(pCoexDm->curPsTdma == 6)
1997 					{
1998 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
1999 						pCoexDm->psTdmaDuAdjType = 7;
2000 					}
2001 					else if(pCoexDm->curPsTdma == 7)
2002 					{
2003 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2004 						pCoexDm->psTdmaDuAdjType = 8;
2005 					}
2006 					else if(pCoexDm->curPsTdma == 13)
2007 					{
2008 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2009 						pCoexDm->psTdmaDuAdjType = 14;
2010 					}
2011 					else if(pCoexDm->curPsTdma == 14)
2012 					{
2013 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2014 						pCoexDm->psTdmaDuAdjType = 15;
2015 					}
2016 					else if(pCoexDm->curPsTdma == 15)
2017 					{
2018 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2019 						pCoexDm->psTdmaDuAdjType = 16;
2020 					}
2021 				}
2022 				else if (result == 1)
2023 				{
2024 					if(pCoexDm->curPsTdma == 8)
2025 					{
2026 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2027 						pCoexDm->psTdmaDuAdjType = 7;
2028 					}
2029 					else if(pCoexDm->curPsTdma == 7)
2030 					{
2031 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2032 						pCoexDm->psTdmaDuAdjType = 6;
2033 					}
2034 					else if(pCoexDm->curPsTdma == 6)
2035 					{
2036 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2037 						pCoexDm->psTdmaDuAdjType = 5;
2038 					}
2039 					else if(pCoexDm->curPsTdma == 16)
2040 					{
2041 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2042 						pCoexDm->psTdmaDuAdjType = 15;
2043 					}
2044 					else if(pCoexDm->curPsTdma == 15)
2045 					{
2046 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2047 						pCoexDm->psTdmaDuAdjType = 14;
2048 					}
2049 					else if(pCoexDm->curPsTdma == 14)
2050 					{
2051 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2052 						pCoexDm->psTdmaDuAdjType = 13;
2053 					}
2054 				}
2055 			}
2056 			else
2057 			{
2058 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2059 				if(pCoexDm->curPsTdma == 5)
2060 				{
2061 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
2062 					pCoexDm->psTdmaDuAdjType = 71;
2063 				}
2064 				else if(pCoexDm->curPsTdma == 6)
2065 				{
2066 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2067 					pCoexDm->psTdmaDuAdjType = 2;
2068 				}
2069 				else if(pCoexDm->curPsTdma == 7)
2070 				{
2071 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2072 					pCoexDm->psTdmaDuAdjType = 3;
2073 				}
2074 				else if(pCoexDm->curPsTdma == 8)
2075 				{
2076 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2077 					pCoexDm->psTdmaDuAdjType = 4;
2078 				}
2079 				if(pCoexDm->curPsTdma == 13)
2080 				{
2081 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2082 					pCoexDm->psTdmaDuAdjType = 9;
2083 				}
2084 				else if(pCoexDm->curPsTdma == 14)
2085 				{
2086 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2087 					pCoexDm->psTdmaDuAdjType = 10;
2088 				}
2089 				else if(pCoexDm->curPsTdma == 15)
2090 				{
2091 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2092 					pCoexDm->psTdmaDuAdjType = 11;
2093 				}
2094 				else if(pCoexDm->curPsTdma == 16)
2095 				{
2096 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2097 					pCoexDm->psTdmaDuAdjType = 12;
2098 				}
2099 
2100 				if(result == -1)
2101 				{
2102 					if(pCoexDm->curPsTdma == 71)
2103 					{
2104 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2105 						pCoexDm->psTdmaDuAdjType = 1;
2106 					}
2107 					else if(pCoexDm->curPsTdma == 1)
2108 					{
2109 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2110 						pCoexDm->psTdmaDuAdjType = 2;
2111 					}
2112 					else if(pCoexDm->curPsTdma == 2)
2113 					{
2114 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2115 						pCoexDm->psTdmaDuAdjType = 3;
2116 					}
2117 					else if(pCoexDm->curPsTdma == 3)
2118 					{
2119 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2120 						pCoexDm->psTdmaDuAdjType = 4;
2121 					}
2122 					else if(pCoexDm->curPsTdma == 9)
2123 					{
2124 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2125 						pCoexDm->psTdmaDuAdjType = 10;
2126 					}
2127 					else if(pCoexDm->curPsTdma == 10)
2128 					{
2129 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2130 						pCoexDm->psTdmaDuAdjType = 11;
2131 					}
2132 					else if(pCoexDm->curPsTdma == 11)
2133 					{
2134 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2135 						pCoexDm->psTdmaDuAdjType = 12;
2136 					}
2137 				}
2138 				else if (result == 1)
2139 				{
2140 					if(pCoexDm->curPsTdma == 4)
2141 					{
2142 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2143 						pCoexDm->psTdmaDuAdjType = 3;
2144 					}
2145 					else if(pCoexDm->curPsTdma == 3)
2146 					{
2147 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2148 						pCoexDm->psTdmaDuAdjType = 2;
2149 					}
2150 					else if(pCoexDm->curPsTdma == 2)
2151 					{
2152 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2153 						pCoexDm->psTdmaDuAdjType = 1;
2154 					}
2155 					else if(pCoexDm->curPsTdma == 1)
2156 					{
2157 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
2158 						pCoexDm->psTdmaDuAdjType = 71;
2159 					}
2160 					else if(pCoexDm->curPsTdma == 12)
2161 					{
2162 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2163 						pCoexDm->psTdmaDuAdjType = 11;
2164 					}
2165 					else if(pCoexDm->curPsTdma == 11)
2166 					{
2167 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2168 						pCoexDm->psTdmaDuAdjType = 10;
2169 					}
2170 					else if(pCoexDm->curPsTdma == 10)
2171 					{
2172 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2173 						pCoexDm->psTdmaDuAdjType = 9;
2174 					}
2175 				}
2176 			}
2177 		}
2178 		else if(maxInterval == 2)
2179 		{
2180 			if(bTxPause)
2181 			{
2182 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2183 				if(pCoexDm->curPsTdma == 1)
2184 				{
2185 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2186 					pCoexDm->psTdmaDuAdjType = 6;
2187 				}
2188 				else if(pCoexDm->curPsTdma == 2)
2189 				{
2190 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2191 					pCoexDm->psTdmaDuAdjType = 6;
2192 				}
2193 				else if(pCoexDm->curPsTdma == 3)
2194 				{
2195 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2196 					pCoexDm->psTdmaDuAdjType = 7;
2197 				}
2198 				else if(pCoexDm->curPsTdma == 4)
2199 				{
2200 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2201 					pCoexDm->psTdmaDuAdjType = 8;
2202 				}
2203 				if(pCoexDm->curPsTdma == 9)
2204 				{
2205 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2206 					pCoexDm->psTdmaDuAdjType = 14;
2207 				}
2208 				else if(pCoexDm->curPsTdma == 10)
2209 				{
2210 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2211 					pCoexDm->psTdmaDuAdjType = 14;
2212 				}
2213 				else if(pCoexDm->curPsTdma == 11)
2214 				{
2215 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2216 					pCoexDm->psTdmaDuAdjType = 15;
2217 				}
2218 				else if(pCoexDm->curPsTdma == 12)
2219 				{
2220 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2221 					pCoexDm->psTdmaDuAdjType = 16;
2222 				}
2223 				if(result == -1)
2224 				{
2225 					if(pCoexDm->curPsTdma == 5)
2226 					{
2227 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2228 						pCoexDm->psTdmaDuAdjType = 6;
2229 					}
2230 					else if(pCoexDm->curPsTdma == 6)
2231 					{
2232 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2233 						pCoexDm->psTdmaDuAdjType = 7;
2234 					}
2235 					else if(pCoexDm->curPsTdma == 7)
2236 					{
2237 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2238 						pCoexDm->psTdmaDuAdjType = 8;
2239 					}
2240 					else if(pCoexDm->curPsTdma == 13)
2241 					{
2242 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2243 						pCoexDm->psTdmaDuAdjType = 14;
2244 					}
2245 					else if(pCoexDm->curPsTdma == 14)
2246 					{
2247 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2248 						pCoexDm->psTdmaDuAdjType = 15;
2249 					}
2250 					else if(pCoexDm->curPsTdma == 15)
2251 					{
2252 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2253 						pCoexDm->psTdmaDuAdjType = 16;
2254 					}
2255 				}
2256 				else if (result == 1)
2257 				{
2258 					if(pCoexDm->curPsTdma == 8)
2259 					{
2260 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2261 						pCoexDm->psTdmaDuAdjType = 7;
2262 					}
2263 					else if(pCoexDm->curPsTdma == 7)
2264 					{
2265 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2266 						pCoexDm->psTdmaDuAdjType = 6;
2267 					}
2268 					else if(pCoexDm->curPsTdma == 6)
2269 					{
2270 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2271 						pCoexDm->psTdmaDuAdjType = 6;
2272 					}
2273 					else if(pCoexDm->curPsTdma == 16)
2274 					{
2275 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2276 						pCoexDm->psTdmaDuAdjType = 15;
2277 					}
2278 					else if(pCoexDm->curPsTdma == 15)
2279 					{
2280 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2281 						pCoexDm->psTdmaDuAdjType = 14;
2282 					}
2283 					else if(pCoexDm->curPsTdma == 14)
2284 					{
2285 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2286 						pCoexDm->psTdmaDuAdjType = 14;
2287 					}
2288 				}
2289 			}
2290 			else
2291 			{
2292 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2293 				if(pCoexDm->curPsTdma == 5)
2294 				{
2295 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2296 					pCoexDm->psTdmaDuAdjType = 2;
2297 				}
2298 				else if(pCoexDm->curPsTdma == 6)
2299 				{
2300 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2301 					pCoexDm->psTdmaDuAdjType = 2;
2302 				}
2303 				else if(pCoexDm->curPsTdma == 7)
2304 				{
2305 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2306 					pCoexDm->psTdmaDuAdjType = 3;
2307 				}
2308 				else if(pCoexDm->curPsTdma == 8)
2309 				{
2310 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2311 					pCoexDm->psTdmaDuAdjType = 4;
2312 				}
2313 				if(pCoexDm->curPsTdma == 13)
2314 				{
2315 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2316 					pCoexDm->psTdmaDuAdjType = 10;
2317 				}
2318 				else if(pCoexDm->curPsTdma == 14)
2319 				{
2320 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2321 					pCoexDm->psTdmaDuAdjType = 10;
2322 				}
2323 				else if(pCoexDm->curPsTdma == 15)
2324 				{
2325 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2326 					pCoexDm->psTdmaDuAdjType = 11;
2327 				}
2328 				else if(pCoexDm->curPsTdma == 16)
2329 				{
2330 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2331 					pCoexDm->psTdmaDuAdjType = 12;
2332 				}
2333 				if(result == -1)
2334 				{
2335 					if(pCoexDm->curPsTdma == 1)
2336 					{
2337 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2338 						pCoexDm->psTdmaDuAdjType = 2;
2339 					}
2340 					else if(pCoexDm->curPsTdma == 2)
2341 					{
2342 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2343 						pCoexDm->psTdmaDuAdjType = 3;
2344 					}
2345 					else if(pCoexDm->curPsTdma == 3)
2346 					{
2347 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2348 						pCoexDm->psTdmaDuAdjType = 4;
2349 					}
2350 					else if(pCoexDm->curPsTdma == 9)
2351 					{
2352 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2353 						pCoexDm->psTdmaDuAdjType = 10;
2354 					}
2355 					else if(pCoexDm->curPsTdma == 10)
2356 					{
2357 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2358 						pCoexDm->psTdmaDuAdjType = 11;
2359 					}
2360 					else if(pCoexDm->curPsTdma == 11)
2361 					{
2362 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2363 						pCoexDm->psTdmaDuAdjType = 12;
2364 					}
2365 				}
2366 				else if (result == 1)
2367 				{
2368 					if(pCoexDm->curPsTdma == 4)
2369 					{
2370 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2371 						pCoexDm->psTdmaDuAdjType = 3;
2372 					}
2373 					else if(pCoexDm->curPsTdma == 3)
2374 					{
2375 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2376 						pCoexDm->psTdmaDuAdjType = 2;
2377 					}
2378 					else if(pCoexDm->curPsTdma == 2)
2379 					{
2380 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2381 						pCoexDm->psTdmaDuAdjType = 2;
2382 					}
2383 					else if(pCoexDm->curPsTdma == 12)
2384 					{
2385 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2386 						pCoexDm->psTdmaDuAdjType = 11;
2387 					}
2388 					else if(pCoexDm->curPsTdma == 11)
2389 					{
2390 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2391 						pCoexDm->psTdmaDuAdjType = 10;
2392 					}
2393 					else if(pCoexDm->curPsTdma == 10)
2394 					{
2395 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2396 						pCoexDm->psTdmaDuAdjType = 10;
2397 					}
2398 				}
2399 			}
2400 		}
2401 		else if(maxInterval == 3)
2402 		{
2403 			if(bTxPause)
2404 			{
2405 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2406 				if(pCoexDm->curPsTdma == 1)
2407 				{
2408 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2409 					pCoexDm->psTdmaDuAdjType = 7;
2410 				}
2411 				else if(pCoexDm->curPsTdma == 2)
2412 				{
2413 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2414 					pCoexDm->psTdmaDuAdjType = 7;
2415 				}
2416 				else if(pCoexDm->curPsTdma == 3)
2417 				{
2418 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2419 					pCoexDm->psTdmaDuAdjType = 7;
2420 				}
2421 				else if(pCoexDm->curPsTdma == 4)
2422 				{
2423 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2424 					pCoexDm->psTdmaDuAdjType = 8;
2425 				}
2426 				if(pCoexDm->curPsTdma == 9)
2427 				{
2428 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2429 					pCoexDm->psTdmaDuAdjType = 15;
2430 				}
2431 				else if(pCoexDm->curPsTdma == 10)
2432 				{
2433 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2434 					pCoexDm->psTdmaDuAdjType = 15;
2435 				}
2436 				else if(pCoexDm->curPsTdma == 11)
2437 				{
2438 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2439 					pCoexDm->psTdmaDuAdjType = 15;
2440 				}
2441 				else if(pCoexDm->curPsTdma == 12)
2442 				{
2443 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2444 					pCoexDm->psTdmaDuAdjType = 16;
2445 				}
2446 				if(result == -1)
2447 				{
2448 					if(pCoexDm->curPsTdma == 5)
2449 					{
2450 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2451 						pCoexDm->psTdmaDuAdjType = 7;
2452 					}
2453 					else if(pCoexDm->curPsTdma == 6)
2454 					{
2455 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2456 						pCoexDm->psTdmaDuAdjType = 7;
2457 					}
2458 					else if(pCoexDm->curPsTdma == 7)
2459 					{
2460 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2461 						pCoexDm->psTdmaDuAdjType = 8;
2462 					}
2463 					else if(pCoexDm->curPsTdma == 13)
2464 					{
2465 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2466 						pCoexDm->psTdmaDuAdjType = 15;
2467 					}
2468 					else if(pCoexDm->curPsTdma == 14)
2469 					{
2470 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2471 						pCoexDm->psTdmaDuAdjType = 15;
2472 					}
2473 					else if(pCoexDm->curPsTdma == 15)
2474 					{
2475 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2476 						pCoexDm->psTdmaDuAdjType = 16;
2477 					}
2478 				}
2479 				else if (result == 1)
2480 				{
2481 					if(pCoexDm->curPsTdma == 8)
2482 					{
2483 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2484 						pCoexDm->psTdmaDuAdjType = 7;
2485 					}
2486 					else if(pCoexDm->curPsTdma == 7)
2487 					{
2488 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2489 						pCoexDm->psTdmaDuAdjType = 7;
2490 					}
2491 					else if(pCoexDm->curPsTdma == 6)
2492 					{
2493 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2494 						pCoexDm->psTdmaDuAdjType = 7;
2495 					}
2496 					else if(pCoexDm->curPsTdma == 16)
2497 					{
2498 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2499 						pCoexDm->psTdmaDuAdjType = 15;
2500 					}
2501 					else if(pCoexDm->curPsTdma == 15)
2502 					{
2503 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2504 						pCoexDm->psTdmaDuAdjType = 15;
2505 					}
2506 					else if(pCoexDm->curPsTdma == 14)
2507 					{
2508 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2509 						pCoexDm->psTdmaDuAdjType = 15;
2510 					}
2511 				}
2512 			}
2513 			else
2514 			{
2515 				RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2516 				if(pCoexDm->curPsTdma == 5)
2517 				{
2518 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2519 					pCoexDm->psTdmaDuAdjType = 3;
2520 				}
2521 				else if(pCoexDm->curPsTdma == 6)
2522 				{
2523 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2524 					pCoexDm->psTdmaDuAdjType = 3;
2525 				}
2526 				else if(pCoexDm->curPsTdma == 7)
2527 				{
2528 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2529 					pCoexDm->psTdmaDuAdjType = 3;
2530 				}
2531 				else if(pCoexDm->curPsTdma == 8)
2532 				{
2533 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2534 					pCoexDm->psTdmaDuAdjType = 4;
2535 				}
2536 				if(pCoexDm->curPsTdma == 13)
2537 				{
2538 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2539 					pCoexDm->psTdmaDuAdjType = 11;
2540 				}
2541 				else if(pCoexDm->curPsTdma == 14)
2542 				{
2543 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2544 					pCoexDm->psTdmaDuAdjType = 11;
2545 				}
2546 				else if(pCoexDm->curPsTdma == 15)
2547 				{
2548 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2549 					pCoexDm->psTdmaDuAdjType = 11;
2550 				}
2551 				else if(pCoexDm->curPsTdma == 16)
2552 				{
2553 					halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2554 					pCoexDm->psTdmaDuAdjType = 12;
2555 				}
2556 				if(result == -1)
2557 				{
2558 					if(pCoexDm->curPsTdma == 1)
2559 					{
2560 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2561 						pCoexDm->psTdmaDuAdjType = 3;
2562 					}
2563 					else if(pCoexDm->curPsTdma == 2)
2564 					{
2565 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2566 						pCoexDm->psTdmaDuAdjType = 3;
2567 					}
2568 					else if(pCoexDm->curPsTdma == 3)
2569 					{
2570 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2571 						pCoexDm->psTdmaDuAdjType = 4;
2572 					}
2573 					else if(pCoexDm->curPsTdma == 9)
2574 					{
2575 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2576 						pCoexDm->psTdmaDuAdjType = 11;
2577 					}
2578 					else if(pCoexDm->curPsTdma == 10)
2579 					{
2580 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2581 						pCoexDm->psTdmaDuAdjType = 11;
2582 					}
2583 					else if(pCoexDm->curPsTdma == 11)
2584 					{
2585 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2586 						pCoexDm->psTdmaDuAdjType = 12;
2587 					}
2588 				}
2589 				else if (result == 1)
2590 				{
2591 					if(pCoexDm->curPsTdma == 4)
2592 					{
2593 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2594 						pCoexDm->psTdmaDuAdjType = 3;
2595 					}
2596 					else if(pCoexDm->curPsTdma == 3)
2597 					{
2598 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2599 						pCoexDm->psTdmaDuAdjType = 3;
2600 					}
2601 					else if(pCoexDm->curPsTdma == 2)
2602 					{
2603 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2604 						pCoexDm->psTdmaDuAdjType = 3;
2605 					}
2606 					else if(pCoexDm->curPsTdma == 12)
2607 					{
2608 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2609 						pCoexDm->psTdmaDuAdjType = 11;
2610 					}
2611 					else if(pCoexDm->curPsTdma == 11)
2612 					{
2613 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2614 						pCoexDm->psTdmaDuAdjType = 11;
2615 					}
2616 					else if(pCoexDm->curPsTdma == 10)
2617 					{
2618 						halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2619 						pCoexDm->psTdmaDuAdjType = 11;
2620 					}
2621 				}
2622 			}
2623 		}
2624 	}
2625 
2626 	// if current PsTdma not match with the recorded one (when scan, dhcp...),
2627 	// then we have to adjust it back to the previous record one.
2628 	if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType)
2629 	{
2630 		BOOLEAN	bScan=FALSE, bLink=FALSE, bRoam=FALSE;
2631 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n",
2632 			pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType));
2633 
2634 		pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
2635 		pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
2636 		pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
2637 
2638 		if( !bScan && !bLink && !bRoam)
2639 		{
2640 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType);
2641 		}
2642 		else
2643 		{
2644 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"));
2645 		}
2646 	}
2647 
2648 	// when halbtc8821aCsr2ant_TdmaDurationAdjust() is called, fw dac swing is included in the function.
2649 	//if(pCoexDm->psTdmaDuAdjType == 71)
2650 	//	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xc); //Skip because A2DP get worse at HT40
2651 	//else
2652 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x6);
2653 }
2654 
2655 // SCO only or SCO+PAN(HS)
2656 VOID
halbtc8821aCsr2ant_ActionSco(IN PBTC_COEXIST pBtCoexist)2657 halbtc8821aCsr2ant_ActionSco(
2658 	IN	PBTC_COEXIST		pBtCoexist
2659 	)
2660 {
2661 	u1Byte	wifiRssiState,btRssiState;
2662 	u4Byte	wifiBw;
2663 
2664 	halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffffff, 0x3);
2665 	halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0);
2666 
2667 	halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE);
2668 
2669 	halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 1, 0, 2, 0);
2670 
2671 	if(pCoexSta->bSlave == FALSE)
2672 		halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x4);
2673 	else
2674 		halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x2);
2675 
2676 /*
2677 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2678 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
2679 
2680 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4);
2681 
2682 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
2683 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
2684 	else
2685 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
2686 
2687 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2688 
2689 	if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode
2690 	{
2691 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
2692 	}
2693 	else  //for SCO quality & wifi performance balance at 11n mode
2694 	{
2695 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
2696 	}
2697 
2698 	if(BTC_WIFI_BW_HT40 == wifiBw)
2699 	{
2700 
2701 		// fw mechanism
2702 		//halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2703 
2704 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
2705 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2706 		{
2707 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality
2708 		}
2709 		else
2710 		{
2711 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality
2712 		}
2713 
2714 		// sw mechanism
2715 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2716 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2717 		{
2718 			halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
2719 			halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
2720 		}
2721 		else
2722 		{
2723 			halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
2724 			halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2725 		}
2726 	}
2727 	else
2728 	{
2729 		// fw mechanism
2730 		//halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2731 
2732 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
2733 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2734 		{
2735 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality
2736 		}
2737 		else
2738 		{
2739 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality
2740 		}
2741 
2742 		// sw mechanism
2743 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2744 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2745 		{
2746 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
2747 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
2748 		}
2749 		else
2750 		{
2751 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
2752 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2753 		}
2754 	}
2755 */
2756 }
2757 
2758 
2759 VOID
halbtc8821aCsr2ant_ActionHid(IN PBTC_COEXIST pBtCoexist)2760 halbtc8821aCsr2ant_ActionHid(
2761 	IN	PBTC_COEXIST		pBtCoexist
2762 	)
2763 {
2764 	u1Byte	wifiRssiState, btRssiState;
2765 	u4Byte	wifiBw;
2766 
2767 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2768 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
2769 
2770 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2771 
2772 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
2773 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
2774 	else
2775 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
2776 
2777 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2778 
2779 	if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
2780 	{
2781 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
2782 	}
2783 	else  //for HID quality & wifi performance balance at 11n mode
2784 	{
2785 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3);
2786 	}
2787 
2788 	if(BTC_WIFI_BW_HT40 == wifiBw)
2789 	{
2790 		// fw mechanism
2791 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
2792 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2793 		{
2794 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2795 		}
2796 		else
2797 		{
2798 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2799 		}
2800 
2801 		// sw mechanism
2802 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2803 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2804 		{
2805 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
2806 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
2807 		}
2808 		else
2809 		{
2810  			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
2811 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2812 		}
2813 	}
2814 	else
2815 	{
2816 		// fw mechanism
2817 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
2818 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2819 		{
2820 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2821 		}
2822 		else
2823 		{
2824 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2825 		}
2826 
2827 		// sw mechanism
2828 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2829 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2830 		{
2831 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
2832 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
2833 		}
2834 		else
2835 		{
2836  			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
2837 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2838 		}
2839 	}
2840 }
2841 
2842 //A2DP only / PAN(EDR) only/ A2DP+PAN(HS)
2843 VOID
halbtc8821aCsr2ant_ActionA2dp(IN PBTC_COEXIST pBtCoexist)2844 halbtc8821aCsr2ant_ActionA2dp(
2845 	IN	PBTC_COEXIST		pBtCoexist
2846 	)
2847 {
2848 	u1Byte		wifiRssiState, btRssiState;
2849 	u4Byte		wifiBw;
2850 
2851 	halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8);
2852 
2853 	if(pCoexSta->bSlave == FALSE)
2854 	{
2855 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3);
2856 		halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
2857 		halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 1);
2858 		halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x0c);
2859 	}
2860 	else
2861 	{
2862 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3);
2863 		halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23);
2864 		halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 2);
2865 		halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18);
2866 	}
2867 
2868 /*
2869 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2870 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
2871 
2872 	//fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust()
2873 	//halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2874 
2875 
2876 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
2877 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
2878 	else
2879 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
2880 
2881 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2882 
2883 	if(BTC_WIFI_BW_HT40 == wifiBw)
2884 	{
2885 		// fw mechanism
2886 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
2887 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2888 		{
2889 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1);
2890 		}
2891 		else
2892 		{
2893 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
2894 		}
2895 
2896 		// sw mechanism
2897 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2898 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2899 		{
2900  			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
2901 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
2902 		}
2903 		else
2904 		{
2905 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
2906 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2907 		}
2908 	}
2909 	else
2910 	{
2911 		// fw mechanism
2912 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
2913 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2914 		{
2915 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1);
2916 		}
2917 		else
2918 		{
2919 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
2920 		}
2921 
2922 		// sw mechanism
2923 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2924 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2925 		{
2926 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
2927 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
2928 		}
2929 		else
2930 		{
2931 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
2932 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2933 		}
2934 	}
2935 */
2936 }
2937 
2938 VOID
halbtc8821aCsr2ant_ActionA2dpPanHs(IN PBTC_COEXIST pBtCoexist)2939 halbtc8821aCsr2ant_ActionA2dpPanHs(
2940 	IN	PBTC_COEXIST		pBtCoexist
2941 	)
2942 {
2943 	u1Byte		wifiRssiState, btRssiState, btInfoExt;
2944 	u4Byte		wifiBw;
2945 
2946 	btInfoExt = pCoexSta->btInfoExt;
2947 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2948 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2,35, 0);
2949 
2950 	//fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust()
2951 	//halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2952 
2953 
2954 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
2955 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
2956 	else
2957 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
2958 
2959 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2960 
2961 	if(BTC_WIFI_BW_HT40 == wifiBw)
2962 	{
2963 		// fw mechanism
2964 		if(btInfoExt&BIT0)	//a2dp basic rate
2965 		{
2966 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2);
2967 		}
2968 		else				//a2dp edr rate
2969 		{
2970 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
2971 		}
2972 
2973 		// sw mechanism
2974 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2975 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
2976 		{
2977  			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
2978 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
2979 		}
2980 		else
2981 		{
2982 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
2983 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2984 		}
2985 	}
2986 	else
2987 	{
2988 		// fw mechanism
2989 		if(btInfoExt&BIT0)	//a2dp basic rate
2990 		{
2991 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2);
2992 		}
2993 		else				//a2dp edr rate
2994 		{
2995 			halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
2996 		}
2997 
2998 		// sw mechanism
2999 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3000 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3001 		{
3002 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3003 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3004 		}
3005 		else
3006 		{
3007 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3008 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3009 		}
3010 	}
3011 }
3012 
3013 VOID
halbtc8821aCsr2ant_ActionPanEdr(IN PBTC_COEXIST pBtCoexist)3014 halbtc8821aCsr2ant_ActionPanEdr(
3015 	IN	PBTC_COEXIST		pBtCoexist
3016 	)
3017 {
3018 	u1Byte		wifiRssiState, btRssiState;
3019 	u4Byte		wifiBw;
3020 
3021 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3022 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
3023 
3024 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3025 
3026 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
3027 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
3028 	else
3029 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
3030 
3031 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3032 
3033 	if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
3034 	{
3035 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3);
3036 	}
3037 	else  //for HID quality & wifi performance balance at 11n mode
3038 	{
3039 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3);
3040 	}
3041 
3042 	if(BTC_WIFI_BW_HT40 == wifiBw)
3043 	{
3044 		// fw mechanism
3045 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3046 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3047 		{
3048 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
3049 		}
3050 		else
3051 		{
3052 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
3053 		}
3054 
3055 		// sw mechanism
3056 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3057 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3058 		{
3059 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3060 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3061 		}
3062 		else
3063 		{
3064 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3065 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3066 		}
3067 	}
3068 	else
3069 	{
3070 		// fw mechanism
3071 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3072 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3073 		{
3074 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
3075 		}
3076 		else
3077 		{
3078 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
3079 		}
3080 
3081 		// sw mechanism
3082 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3083 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3084 		{
3085 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3086 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3087 		}
3088 		else
3089 		{
3090 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3091 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3092 		}
3093 	}
3094 }
3095 
3096 
3097 //PAN(HS) only
3098 VOID
halbtc8821aCsr2ant_ActionPanHs(IN PBTC_COEXIST pBtCoexist)3099 halbtc8821aCsr2ant_ActionPanHs(
3100 	IN	PBTC_COEXIST		pBtCoexist
3101 	)
3102 {
3103 	u1Byte		wifiRssiState, btRssiState;
3104 	u4Byte		wifiBw;
3105 
3106 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3107 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
3108 
3109 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3110 
3111 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3112 
3113 	if(BTC_WIFI_BW_HT40 == wifiBw)
3114 	{
3115 		// fw mechanism
3116 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3117 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3118 		{
3119 			halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
3120 		}
3121 		else
3122 		{
3123 			halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
3124 		}
3125 		halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3126 
3127 		// sw mechanism
3128 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3129 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3130 		{
3131 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3132 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3133 		}
3134 		else
3135 		{
3136 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3137 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3138 		}
3139 	}
3140 	else
3141 	{
3142 		// fw mechanism
3143 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3144 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3145 		{
3146 			halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
3147 		}
3148 		else
3149 		{
3150 			halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
3151 		}
3152 
3153 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3154 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3155 		{
3156 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3157 		}
3158 		else
3159 		{
3160 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3161 		}
3162 
3163 		// sw mechanism
3164 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3165 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3166 		{
3167 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3168 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3169 		}
3170 		else
3171 		{
3172 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3173 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3174 		}
3175 	}
3176 }
3177 
3178 //PAN(EDR)+A2DP
3179 VOID
halbtc8821aCsr2ant_ActionPanEdrA2dp(IN PBTC_COEXIST pBtCoexist)3180 halbtc8821aCsr2ant_ActionPanEdrA2dp(
3181 	IN	PBTC_COEXIST		pBtCoexist
3182 	)
3183 {
3184 	u1Byte		wifiRssiState, btRssiState, btInfoExt;
3185 	u4Byte		wifiBw;
3186 
3187 	btInfoExt = pCoexSta->btInfoExt;
3188 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3189 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
3190 
3191 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3192 
3193 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
3194 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
3195 	else
3196 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
3197 
3198 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3199 
3200 	if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
3201 	{
3202 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
3203 	}
3204 	else  //for HID quality & wifi performance balance at 11n mode
3205 	{
3206 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
3207 	}
3208 
3209 	if(BTC_WIFI_BW_HT40 == wifiBw)
3210 	{
3211 		// fw mechanism
3212 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3213 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3214 		{
3215 			if(btInfoExt&BIT0)	//a2dp basic rate
3216 			{
3217 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
3218 			}
3219 			else				//a2dp edr rate
3220 			{
3221 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
3222 			}
3223 		}
3224 		else
3225 		{
3226 			if(btInfoExt&BIT0)	//a2dp basic rate
3227 			{
3228 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3229 			}
3230 			else				//a2dp edr rate
3231 			{
3232 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3233 			}
3234 		}
3235 
3236 		// sw mechanism
3237 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3238 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3239 		{
3240 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3241 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3242 		}
3243 		else
3244 		{
3245 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3246 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3247 		};
3248 	}
3249 	else
3250 	{
3251 		// fw mechanism
3252 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3253 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3254 		{
3255 			if(btInfoExt&BIT0)	//a2dp basic rate
3256 			{
3257 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
3258 			}
3259 			else				//a2dp edr rate
3260 			{
3261 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
3262 			}
3263 		}
3264 		else
3265 		{
3266 			if(btInfoExt&BIT0)	//a2dp basic rate
3267 			{
3268 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3269 			}
3270 			else				//a2dp edr rate
3271 			{
3272 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3273 			}
3274 		}
3275 
3276 		// sw mechanism
3277 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3278 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3279 		{
3280 			halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3281 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3282 		}
3283 		else
3284 		{
3285 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3286 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3287 		}
3288 	}
3289 }
3290 
3291 VOID
halbtc8821aCsr2ant_ActionPanEdrHid(IN PBTC_COEXIST pBtCoexist)3292 halbtc8821aCsr2ant_ActionPanEdrHid(
3293 	IN	PBTC_COEXIST		pBtCoexist
3294 	)
3295 {
3296 	u1Byte		wifiRssiState, btRssiState;
3297 	u4Byte		wifiBw;
3298 
3299 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3300 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
3301 
3302 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3303 
3304 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
3305 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
3306 	else
3307 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
3308 
3309 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3310 
3311 	if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
3312 	{
3313 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3);
3314 	}
3315 	else  //for HID quality & wifi performance balance at 11n mode
3316 	{
3317 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3);
3318 	}
3319 
3320 	if(BTC_WIFI_BW_HT40 == wifiBw)
3321 	{
3322 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3);
3323 		// fw mechanism
3324 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3325 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3326 		{
3327 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
3328 		}
3329 		else
3330 		{
3331 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
3332 		}
3333 
3334 		// sw mechanism
3335 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3336 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3337 		{
3338 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3339 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3340 		}
3341 		else
3342 		{
3343 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3344 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3345 		}
3346 	}
3347 	else
3348 	{
3349 		halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3350 		// fw mechanism
3351 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3352 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3353 		{
3354 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
3355 		}
3356 		else
3357 		{
3358 			halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
3359 		}
3360 
3361 		// sw mechanism
3362 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3363 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3364 		{
3365 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3366 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3367 		}
3368 		else
3369 		{
3370 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3371 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3372 		}
3373 	}
3374 }
3375 
3376 // HID+A2DP+PAN(EDR)
3377 VOID
halbtc8821aCsr2ant_ActionHidA2dpPanEdr(IN PBTC_COEXIST pBtCoexist)3378 halbtc8821aCsr2ant_ActionHidA2dpPanEdr(
3379 	IN	PBTC_COEXIST		pBtCoexist
3380 	)
3381 {
3382 	u1Byte		wifiRssiState, btRssiState, btInfoExt;
3383 	u4Byte		wifiBw;
3384 
3385 	btInfoExt = pCoexSta->btInfoExt;
3386 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3387 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
3388 
3389 	halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3390 
3391 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
3392 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
3393 	else
3394 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
3395 
3396 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3397 
3398 	if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
3399 	{
3400 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
3401 	}
3402 	else  //for HID quality & wifi performance balance at 11n mode
3403 	{
3404 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
3405 	}
3406 
3407 	if(BTC_WIFI_BW_HT40 == wifiBw)
3408 	{
3409 		// fw mechanism
3410 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3411 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3412 		{
3413 			if(btInfoExt&BIT0)	//a2dp basic rate
3414 			{
3415 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3416 			}
3417 			else				//a2dp edr rate
3418 			{
3419 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3420 			}
3421 		}
3422 		else
3423 		{
3424 			if(btInfoExt&BIT0)	//a2dp basic rate
3425 			{
3426 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3427 			}
3428 			else				//a2dp edr rate
3429 			{
3430 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3431 			}
3432 		}
3433 
3434 		// sw mechanism
3435 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3436 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3437 		{
3438 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3439 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3440 		}
3441 		else
3442 		{
3443 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3444 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3445 		}
3446 	}
3447 	else
3448 	{
3449 		// fw mechanism
3450 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3451 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3452 		{
3453 			if(btInfoExt&BIT0)	//a2dp basic rate
3454 			{
3455 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
3456 			}
3457 			else				//a2dp edr rate
3458 			{
3459 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
3460 			}
3461 		}
3462 		else
3463 		{
3464 			if(btInfoExt&BIT0)	//a2dp basic rate
3465 			{
3466 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3467 			}
3468 			else				//a2dp edr rate
3469 			{
3470 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3471 			}
3472 		}
3473 
3474 		// sw mechanism
3475 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3476 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3477 		{
3478 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3479 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3480 		}
3481 		else
3482 		{
3483 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3484 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3485 		}
3486 	}
3487 }
3488 
3489 VOID
halbtc8821aCsr2ant_ActionHidA2dp(IN PBTC_COEXIST pBtCoexist)3490 halbtc8821aCsr2ant_ActionHidA2dp(
3491 	IN	PBTC_COEXIST		pBtCoexist
3492 	)
3493 {
3494 	u1Byte		wifiRssiState, btRssiState, btInfoExt;
3495 	u4Byte		wifiBw;
3496 
3497 	btInfoExt = pCoexSta->btInfoExt;
3498 	wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3499 	btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
3500 
3501 	if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist))
3502 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE);
3503 	else
3504 		halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
3505 
3506 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3507 
3508 	if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
3509 	{
3510 //Allen		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
3511 		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3);
3512 	}
3513 	else  //for HID quality & wifi performance balance at 11n mode
3514 	{
3515 //Allen		halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
3516 			halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3);
3517 
3518 	}
3519 
3520 	if(BTC_WIFI_BW_HT40 == wifiBw)
3521 	{
3522 		// fw mechanism
3523 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3524 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3525 		{
3526 			if(btInfoExt&BIT0)	//a2dp basic rate
3527 			{
3528 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3529 			}
3530 			else				//a2dp edr rate
3531 			{
3532 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3533 			}
3534 		}
3535 		else
3536 		{
3537 			if(btInfoExt&BIT0)	//a2dp basic rate
3538 			{
3539 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3540 			}
3541 			else				//a2dp edr rate
3542 			{
3543 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3544 			}
3545 		}
3546 
3547 		// sw mechanism
3548 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3549 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3550 		{
3551 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3552 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3553 		}
3554 		else
3555 		{
3556 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3557 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3558 		}
3559 	}
3560 	else
3561 	{
3562 		// fw mechanism
3563 		if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3564 			(btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3565 		{
3566 			if(btInfoExt&BIT0)	//a2dp basic rate
3567 			{
3568 //				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2);
3569 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3570 
3571 			}
3572 			else				//a2dp edr rate
3573 			{
3574 //Allen				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2);
3575 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3576 			}
3577 		}
3578 		else
3579 		{
3580 			if(btInfoExt&BIT0)	//a2dp basic rate
3581 			{
3582 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3583 			}
3584 			else				//a2dp edr rate
3585 			{
3586 				halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3587 			}
3588 		}
3589 
3590 		// sw mechanism
3591 		if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3592 			(wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3593 		{
3594 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3595 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3596 		}
3597 		else
3598 		{
3599 			 halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3600 			 halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3601 		}
3602 	}
3603 }
3604 
3605 VOID
halbtc8821aCsr2ant_RunCoexistMechanism(IN PBTC_COEXIST pBtCoexist)3606 halbtc8821aCsr2ant_RunCoexistMechanism(
3607 	IN	PBTC_COEXIST		pBtCoexist
3608 	)
3609 {
3610 	PBTC_STACK_INFO		pStackInfo=&pBtCoexist->stackInfo;
3611 	BOOLEAN				bWifiUnder5G=FALSE;
3612 	u1Byte				btInfoOriginal=0, btRetryCnt=0;
3613 	u1Byte				algorithm=0;
3614 
3615 	if(pBtCoexist->bManualControl)
3616 	{
3617 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Manual control!!!\n"));
3618 		return;
3619 	}
3620 
3621 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
3622 
3623 	if(bWifiUnder5G)
3624 	{
3625 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n"));
3626 		halbtc8821aCsr2ant_CoexUnder5G(pBtCoexist);
3627 		return;
3628 	}
3629 
3630 	//if(pStackInfo->bProfileNotified)
3631 	{
3632 		algorithm = halbtc8821aCsr2ant_ActionAlgorithm(pBtCoexist);
3633 		if(pCoexSta->bC2hBtInquiryPage && (BT_8821A_CSR_2ANT_COEX_ALGO_PANHS!=algorithm))
3634 		{
3635 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n"));
3636 			halbtc8821aCsr2ant_BtInquiryPage(pBtCoexist);
3637 			return;
3638 		}
3639 
3640 		pCoexDm->curAlgorithm = algorithm;
3641 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm));
3642 
3643 		if(halbtc8821aCsr2ant_IsCommonAction(pBtCoexist))
3644 		{
3645 			RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n"));
3646 			pCoexDm->bResetTdmaAdjust = TRUE;
3647 		}
3648 		else
3649 		{
3650 			if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm)
3651 			{
3652 				RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n",
3653 					pCoexDm->preAlgorithm, pCoexDm->curAlgorithm));
3654 				pCoexDm->bResetTdmaAdjust = TRUE;
3655 			}
3656 			switch(pCoexDm->curAlgorithm)
3657 			{
3658 				case BT_8821A_CSR_2ANT_COEX_ALGO_SCO:
3659 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n"));
3660 					halbtc8821aCsr2ant_ActionSco(pBtCoexist);
3661 					break;
3662 				case BT_8821A_CSR_2ANT_COEX_ALGO_HID:
3663 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n"));
3664 					halbtc8821aCsr2ant_ActionHid(pBtCoexist);
3665 					break;
3666 				case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP:
3667 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n"));
3668 					halbtc8821aCsr2ant_ActionA2dp(pBtCoexist);
3669 					break;
3670 				case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS:
3671 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"));
3672 					halbtc8821aCsr2ant_ActionA2dpPanHs(pBtCoexist);
3673 					break;
3674 				case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR:
3675 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"));
3676 					halbtc8821aCsr2ant_ActionPanEdr(pBtCoexist);
3677 					break;
3678 				case BT_8821A_CSR_2ANT_COEX_ALGO_PANHS:
3679 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n"));
3680 					halbtc8821aCsr2ant_ActionPanHs(pBtCoexist);
3681 					break;
3682 				case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP:
3683 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"));
3684 					halbtc8821aCsr2ant_ActionPanEdrA2dp(pBtCoexist);
3685 					break;
3686 				case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID:
3687 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"));
3688 					halbtc8821aCsr2ant_ActionPanEdrHid(pBtCoexist);
3689 					break;
3690 				case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3691 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"));
3692 					halbtc8821aCsr2ant_ActionHidA2dpPanEdr(pBtCoexist);
3693 					break;
3694 				case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP:
3695 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"));
3696 					halbtc8821aCsr2ant_ActionHidA2dp(pBtCoexist);
3697 					break;
3698 				default:
3699 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"));
3700 					halbtc8821aCsr2ant_CoexAllOff(pBtCoexist);
3701 					break;
3702 			}
3703 			pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
3704 		}
3705 	}
3706 }
3707 
3708 
3709 
3710 //============================================================
3711 // work around function start with wa_halbtc8821aCsr2ant_
3712 //============================================================
3713 //============================================================
3714 // extern function start with EXhalbtc8821aCsr2ant_
3715 //============================================================
3716 VOID
EXhalbtc8821aCsr2ant_PowerOnSetting(IN PBTC_COEXIST pBtCoexist)3717 EXhalbtc8821aCsr2ant_PowerOnSetting(
3718 	IN	PBTC_COEXIST		pBtCoexist
3719 	)
3720 {
3721 }
3722 
3723 VOID
EXhalbtc8821aCsr2ant_InitHwConfig(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bWifiOnly)3724 EXhalbtc8821aCsr2ant_InitHwConfig(
3725 	IN	PBTC_COEXIST		pBtCoexist,
3726 	IN	BOOLEAN				bWifiOnly
3727 	)
3728 {
3729 	PBTC_BOARD_INFO		pBoardInfo=&pBtCoexist->boardInfo;
3730 	u4Byte	u4Tmp=0;
3731 	u2Byte				u2Tmp=0;
3732 	u1Byte	u1Tmp=0;
3733 	u1Byte				H2C_Parameter[2] ={0};
3734 
3735 
3736 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n"));
3737 
3738 	if(bWifiOnly)
3739 		return;
3740 
3741 	//if(bBackUp)
3742 	{
3743 		// backup rf 0x1e value
3744 		pCoexDm->btRf0x1eBackup = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
3745 		pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430);
3746 		pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434);
3747 		pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a);
3748 		pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456);
3749 		pCoexDm->backupAmpduMaxNum = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x4ca);
3750 	}
3751 
3752 	#if 0 /* REMOVE */
3753 	// 0x790[5:0]=0x5
3754 	u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
3755 	u1Tmp &= 0xc0;
3756 	u1Tmp |= 0x5;
3757 	pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
3758 	#endif
3759 
3760 	//Antenna config
3761 	halbtc8821aCsr2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE);
3762 
3763 	// PTA parameter
3764 	halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3);
3765 
3766 	// Enable counter statistics
3767 	pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA
3768 	pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
3769 
3770 	#if 0 /* REMOVE */
3771 	pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
3772 	#endif
3773 }
3774 
3775 VOID
EXhalbtc8821aCsr2ant_InitCoexDm(IN PBTC_COEXIST pBtCoexist)3776 EXhalbtc8821aCsr2ant_InitCoexDm(
3777 	IN	PBTC_COEXIST		pBtCoexist
3778 	)
3779 {
3780 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n"));
3781 
3782 	halbtc8821aCsr2ant_InitCoexDm(pBtCoexist);
3783 }
3784 
3785 VOID
EXhalbtc8821aCsr2ant_DisplayCoexInfo(IN PBTC_COEXIST pBtCoexist)3786 EXhalbtc8821aCsr2ant_DisplayCoexInfo(
3787 	IN	PBTC_COEXIST		pBtCoexist
3788 	)
3789 {
3790 	PBTC_BOARD_INFO		pBoardInfo=&pBtCoexist->boardInfo;
3791 	PBTC_STACK_INFO		pStackInfo=&pBtCoexist->stackInfo;
3792 	pu1Byte				cliBuf=pBtCoexist->cliBuf;
3793 	u1Byte				u1Tmp[4], i, btInfoExt, psTdmaCase=0;
3794 	u4Byte				u4Tmp[4];
3795 	u4Byte				fwVer=0, btPatchVer=0;
3796 
3797 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
3798 	CL_PRINTF(cliBuf);
3799 
3800 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
3801 		pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
3802 	CL_PRINTF(cliBuf);
3803 
3804 	if(pBtCoexist->bManualControl)
3805 	{
3806 		CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!");
3807 		CL_PRINTF(cliBuf);
3808 	}
3809 
3810 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
3811 		((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
3812 	CL_PRINTF(cliBuf);
3813 
3814 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
3815 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
3816 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \
3817 		GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer);
3818 	CL_PRINTF(cliBuf);
3819 
3820 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
3821 		pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
3822 		pCoexDm->wifiChnlInfo[2]);
3823 	CL_PRINTF(cliBuf);
3824 
3825 	// wifi status
3826 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
3827 	CL_PRINTF(cliBuf);
3828 	pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
3829 
3830 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
3831 	CL_PRINTF(cliBuf);
3832 
3833 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
3834 		((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":(  (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))),
3835 		pCoexSta->btRssi, pCoexSta->btRetryCnt);
3836 	CL_PRINTF(cliBuf);
3837 
3838 	if(pStackInfo->bProfileNotified)
3839 	{
3840 		CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
3841 			pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist);
3842 		CL_PRINTF(cliBuf);
3843 
3844 		pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
3845 	}
3846 
3847 	btInfoExt = pCoexSta->btInfoExt;
3848 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \
3849 		(btInfoExt&BIT0)? "Basic rate":"EDR rate");
3850 	CL_PRINTF(cliBuf);
3851 
3852 	for(i=0; i<BT_INFO_SRC_8821A_CSR_2ANT_MAX; i++)
3853 	{
3854 		if(pCoexSta->btInfoC2hCnt[i])
3855 		{
3856 			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821aCsr2Ant[i], \
3857 				pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1],
3858 				pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3],
3859 				pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5],
3860 				pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]);
3861 			CL_PRINTF(cliBuf);
3862 		}
3863 	}
3864 
3865 	// Sw mechanism
3866 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
3867 	CL_PRINTF(cliBuf);
3868 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \
3869 		pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig);
3870 	CL_PRINTF(cliBuf);
3871 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
3872 		pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
3873 	CL_PRINTF(cliBuf);
3874 
3875 	// Fw mechanism
3876 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
3877 	CL_PRINTF(cliBuf);
3878 
3879 	if(!pBtCoexist->bManualControl)
3880 	{
3881 		psTdmaCase = pCoexDm->curPsTdma;
3882 		CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \
3883 			pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1],
3884 			pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3],
3885 			pCoexDm->psTdmaPara[4], psTdmaCase);
3886 		CL_PRINTF(cliBuf);
3887 
3888 		CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \
3889 			pCoexDm->bCurDecBtPwr, pCoexDm->bCurIgnoreWlanAct);
3890 		CL_PRINTF(cliBuf);
3891 	}
3892 
3893 	// Hw setting
3894 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
3895 	CL_PRINTF(cliBuf);
3896 
3897 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
3898 		pCoexDm->btRf0x1eBackup);
3899 	CL_PRINTF(cliBuf);
3900 
3901 	u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778);
3902 	u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc);
3903 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", "0x778 (W_Act)/ 0x6cc (CoTab Sel)", \
3904 		u1Tmp[0], u1Tmp[1]);
3905 	CL_PRINTF(cliBuf);
3906 
3907 	u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db);
3908 	u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b);
3909 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x8db(ADC)/0xc5b[29:25](DAC)", \
3910 		((u1Tmp[0]&0x60)>>5), ((u1Tmp[1]&0x3e)>>1));
3911 	CL_PRINTF(cliBuf);
3912 
3913 	u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4);
3914 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", \
3915 		u4Tmp[0]&0xff, ((u4Tmp[0]&0x30000000)>>28));
3916 	CL_PRINTF(cliBuf);
3917 
3918 	u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
3919 	u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
3920 	u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974);
3921 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \
3922 		u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]);
3923 	CL_PRINTF(cliBuf);
3924 
3925 	u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550);
3926 	u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522);
3927 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \
3928 		u4Tmp[0], u1Tmp[0]);
3929 	CL_PRINTF(cliBuf);
3930 
3931 	u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
3932 	u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa0a);
3933 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(DIG)/0xa0a(CCK-TH)", \
3934 		u4Tmp[0], u1Tmp[0]);
3935 	CL_PRINTF(cliBuf);
3936 
3937 	u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48);
3938 	u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b);
3939 	u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c);
3940 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "OFDM-FA/ CCK-FA", \
3941 		u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1]  );
3942 	CL_PRINTF(cliBuf);
3943 
3944 	u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0);
3945 	u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
3946 	u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
3947 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8", \
3948 		u4Tmp[0], u4Tmp[1], u4Tmp[2]);
3949 	CL_PRINTF(cliBuf);
3950 
3951 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hi-pri Rx/Tx)", \
3952 		pCoexSta->highPriorityRx, pCoexSta->highPriorityTx);
3953 	CL_PRINTF(cliBuf);
3954 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri Rx/Tx)", \
3955 		pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
3956 	CL_PRINTF(cliBuf);
3957 
3958 	pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
3959 }
3960 
3961 
3962 VOID
EXhalbtc8821aCsr2ant_IpsNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)3963 EXhalbtc8821aCsr2ant_IpsNotify(
3964 	IN	PBTC_COEXIST		pBtCoexist,
3965 	IN	u1Byte			type
3966 	)
3967 {
3968 	if(BTC_IPS_ENTER == type)
3969 	{
3970 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n"));
3971 		pCoexSta->bUnderIps = TRUE;
3972 		halbtc8821aCsr2ant_CoexAllOff(pBtCoexist);
3973 	}
3974 	else if(BTC_IPS_LEAVE == type)
3975 	{
3976 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n"));
3977 		pCoexSta->bUnderIps = FALSE;
3978 		//halbtc8821aCsr2ant_InitCoexDm(pBtCoexist);
3979 	}
3980 }
3981 
3982 VOID
EXhalbtc8821aCsr2ant_LpsNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)3983 EXhalbtc8821aCsr2ant_LpsNotify(
3984 	IN	PBTC_COEXIST		pBtCoexist,
3985 	IN	u1Byte			type
3986 	)
3987 {
3988 	if(BTC_LPS_ENABLE == type)
3989 	{
3990 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n"));
3991 		pCoexSta->bUnderLps = TRUE;
3992 	}
3993 	else if(BTC_LPS_DISABLE == type)
3994 	{
3995 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n"));
3996 		pCoexSta->bUnderLps = FALSE;
3997 	}
3998 }
3999 
4000 VOID
EXhalbtc8821aCsr2ant_ScanNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4001 EXhalbtc8821aCsr2ant_ScanNotify(
4002 	IN	PBTC_COEXIST		pBtCoexist,
4003 	IN	u1Byte			type
4004 	)
4005 {
4006 	if(BTC_SCAN_START == type)
4007 	{
4008 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n"));
4009 	}
4010 	else if(BTC_SCAN_FINISH == type)
4011 	{
4012 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n"));
4013 	}
4014 }
4015 
4016 VOID
EXhalbtc8821aCsr2ant_ConnectNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4017 EXhalbtc8821aCsr2ant_ConnectNotify(
4018 	IN	PBTC_COEXIST		pBtCoexist,
4019 	IN	u1Byte			type
4020 	)
4021 {
4022 	if(BTC_ASSOCIATE_START == type)
4023 	{
4024 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n"));
4025 	}
4026 	else if(BTC_ASSOCIATE_FINISH == type)
4027 	{
4028 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n"));
4029 	}
4030 }
4031 
4032 VOID
EXhalbtc8821aCsr2ant_MediaStatusNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4033 EXhalbtc8821aCsr2ant_MediaStatusNotify(
4034 	IN	PBTC_COEXIST			pBtCoexist,
4035 	IN	u1Byte				type
4036 	)
4037 {
4038 	u1Byte			H2C_Parameter[3] ={0};
4039 	u4Byte			wifiBw;
4040 	u1Byte			wifiCentralChnl;
4041 
4042 	if(BTC_MEDIA_CONNECT == type)
4043 	{
4044 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n"));
4045 	}
4046 	else
4047 	{
4048 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n"));
4049 	}
4050 
4051 	// only 2.4G we need to inform bt the chnl mask
4052 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
4053 	if( (BTC_MEDIA_CONNECT == type) &&
4054 		(wifiCentralChnl <= 14) )
4055 	{
4056 		H2C_Parameter[0] = 0x1;
4057 		H2C_Parameter[1] = wifiCentralChnl;
4058 		pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
4059 		if(BTC_WIFI_BW_HT40 == wifiBw)
4060 			H2C_Parameter[2] = 0x30;
4061 		else
4062 			H2C_Parameter[2] = 0x20;
4063 	}
4064 
4065 	#if 0 /* REMOVE */
4066 	pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
4067 	pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
4068 	pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
4069 
4070 	RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n",
4071 		H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
4072 
4073 	rtw_warn_on(_BTCOEX_CSR);
4074 	pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
4075 	#endif
4076 }
4077 
4078 VOID
EXhalbtc8821aCsr2ant_SpecialPacketNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4079 EXhalbtc8821aCsr2ant_SpecialPacketNotify(
4080 	IN	PBTC_COEXIST			pBtCoexist,
4081 	IN	u1Byte				type
4082 	)
4083 {
4084 	if(type == BTC_PACKET_DHCP)
4085 	{
4086 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n"));
4087 	}
4088 }
4089 
4090 VOID
EXhalbtc8821aCsr2ant_BtInfoNotify(IN PBTC_COEXIST pBtCoexist,IN pu1Byte tmpBuf,IN u1Byte length)4091 EXhalbtc8821aCsr2ant_BtInfoNotify(
4092 	IN	PBTC_COEXIST		pBtCoexist,
4093 	IN	pu1Byte			tmpBuf,
4094 	IN	u1Byte			length
4095 	)
4096 {
4097 	u1Byte			btInfo=0;
4098 	u1Byte			i, rspSource=0;
4099 	BOOLEAN			bBtBusy=FALSE, bLimitedDig=FALSE;
4100 	BOOLEAN			bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiUnder5G=FALSE;
4101 
4102 	pCoexSta->bC2hBtInfoReqSent = FALSE;
4103 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
4104 
4105 	rspSource = tmpBuf[0]&0xf;
4106 	if(rspSource >= BT_INFO_SRC_8821A_CSR_2ANT_MAX)
4107 		rspSource = BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW;
4108 	pCoexSta->btInfoC2hCnt[rspSource]++;
4109 
4110 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length));
4111 	for(i=0; i<length; i++)
4112 	{
4113 		pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
4114 		if(i == 1)
4115 			btInfo = tmpBuf[i];
4116 		if(i == length-1)
4117 		{
4118 			RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i]));
4119 		}
4120 		else
4121 		{
4122 			RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i]));
4123 		}
4124 	}
4125 
4126 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
4127 	if(BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW != rspSource)
4128 	{
4129 		pCoexSta->btRetryCnt =	// [3:0]
4130 			pCoexSta->btInfoC2h[rspSource][2]&0xf;
4131 
4132 		pCoexSta->btRssi =
4133 			pCoexSta->btInfoC2h[rspSource][3]*2+10;
4134 
4135 		pCoexSta->btInfoExt =
4136 			pCoexSta->btInfoC2h[rspSource][4];
4137 
4138 		#if 0 /* REMOVE */
4139 		// Here we need to resend some wifi info to BT
4140 		// because bt is reset and loss of the info.
4141 		if( (pCoexSta->btInfoExt & BIT1) )
4142 		{
4143 
4144 			if(bWifiConnected)
4145 			{
4146 				EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
4147 			}
4148 			else
4149 			{
4150 				EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
4151 			}
4152 		}
4153 		#endif
4154 
4155 		#if 0 /* REMOVE */
4156 		if(!pBtCoexist->bManualControl && !bWifiUnder5G)
4157 		{
4158 			if( (pCoexSta->btInfoExt&BIT3) )
4159 			{
4160 				if(bWifiConnected)
4161 				{
4162 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"));
4163 					halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE);
4164 				}
4165 			}
4166 			else
4167 			{
4168 				// BT already NOT ignore Wlan active, do nothing here.
4169 				if(!bWifiConnected)
4170 				{
4171 					RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT to ignore Wlan active!!\n"));
4172 					halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
4173 				}
4174 			}
4175 		}
4176 		#endif
4177 
4178 		#if 0 /* REMOVE */
4179 		if( (pCoexSta->btInfoExt & BIT4) )
4180 		{
4181 			// BT auto report already enabled, do nothing
4182 		}
4183 		else
4184 		{
4185 			halbtc8821aCsr2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE);
4186 		}
4187 		#endif
4188 	}
4189 
4190 	pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
4191 
4192 	if(btInfo == BT_INFO_8821A_CSR_2ANT_B_CONNECTION)	// connection exists but no busy
4193 	{
4194 		pCoexSta->bBtLinkExist = TRUE;
4195 		pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE;
4196 	}
4197 	else if(btInfo & BT_INFO_8821A_CSR_2ANT_B_CONNECTION)	// connection exists and some link is busy
4198 	{
4199 		pCoexSta->bBtLinkExist = TRUE;
4200 
4201 		if(btInfo & BT_INFO_8821A_CSR_2ANT_B_FTP)
4202 			pCoexSta->bPanExist = TRUE;
4203 		else
4204 			pCoexSta->bPanExist = FALSE;
4205 
4206 		if(btInfo & BT_INFO_8821A_CSR_2ANT_B_A2DP)
4207 			pCoexSta->bA2dpExist = TRUE;
4208 		else
4209 			pCoexSta->bA2dpExist = FALSE;
4210 
4211 		if(btInfo & BT_INFO_8821A_CSR_2ANT_B_HID)
4212 			pCoexSta->bHidExist = TRUE;
4213 		else
4214 			pCoexSta->bHidExist = FALSE;
4215 
4216 		if(btInfo & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO)
4217 			pCoexSta->bScoExist = TRUE;
4218 		else
4219 			pCoexSta->bScoExist = FALSE;
4220 
4221 		if (pCoexSta->btInfoExt & 0x80)
4222 			pCoexSta->bSlave = TRUE; //Slave
4223 		else
4224 			pCoexSta->bSlave = FALSE; //Master
4225 
4226 		pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
4227 	}
4228 	else
4229 	{
4230 		pCoexSta->bBtLinkExist = FALSE;
4231 		pCoexSta->bPanExist = FALSE;
4232 		pCoexSta->bA2dpExist = FALSE;
4233 		pCoexSta->bSlave = FALSE;
4234 		pCoexSta->bHidExist = FALSE;
4235 		pCoexSta->bScoExist = FALSE;
4236 		pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_IDLE;
4237 	}
4238 
4239 	if(bBtHsOn)
4240 	{
4241 		pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
4242 	}
4243 
4244 	if(btInfo & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE)
4245 	{
4246 		pCoexSta->bC2hBtInquiryPage = TRUE;
4247 		pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
4248 	}
4249 	else
4250 	{
4251 		pCoexSta->bC2hBtInquiryPage = FALSE;
4252 	}
4253 
4254 
4255 	if(BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus)
4256 	{
4257 		bBtBusy = TRUE;
4258 	}
4259 	else
4260 	{
4261 		bBtBusy = FALSE;
4262 	}
4263 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
4264 
4265 	if(BT_8821A_CSR_2ANT_BT_STATUS_IDLE != pCoexDm->btStatus)
4266 	{
4267 		bLimitedDig = TRUE;
4268 	}
4269 	else
4270 	{
4271 		bLimitedDig = FALSE;
4272 	}
4273 	pCoexDm->bLimitedDig = bLimitedDig;
4274 	pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
4275 
4276 	halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist);
4277 }
4278 
4279 VOID
EXhalbtc8821aCsr2ant_HaltNotify(IN PBTC_COEXIST pBtCoexist)4280 EXhalbtc8821aCsr2ant_HaltNotify(
4281 	IN	PBTC_COEXIST			pBtCoexist
4282 	)
4283 {
4284 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n"));
4285 
4286 	halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
4287 	EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
4288 }
4289 
4290 VOID
EXhalbtc8821aCsr2ant_PnpNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte pnpState)4291 EXhalbtc8821aCsr2ant_PnpNotify(
4292 	IN	PBTC_COEXIST			pBtCoexist,
4293 	IN	u1Byte				pnpState
4294 	)
4295 {
4296 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n"));
4297 
4298 	if(BTC_WIFI_PNP_SLEEP == pnpState)
4299 	{
4300 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n"));
4301 		halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
4302 	}
4303 	else if(BTC_WIFI_PNP_WAKE_UP == pnpState)
4304 	{
4305 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n"));
4306 	}
4307 }
4308 
4309 VOID
EXhalbtc8821aCsr2ant_Periodical(IN PBTC_COEXIST pBtCoexist)4310 EXhalbtc8821aCsr2ant_Periodical(
4311 	IN	PBTC_COEXIST			pBtCoexist
4312 	)
4313 {
4314 	static u1Byte		disVerInfoCnt=0;
4315 	u4Byte				fwVer=0, btPatchVer=0;
4316 	PBTC_BOARD_INFO		pBoardInfo=&pBtCoexist->boardInfo;
4317 	PBTC_STACK_INFO		pStackInfo=&pBtCoexist->stackInfo;
4318 
4319 	RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n"));
4320 
4321 	if(disVerInfoCnt <= 5)
4322 	{
4323 		disVerInfoCnt += 1;
4324 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n"));
4325 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
4326 			pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos));
4327 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n",
4328 			((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion));
4329 		pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
4330 		pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
4331 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
4332 			GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer));
4333 		RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n"));
4334 	}
4335 
4336 	//halbtc8821aCsr2ant_QueryBtInfo(pBtCoexist);
4337 	//halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist);
4338 	halbtc8821aCsr2ant_MonitorBtCtr(pBtCoexist);
4339 	halbtc8821aCsr2ant_MonitorBtEnableDisable(pBtCoexist);
4340 }
4341 
4342 
4343 #endif
4344 
4345