1 /* SPDX-License-Identifier: GPL-2.0 */
2 //============================================================
3 // Description:
4 //
5 // This file is for RTL8723B Co-exist mechanism
6 //
7 // History
8 // 2012/11/15 Cosa first check in.
9 //
10 //============================================================
11
12 //============================================================
13 // include files
14 //============================================================
15 #include "Mp_Precomp.h"
16
17 #if WPP_SOFTWARE_TRACE
18 #include "HalBtc8723b2Ant.tmh"
19 #endif
20
21 #if(BT_30_SUPPORT == 1)
22 //============================================================
23 // Global variables, these are static variables
24 //============================================================
25 static COEX_DM_8723B_2ANT GLCoexDm8723b2Ant;
26 static PCOEX_DM_8723B_2ANT pCoexDm=&GLCoexDm8723b2Ant;
27 static COEX_STA_8723B_2ANT GLCoexSta8723b2Ant;
28 static PCOEX_STA_8723B_2ANT pCoexSta=&GLCoexSta8723b2Ant;
29
30 const char *const GLBtInfoSrc8723b2Ant[]={
31 "BT Info[wifi fw]",
32 "BT Info[bt rsp]",
33 "BT Info[bt auto report]",
34 };
35
36 u4Byte GLCoexVerDate8723b2Ant=20150119;
37 u4Byte GLCoexVer8723b2Ant=0x44;
38
39 //============================================================
40 // local function proto type if needed
41 //============================================================
42 //============================================================
43 // local function start with halbtc8723b2ant_
44 //============================================================
45 u1Byte
halbtc8723b2ant_BtRssiState(u1Byte levelNum,u1Byte rssiThresh,u1Byte rssiThresh1)46 halbtc8723b2ant_BtRssiState(
47 u1Byte levelNum,
48 u1Byte rssiThresh,
49 u1Byte rssiThresh1
50 )
51 {
52 s4Byte btRssi=0;
53 u1Byte btRssiState=pCoexSta->preBtRssiState;
54
55 btRssi = pCoexSta->btRssi;
56
57 if(levelNum == 2)
58 {
59 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
60 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
61 {
62 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
63 {
64 btRssiState = BTC_RSSI_STATE_HIGH;
65 }
66 else
67 {
68 btRssiState = BTC_RSSI_STATE_STAY_LOW;
69 }
70 }
71 else
72 {
73 if(btRssi < rssiThresh)
74 {
75 btRssiState = BTC_RSSI_STATE_LOW;
76 }
77 else
78 {
79 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
80 }
81 }
82 }
83 else if(levelNum == 3)
84 {
85 if(rssiThresh > rssiThresh1)
86 {
87 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT Rssi thresh error!!\n"));
88 return pCoexSta->preBtRssiState;
89 }
90
91 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
92 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
93 {
94 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
95 {
96 btRssiState = BTC_RSSI_STATE_MEDIUM;
97 }
98 else
99 {
100 btRssiState = BTC_RSSI_STATE_STAY_LOW;
101 }
102 }
103 else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
104 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM))
105 {
106 if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
107 {
108 btRssiState = BTC_RSSI_STATE_HIGH;
109 }
110 else if(btRssi < rssiThresh)
111 {
112 btRssiState = BTC_RSSI_STATE_LOW;
113 }
114 else
115 {
116 btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
117 }
118 }
119 else
120 {
121 if(btRssi < rssiThresh1)
122 {
123 btRssiState = BTC_RSSI_STATE_MEDIUM;
124 }
125 else
126 {
127 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
128 }
129 }
130 }
131
132 pCoexSta->preBtRssiState = btRssiState;
133
134 return btRssiState;
135 }
136
137 u1Byte
halbtc8723b2ant_WifiRssiState(IN PBTC_COEXIST pBtCoexist,IN u1Byte index,IN u1Byte levelNum,IN u1Byte rssiThresh,IN u1Byte rssiThresh1)138 halbtc8723b2ant_WifiRssiState(
139 IN PBTC_COEXIST pBtCoexist,
140 IN u1Byte index,
141 IN u1Byte levelNum,
142 IN u1Byte rssiThresh,
143 IN u1Byte rssiThresh1
144 )
145 {
146 s4Byte wifiRssi=0;
147 u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index];
148
149 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
150
151 if(levelNum == 2)
152 {
153 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
154 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
155 {
156 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
157 {
158 wifiRssiState = BTC_RSSI_STATE_HIGH;
159 }
160 else
161 {
162 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
163 }
164 }
165 else
166 {
167 if(wifiRssi < rssiThresh)
168 {
169 wifiRssiState = BTC_RSSI_STATE_LOW;
170 }
171 else
172 {
173 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
174 }
175 }
176 }
177 else if(levelNum == 3)
178 {
179 if(rssiThresh > rssiThresh1)
180 {
181 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n"));
182 return pCoexSta->preWifiRssiState[index];
183 }
184
185 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
186 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
187 {
188 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
189 {
190 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
191 }
192 else
193 {
194 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
195 }
196 }
197 else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
198 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))
199 {
200 if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
201 {
202 wifiRssiState = BTC_RSSI_STATE_HIGH;
203 }
204 else if(wifiRssi < rssiThresh)
205 {
206 wifiRssiState = BTC_RSSI_STATE_LOW;
207 }
208 else
209 {
210 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
211 }
212 }
213 else
214 {
215 if(wifiRssi < rssiThresh1)
216 {
217 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
218 }
219 else
220 {
221 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
222 }
223 }
224 }
225
226 pCoexSta->preWifiRssiState[index] = wifiRssiState;
227
228 return wifiRssiState;
229 }
230
231 VOID
halbtc8723b2ant_MonitorBtEnableDisable(IN PBTC_COEXIST pBtCoexist)232 halbtc8723b2ant_MonitorBtEnableDisable(
233 IN PBTC_COEXIST pBtCoexist
234 )
235 {
236 static BOOLEAN bPreBtDisabled=FALSE;
237 static u4Byte btDisableCnt=0;
238 BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE;
239
240 // This function check if bt is disabled
241
242 if( pCoexSta->highPriorityTx == 0 &&
243 pCoexSta->highPriorityRx == 0 &&
244 pCoexSta->lowPriorityTx == 0 &&
245 pCoexSta->lowPriorityRx == 0)
246 {
247 bBtActive = FALSE;
248 }
249 if( pCoexSta->highPriorityTx == 0xffff &&
250 pCoexSta->highPriorityRx == 0xffff &&
251 pCoexSta->lowPriorityTx == 0xffff &&
252 pCoexSta->lowPriorityRx == 0xffff)
253 {
254 bBtActive = FALSE;
255 }
256 if(bBtActive)
257 {
258 btDisableCnt = 0;
259 bBtDisabled = FALSE;
260 }
261 else
262 {
263 btDisableCnt++;
264 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", btDisableCnt));
265 if(btDisableCnt >= 2)
266 {
267 bBtDisabled = TRUE;
268 }
269 }
270 if(bPreBtDisabled != bBtDisabled)
271 {
272 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", (bPreBtDisabled ? "disabled":"enabled"),
273 (bBtDisabled ? "disabled":"enabled")));
274
275 bPreBtDisabled = bBtDisabled;
276 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
277 if(bBtDisabled)
278 {
279 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL);
280 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
281 }
282 }
283 }
284
285
286 VOID
halbtc8723b2ant_LimitedRx(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bRejApAggPkt,IN BOOLEAN bBtCtrlAggBufSize,IN u1Byte aggBufSize)287 halbtc8723b2ant_LimitedRx(
288 IN PBTC_COEXIST pBtCoexist,
289 IN BOOLEAN bForceExec,
290 IN BOOLEAN bRejApAggPkt,
291 IN BOOLEAN bBtCtrlAggBufSize,
292 IN u1Byte aggBufSize
293 )
294 {
295 BOOLEAN bRejectRxAgg=bRejApAggPkt;
296 BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize;
297 u1Byte rxAggSize=aggBufSize;
298
299 //============================================
300 // Rx Aggregation related setting
301 //============================================
302 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
303 // decide BT control aggregation buf size or not
304 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
305 // aggregation buf size, only work when BT control Rx aggregation size.
306 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
307 // real update aggregation setting
308 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
309 }
310
311 VOID
halbtc8723b2ant_MonitorBtCtr(IN PBTC_COEXIST pBtCoexist)312 halbtc8723b2ant_MonitorBtCtr(
313 IN PBTC_COEXIST pBtCoexist
314 )
315 {
316 u4Byte regHPTxRx, regLPTxRx, u4Tmp;
317 u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0;
318 u1Byte u1Tmp;
319
320 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
321
322 regHPTxRx = 0x770;
323 regLPTxRx = 0x774;
324
325 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx);
326 regHPTx = u4Tmp & bMaskLWord;
327 regHPRx = (u4Tmp & bMaskHWord)>>16;
328
329 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx);
330 regLPTx = u4Tmp & bMaskLWord;
331 regLPRx = (u4Tmp & bMaskHWord)>>16;
332
333 pCoexSta->highPriorityTx = regHPTx;
334 pCoexSta->highPriorityRx = regHPRx;
335 pCoexSta->lowPriorityTx = regLPTx;
336 pCoexSta->lowPriorityRx = regLPRx;
337
338 if( (pCoexSta->lowPriorityTx > 1050) && (!pCoexSta->bC2hBtInquiryPage))
339 pCoexSta->popEventCnt++;
340
341 if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) )
342 {
343 pBtLinkInfo->bSlaveRole = TRUE;
344 }
345 else
346 {
347 pBtLinkInfo->bSlaveRole = FALSE;
348 }
349
350 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
351 regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx));
352 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
353 regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx));
354
355 // reset counter
356 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
357 }
358
359 VOID
halbtc8723b2ant_MonitorWiFiCtr(IN PBTC_COEXIST pBtCoexist)360 halbtc8723b2ant_MonitorWiFiCtr(
361 IN PBTC_COEXIST pBtCoexist
362 )
363 {
364 u4Byte u4Tmp;
365 u2Byte u2Tmp[3];
366 s4Byte wifiRssi=0;
367 BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE;
368 static u1Byte nCCKLockCounter = 0;
369
370
371 if (pCoexSta->bUnderIps)
372 {
373 pCoexSta->nCRCOK_CCK = 0;
374 pCoexSta->nCRCOK_11g = 0;
375 pCoexSta->nCRCOK_11n = 0;
376 pCoexSta->nCRCOK_11nAgg = 0;
377
378 pCoexSta->nCRCErr_CCK = 0;
379 pCoexSta->nCRCErr_11g = 0;
380 pCoexSta->nCRCErr_11n = 0;
381 pCoexSta->nCRCErr_11nAgg = 0;
382 }
383 else
384 {
385 pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88);
386 pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94);
387 pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90);
388 pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8);
389
390 pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84);
391 pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96);
392 pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92);
393 pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba);
394 }
395
396 //reset counter
397 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1);
398 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0);
399 }
400
401 VOID
halbtc8723b2ant_QueryBtInfo(IN PBTC_COEXIST pBtCoexist)402 halbtc8723b2ant_QueryBtInfo(
403 IN PBTC_COEXIST pBtCoexist
404 )
405 {
406 u1Byte H2C_Parameter[1] ={0};
407
408 pCoexSta->bC2hBtInfoReqSent = TRUE;
409
410 H2C_Parameter[0] |= BIT0; // trigger
411
412 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
413 H2C_Parameter[0]));
414
415 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
416 }
417
418 BOOLEAN
halbtc8723b2ant_IsWifiStatusChanged(IN PBTC_COEXIST pBtCoexist)419 halbtc8723b2ant_IsWifiStatusChanged(
420 IN PBTC_COEXIST pBtCoexist
421 )
422 {
423 static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE;
424 BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE;
425 BOOLEAN bWifiConnected=FALSE;
426 u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH;
427
428
429 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
430 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
431 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
432 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way);
433
434 if(bWifiConnected)
435 {
436 if(bWifiBusy != bPreWifiBusy)
437 {
438 bPreWifiBusy = bWifiBusy;
439 return TRUE;
440 }
441 if(bUnder4way != bPreUnder4way)
442 {
443 bPreUnder4way = bUnder4way;
444 return TRUE;
445 }
446 if(bBtHsOn != bPreBtHsOn)
447 {
448 bPreBtHsOn = bBtHsOn;
449 return TRUE;
450 }
451
452
453 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
454
455 if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState ))
456 {
457 return TRUE;
458 }
459
460 }
461
462 return FALSE;
463 }
464
465 VOID
halbtc8723b2ant_UpdateBtLinkInfo(IN PBTC_COEXIST pBtCoexist)466 halbtc8723b2ant_UpdateBtLinkInfo(
467 IN PBTC_COEXIST pBtCoexist
468 )
469 {
470 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
471 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
472 BOOLEAN bBtHsOn=FALSE;
473
474 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) // profile from bt patch
475 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
476
477 pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
478 pBtLinkInfo->bScoExist = pCoexSta->bScoExist;
479 pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist;
480 pBtLinkInfo->bPanExist = pCoexSta->bPanExist;
481 pBtLinkInfo->bHidExist = pCoexSta->bHidExist;
482
483 // work around for HS mode.
484 if(bBtHsOn)
485 {
486 pBtLinkInfo->bPanExist = TRUE;
487 pBtLinkInfo->bBtLinkExist = TRUE;
488 }
489 #else // profile from bt stack
490 pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist;
491 pBtLinkInfo->bScoExist = pStackInfo->bScoExist;
492 pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist;
493 pBtLinkInfo->bPanExist = pStackInfo->bPanExist;
494 pBtLinkInfo->bHidExist = pStackInfo->bHidExist;
495
496 //for win-8 stack HID report error
497 if(!pStackInfo->bHidExist)
498 pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack
499 // when stack HID report error, here we use the info from bt fw.
500 if(!pStackInfo->bBtLinkExist)
501 pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
502 #endif
503 // check if Sco only
504 if( pBtLinkInfo->bScoExist &&
505 !pBtLinkInfo->bA2dpExist &&
506 !pBtLinkInfo->bPanExist &&
507 !pBtLinkInfo->bHidExist )
508 pBtLinkInfo->bScoOnly = TRUE;
509 else
510 pBtLinkInfo->bScoOnly = FALSE;
511
512 // check if A2dp only
513 if( !pBtLinkInfo->bScoExist &&
514 pBtLinkInfo->bA2dpExist &&
515 !pBtLinkInfo->bPanExist &&
516 !pBtLinkInfo->bHidExist )
517 pBtLinkInfo->bA2dpOnly = TRUE;
518 else
519 pBtLinkInfo->bA2dpOnly = FALSE;
520
521 // check if Pan only
522 if( !pBtLinkInfo->bScoExist &&
523 !pBtLinkInfo->bA2dpExist &&
524 pBtLinkInfo->bPanExist &&
525 !pBtLinkInfo->bHidExist )
526 pBtLinkInfo->bPanOnly = TRUE;
527 else
528 pBtLinkInfo->bPanOnly = FALSE;
529
530 // check if Hid only
531 if( !pBtLinkInfo->bScoExist &&
532 !pBtLinkInfo->bA2dpExist &&
533 !pBtLinkInfo->bPanExist &&
534 pBtLinkInfo->bHidExist )
535 pBtLinkInfo->bHidOnly = TRUE;
536 else
537 pBtLinkInfo->bHidOnly = FALSE;
538 }
539
540 u1Byte
halbtc8723b2ant_ActionAlgorithm(IN PBTC_COEXIST pBtCoexist)541 halbtc8723b2ant_ActionAlgorithm(
542 IN PBTC_COEXIST pBtCoexist
543 )
544 {
545 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
546 BOOLEAN bBtHsOn=FALSE;
547 u1Byte algorithm=BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
548 u1Byte numOfDiffProfile=0;
549
550 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
551
552 if(!pBtLinkInfo->bBtLinkExist)
553 {
554 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No BT link exists!!!\n"));
555 return algorithm;
556 }
557
558 if(pBtLinkInfo->bScoExist)
559 numOfDiffProfile++;
560 if(pBtLinkInfo->bHidExist)
561 numOfDiffProfile++;
562 if(pBtLinkInfo->bPanExist)
563 numOfDiffProfile++;
564 if(pBtLinkInfo->bA2dpExist)
565 numOfDiffProfile++;
566
567 if(numOfDiffProfile == 1)
568 {
569 if(pBtLinkInfo->bScoExist)
570 {
571 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO only\n"));
572 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
573 }
574 else
575 {
576 if(pBtLinkInfo->bHidExist)
577 {
578 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n"));
579 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
580 }
581 else if(pBtLinkInfo->bA2dpExist)
582 {
583 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n"));
584 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
585 }
586 else if(pBtLinkInfo->bPanExist)
587 {
588 if(bBtHsOn)
589 {
590 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(HS) only\n"));
591 algorithm = BT_8723B_2ANT_COEX_ALGO_PANHS;
592 }
593 else
594 {
595 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN(EDR) only\n"));
596 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR;
597 }
598 }
599 }
600 }
601 else if(numOfDiffProfile == 2)
602 {
603 if(pBtLinkInfo->bScoExist)
604 {
605 if(pBtLinkInfo->bHidExist)
606 {
607 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID\n"));
608 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
609 }
610 else if(pBtLinkInfo->bA2dpExist)
611 {
612 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP ==> SCO\n"));
613 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
614 }
615 else if(pBtLinkInfo->bPanExist)
616 {
617 if(bBtHsOn)
618 {
619 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(HS)\n"));
620 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
621 }
622 else
623 {
624 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + PAN(EDR)\n"));
625 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
626 }
627 }
628 }
629 else
630 {
631 if( pBtLinkInfo->bHidExist &&
632 pBtLinkInfo->bA2dpExist )
633 {
634 #if 0
635 if(pStackInfo->numOfHid >= 2)
636 {
637 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID*2 + A2DP\n"));
638 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
639 }
640 else
641 #endif
642 {
643 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n"));
644 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
645 }
646 }
647 else if( pBtLinkInfo->bHidExist &&
648 pBtLinkInfo->bPanExist )
649 {
650 if(bBtHsOn)
651 {
652 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(HS)\n"));
653 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
654 }
655 else
656 {
657 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN(EDR)\n"));
658 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
659 }
660 }
661 else if( pBtLinkInfo->bPanExist &&
662 pBtLinkInfo->bA2dpExist )
663 {
664 if(bBtHsOn)
665 {
666 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(HS)\n"));
667 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
668 }
669 else
670 {
671 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP + PAN(EDR)\n"));
672 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
673 }
674 }
675 }
676 }
677 else if(numOfDiffProfile == 3)
678 {
679 if(pBtLinkInfo->bScoExist)
680 {
681 if( pBtLinkInfo->bHidExist &&
682 pBtLinkInfo->bA2dpExist )
683 {
684 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP ==> HID\n"));
685 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
686 }
687 else if( pBtLinkInfo->bHidExist &&
688 pBtLinkInfo->bPanExist )
689 {
690 if(bBtHsOn)
691 {
692 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(HS)\n"));
693 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
694 }
695 else
696 {
697 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + PAN(EDR)\n"));
698 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
699 }
700 }
701 else if( pBtLinkInfo->bPanExist &&
702 pBtLinkInfo->bA2dpExist )
703 {
704 if(bBtHsOn)
705 {
706 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(HS)\n"));
707 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
708 }
709 else
710 {
711 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"));
712 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
713 }
714 }
715 }
716 else
717 {
718 if( pBtLinkInfo->bHidExist &&
719 pBtLinkInfo->bPanExist &&
720 pBtLinkInfo->bA2dpExist )
721 {
722 if(bBtHsOn)
723 {
724 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(HS)\n"));
725 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
726 }
727 else
728 {
729 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP + PAN(EDR)\n"));
730 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
731 }
732 }
733 }
734 }
735 else if(numOfDiffProfile >= 3)
736 {
737 if(pBtLinkInfo->bScoExist)
738 {
739 if( pBtLinkInfo->bHidExist &&
740 pBtLinkInfo->bPanExist &&
741 pBtLinkInfo->bA2dpExist )
742 {
743 if(bBtHsOn)
744 {
745 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"));
746
747 }
748 else
749 {
750 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"));
751 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
752 }
753 }
754 }
755 }
756
757 return algorithm;
758 }
759
760 VOID
halbtc8723b2ant_SetFwDacSwingLevel(IN PBTC_COEXIST pBtCoexist,IN u1Byte dacSwingLvl)761 halbtc8723b2ant_SetFwDacSwingLevel(
762 IN PBTC_COEXIST pBtCoexist,
763 IN u1Byte dacSwingLvl
764 )
765 {
766 u1Byte H2C_Parameter[1] ={0};
767
768 // There are several type of dacswing
769 // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
770 H2C_Parameter[0] = dacSwingLvl;
771
772 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl));
773 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0]));
774
775 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
776 }
777
778 VOID
halbtc8723b2ant_SetFwDecBtPwr(IN PBTC_COEXIST pBtCoexist,IN u1Byte decBtPwrLvl)779 halbtc8723b2ant_SetFwDecBtPwr(
780 IN PBTC_COEXIST pBtCoexist,
781 IN u1Byte decBtPwrLvl
782 )
783 {
784 u1Byte H2C_Parameter[1] ={0};
785
786 H2C_Parameter[0] = decBtPwrLvl;
787
788 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n",
789 decBtPwrLvl, H2C_Parameter[0]));
790
791 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
792 }
793
794 VOID
halbtc8723b2ant_DecBtPwr(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte decBtPwrLvl)795 halbtc8723b2ant_DecBtPwr(
796 IN PBTC_COEXIST pBtCoexist,
797 IN BOOLEAN bForceExec,
798 IN u1Byte decBtPwrLvl
799 )
800 {
801 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s Dec BT power level = %d\n",
802 (bForceExec? "force to":""), decBtPwrLvl));
803 pCoexDm->curBtDecPwrLvl = decBtPwrLvl;
804
805 if(!bForceExec)
806 {
807 if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl)
808 return;
809 }
810 halbtc8723b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl);
811
812 pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl;
813 }
814
815 VOID
halbtc8723b2ant_SetBtAutoReport(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bEnableAutoReport)816 halbtc8723b2ant_SetBtAutoReport(
817 IN PBTC_COEXIST pBtCoexist,
818 IN BOOLEAN bEnableAutoReport
819 )
820 {
821 u1Byte H2C_Parameter[1] ={0};
822
823 H2C_Parameter[0] = 0;
824
825 if(bEnableAutoReport)
826 {
827 H2C_Parameter[0] |= BIT0;
828 }
829
830 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
831 (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0]));
832
833 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter);
834 }
835
836 VOID
halbtc8723b2ant_BtAutoReport(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bEnableAutoReport)837 halbtc8723b2ant_BtAutoReport(
838 IN PBTC_COEXIST pBtCoexist,
839 IN BOOLEAN bForceExec,
840 IN BOOLEAN bEnableAutoReport
841 )
842 {
843 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s BT Auto report = %s\n",
844 (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled")));
845 pCoexDm->bCurBtAutoReport = bEnableAutoReport;
846
847 if(!bForceExec)
848 {
849 if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport)
850 return;
851 }
852 halbtc8723b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport);
853
854 pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport;
855 }
856
857 VOID
halbtc8723b2ant_FwDacSwingLvl(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte fwDacSwingLvl)858 halbtc8723b2ant_FwDacSwingLvl(
859 IN PBTC_COEXIST pBtCoexist,
860 IN BOOLEAN bForceExec,
861 IN u1Byte fwDacSwingLvl
862 )
863 {
864 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set FW Dac Swing level = %d\n",
865 (bForceExec? "force to":""), fwDacSwingLvl));
866 pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
867
868 if(!bForceExec)
869 {
870 if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
871 return;
872 }
873
874 halbtc8723b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
875
876 pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
877 }
878
879 VOID
halbtc8723b2ant_SetSwRfRxLpfCorner(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bRxRfShrinkOn)880 halbtc8723b2ant_SetSwRfRxLpfCorner(
881 IN PBTC_COEXIST pBtCoexist,
882 IN BOOLEAN bRxRfShrinkOn
883 )
884 {
885 if(bRxRfShrinkOn)
886 {
887 //Shrink RF Rx LPF corner
888 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
889 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
890 }
891 else
892 {
893 //Resume RF Rx LPF corner
894 // After initialized, we can use pCoexDm->btRf0x1eBackup
895 if(pBtCoexist->bInitilized)
896 {
897 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
898 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
899 }
900 }
901 }
902
903 VOID
halbtc8723b2ant_RfShrink(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bRxRfShrinkOn)904 halbtc8723b2ant_RfShrink(
905 IN PBTC_COEXIST pBtCoexist,
906 IN BOOLEAN bForceExec,
907 IN BOOLEAN bRxRfShrinkOn
908 )
909 {
910 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
911 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
912 pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
913
914 if(!bForceExec)
915 {
916 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
917 return;
918 }
919 halbtc8723b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
920
921 pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
922 }
923
924 VOID
halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bLowPenaltyRa)925 halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(
926 IN PBTC_COEXIST pBtCoexist,
927 IN BOOLEAN bLowPenaltyRa
928 )
929 {
930 u1Byte H2C_Parameter[6] ={0};
931
932 H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty
933
934 if(bLowPenaltyRa)
935 {
936 H2C_Parameter[1] |= BIT0;
937 H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36
938 H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54
939 H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48
940 H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36
941 }
942
943 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set WiFi Low-Penalty Retry: %s",
944 (bLowPenaltyRa? "ON!!":"OFF!!")) );
945
946 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
947 }
948
949 VOID
halbtc8723b2ant_LowPenaltyRa(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bLowPenaltyRa)950 halbtc8723b2ant_LowPenaltyRa(
951 IN PBTC_COEXIST pBtCoexist,
952 IN BOOLEAN bForceExec,
953 IN BOOLEAN bLowPenaltyRa
954 )
955 {
956 //return;
957 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
958 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
959 pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
960
961 if(!bForceExec)
962 {
963 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
964 return;
965 }
966 halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
967
968 pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
969 }
970
971 VOID
halbtc8723b2ant_SetDacSwingReg(IN PBTC_COEXIST pBtCoexist,IN u4Byte level)972 halbtc8723b2ant_SetDacSwingReg(
973 IN PBTC_COEXIST pBtCoexist,
974 IN u4Byte level
975 )
976 {
977 u1Byte val=(u1Byte)level;
978
979 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Write SwDacSwing = 0x%x\n", level));
980 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val);
981 }
982
983 VOID
halbtc8723b2ant_SetSwFullTimeDacSwing(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bSwDacSwingOn,IN u4Byte swDacSwingLvl)984 halbtc8723b2ant_SetSwFullTimeDacSwing(
985 IN PBTC_COEXIST pBtCoexist,
986 IN BOOLEAN bSwDacSwingOn,
987 IN u4Byte swDacSwingLvl
988 )
989 {
990 if(bSwDacSwingOn)
991 {
992 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
993 }
994 else
995 {
996 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18);
997 }
998 }
999
1000
1001 VOID
halbtc8723b2ant_DacSwing(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bDacSwingOn,IN u4Byte dacSwingLvl)1002 halbtc8723b2ant_DacSwing(
1003 IN PBTC_COEXIST pBtCoexist,
1004 IN BOOLEAN bForceExec,
1005 IN BOOLEAN bDacSwingOn,
1006 IN u4Byte dacSwingLvl
1007 )
1008 {
1009 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",
1010 (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));
1011 pCoexDm->bCurDacSwingOn = bDacSwingOn;
1012 pCoexDm->curDacSwingLvl = dacSwingLvl;
1013
1014 if(!bForceExec)
1015 {
1016 if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
1017 (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )
1018 return;
1019 }
1020 delay_ms(30);
1021 halbtc8723b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
1022
1023 pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
1024 pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
1025 }
1026
1027 VOID
halbtc8723b2ant_SetAdcBackOff(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAdcBackOff)1028 halbtc8723b2ant_SetAdcBackOff(
1029 IN PBTC_COEXIST pBtCoexist,
1030 IN BOOLEAN bAdcBackOff
1031 )
1032 {
1033 if(bAdcBackOff)
1034 {
1035 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n"));
1036 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3);
1037 }
1038 else
1039 {
1040 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n"));
1041 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1);
1042 }
1043 }
1044
1045 VOID
halbtc8723b2ant_AdcBackOff(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bAdcBackOff)1046 halbtc8723b2ant_AdcBackOff(
1047 IN PBTC_COEXIST pBtCoexist,
1048 IN BOOLEAN bForceExec,
1049 IN BOOLEAN bAdcBackOff
1050 )
1051 {
1052 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n",
1053 (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));
1054 pCoexDm->bCurAdcBackOff = bAdcBackOff;
1055
1056 if(!bForceExec)
1057 {
1058 if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff)
1059 return;
1060 }
1061 halbtc8723b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);
1062
1063 pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;
1064 }
1065
1066 VOID
halbtc8723b2ant_SetAgcTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAgcTableEn)1067 halbtc8723b2ant_SetAgcTable(
1068 IN PBTC_COEXIST pBtCoexist,
1069 IN BOOLEAN bAgcTableEn
1070 )
1071 {
1072 u1Byte rssiAdjustVal=0;
1073
1074 //=================BB AGC Gain Table
1075 if(bAgcTableEn)
1076 {
1077 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table On!\n"));
1078 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001);
1079 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001);
1080 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001);
1081 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001);
1082 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001);
1083 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001);
1084 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001);
1085 }
1086 else
1087 {
1088 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB Agc Table Off!\n"));
1089 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001);
1090 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001);
1091 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001);
1092 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001);
1093 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001);
1094 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001);
1095 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
1096 }
1097
1098
1099 //=================RF Gain
1100 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
1101 if(bAgcTableEn)
1102 {
1103 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n"));
1104 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff);
1105 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe);
1106 }
1107 else
1108 {
1109 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n"));
1110 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3);
1111 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6);
1112 }
1113 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
1114
1115 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
1116 if(bAgcTableEn)
1117 {
1118 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n"));
1119 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff);
1120 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe);
1121 }
1122 else
1123 {
1124 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n"));
1125 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3);
1126 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6);
1127 }
1128 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
1129
1130 // set rssiAdjustVal for wifi module.
1131 if(bAgcTableEn)
1132 {
1133 rssiAdjustVal = 8;
1134 }
1135 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
1136 }
1137
1138 VOID
halbtc8723b2ant_AgcTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bAgcTableEn)1139 halbtc8723b2ant_AgcTable(
1140 IN PBTC_COEXIST pBtCoexist,
1141 IN BOOLEAN bForceExec,
1142 IN BOOLEAN bAgcTableEn
1143 )
1144 {
1145 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n",
1146 (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));
1147 pCoexDm->bCurAgcTableEn = bAgcTableEn;
1148
1149 if(!bForceExec)
1150 {
1151 if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
1152 return;
1153 }
1154 halbtc8723b2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
1155
1156 pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
1157 }
1158
1159 VOID
halbtc8723b2ant_SetCoexTable(IN PBTC_COEXIST pBtCoexist,IN u4Byte val0x6c0,IN u4Byte val0x6c4,IN u4Byte val0x6c8,IN u1Byte val0x6cc)1160 halbtc8723b2ant_SetCoexTable(
1161 IN PBTC_COEXIST pBtCoexist,
1162 IN u4Byte val0x6c0,
1163 IN u4Byte val0x6c4,
1164 IN u4Byte val0x6c8,
1165 IN u1Byte val0x6cc
1166 )
1167 {
1168 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0));
1169 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
1170
1171 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));
1172 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
1173
1174 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
1175 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
1176
1177 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
1178 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
1179 }
1180
1181 VOID
halbtc8723b2ant_CoexTable(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u4Byte val0x6c0,IN u4Byte val0x6c4,IN u4Byte val0x6c8,IN u1Byte val0x6cc)1182 halbtc8723b2ant_CoexTable(
1183 IN PBTC_COEXIST pBtCoexist,
1184 IN BOOLEAN bForceExec,
1185 IN u4Byte val0x6c0,
1186 IN u4Byte val0x6c4,
1187 IN u4Byte val0x6c8,
1188 IN u1Byte val0x6cc
1189 )
1190 {
1191 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
1192 (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc));
1193 pCoexDm->curVal0x6c0 = val0x6c0;
1194 pCoexDm->curVal0x6c4 = val0x6c4;
1195 pCoexDm->curVal0x6c8 = val0x6c8;
1196 pCoexDm->curVal0x6cc = val0x6cc;
1197
1198 if(!bForceExec)
1199 {
1200 if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
1201 (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
1202 (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
1203 (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
1204 return;
1205 }
1206 halbtc8723b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
1207
1208 pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
1209 pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
1210 pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
1211 pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
1212 }
1213
1214 VOID
halbtc8723b2ant_CoexTableWithType(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte type)1215 halbtc8723b2ant_CoexTableWithType(
1216 IN PBTC_COEXIST pBtCoexist,
1217 IN BOOLEAN bForceExec,
1218 IN u1Byte type
1219 )
1220 {
1221 pCoexSta->nCoexTableType = type;
1222
1223 switch(type)
1224 {
1225 case 0:
1226 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3);
1227 break;
1228 case 1:
1229 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3);
1230 break;
1231 case 2:
1232 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3);
1233 break;
1234 case 3:
1235 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
1236 break;
1237 case 4:
1238 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3);
1239 break;
1240 case 5:
1241 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3);
1242 break;
1243 case 6:
1244 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3);
1245 break;
1246 case 7:
1247 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1248 break;
1249 case 8:
1250 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1251 break;
1252 case 9:
1253 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1254 break;
1255 case 10:
1256 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1257 break;
1258 case 11:
1259 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1260 break;
1261 case 12:
1262 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
1263 break;
1264 case 13:
1265 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
1266 break;
1267 case 14:
1268 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
1269 break;
1270 case 15:
1271 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
1272 break;
1273 default:
1274 break;
1275 }
1276 }
1277
1278 VOID
halbtc8723b2ant_SetFwIgnoreWlanAct(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bEnable)1279 halbtc8723b2ant_SetFwIgnoreWlanAct(
1280 IN PBTC_COEXIST pBtCoexist,
1281 IN BOOLEAN bEnable
1282 )
1283 {
1284 u1Byte H2C_Parameter[1] ={0};
1285
1286 if(bEnable)
1287 {
1288 H2C_Parameter[0] |= BIT0; // function enable
1289 }
1290
1291 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
1292 H2C_Parameter[0]));
1293
1294 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
1295 }
1296
1297 VOID
halbtc8723b2ant_SetLpsRpwm(IN PBTC_COEXIST pBtCoexist,IN u1Byte lpsVal,IN u1Byte rpwmVal)1298 halbtc8723b2ant_SetLpsRpwm(
1299 IN PBTC_COEXIST pBtCoexist,
1300 IN u1Byte lpsVal,
1301 IN u1Byte rpwmVal
1302 )
1303 {
1304 u1Byte lps=lpsVal;
1305 u1Byte rpwm=rpwmVal;
1306
1307 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps);
1308 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
1309 }
1310
1311 VOID
halbtc8723b2ant_LpsRpwm(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN u1Byte lpsVal,IN u1Byte rpwmVal)1312 halbtc8723b2ant_LpsRpwm(
1313 IN PBTC_COEXIST pBtCoexist,
1314 IN BOOLEAN bForceExec,
1315 IN u1Byte lpsVal,
1316 IN u1Byte rpwmVal
1317 )
1318 {
1319 BOOLEAN bForceExecPwrCmd=FALSE;
1320
1321 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n",
1322 (bForceExec? "force to":""), lpsVal, rpwmVal));
1323 pCoexDm->curLps = lpsVal;
1324 pCoexDm->curRpwm = rpwmVal;
1325
1326 if(!bForceExec)
1327 {
1328 if( (pCoexDm->preLps == pCoexDm->curLps) &&
1329 (pCoexDm->preRpwm == pCoexDm->curRpwm) )
1330 {
1331 return;
1332 }
1333 }
1334 halbtc8723b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal);
1335
1336 pCoexDm->preLps = pCoexDm->curLps;
1337 pCoexDm->preRpwm = pCoexDm->curRpwm;
1338 }
1339
1340 VOID
halbtc8723b2ant_IgnoreWlanAct(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bEnable)1341 halbtc8723b2ant_IgnoreWlanAct(
1342 IN PBTC_COEXIST pBtCoexist,
1343 IN BOOLEAN bForceExec,
1344 IN BOOLEAN bEnable
1345 )
1346 {
1347 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Ignore WlanAct %s\n",
1348 (bForceExec? "force to":""), (bEnable? "ON":"OFF")));
1349 pCoexDm->bCurIgnoreWlanAct = bEnable;
1350
1351 if(!bForceExec)
1352 {
1353 if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
1354 return;
1355 }
1356 halbtc8723b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
1357
1358 pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
1359 }
1360
1361 VOID
halbtc8723b2ant_SetFwPstdma(IN PBTC_COEXIST pBtCoexist,IN u1Byte byte1,IN u1Byte byte2,IN u1Byte byte3,IN u1Byte byte4,IN u1Byte byte5)1362 halbtc8723b2ant_SetFwPstdma(
1363 IN PBTC_COEXIST pBtCoexist,
1364 IN u1Byte byte1,
1365 IN u1Byte byte2,
1366 IN u1Byte byte3,
1367 IN u1Byte byte4,
1368 IN u1Byte byte5
1369 )
1370 {
1371 u1Byte H2C_Parameter[5] ={0};
1372
1373
1374 if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) )
1375 {
1376 byte5 = byte5 | 0x1;
1377 }
1378
1379 H2C_Parameter[0] = byte1;
1380 H2C_Parameter[1] = byte2;
1381 H2C_Parameter[2] = byte3;
1382 H2C_Parameter[3] = byte4;
1383 H2C_Parameter[4] = byte5;
1384
1385 pCoexDm->psTdmaPara[0] = byte1;
1386 pCoexDm->psTdmaPara[1] = byte2;
1387 pCoexDm->psTdmaPara[2] = byte3;
1388 pCoexDm->psTdmaPara[3] = byte4;
1389 pCoexDm->psTdmaPara[4] = byte5;
1390
1391 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
1392 H2C_Parameter[0],
1393 H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4]));
1394
1395 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
1396 }
1397
1398 VOID
halbtc8723b2ant_SwMechanism1(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bShrinkRxLPF,IN BOOLEAN bLowPenaltyRA,IN BOOLEAN bLimitedDIG,IN BOOLEAN bBTLNAConstrain)1399 halbtc8723b2ant_SwMechanism1(
1400 IN PBTC_COEXIST pBtCoexist,
1401 IN BOOLEAN bShrinkRxLPF,
1402 IN BOOLEAN bLowPenaltyRA,
1403 IN BOOLEAN bLimitedDIG,
1404 IN BOOLEAN bBTLNAConstrain
1405 )
1406 {
1407 /*
1408 u4Byte wifiBw;
1409
1410 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1411
1412 if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40
1413 {
1414 if (bShrinkRxLPF)
1415 bShrinkRxLPF = FALSE;
1416 }
1417 */
1418
1419 //halbtc8723b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
1420 halbtc8723b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
1421 }
1422
1423 VOID
halbtc8723b2ant_SwMechanism2(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bAGCTableShift,IN BOOLEAN bADCBackOff,IN BOOLEAN bSWDACSwing,IN u4Byte dacSwingLvl)1424 halbtc8723b2ant_SwMechanism2(
1425 IN PBTC_COEXIST pBtCoexist,
1426 IN BOOLEAN bAGCTableShift,
1427 IN BOOLEAN bADCBackOff,
1428 IN BOOLEAN bSWDACSwing,
1429 IN u4Byte dacSwingLvl
1430 )
1431 {
1432 //halbtc8723b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
1433 //halbtc8723b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff);
1434 //halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
1435 }
1436
1437 VOID
halbtc8723b2ant_SetAntPath(IN PBTC_COEXIST pBtCoexist,IN u1Byte antPosType,IN BOOLEAN bInitHwCfg,IN BOOLEAN bWifiOff)1438 halbtc8723b2ant_SetAntPath(
1439 IN PBTC_COEXIST pBtCoexist,
1440 IN u1Byte antPosType,
1441 IN BOOLEAN bInitHwCfg,
1442 IN BOOLEAN bWifiOff
1443 )
1444 {
1445 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
1446 u4Byte fwVer=0, u4Tmp=0;
1447 BOOLEAN bPgExtSwitch=FALSE;
1448 BOOLEAN bUseExtSwitch=FALSE;
1449 u1Byte H2C_Parameter[2] ={0};
1450
1451 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch);
1452 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver
1453
1454 if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch)
1455 bUseExtSwitch = TRUE;
1456
1457 if(bInitHwCfg)
1458 {
1459 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1);
1460 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff);
1461 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3);
1462 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77);
1463 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
1464
1465 if(fwVer >= 0x180000)
1466 {
1467 /* Use H2C to set GNT_BT to High to avoid A2DP click */
1468 H2C_Parameter[0] = 1;
1469 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
1470 }
1471 else
1472 {
1473 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
1474 }
1475
1476 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
1477
1478 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off
1479 //remove due to interrupt is disabled that polling c2h will fail and delay 100ms.
1480 //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off
1481
1482 if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT)
1483 {
1484 //tell firmware "no antenna inverse"
1485 H2C_Parameter[0] = 0;
1486 }
1487 else
1488 {
1489 //tell firmware "antenna inverse"
1490 H2C_Parameter[0] = 1;
1491 }
1492
1493 if (bUseExtSwitch)
1494 {
1495 //ext switch type
1496 H2C_Parameter[1] = 1;
1497 }
1498 else
1499 {
1500 //int switch type
1501 H2C_Parameter[1] = 0;
1502 }
1503 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
1504 }
1505 else
1506 {
1507 if(fwVer >= 0x180000)
1508 {
1509 /* Use H2C to set GNT_BT to "Control by PTA"*/
1510 H2C_Parameter[0] = 0;
1511 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
1512 }
1513 else
1514 {
1515 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0);
1516 }
1517 }
1518
1519 // ext switch setting
1520 if(bUseExtSwitch)
1521 {
1522 if (bInitHwCfg)
1523 {
1524 // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT
1525 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1526 u4Tmp &=~BIT23;
1527 u4Tmp |= BIT24;
1528 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1529 }
1530
1531 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT
1532 switch(antPosType)
1533 {
1534 case BTC_ANT_WIFI_AT_MAIN:
1535 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi
1536 break;
1537 case BTC_ANT_WIFI_AT_AUX:
1538 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi
1539 break;
1540 }
1541 }
1542 else // internal switch
1543 {
1544 if (bInitHwCfg)
1545 {
1546 // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT
1547 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1548 u4Tmp |= BIT23;
1549 u4Tmp &=~BIT24;
1550 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1551 }
1552
1553 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux
1554 switch(antPosType)
1555 {
1556 case BTC_ANT_WIFI_AT_MAIN:
1557 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT
1558 break;
1559 case BTC_ANT_WIFI_AT_AUX:
1560 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT
1561 break;
1562 }
1563 }
1564 }
1565
1566 VOID
halbtc8723b2ant_PsTdma(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bForceExec,IN BOOLEAN bTurnOn,IN u1Byte type)1567 halbtc8723b2ant_PsTdma(
1568 IN PBTC_COEXIST pBtCoexist,
1569 IN BOOLEAN bForceExec,
1570 IN BOOLEAN bTurnOn,
1571 IN u1Byte type
1572 )
1573 {
1574 BOOLEAN bTurnOnByCnt=FALSE;
1575 u1Byte psTdmaTypeByCnt=0;
1576 u1Byte wifiRssiState1, btRssiState;
1577 s1Byte nWiFiDurationAdjust = 0x0;
1578 u1Byte psTdmaByte4Modify = 0x0;
1579 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
1580
1581
1582 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
1583 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
1584
1585 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], %s turn %s PS TDMA, type=%d\n",
1586 (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type));
1587 pCoexDm->bCurPsTdmaOn = bTurnOn;
1588 pCoexDm->curPsTdma = type;
1589
1590 if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn)
1591 {
1592 type = type +100; //for WiFi RSSI low or BT RSSI low
1593 pCoexDm->bIsSwitchTo1dot5Ant = TRUE;
1594 }
1595 else
1596 {
1597 pCoexDm->bIsSwitchTo1dot5Ant = FALSE;
1598 }
1599
1600
1601 if(!bForceExec)
1602 {
1603 if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
1604 (pCoexDm->prePsTdma == pCoexDm->curPsTdma) )
1605 return;
1606 }
1607
1608 if (pCoexSta->nScanAPNum <= 5)
1609 {
1610 if (pCoexSta->nA2DPBitPool >= 45)
1611 nWiFiDurationAdjust = -15;
1612 else if (pCoexSta->nA2DPBitPool >= 35)
1613 nWiFiDurationAdjust = -10;
1614 else
1615 nWiFiDurationAdjust = 5;
1616 }
1617 else if (pCoexSta->nScanAPNum <= 20)
1618 {
1619 if (pCoexSta->nA2DPBitPool >= 45)
1620 nWiFiDurationAdjust = -15;
1621 else if (pCoexSta->nA2DPBitPool >= 35)
1622 nWiFiDurationAdjust = -10;
1623 else
1624 nWiFiDurationAdjust = 0;
1625 }
1626 else if (pCoexSta->nScanAPNum <= 40)
1627 {
1628 if (pCoexSta->nA2DPBitPool >= 45)
1629 nWiFiDurationAdjust = -15;
1630 else if (pCoexSta->nA2DPBitPool >= 35)
1631 nWiFiDurationAdjust = -10;
1632 else
1633 nWiFiDurationAdjust = -5;
1634 }
1635 else
1636 {
1637 if (pCoexSta->nA2DPBitPool >= 45)
1638 nWiFiDurationAdjust = -15;
1639 else if (pCoexSta->nA2DPBitPool >= 35)
1640 nWiFiDurationAdjust = -10;
1641 else
1642 nWiFiDurationAdjust = -10;
1643 }
1644
1645 if ( (pBtLinkInfo->bSlaveRole == TRUE) && (pBtLinkInfo->bA2dpExist) )
1646 psTdmaByte4Modify = 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts)
1647
1648
1649 if(bTurnOn)
1650 {
1651 switch(type)
1652 {
1653 case 1:
1654 default:
1655 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify);
1656 break;
1657 case 2:
1658 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify);
1659 break;
1660 case 3:
1661 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90|psTdmaByte4Modify);
1662 break;
1663 case 4:
1664 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90|psTdmaByte4Modify);
1665 break;
1666 case 5:
1667 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1668 break;
1669 case 6:
1670 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1671 break;
1672 case 7:
1673 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1674 break;
1675 case 8:
1676 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1677 break;
1678 case 9:
1679 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify);
1680 break;
1681 case 10:
1682 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x03, 0xf1, 0x90|psTdmaByte4Modify);
1683 break;
1684 case 11:
1685 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90|psTdmaByte4Modify);
1686 break;
1687 case 12:
1688 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90|psTdmaByte4Modify);
1689 break;
1690 case 13:
1691 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1692 break;
1693 case 14:
1694 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d+nWiFiDurationAdjust, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1695 break;
1696 case 15:
1697 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1698 break;
1699 case 16:
1700 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90|psTdmaByte4Modify);
1701 break;
1702 case 17:
1703 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90);
1704 break;
1705 case 18:
1706 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1707 break;
1708 case 19:
1709 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
1710 break;
1711 case 20:
1712 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
1713 break;
1714 case 21:
1715 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
1716 break;
1717 case 71:
1718 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c+nWiFiDurationAdjust, 0x03, 0xf1, 0x90);
1719 break;
1720 case 101:
1721 case 105:
1722 case 171:
1723 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a+nWiFiDurationAdjust, 0x03, 0x70, 0x50|psTdmaByte4Modify);
1724 break;
1725 case 102:
1726 case 106:
1727 case 110:
1728 case 114:
1729 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d+nWiFiDurationAdjust, 0x03, 0x70, 0x50|psTdmaByte4Modify);
1730 break;
1731 case 103:
1732 case 107:
1733 case 111:
1734 case 115:
1735 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50|psTdmaByte4Modify);
1736 break;
1737 case 104:
1738 case 108:
1739 case 112:
1740 case 116:
1741 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50|psTdmaByte4Modify);
1742 break;
1743 case 109:
1744 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90|psTdmaByte4Modify);
1745 break;
1746 case 113:
1747 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90|psTdmaByte4Modify);
1748 break;
1749 case 121:
1750 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90|psTdmaByte4Modify);
1751 break;
1752 case 22:
1753 case 122:
1754 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11);
1755 break;
1756 }
1757 }
1758 else
1759 {
1760 // disable PS tdma
1761 switch(type)
1762 {
1763 case 0:
1764 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1765 break;
1766 case 1:
1767 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0);
1768 break;
1769 default:
1770 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1771 break;
1772 }
1773 }
1774
1775 // update pre state
1776 pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
1777 pCoexDm->prePsTdma = pCoexDm->curPsTdma;
1778 }
1779
1780 VOID
halbtc8723b2ant_PsTdmaCheckForPowerSaveState(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bNewPsState)1781 halbtc8723b2ant_PsTdmaCheckForPowerSaveState(
1782 IN PBTC_COEXIST pBtCoexist,
1783 IN BOOLEAN bNewPsState
1784 )
1785 {
1786 u1Byte lpsMode=0x0;
1787
1788 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode);
1789
1790 if(lpsMode) // already under LPS state
1791 {
1792 if(bNewPsState)
1793 {
1794 // keep state under LPS, do nothing.
1795 }
1796 else
1797 {
1798 // will leave LPS state, turn off psTdma first
1799 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1800 }
1801 }
1802 else // NO PS state
1803 {
1804 if(bNewPsState)
1805 {
1806 // will enter LPS state, turn off psTdma first
1807 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1808 }
1809 else
1810 {
1811 // keep state under NO PS state, do nothing.
1812 }
1813 }
1814 }
1815
1816 VOID
halbtc8723b2ant_PowerSaveState(IN PBTC_COEXIST pBtCoexist,IN u1Byte psType,IN u1Byte lpsVal,IN u1Byte rpwmVal)1817 halbtc8723b2ant_PowerSaveState(
1818 IN PBTC_COEXIST pBtCoexist,
1819 IN u1Byte psType,
1820 IN u1Byte lpsVal,
1821 IN u1Byte rpwmVal
1822 )
1823 {
1824 BOOLEAN bLowPwrDisable=FALSE;
1825
1826 switch(psType)
1827 {
1828 case BTC_PS_WIFI_NATIVE:
1829 // recover to original 32k low power setting
1830 bLowPwrDisable = FALSE;
1831 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1832 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
1833 pCoexSta->bForceLpsOn = FALSE;
1834 break;
1835 case BTC_PS_LPS_ON:
1836 halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE);
1837 halbtc8723b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal);
1838 // when coex force to enter LPS, do not enter 32k low power.
1839 bLowPwrDisable = TRUE;
1840 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1841 // power save must executed before psTdma.
1842 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL);
1843 pCoexSta->bForceLpsOn = TRUE;
1844 break;
1845 case BTC_PS_LPS_OFF:
1846 halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE);
1847 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL);
1848 pCoexSta->bForceLpsOn = FALSE;
1849 break;
1850 default:
1851 break;
1852 }
1853 }
1854
1855
1856 VOID
halbtc8723b2ant_CoexAllOff(IN PBTC_COEXIST pBtCoexist)1857 halbtc8723b2ant_CoexAllOff(
1858 IN PBTC_COEXIST pBtCoexist
1859 )
1860 {
1861 // fw all off
1862 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1863 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1864 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1865 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1866
1867 // sw all off
1868 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1869 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1870
1871 // hw all off
1872 //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1873 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1874 }
1875
1876 VOID
halbtc8723b2ant_InitCoexDm(IN PBTC_COEXIST pBtCoexist)1877 halbtc8723b2ant_InitCoexDm(
1878 IN PBTC_COEXIST pBtCoexist
1879 )
1880 {
1881 // force to reset coex mechanism
1882 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1883
1884 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1885 halbtc8723b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1);
1886 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1887 halbtc8723b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0);
1888
1889 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1890 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1891
1892 pCoexSta->popEventCnt = 0;
1893
1894 }
1895
1896 VOID
halbtc8723b2ant_ActionBtInquiry(IN PBTC_COEXIST pBtCoexist)1897 halbtc8723b2ant_ActionBtInquiry(
1898 IN PBTC_COEXIST pBtCoexist
1899 )
1900 {
1901 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
1902 BOOLEAN bWifiConnected=FALSE;
1903 BOOLEAN bLowPwrDisable=TRUE;
1904 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
1905
1906
1907 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1908 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
1909 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
1910
1911 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1912 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1913
1914 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
1915 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
1916 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
1917
1918
1919 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1920
1921 if(bScan || bLink || bRoam)
1922 {
1923 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi link process + BT Inq/Page!!\n"));
1924 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
1925 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
1926 }
1927 else if(bWifiConnected)
1928 {
1929 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT Inq/Page!!\n"));
1930 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
1931 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
1932 }
1933 else
1934 {
1935 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n"));
1936 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1937 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
1938 }
1939
1940 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1941 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1942
1943 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1944 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1945 /*
1946 pCoexDm->bNeedRecover0x948 = TRUE;
1947 pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
1948
1949 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE);
1950 */
1951 }
1952
1953
1954 VOID
halbtc8723b2ant_ActionWiFiLinkProcess(IN PBTC_COEXIST pBtCoexist)1955 halbtc8723b2ant_ActionWiFiLinkProcess(
1956 IN PBTC_COEXIST pBtCoexist
1957 )
1958 {
1959 u4Byte u4Tmp;
1960 u1Byte u1Tmpa, u1Tmpb;
1961
1962 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
1963 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
1964
1965 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
1966 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
1967
1968
1969 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
1970 u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
1971 u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e);
1972
1973 RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
1974 u4Tmp, u1Tmpa, u1Tmpb));
1975 }
1976
1977 BOOLEAN
halbtc8723b2ant_ActionWifiIdleProcess(IN PBTC_COEXIST pBtCoexist)1978 halbtc8723b2ant_ActionWifiIdleProcess(
1979 IN PBTC_COEXIST pBtCoexist
1980 )
1981 {
1982 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
1983 u4Byte wifiBw;
1984 u1Byte apNum=0;
1985
1986 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1987 //wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
1988 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0);
1989 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
1990
1991 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
1992
1993 // define the office environment
1994 if(BTC_RSSI_HIGH(wifiRssiState1) &&
1995 (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE))
1996 {
1997
1998 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n"));
1999
2000 halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6);
2001 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2002
2003 // sw all off
2004 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
2005 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2006
2007 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2008
2009 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2010 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
2011
2012 return TRUE;
2013 }
2014 else
2015 {
2016 halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
2017 return FALSE;
2018 }
2019
2020
2021 }
2022
2023
2024
2025 BOOLEAN
halbtc8723b2ant_IsCommonAction(IN PBTC_COEXIST pBtCoexist)2026 halbtc8723b2ant_IsCommonAction(
2027 IN PBTC_COEXIST pBtCoexist
2028 )
2029 {
2030 u1Byte btRssiState=BTC_RSSI_STATE_HIGH;
2031 BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE;
2032 BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE;
2033 BOOLEAN bAsus8723b=FALSE;
2034
2035 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
2036 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
2037 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
2038
2039 if(!bWifiConnected)
2040 {
2041 bLowPwrDisable = FALSE;
2042 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2043 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
2044
2045 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi non-connected idle!!\n"));
2046
2047 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2048 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2049
2050 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2051 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
2052 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2053 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2054
2055 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
2056 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2057
2058 bCommon = TRUE;
2059 }
2060 else
2061 {
2062 if(BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)
2063 {
2064 bLowPwrDisable = FALSE;
2065 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2066 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
2067
2068 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT non connected-idle!!\n"));
2069
2070 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2071 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2072
2073 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2074 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
2075 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
2076 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2077
2078 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
2079 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2080
2081 bCommon = TRUE;
2082 }
2083 else if(BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)
2084 {
2085 bLowPwrDisable = TRUE;
2086 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2087
2088 if(bBtHsOn)
2089 return FALSE;
2090 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi connected + BT connected-idle!!\n"));
2091 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
2092
2093 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2094 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2095
2096 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
2097 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
2098 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
2099 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2100
2101 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
2102 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
2103
2104 bCommon = TRUE;
2105 }
2106 else
2107 {
2108 bLowPwrDisable = TRUE;
2109 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
2110
2111 if(bWifiBusy)
2112 {
2113 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n"));
2114 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8723B, &bAsus8723b);
2115 if(!bAsus8723b)
2116 bCommon = FALSE;
2117 else
2118 bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist);
2119 }
2120 else
2121 {
2122 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n"));
2123 //bCommon = FALSE;
2124 bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist);
2125 }
2126 }
2127 }
2128
2129 return bCommon;
2130 }
2131 VOID
halbtc8723b2ant_TdmaDurationAdjust(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bScoHid,IN BOOLEAN bTxPause,IN u1Byte maxInterval)2132 halbtc8723b2ant_TdmaDurationAdjust(
2133 IN PBTC_COEXIST pBtCoexist,
2134 IN BOOLEAN bScoHid,
2135 IN BOOLEAN bTxPause,
2136 IN u1Byte maxInterval
2137 )
2138 {
2139 static s4Byte up,dn,m,n,WaitCount;
2140 s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration
2141 u1Byte retryCount=0;
2142
2143 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TdmaDurationAdjust()\n"));
2144
2145 if(!pCoexDm->bAutoTdmaAdjust)
2146 {
2147 pCoexDm->bAutoTdmaAdjust = TRUE;
2148 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], first run TdmaDurationAdjust()!!\n"));
2149 {
2150 if(bScoHid)
2151 {
2152 if(bTxPause)
2153 {
2154 if(maxInterval == 1)
2155 {
2156 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2157 pCoexDm->psTdmaDuAdjType = 13;
2158 }
2159 else if(maxInterval == 2)
2160 {
2161 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2162 pCoexDm->psTdmaDuAdjType = 14;
2163 }
2164 else if(maxInterval == 3)
2165 {
2166 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2167 pCoexDm->psTdmaDuAdjType = 15;
2168 }
2169 else
2170 {
2171 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2172 pCoexDm->psTdmaDuAdjType = 15;
2173 }
2174 }
2175 else
2176 {
2177 if(maxInterval == 1)
2178 {
2179 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2180 pCoexDm->psTdmaDuAdjType = 9;
2181 }
2182 else if(maxInterval == 2)
2183 {
2184 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2185 pCoexDm->psTdmaDuAdjType = 10;
2186 }
2187 else if(maxInterval == 3)
2188 {
2189 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2190 pCoexDm->psTdmaDuAdjType = 11;
2191 }
2192 else
2193 {
2194 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2195 pCoexDm->psTdmaDuAdjType = 11;
2196 }
2197 }
2198 }
2199 else
2200 {
2201 if(bTxPause)
2202 {
2203 if(maxInterval == 1)
2204 {
2205 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2206 pCoexDm->psTdmaDuAdjType = 5;
2207 }
2208 else if(maxInterval == 2)
2209 {
2210 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2211 pCoexDm->psTdmaDuAdjType = 6;
2212 }
2213 else if(maxInterval == 3)
2214 {
2215 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2216 pCoexDm->psTdmaDuAdjType = 7;
2217 }
2218 else
2219 {
2220 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2221 pCoexDm->psTdmaDuAdjType = 7;
2222 }
2223 }
2224 else
2225 {
2226 if(maxInterval == 1)
2227 {
2228 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2229 pCoexDm->psTdmaDuAdjType = 1;
2230 }
2231 else if(maxInterval == 2)
2232 {
2233 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2234 pCoexDm->psTdmaDuAdjType = 2;
2235 }
2236 else if(maxInterval == 3)
2237 {
2238 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2239 pCoexDm->psTdmaDuAdjType = 3;
2240 }
2241 else
2242 {
2243 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2244 pCoexDm->psTdmaDuAdjType = 3;
2245 }
2246 }
2247 }
2248 }
2249 //============
2250 up = 0;
2251 dn = 0;
2252 m = 1;
2253 n= 3;
2254 result = 0;
2255 WaitCount = 0;
2256 }
2257 else
2258 {
2259 //accquire the BT TRx retry count from BT_Info byte2
2260 retryCount = pCoexSta->btRetryCnt;
2261
2262 if ( (pCoexSta->lowPriorityTx) > 1050 || (pCoexSta->lowPriorityRx) > 1250 )
2263 retryCount++;
2264
2265 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], retryCount = %d\n", retryCount));
2266 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n",
2267 up, dn, m, n, WaitCount));
2268 result = 0;
2269 WaitCount++;
2270
2271 if(retryCount == 0) // no retry in the last 2-second duration
2272 {
2273 up++;
2274 dn--;
2275
2276 if (dn <= 0)
2277 dn = 0;
2278
2279 if(up >= n) // if �s�� n ��2�� retry count��0, �h�ռeWiFi duration
2280 {
2281 WaitCount = 0;
2282 n = 3;
2283 up = 0;
2284 dn = 0;
2285 result = 1;
2286 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Increase wifi duration!!\n"));
2287 }
2288 }
2289 else if (retryCount <= 3) // <=3 retry in the last 2-second duration
2290 {
2291 up--;
2292 dn++;
2293
2294 if (up <= 0)
2295 up = 0;
2296
2297 if (dn == 2) // if �s�� 2 ��2�� retry count< 3, �h�կ�WiFi duration
2298 {
2299 if (WaitCount <= 2)
2300 m++; // �קK�@���b���level���Ӧ^
2301 else
2302 m = 1;
2303
2304 if ( m >= 20) //m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration.
2305 m = 20;
2306
2307 n = 3*m;
2308 up = 0;
2309 dn = 0;
2310 WaitCount = 0;
2311 result = -1;
2312 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
2313 }
2314 }
2315 else //retry count > 3, �u�n1�� retry count > 3, �h�կ�WiFi duration
2316 {
2317 if (WaitCount == 1)
2318 m++; // �קK�@���b���level���Ӧ^
2319 else
2320 m = 1;
2321
2322 if ( m >= 20) //m �̤j�� = 20 ' �̤j120�� recheck�O�_�վ� WiFi duration.
2323 m = 20;
2324
2325 n = 3*m;
2326 up = 0;
2327 dn = 0;
2328 WaitCount = 0;
2329 result = -1;
2330 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n"));
2331 }
2332
2333 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], max Interval = %d\n", maxInterval));
2334 if(maxInterval == 1)
2335 {
2336 if(bTxPause)
2337 {
2338 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2339
2340 if(pCoexDm->curPsTdma == 71)
2341 {
2342 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2343 pCoexDm->psTdmaDuAdjType = 5;
2344 }
2345 else if(pCoexDm->curPsTdma == 1)
2346 {
2347 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2348 pCoexDm->psTdmaDuAdjType = 5;
2349 }
2350 else if(pCoexDm->curPsTdma == 2)
2351 {
2352 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2353 pCoexDm->psTdmaDuAdjType = 6;
2354 }
2355 else if(pCoexDm->curPsTdma == 3)
2356 {
2357 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2358 pCoexDm->psTdmaDuAdjType = 7;
2359 }
2360 else if(pCoexDm->curPsTdma == 4)
2361 {
2362 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2363 pCoexDm->psTdmaDuAdjType = 8;
2364 }
2365 if(pCoexDm->curPsTdma == 9)
2366 {
2367 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2368 pCoexDm->psTdmaDuAdjType = 13;
2369 }
2370 else if(pCoexDm->curPsTdma == 10)
2371 {
2372 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2373 pCoexDm->psTdmaDuAdjType = 14;
2374 }
2375 else if(pCoexDm->curPsTdma == 11)
2376 {
2377 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2378 pCoexDm->psTdmaDuAdjType = 15;
2379 }
2380 else if(pCoexDm->curPsTdma == 12)
2381 {
2382 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2383 pCoexDm->psTdmaDuAdjType = 16;
2384 }
2385
2386 if(result == -1)
2387 {
2388 if(pCoexDm->curPsTdma == 5)
2389 {
2390 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2391 pCoexDm->psTdmaDuAdjType = 6;
2392 }
2393 else if(pCoexDm->curPsTdma == 6)
2394 {
2395 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2396 pCoexDm->psTdmaDuAdjType = 7;
2397 }
2398 else if(pCoexDm->curPsTdma == 7)
2399 {
2400 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2401 pCoexDm->psTdmaDuAdjType = 8;
2402 }
2403 else if(pCoexDm->curPsTdma == 13)
2404 {
2405 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2406 pCoexDm->psTdmaDuAdjType = 14;
2407 }
2408 else if(pCoexDm->curPsTdma == 14)
2409 {
2410 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2411 pCoexDm->psTdmaDuAdjType = 15;
2412 }
2413 else if(pCoexDm->curPsTdma == 15)
2414 {
2415 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2416 pCoexDm->psTdmaDuAdjType = 16;
2417 }
2418 }
2419 else if (result == 1)
2420 {
2421 if(pCoexDm->curPsTdma == 8)
2422 {
2423 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2424 pCoexDm->psTdmaDuAdjType = 7;
2425 }
2426 else if(pCoexDm->curPsTdma == 7)
2427 {
2428 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2429 pCoexDm->psTdmaDuAdjType = 6;
2430 }
2431 else if(pCoexDm->curPsTdma == 6)
2432 {
2433 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
2434 pCoexDm->psTdmaDuAdjType = 5;
2435 }
2436 else if(pCoexDm->curPsTdma == 16)
2437 {
2438 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2439 pCoexDm->psTdmaDuAdjType = 15;
2440 }
2441 else if(pCoexDm->curPsTdma == 15)
2442 {
2443 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2444 pCoexDm->psTdmaDuAdjType = 14;
2445 }
2446 else if(pCoexDm->curPsTdma == 14)
2447 {
2448 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
2449 pCoexDm->psTdmaDuAdjType = 13;
2450 }
2451 }
2452 }
2453 else
2454 {
2455 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2456 if(pCoexDm->curPsTdma == 5)
2457 {
2458 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
2459 pCoexDm->psTdmaDuAdjType = 71;
2460 }
2461 else if(pCoexDm->curPsTdma == 6)
2462 {
2463 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2464 pCoexDm->psTdmaDuAdjType = 2;
2465 }
2466 else if(pCoexDm->curPsTdma == 7)
2467 {
2468 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2469 pCoexDm->psTdmaDuAdjType = 3;
2470 }
2471 else if(pCoexDm->curPsTdma == 8)
2472 {
2473 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2474 pCoexDm->psTdmaDuAdjType = 4;
2475 }
2476 if(pCoexDm->curPsTdma == 13)
2477 {
2478 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2479 pCoexDm->psTdmaDuAdjType = 9;
2480 }
2481 else if(pCoexDm->curPsTdma == 14)
2482 {
2483 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2484 pCoexDm->psTdmaDuAdjType = 10;
2485 }
2486 else if(pCoexDm->curPsTdma == 15)
2487 {
2488 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2489 pCoexDm->psTdmaDuAdjType = 11;
2490 }
2491 else if(pCoexDm->curPsTdma == 16)
2492 {
2493 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2494 pCoexDm->psTdmaDuAdjType = 12;
2495 }
2496
2497 if(result == -1)
2498 {
2499 if(pCoexDm->curPsTdma == 71)
2500 {
2501 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2502 pCoexDm->psTdmaDuAdjType = 1;
2503 }
2504 else if(pCoexDm->curPsTdma == 1)
2505 {
2506 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2507 pCoexDm->psTdmaDuAdjType = 2;
2508 }
2509 else if(pCoexDm->curPsTdma == 2)
2510 {
2511 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2512 pCoexDm->psTdmaDuAdjType = 3;
2513 }
2514 else if(pCoexDm->curPsTdma == 3)
2515 {
2516 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2517 pCoexDm->psTdmaDuAdjType = 4;
2518 }
2519 else if(pCoexDm->curPsTdma == 9)
2520 {
2521 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2522 pCoexDm->psTdmaDuAdjType = 10;
2523 }
2524 else if(pCoexDm->curPsTdma == 10)
2525 {
2526 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2527 pCoexDm->psTdmaDuAdjType = 11;
2528 }
2529 else if(pCoexDm->curPsTdma == 11)
2530 {
2531 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2532 pCoexDm->psTdmaDuAdjType = 12;
2533 }
2534 }
2535 else if (result == 1)
2536 {
2537 if(pCoexDm->curPsTdma == 4)
2538 {
2539 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2540 pCoexDm->psTdmaDuAdjType = 3;
2541 }
2542 else if(pCoexDm->curPsTdma == 3)
2543 {
2544 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2545 pCoexDm->psTdmaDuAdjType = 2;
2546 }
2547 else if(pCoexDm->curPsTdma == 2)
2548 {
2549 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
2550 pCoexDm->psTdmaDuAdjType = 1;
2551 }
2552 else if(pCoexDm->curPsTdma == 1)
2553 {
2554 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
2555 pCoexDm->psTdmaDuAdjType = 71;
2556 }
2557 else if(pCoexDm->curPsTdma == 12)
2558 {
2559 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2560 pCoexDm->psTdmaDuAdjType = 11;
2561 }
2562 else if(pCoexDm->curPsTdma == 11)
2563 {
2564 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2565 pCoexDm->psTdmaDuAdjType = 10;
2566 }
2567 else if(pCoexDm->curPsTdma == 10)
2568 {
2569 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
2570 pCoexDm->psTdmaDuAdjType = 9;
2571 }
2572 }
2573 }
2574 }
2575 else if(maxInterval == 2)
2576 {
2577 if(bTxPause)
2578 {
2579 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2580 if(pCoexDm->curPsTdma == 1)
2581 {
2582 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2583 pCoexDm->psTdmaDuAdjType = 6;
2584 }
2585 else if(pCoexDm->curPsTdma == 2)
2586 {
2587 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2588 pCoexDm->psTdmaDuAdjType = 6;
2589 }
2590 else if(pCoexDm->curPsTdma == 3)
2591 {
2592 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2593 pCoexDm->psTdmaDuAdjType = 7;
2594 }
2595 else if(pCoexDm->curPsTdma == 4)
2596 {
2597 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2598 pCoexDm->psTdmaDuAdjType = 8;
2599 }
2600 if(pCoexDm->curPsTdma == 9)
2601 {
2602 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2603 pCoexDm->psTdmaDuAdjType = 14;
2604 }
2605 else if(pCoexDm->curPsTdma == 10)
2606 {
2607 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2608 pCoexDm->psTdmaDuAdjType = 14;
2609 }
2610 else if(pCoexDm->curPsTdma == 11)
2611 {
2612 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2613 pCoexDm->psTdmaDuAdjType = 15;
2614 }
2615 else if(pCoexDm->curPsTdma == 12)
2616 {
2617 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2618 pCoexDm->psTdmaDuAdjType = 16;
2619 }
2620 if(result == -1)
2621 {
2622 if(pCoexDm->curPsTdma == 5)
2623 {
2624 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2625 pCoexDm->psTdmaDuAdjType = 6;
2626 }
2627 else if(pCoexDm->curPsTdma == 6)
2628 {
2629 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2630 pCoexDm->psTdmaDuAdjType = 7;
2631 }
2632 else if(pCoexDm->curPsTdma == 7)
2633 {
2634 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2635 pCoexDm->psTdmaDuAdjType = 8;
2636 }
2637 else if(pCoexDm->curPsTdma == 13)
2638 {
2639 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2640 pCoexDm->psTdmaDuAdjType = 14;
2641 }
2642 else if(pCoexDm->curPsTdma == 14)
2643 {
2644 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2645 pCoexDm->psTdmaDuAdjType = 15;
2646 }
2647 else if(pCoexDm->curPsTdma == 15)
2648 {
2649 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2650 pCoexDm->psTdmaDuAdjType = 16;
2651 }
2652 }
2653 else if (result == 1)
2654 {
2655 if(pCoexDm->curPsTdma == 8)
2656 {
2657 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2658 pCoexDm->psTdmaDuAdjType = 7;
2659 }
2660 else if(pCoexDm->curPsTdma == 7)
2661 {
2662 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2663 pCoexDm->psTdmaDuAdjType = 6;
2664 }
2665 else if(pCoexDm->curPsTdma == 6)
2666 {
2667 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
2668 pCoexDm->psTdmaDuAdjType = 6;
2669 }
2670 else if(pCoexDm->curPsTdma == 16)
2671 {
2672 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2673 pCoexDm->psTdmaDuAdjType = 15;
2674 }
2675 else if(pCoexDm->curPsTdma == 15)
2676 {
2677 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2678 pCoexDm->psTdmaDuAdjType = 14;
2679 }
2680 else if(pCoexDm->curPsTdma == 14)
2681 {
2682 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
2683 pCoexDm->psTdmaDuAdjType = 14;
2684 }
2685 }
2686 }
2687 else
2688 {
2689 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2690 if(pCoexDm->curPsTdma == 5)
2691 {
2692 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2693 pCoexDm->psTdmaDuAdjType = 2;
2694 }
2695 else if(pCoexDm->curPsTdma == 6)
2696 {
2697 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2698 pCoexDm->psTdmaDuAdjType = 2;
2699 }
2700 else if(pCoexDm->curPsTdma == 7)
2701 {
2702 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2703 pCoexDm->psTdmaDuAdjType = 3;
2704 }
2705 else if(pCoexDm->curPsTdma == 8)
2706 {
2707 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2708 pCoexDm->psTdmaDuAdjType = 4;
2709 }
2710 if(pCoexDm->curPsTdma == 13)
2711 {
2712 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2713 pCoexDm->psTdmaDuAdjType = 10;
2714 }
2715 else if(pCoexDm->curPsTdma == 14)
2716 {
2717 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2718 pCoexDm->psTdmaDuAdjType = 10;
2719 }
2720 else if(pCoexDm->curPsTdma == 15)
2721 {
2722 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2723 pCoexDm->psTdmaDuAdjType = 11;
2724 }
2725 else if(pCoexDm->curPsTdma == 16)
2726 {
2727 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2728 pCoexDm->psTdmaDuAdjType = 12;
2729 }
2730 if(result == -1)
2731 {
2732 if(pCoexDm->curPsTdma == 1)
2733 {
2734 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2735 pCoexDm->psTdmaDuAdjType = 2;
2736 }
2737 else if(pCoexDm->curPsTdma == 2)
2738 {
2739 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2740 pCoexDm->psTdmaDuAdjType = 3;
2741 }
2742 else if(pCoexDm->curPsTdma == 3)
2743 {
2744 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2745 pCoexDm->psTdmaDuAdjType = 4;
2746 }
2747 else if(pCoexDm->curPsTdma == 9)
2748 {
2749 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2750 pCoexDm->psTdmaDuAdjType = 10;
2751 }
2752 else if(pCoexDm->curPsTdma == 10)
2753 {
2754 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2755 pCoexDm->psTdmaDuAdjType = 11;
2756 }
2757 else if(pCoexDm->curPsTdma == 11)
2758 {
2759 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2760 pCoexDm->psTdmaDuAdjType = 12;
2761 }
2762 }
2763 else if (result == 1)
2764 {
2765 if(pCoexDm->curPsTdma == 4)
2766 {
2767 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2768 pCoexDm->psTdmaDuAdjType = 3;
2769 }
2770 else if(pCoexDm->curPsTdma == 3)
2771 {
2772 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2773 pCoexDm->psTdmaDuAdjType = 2;
2774 }
2775 else if(pCoexDm->curPsTdma == 2)
2776 {
2777 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
2778 pCoexDm->psTdmaDuAdjType = 2;
2779 }
2780 else if(pCoexDm->curPsTdma == 12)
2781 {
2782 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2783 pCoexDm->psTdmaDuAdjType = 11;
2784 }
2785 else if(pCoexDm->curPsTdma == 11)
2786 {
2787 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2788 pCoexDm->psTdmaDuAdjType = 10;
2789 }
2790 else if(pCoexDm->curPsTdma == 10)
2791 {
2792 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
2793 pCoexDm->psTdmaDuAdjType = 10;
2794 }
2795 }
2796 }
2797 }
2798 else if(maxInterval == 3)
2799 {
2800 if(bTxPause)
2801 {
2802 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 1\n"));
2803 if(pCoexDm->curPsTdma == 1)
2804 {
2805 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2806 pCoexDm->psTdmaDuAdjType = 7;
2807 }
2808 else if(pCoexDm->curPsTdma == 2)
2809 {
2810 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2811 pCoexDm->psTdmaDuAdjType = 7;
2812 }
2813 else if(pCoexDm->curPsTdma == 3)
2814 {
2815 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2816 pCoexDm->psTdmaDuAdjType = 7;
2817 }
2818 else if(pCoexDm->curPsTdma == 4)
2819 {
2820 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2821 pCoexDm->psTdmaDuAdjType = 8;
2822 }
2823 if(pCoexDm->curPsTdma == 9)
2824 {
2825 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2826 pCoexDm->psTdmaDuAdjType = 15;
2827 }
2828 else if(pCoexDm->curPsTdma == 10)
2829 {
2830 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2831 pCoexDm->psTdmaDuAdjType = 15;
2832 }
2833 else if(pCoexDm->curPsTdma == 11)
2834 {
2835 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2836 pCoexDm->psTdmaDuAdjType = 15;
2837 }
2838 else if(pCoexDm->curPsTdma == 12)
2839 {
2840 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2841 pCoexDm->psTdmaDuAdjType = 16;
2842 }
2843 if(result == -1)
2844 {
2845 if(pCoexDm->curPsTdma == 5)
2846 {
2847 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2848 pCoexDm->psTdmaDuAdjType = 7;
2849 }
2850 else if(pCoexDm->curPsTdma == 6)
2851 {
2852 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2853 pCoexDm->psTdmaDuAdjType = 7;
2854 }
2855 else if(pCoexDm->curPsTdma == 7)
2856 {
2857 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
2858 pCoexDm->psTdmaDuAdjType = 8;
2859 }
2860 else if(pCoexDm->curPsTdma == 13)
2861 {
2862 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2863 pCoexDm->psTdmaDuAdjType = 15;
2864 }
2865 else if(pCoexDm->curPsTdma == 14)
2866 {
2867 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2868 pCoexDm->psTdmaDuAdjType = 15;
2869 }
2870 else if(pCoexDm->curPsTdma == 15)
2871 {
2872 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
2873 pCoexDm->psTdmaDuAdjType = 16;
2874 }
2875 }
2876 else if (result == 1)
2877 {
2878 if(pCoexDm->curPsTdma == 8)
2879 {
2880 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2881 pCoexDm->psTdmaDuAdjType = 7;
2882 }
2883 else if(pCoexDm->curPsTdma == 7)
2884 {
2885 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2886 pCoexDm->psTdmaDuAdjType = 7;
2887 }
2888 else if(pCoexDm->curPsTdma == 6)
2889 {
2890 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
2891 pCoexDm->psTdmaDuAdjType = 7;
2892 }
2893 else if(pCoexDm->curPsTdma == 16)
2894 {
2895 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2896 pCoexDm->psTdmaDuAdjType = 15;
2897 }
2898 else if(pCoexDm->curPsTdma == 15)
2899 {
2900 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2901 pCoexDm->psTdmaDuAdjType = 15;
2902 }
2903 else if(pCoexDm->curPsTdma == 14)
2904 {
2905 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
2906 pCoexDm->psTdmaDuAdjType = 15;
2907 }
2908 }
2909 }
2910 else
2911 {
2912 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], TxPause = 0\n"));
2913 if(pCoexDm->curPsTdma == 5)
2914 {
2915 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2916 pCoexDm->psTdmaDuAdjType = 3;
2917 }
2918 else if(pCoexDm->curPsTdma == 6)
2919 {
2920 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2921 pCoexDm->psTdmaDuAdjType = 3;
2922 }
2923 else if(pCoexDm->curPsTdma == 7)
2924 {
2925 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2926 pCoexDm->psTdmaDuAdjType = 3;
2927 }
2928 else if(pCoexDm->curPsTdma == 8)
2929 {
2930 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2931 pCoexDm->psTdmaDuAdjType = 4;
2932 }
2933 if(pCoexDm->curPsTdma == 13)
2934 {
2935 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2936 pCoexDm->psTdmaDuAdjType = 11;
2937 }
2938 else if(pCoexDm->curPsTdma == 14)
2939 {
2940 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2941 pCoexDm->psTdmaDuAdjType = 11;
2942 }
2943 else if(pCoexDm->curPsTdma == 15)
2944 {
2945 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2946 pCoexDm->psTdmaDuAdjType = 11;
2947 }
2948 else if(pCoexDm->curPsTdma == 16)
2949 {
2950 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2951 pCoexDm->psTdmaDuAdjType = 12;
2952 }
2953 if(result == -1)
2954 {
2955 if(pCoexDm->curPsTdma == 1)
2956 {
2957 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2958 pCoexDm->psTdmaDuAdjType = 3;
2959 }
2960 else if(pCoexDm->curPsTdma == 2)
2961 {
2962 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2963 pCoexDm->psTdmaDuAdjType = 3;
2964 }
2965 else if(pCoexDm->curPsTdma == 3)
2966 {
2967 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
2968 pCoexDm->psTdmaDuAdjType = 4;
2969 }
2970 else if(pCoexDm->curPsTdma == 9)
2971 {
2972 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2973 pCoexDm->psTdmaDuAdjType = 11;
2974 }
2975 else if(pCoexDm->curPsTdma == 10)
2976 {
2977 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
2978 pCoexDm->psTdmaDuAdjType = 11;
2979 }
2980 else if(pCoexDm->curPsTdma == 11)
2981 {
2982 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
2983 pCoexDm->psTdmaDuAdjType = 12;
2984 }
2985 }
2986 else if (result == 1)
2987 {
2988 if(pCoexDm->curPsTdma == 4)
2989 {
2990 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2991 pCoexDm->psTdmaDuAdjType = 3;
2992 }
2993 else if(pCoexDm->curPsTdma == 3)
2994 {
2995 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
2996 pCoexDm->psTdmaDuAdjType = 3;
2997 }
2998 else if(pCoexDm->curPsTdma == 2)
2999 {
3000 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
3001 pCoexDm->psTdmaDuAdjType = 3;
3002 }
3003 else if(pCoexDm->curPsTdma == 12)
3004 {
3005 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
3006 pCoexDm->psTdmaDuAdjType = 11;
3007 }
3008 else if(pCoexDm->curPsTdma == 11)
3009 {
3010 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
3011 pCoexDm->psTdmaDuAdjType = 11;
3012 }
3013 else if(pCoexDm->curPsTdma == 10)
3014 {
3015 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
3016 pCoexDm->psTdmaDuAdjType = 11;
3017 }
3018 }
3019 }
3020 }
3021 }
3022
3023 // if current PsTdma not match with the recorded one (when scan, dhcp...),
3024 // then we have to adjust it back to the previous record one.
3025 if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType)
3026 {
3027 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
3028 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n",
3029 pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType));
3030
3031 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
3032 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
3033 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
3034
3035 if( !bScan && !bLink && !bRoam)
3036 {
3037 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType);
3038 }
3039 else
3040 {
3041 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"));
3042 }
3043 }
3044 }
3045
3046 // SCO only or SCO+PAN(HS)
3047 VOID
halbtc8723b2ant_ActionSco(IN PBTC_COEXIST pBtCoexist)3048 halbtc8723b2ant_ActionSco(
3049 IN PBTC_COEXIST pBtCoexist
3050 )
3051 {
3052 u1Byte wifiRssiState, btRssiState;
3053 u4Byte wifiBw;
3054
3055 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3056 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3057
3058 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3059
3060 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3061
3062 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4);
3063
3064 if(BTC_RSSI_HIGH(btRssiState))
3065 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3066 else
3067 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3068
3069 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3070
3071 if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode
3072 {
3073 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
3074 }
3075 else //for SCO quality & wifi performance balance at 11n mode
3076 {
3077 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8);
3078 }
3079
3080 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3081 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality
3082
3083 // sw mechanism
3084 if(BTC_WIFI_BW_HT40 == wifiBw)
3085 {
3086 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3087 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3088 {
3089 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3090 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4);
3091 }
3092 else
3093 {
3094 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3095 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4);
3096 }
3097 }
3098 else
3099 {
3100 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3101 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3102 {
3103 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3104 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4);
3105 }
3106 else
3107 {
3108 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3109 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4);
3110 }
3111 }
3112 }
3113
3114
3115 VOID
halbtc8723b2ant_ActionHid(IN PBTC_COEXIST pBtCoexist)3116 halbtc8723b2ant_ActionHid(
3117 IN PBTC_COEXIST pBtCoexist
3118 )
3119 {
3120 u1Byte wifiRssiState, btRssiState;
3121 u4Byte wifiBw;
3122
3123 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3124 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3125
3126 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3127
3128 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3129
3130 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3131
3132 if(BTC_RSSI_HIGH(btRssiState))
3133 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3134 else
3135 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3136
3137 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3138
3139 if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
3140 {
3141 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3142 }
3143 else //for HID quality & wifi performance balance at 11n mode
3144 {
3145 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9);
3146 }
3147
3148 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3149
3150 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3151 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3152 {
3153 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
3154 }
3155 else
3156 {
3157 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
3158 }
3159
3160 // sw mechanism
3161 if(BTC_WIFI_BW_HT40 == wifiBw)
3162 {
3163 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3164 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3165 {
3166 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3167 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3168 }
3169 else
3170 {
3171 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3172 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3173 }
3174 }
3175 else
3176 {
3177 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3178 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3179 {
3180 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3181 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3182 }
3183 else
3184 {
3185 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3186 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3187 }
3188 }
3189 }
3190
3191 //A2DP only / PAN(EDR) only/ A2DP+PAN(HS)
3192 VOID
halbtc8723b2ant_ActionA2dp(IN PBTC_COEXIST pBtCoexist)3193 halbtc8723b2ant_ActionA2dp(
3194 IN PBTC_COEXIST pBtCoexist
3195 )
3196 {
3197 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3198 u4Byte wifiBw;
3199 u1Byte apNum=0;
3200
3201 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3202 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3203 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3204
3205 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
3206
3207 // define the office environment
3208 if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3209 {
3210 //DbgPrint(" AP#>10(%d)\n", apNum);
3211 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3212
3213 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3214 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3215 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3216 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3217
3218 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
3219
3220 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3221 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3222
3223 // sw mechanism
3224 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3225 if(BTC_WIFI_BW_HT40 == wifiBw)
3226 {
3227 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3228 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18);
3229 }
3230 else
3231 {
3232 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3233 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18);
3234 }
3235 return;
3236
3237 }
3238
3239 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3240 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3241
3242 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3243
3244 if(BTC_RSSI_HIGH(btRssiState))
3245 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3246 else
3247 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3248
3249
3250 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3251 {
3252 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3253 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3254 }
3255 else
3256 {
3257 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3258 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3259 }
3260
3261
3262 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3263 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3264 {
3265 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1);
3266 }
3267 else
3268 {
3269 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
3270 }
3271
3272 // sw mechanism
3273 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3274 if(BTC_WIFI_BW_HT40 == wifiBw)
3275 {
3276 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3277 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3278 {
3279 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3280 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3281 }
3282 else
3283 {
3284 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3285 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3286 }
3287 }
3288 else
3289 {
3290 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3291 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3292 {
3293 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3294 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3295 }
3296 else
3297 {
3298 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3299 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3300 }
3301 }
3302 }
3303
3304 VOID
halbtc8723b2ant_ActionA2dpPanHs(IN PBTC_COEXIST pBtCoexist)3305 halbtc8723b2ant_ActionA2dpPanHs(
3306 IN PBTC_COEXIST pBtCoexist
3307 )
3308 {
3309 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3310 u4Byte wifiBw;
3311
3312 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3313 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3314 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3315
3316 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3317
3318 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3319
3320 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3321
3322 if(BTC_RSSI_HIGH(btRssiState))
3323 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3324 else
3325 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3326
3327 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3328 {
3329 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3330 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3331 }
3332 else
3333 {
3334 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3335 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3336 }
3337
3338 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2);
3339
3340 // sw mechanism
3341 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3342 if(BTC_WIFI_BW_HT40 == wifiBw)
3343 {
3344 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3345 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3346 {
3347 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3348 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3349 }
3350 else
3351 {
3352 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3353 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3354 }
3355 }
3356 else
3357 {
3358 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3359 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3360 {
3361 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3362 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3363 }
3364 else
3365 {
3366 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3367 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3368 }
3369 }
3370 }
3371
3372 VOID
halbtc8723b2ant_ActionPanEdr(IN PBTC_COEXIST pBtCoexist)3373 halbtc8723b2ant_ActionPanEdr(
3374 IN PBTC_COEXIST pBtCoexist
3375 )
3376 {
3377 u1Byte wifiRssiState,wifiRssiState1, btRssiState;
3378 u4Byte wifiBw;
3379
3380 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3381 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3382 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3383
3384 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3385
3386 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3387
3388 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3389
3390 if(BTC_RSSI_HIGH(btRssiState))
3391 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3392 else
3393 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3394
3395 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3396 {
3397 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10);
3398 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3399 }
3400 else
3401 {
3402 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3403 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3404 }
3405
3406 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3407 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3408 {
3409 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
3410 }
3411 else
3412 {
3413 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
3414 }
3415
3416 // sw mechanism
3417 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3418 if(BTC_WIFI_BW_HT40 == wifiBw)
3419 {
3420 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3421 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3422 {
3423 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3424 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3425 }
3426 else
3427 {
3428 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3429 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3430 }
3431 }
3432 else
3433 {
3434 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3435 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3436 {
3437 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3438 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3439 }
3440 else
3441 {
3442 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3443 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3444 }
3445 }
3446 }
3447
3448
3449 //PAN(HS) only
3450 VOID
halbtc8723b2ant_ActionPanHs(IN PBTC_COEXIST pBtCoexist)3451 halbtc8723b2ant_ActionPanHs(
3452 IN PBTC_COEXIST pBtCoexist
3453 )
3454 {
3455 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3456 u4Byte wifiBw;
3457
3458 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3459 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3460 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3461
3462 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3463
3464 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3465
3466 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3467
3468 if(BTC_RSSI_HIGH(btRssiState))
3469 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3470 else
3471 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3472
3473 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3474
3475 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3476 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3477
3478 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3479 if(BTC_WIFI_BW_HT40 == wifiBw)
3480 {
3481 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3482 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3483 {
3484 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3485 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3486 }
3487 else
3488 {
3489 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3490 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3491 }
3492 }
3493 else
3494 {
3495 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3496 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3497 {
3498 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3499 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3500 }
3501 else
3502 {
3503 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3504 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3505 }
3506 }
3507 }
3508
3509 //PAN(EDR)+A2DP
3510 VOID
halbtc8723b2ant_ActionPanEdrA2dp(IN PBTC_COEXIST pBtCoexist)3511 halbtc8723b2ant_ActionPanEdrA2dp(
3512 IN PBTC_COEXIST pBtCoexist
3513 )
3514 {
3515 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3516 u4Byte wifiBw;
3517
3518 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3519 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3520 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3521
3522 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3523
3524 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3525
3526 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3527
3528 if(BTC_RSSI_HIGH(btRssiState))
3529 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3530 else
3531 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3532
3533 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3534 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3535 else
3536 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3537
3538 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3539
3540 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3541 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3542 {
3543 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12);
3544
3545 if(BTC_WIFI_BW_HT40 == wifiBw)
3546 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3547 else
3548 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
3549 }
3550 else
3551 {
3552 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
3553 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
3554 }
3555
3556 // sw mechanism
3557 if(BTC_WIFI_BW_HT40 == wifiBw)
3558 {
3559 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3560 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3561 {
3562 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3563 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3564 }
3565 else
3566 {
3567 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
3568 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3569 }
3570 }
3571 else
3572 {
3573 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3574 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3575 {
3576 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3577 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3578 }
3579 else
3580 {
3581 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3582 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3583 }
3584 }
3585 }
3586
3587 VOID
halbtc8723b2ant_ActionPanEdrHid(IN PBTC_COEXIST pBtCoexist)3588 halbtc8723b2ant_ActionPanEdrHid(
3589 IN PBTC_COEXIST pBtCoexist
3590 )
3591 {
3592 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3593 u4Byte wifiBw;
3594
3595 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3596 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3597 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3598 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3599
3600 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3601
3602 if(BTC_RSSI_HIGH(btRssiState))
3603 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3604 else
3605 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3606
3607 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3608 {
3609 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3610 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3611 }
3612 else
3613 {
3614 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3615 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3616 }
3617
3618 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3619 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3620 {
3621 if(BTC_WIFI_BW_HT40 == wifiBw)
3622 {
3623 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3);
3624 //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
3625 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
3626 }
3627 else
3628 {
3629 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3630 //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3631 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3632 }
3633 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2);
3634 }
3635 else
3636 {
3637 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3638 //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3639 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3640 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
3641 }
3642
3643 // sw mechanism
3644 if(BTC_WIFI_BW_HT40 == wifiBw)
3645 {
3646 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3647 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3648 {
3649 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3650 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3651 }
3652 else
3653 {
3654 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3655 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3656 }
3657 }
3658 else
3659 {
3660 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3661 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3662 {
3663 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3664 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3665 }
3666 else
3667 {
3668 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3669 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3670 }
3671 }
3672 }
3673
3674 // HID+A2DP+PAN(EDR)
3675 VOID
halbtc8723b2ant_ActionHidA2dpPanEdr(IN PBTC_COEXIST pBtCoexist)3676 halbtc8723b2ant_ActionHidA2dpPanEdr(
3677 IN PBTC_COEXIST pBtCoexist
3678 )
3679 {
3680 u1Byte wifiRssiState,wifiRssiState1, btRssiState;
3681 u4Byte wifiBw;
3682
3683 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3684 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3685 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
3686
3687 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3688
3689 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
3690
3691 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3692
3693 if(BTC_RSSI_HIGH(btRssiState))
3694 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3695 else
3696 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3697
3698 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3699 {
3700 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3701 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3702 }
3703 else
3704 {
3705 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3706 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3707 }
3708
3709 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3710
3711 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3712 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3713 {
3714 if(BTC_WIFI_BW_HT40 == wifiBw)
3715 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3716 else
3717 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
3718 }
3719 else
3720 {
3721 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3722 }
3723
3724 // sw mechanism
3725 if(BTC_WIFI_BW_HT40 == wifiBw)
3726 {
3727 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3728 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3729 {
3730 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3731 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3732 }
3733 else
3734 {
3735 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3736 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3737 }
3738 }
3739 else
3740 {
3741 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3742 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3743 {
3744 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3745 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3746 }
3747 else
3748 {
3749 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3750 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3751 }
3752 }
3753 }
3754
3755 VOID
halbtc8723b2ant_ActionHidA2dp(IN PBTC_COEXIST pBtCoexist)3756 halbtc8723b2ant_ActionHidA2dp(
3757 IN PBTC_COEXIST pBtCoexist
3758 )
3759 {
3760 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
3761 u4Byte wifiBw;
3762 u1Byte apNum=0;
3763
3764 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
3765 //btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
3766 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
3767 btRssiState = halbtc8723b2ant_BtRssiState(3, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37);
3768
3769 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3770
3771 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5);
3772
3773 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3774
3775 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3776 if(BTC_WIFI_BW_LEGACY == wifiBw)
3777 {
3778 if(BTC_RSSI_HIGH(btRssiState))
3779 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3780 else if(BTC_RSSI_MEDIUM(btRssiState))
3781 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3782 else
3783 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3784 }
3785 else
3786 { // only 802.11N mode we have to dec bt power to 4 degree
3787 if(BTC_RSSI_HIGH(btRssiState))
3788 {
3789 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
3790 // need to check ap Number of Not
3791 if(apNum < 10)
3792 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
3793 else
3794 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3795 }
3796 else if(BTC_RSSI_MEDIUM(btRssiState))
3797 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
3798 else
3799 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3800 }
3801
3802 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
3803 {
3804 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
3805 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3806 }
3807 else
3808 {
3809 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
3810 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
3811 }
3812
3813 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
3814 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3815 {
3816 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
3817 }
3818 else
3819 {
3820 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
3821 }
3822
3823 // sw mechanism
3824 if(BTC_WIFI_BW_HT40 == wifiBw)
3825 {
3826 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3827 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3828 {
3829 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3830 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3831 }
3832 else
3833 {
3834 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
3835 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3836 }
3837 }
3838 else
3839 {
3840 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
3841 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
3842 {
3843 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3844 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
3845 }
3846 else
3847 {
3848 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
3849 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3850 }
3851 }
3852 }
3853
3854 VOID
halbtc8723b2ant_ActionBtWhckTest(IN PBTC_COEXIST pBtCoexist)3855 halbtc8723b2ant_ActionBtWhckTest(
3856 IN PBTC_COEXIST pBtCoexist
3857 )
3858 {
3859 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3860
3861 // sw all off
3862 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3863 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3864
3865 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3866
3867 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3868 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
3869 }
3870
3871 VOID
halbtc8723b2ant_ActionWifiMultiPort(IN PBTC_COEXIST pBtCoexist)3872 halbtc8723b2ant_ActionWifiMultiPort(
3873 IN PBTC_COEXIST pBtCoexist
3874 )
3875 {
3876 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
3877 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
3878
3879 // sw all off
3880 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
3881 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
3882
3883 // hw all off
3884 //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
3885 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
3886
3887 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3888 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
3889 }
3890
3891 VOID
halbtc8723b2ant_RunCoexistMechanism(IN PBTC_COEXIST pBtCoexist)3892 halbtc8723b2ant_RunCoexistMechanism(
3893 IN PBTC_COEXIST pBtCoexist
3894 )
3895 {
3896 BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE;
3897 u1Byte btInfoOriginal=0, btRetryCnt=0;
3898 u1Byte algorithm=0;
3899 u4Byte numOfWifiLink=0;
3900 u4Byte wifiLinkStatus=0;
3901 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
3902 BOOLEAN bMiracastPlusBt=FALSE;
3903 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
3904
3905 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism()===>\n"));
3906
3907 if(pBtCoexist->bManualControl)
3908 {
3909 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"));
3910 return;
3911 }
3912
3913 if(pCoexSta->bUnderIps)
3914 {
3915 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under IPS !!!\n"));
3916 return;
3917 }
3918
3919 if(pCoexSta->bBtWhckTest)
3920 {
3921 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under WHCK TEST!!!\n"));
3922 halbtc8723b2ant_ActionBtWhckTest(pBtCoexist);
3923 return;
3924 }
3925
3926 algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist);
3927 if(pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS!=algorithm))
3928 {
3929 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is under inquiry/page scan !!\n"));
3930 halbtc8723b2ant_ActionBtInquiry(pBtCoexist);
3931 return;
3932 }
3933 else
3934 {
3935 /*
3936 if(pCoexDm->bNeedRecover0x948)
3937 {
3938 pCoexDm->bNeedRecover0x948 = FALSE;
3939 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948);
3940 }
3941 */
3942 }
3943
3944 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
3945 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
3946 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
3947
3948 if(bScan || bLink || bRoam)
3949 {
3950 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], WiFi is under Link Process !!\n"));
3951 halbtc8723b2ant_ActionWiFiLinkProcess(pBtCoexist);
3952 return;
3953 }
3954
3955 //for P2P
3956
3957 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus);
3958 numOfWifiLink = wifiLinkStatus>>16;
3959
3960 if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED))
3961 {
3962 RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) );
3963
3964 if(pBtLinkInfo->bBtLinkExist)
3965 {
3966 bMiracastPlusBt = TRUE;
3967 }
3968 else
3969 {
3970 bMiracastPlusBt = FALSE;
3971 }
3972
3973 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt);
3974 halbtc8723b2ant_ActionWifiMultiPort(pBtCoexist);
3975
3976 return;
3977 }
3978 else
3979 {
3980 bMiracastPlusBt = FALSE;
3981 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt);
3982 }
3983
3984 pCoexDm->curAlgorithm = algorithm;
3985 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm));
3986
3987 if(halbtc8723b2ant_IsCommonAction(pBtCoexist))
3988 {
3989 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant common.\n"));
3990 pCoexDm->bAutoTdmaAdjust = FALSE;
3991 }
3992 else
3993 {
3994 if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm)
3995 {
3996 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n",
3997 pCoexDm->preAlgorithm, pCoexDm->curAlgorithm));
3998 pCoexDm->bAutoTdmaAdjust = FALSE;
3999 }
4000 switch(pCoexDm->curAlgorithm)
4001 {
4002 case BT_8723B_2ANT_COEX_ALGO_SCO:
4003 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n"));
4004 halbtc8723b2ant_ActionSco(pBtCoexist);
4005 break;
4006 case BT_8723B_2ANT_COEX_ALGO_HID:
4007 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID.\n"));
4008 halbtc8723b2ant_ActionHid(pBtCoexist);
4009 break;
4010 case BT_8723B_2ANT_COEX_ALGO_A2DP:
4011 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n"));
4012 halbtc8723b2ant_ActionA2dp(pBtCoexist);
4013 break;
4014 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
4015 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"));
4016 halbtc8723b2ant_ActionA2dpPanHs(pBtCoexist);
4017 break;
4018 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
4019 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"));
4020 halbtc8723b2ant_ActionPanEdr(pBtCoexist);
4021 break;
4022 case BT_8723B_2ANT_COEX_ALGO_PANHS:
4023 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n"));
4024 halbtc8723b2ant_ActionPanHs(pBtCoexist);
4025 break;
4026 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
4027 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"));
4028 halbtc8723b2ant_ActionPanEdrA2dp(pBtCoexist);
4029 break;
4030 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
4031 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"));
4032 halbtc8723b2ant_ActionPanEdrHid(pBtCoexist);
4033 break;
4034 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
4035 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"));
4036 halbtc8723b2ant_ActionHidA2dpPanEdr(pBtCoexist);
4037 break;
4038 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
4039 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"));
4040 halbtc8723b2ant_ActionHidA2dp(pBtCoexist);
4041 break;
4042 default:
4043 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"));
4044 halbtc8723b2ant_CoexAllOff(pBtCoexist);
4045 break;
4046 }
4047 pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
4048 }
4049 }
4050
4051 VOID
halbtc8723b2ant_WifiOffHwCfg(IN PBTC_COEXIST pBtCoexist)4052 halbtc8723b2ant_WifiOffHwCfg(
4053 IN PBTC_COEXIST pBtCoexist
4054 )
4055 {
4056 BOOLEAN bIsInMpMode = FALSE;
4057 u1Byte H2C_Parameter[2] ={0};
4058 u4Byte fwVer=0;
4059
4060 // set wlan_act to low
4061 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
4062
4063 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1
4064 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
4065 if(fwVer >= 0x180000)
4066 {
4067 /* Use H2C to set GNT_BT to HIGH */
4068 H2C_Parameter[0] = 1;
4069 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
4070 }
4071 else
4072 {
4073 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
4074 }
4075
4076 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode);
4077 if(!bIsInMpMode)
4078 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT
4079 else
4080 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi
4081 }
4082
4083 VOID
halbtc8723b2ant_InitHwConfig(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bBackUp)4084 halbtc8723b2ant_InitHwConfig(
4085 IN PBTC_COEXIST pBtCoexist,
4086 IN BOOLEAN bBackUp
4087 )
4088 {
4089 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4090 u4Byte u4Tmp=0, fwVer;
4091 u2Byte u2Tmp=0;
4092 u1Byte u1Tmp=0;
4093 u1Byte H2C_Parameter[2] ={0};
4094
4095
4096 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n"));
4097
4098 //0xf0[15:12] --> Chip Cut information
4099 pCoexSta->nCutVersion = (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xf1) & 0xf0) >> 4;
4100
4101 // backup rf 0x1e value
4102 pCoexDm->btRf0x1eBackup =
4103 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
4104
4105 // 0x790[5:0]=0x5
4106 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
4107 u1Tmp &= 0xc0;
4108 u1Tmp |= 0x5;
4109 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
4110
4111 //Antenna config
4112 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE);
4113 pCoexSta->disVerInfoCnt = 0;
4114
4115 // PTA parameter
4116 halbtc8723b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
4117
4118 // Enable counter statistics
4119 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA
4120 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
4121 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
4122 }
4123
4124 //============================================================
4125 // work around function start with wa_halbtc8723b2ant_
4126 //============================================================
4127 //============================================================
4128 // extern function start with EXhalbtc8723b2ant_
4129 //============================================================
4130 VOID
EXhalbtc8723b2ant_PowerOnSetting(IN PBTC_COEXIST pBtCoexist)4131 EXhalbtc8723b2ant_PowerOnSetting(
4132 IN PBTC_COEXIST pBtCoexist
4133 )
4134 {
4135 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4136 u2Byte u2Tmp=0x0;
4137
4138 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20);
4139
4140 // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly.
4141 u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
4142 pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1);
4143
4144 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
4145
4146 if(pBtCoexist->chipInterface == BTC_INTF_USB)
4147 {
4148 // fixed at S0 for USB interface
4149 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
4150 }
4151 else
4152 {
4153 // for PCIE and SDIO interface, we check efuse 0xc3[6]
4154 if(pBoardInfo->singleAntPath == 0)
4155 {
4156 // set to S1
4157 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT;
4158 }
4159 else if(pBoardInfo->singleAntPath == 1)
4160 {
4161 // set to S0
4162 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
4163 }
4164 }
4165 }
4166
4167 VOID
EXhalbtc8723b2ant_PreLoadFirmware(IN PBTC_COEXIST pBtCoexist)4168 EXhalbtc8723b2ant_PreLoadFirmware(
4169 IN PBTC_COEXIST pBtCoexist
4170 )
4171 {
4172 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4173 u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */
4174
4175 //
4176 // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info)
4177 // Local setting bit define
4178 // BIT0: "0" for no antenna inverse; "1" for antenna inverse
4179 // BIT1: "0" for internal switch; "1" for external switch
4180 // BIT2: "0" for one antenna; "1" for two antenna
4181 // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0
4182 if(pBtCoexist->chipInterface == BTC_INTF_USB)
4183 {
4184 // fixed at S0 for USB interface
4185 u1Tmp |= 0x1; // antenna inverse
4186 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
4187 }
4188 else
4189 {
4190 // for PCIE and SDIO interface, we check efuse 0xc3[6]
4191 if(pBoardInfo->singleAntPath == 0)
4192 {
4193 }
4194 else if(pBoardInfo->singleAntPath == 1)
4195 {
4196 // set to S0
4197 u1Tmp |= 0x1; // antenna inverse
4198 }
4199
4200 if(pBtCoexist->chipInterface == BTC_INTF_PCI)
4201 {
4202 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp);
4203 }
4204 else if(pBtCoexist->chipInterface == BTC_INTF_SDIO)
4205 {
4206 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp);
4207 }
4208 }
4209 }
4210
4211 VOID
EXhalbtc8723b2ant_InitHwConfig(IN PBTC_COEXIST pBtCoexist,IN BOOLEAN bWifiOnly)4212 EXhalbtc8723b2ant_InitHwConfig(
4213 IN PBTC_COEXIST pBtCoexist,
4214 IN BOOLEAN bWifiOnly
4215 )
4216 {
4217 halbtc8723b2ant_InitHwConfig(pBtCoexist, TRUE);
4218 }
4219
4220 VOID
EXhalbtc8723b2ant_InitCoexDm(IN PBTC_COEXIST pBtCoexist)4221 EXhalbtc8723b2ant_InitCoexDm(
4222 IN PBTC_COEXIST pBtCoexist
4223 )
4224 {
4225 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n"));
4226
4227 halbtc8723b2ant_InitCoexDm(pBtCoexist);
4228 }
4229
4230 VOID
EXhalbtc8723b2ant_DisplayCoexInfo(IN PBTC_COEXIST pBtCoexist)4231 EXhalbtc8723b2ant_DisplayCoexInfo(
4232 IN PBTC_COEXIST pBtCoexist
4233 )
4234 {
4235 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4236 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
4237 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
4238 pu1Byte cliBuf=pBtCoexist->cliBuf;
4239 u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
4240 u4Byte u4Tmp[4];
4241 u4Byte faOfdm, faCck;
4242 u4Byte fwVer=0, btPatchVer=0;
4243 static u1Byte PopReportIn10s = 0;
4244
4245 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
4246 CL_PRINTF(cliBuf);
4247
4248 if(pBtCoexist->bManualControl)
4249 {
4250 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============");
4251 CL_PRINTF(cliBuf);
4252 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ==========================================");
4253 CL_PRINTF(cliBuf);
4254 }
4255
4256 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
4257 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
4258 CL_PRINTF(cliBuf);
4259
4260 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
4261 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
4262 CL_PRINTF(cliBuf);
4263
4264 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
4265 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
4266 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c", "Version Coex/ Fw/ Patch/ Cut", \
4267 GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer, pCoexSta->nCutVersion+65);
4268 CL_PRINTF(cliBuf);
4269
4270 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
4271 pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
4272 pCoexDm->wifiChnlInfo[2]);
4273 CL_PRINTF(cliBuf);
4274
4275 // wifi status
4276 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
4277 CL_PRINTF(cliBuf);
4278 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
4279
4280 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
4281 CL_PRINTF(cliBuf);
4282
4283 PopReportIn10s++;
4284 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \
4285 ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle":
4286 ( (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))),
4287 pCoexSta->btRssi-100, pCoexSta->btRetryCnt, pCoexSta->popEventCnt);
4288 CL_PRINTF(cliBuf);
4289
4290 if (PopReportIn10s >= 5)
4291 {
4292 pCoexSta->popEventCnt = 0;
4293 PopReportIn10s = 0;
4294 }
4295
4296
4297 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d / %d / %d", "SCO/HID/PAN/A2DP/NameReq/WHQL", \
4298 pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist, pCoexSta->bC2hBtRemoteNameReq, pCoexSta->bBtWhckTest );
4299 CL_PRINTF(cliBuf);
4300
4301 if (pStackInfo->bProfileNotified)
4302 {
4303 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
4304 }
4305 else
4306 {
4307 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \
4308 (pBtLinkInfo->bSlaveRole )? "Slave":"Master");
4309 CL_PRINTF(cliBuf);
4310 }
4311
4312 btInfoExt = pCoexSta->btInfoExt;
4313 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "A2DP Rate/Bitpool", \
4314 (btInfoExt&BIT0)? "BR":"EDR", pCoexSta->nA2DPBitPool);
4315 CL_PRINTF(cliBuf);
4316
4317 for(i=0; i<BT_INFO_SRC_8723B_2ANT_MAX; i++)
4318 {
4319 if(pCoexSta->btInfoC2hCnt[i])
4320 {
4321 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b2Ant[i], \
4322 pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1],
4323 pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3],
4324 pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5],
4325 pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]);
4326 CL_PRINTF(cliBuf);
4327 }
4328 }
4329
4330 // Sw mechanism
4331 if(pBtCoexist->bManualControl)
4332 {
4333 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism] (before Manual)============");
4334 }
4335 else
4336 {
4337 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
4338 }
4339
4340 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \
4341 pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig);
4342 CL_PRINTF(cliBuf);
4343 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
4344 pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
4345 CL_PRINTF(cliBuf);
4346
4347 // Fw mechanism
4348 if(pBtCoexist->bManualControl)
4349 {
4350 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism] (before Manual) ============");
4351 }
4352 else
4353 {
4354 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
4355 }
4356
4357 psTdmaCase = pCoexDm->curPsTdma;
4358
4359 if (pCoexDm->bIsSwitchTo1dot5Ant)
4360 psTdmaCase = psTdmaCase + 100;
4361
4362 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)", "PS TDMA", \
4363 pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1],
4364 pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3],
4365 pCoexDm->psTdmaPara[4], psTdmaCase,
4366 (pCoexDm->bCurPsTdmaOn? "On":"Off"),
4367 (pCoexDm->bAutoTdmaAdjust? "Adj":"Fix") );
4368 CL_PRINTF(cliBuf);
4369
4370 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \
4371 pCoexSta->nCoexTableType);
4372 CL_PRINTF(cliBuf);
4373
4374 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \
4375 pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct);
4376 CL_PRINTF(cliBuf);
4377
4378 // Hw setting
4379 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
4380 CL_PRINTF(cliBuf);
4381
4382 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
4383 pCoexDm->btRf0x1eBackup);
4384 CL_PRINTF(cliBuf);
4385
4386 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778);
4387 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880);
4388 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \
4389 u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25);
4390 CL_PRINTF(cliBuf);
4391
4392
4393 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
4394 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67);
4395 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
4396 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \
4397 u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]);
4398 CL_PRINTF(cliBuf);
4399
4400 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c);
4401 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930);
4402 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944);
4403 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \
4404 u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3);
4405 CL_PRINTF(cliBuf);
4406
4407
4408 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39);
4409 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
4410 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
4411 u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64);
4412 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \
4413 ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1);
4414 CL_PRINTF(cliBuf);
4415
4416 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550);
4417 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522);
4418 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \
4419 u4Tmp[0], u1Tmp[0]);
4420 CL_PRINTF(cliBuf);
4421
4422 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
4423 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c);
4424 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \
4425 u4Tmp[0]&0xff, u1Tmp[0]);
4426 CL_PRINTF(cliBuf);
4427
4428 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0);
4429 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4);
4430 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8);
4431 u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0);
4432
4433 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b);
4434 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c);
4435
4436 faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \
4437 ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ;
4438 faCck = (u1Tmp[0] << 8) + u1Tmp[1];
4439
4440 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \
4441 u4Tmp[0]&0xffff, faOfdm, faCck);
4442 CL_PRINTF(cliBuf);
4443
4444 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \
4445 pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg);
4446 CL_PRINTF(cliBuf);
4447
4448 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \
4449 pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg);
4450 CL_PRINTF(cliBuf);
4451
4452 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0);
4453 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
4454 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
4455 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc);
4456 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
4457 u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]);
4458 CL_PRINTF(cliBuf);
4459
4460 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \
4461 pCoexSta->highPriorityRx, pCoexSta->highPriorityTx);
4462 CL_PRINTF(cliBuf);
4463 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \
4464 pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
4465 CL_PRINTF(cliBuf);
4466 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1)
4467 //halbtc8723b2ant_MonitorBtCtr(pBtCoexist);
4468 #endif
4469 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
4470 }
4471
4472
4473 VOID
EXhalbtc8723b2ant_IpsNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4474 EXhalbtc8723b2ant_IpsNotify(
4475 IN PBTC_COEXIST pBtCoexist,
4476 IN u1Byte type
4477 )
4478 {
4479 if(BTC_IPS_ENTER == type)
4480 {
4481 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n"));
4482 pCoexSta->bUnderIps = TRUE;
4483 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
4484 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
4485 halbtc8723b2ant_CoexAllOff(pBtCoexist);
4486 }
4487 else if(BTC_IPS_LEAVE == type)
4488 {
4489 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n"));
4490 pCoexSta->bUnderIps = FALSE;
4491 halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE);
4492 halbtc8723b2ant_InitCoexDm(pBtCoexist);
4493 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
4494 }
4495 }
4496
4497 VOID
EXhalbtc8723b2ant_LpsNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4498 EXhalbtc8723b2ant_LpsNotify(
4499 IN PBTC_COEXIST pBtCoexist,
4500 IN u1Byte type
4501 )
4502 {
4503 if(BTC_LPS_ENABLE == type)
4504 {
4505 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n"));
4506 pCoexSta->bUnderLps = TRUE;
4507 }
4508 else if(BTC_LPS_DISABLE == type)
4509 {
4510 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n"));
4511 pCoexSta->bUnderLps = FALSE;
4512 }
4513 }
4514
4515 VOID
EXhalbtc8723b2ant_ScanNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4516 EXhalbtc8723b2ant_ScanNotify(
4517 IN PBTC_COEXIST pBtCoexist,
4518 IN u1Byte type
4519 )
4520 {
4521 u4Byte u4Tmp;
4522 u1Byte u1Tmpa, u1Tmpb;
4523
4524
4525
4526 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
4527 u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
4528 u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e);
4529
4530 if(BTC_SCAN_START == type)
4531 {
4532 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n"));
4533 }
4534 else if(BTC_SCAN_FINISH == type)
4535 {
4536 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n"));
4537 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum);
4538 }
4539
4540 RT_TRACE(COMP_COEX, DBG_LOUD, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
4541 u4Tmp, u1Tmpa, u1Tmpb));
4542 }
4543
4544 VOID
EXhalbtc8723b2ant_ConnectNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4545 EXhalbtc8723b2ant_ConnectNotify(
4546 IN PBTC_COEXIST pBtCoexist,
4547 IN u1Byte type
4548 )
4549 {
4550 if(BTC_ASSOCIATE_START == type)
4551 {
4552 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n"));
4553 }
4554 else if(BTC_ASSOCIATE_FINISH == type)
4555 {
4556 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n"));
4557 }
4558 }
4559
4560 VOID
EXhalbtc8723b2ant_MediaStatusNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4561 EXhalbtc8723b2ant_MediaStatusNotify(
4562 IN PBTC_COEXIST pBtCoexist,
4563 IN u1Byte type
4564 )
4565 {
4566 u1Byte H2C_Parameter[3] ={0};
4567 u4Byte wifiBw;
4568 u1Byte wifiCentralChnl;
4569 u1Byte apNum=0;
4570
4571 if(BTC_MEDIA_CONNECT == type)
4572 {
4573 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n"));
4574 }
4575 else
4576 {
4577 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n"));
4578 }
4579
4580 // only 2.4G we need to inform bt the chnl mask
4581 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
4582 if( (BTC_MEDIA_CONNECT == type) &&
4583 (wifiCentralChnl <= 14) )
4584 {
4585 H2C_Parameter[0] = 0x1;
4586 H2C_Parameter[1] = wifiCentralChnl;
4587 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
4588 if(BTC_WIFI_BW_HT40 == wifiBw)
4589 H2C_Parameter[2] = 0x30;
4590 else
4591 {
4592 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
4593 if(apNum < 10)
4594 H2C_Parameter[2] = 0x30;
4595 else
4596 H2C_Parameter[2] = 0x20;
4597 }
4598 }
4599
4600 pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
4601 pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
4602 pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
4603
4604 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], FW write 0x66=0x%x\n",
4605 H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
4606
4607 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
4608 }
4609
4610 VOID
EXhalbtc8723b2ant_SpecialPacketNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte type)4611 EXhalbtc8723b2ant_SpecialPacketNotify(
4612 IN PBTC_COEXIST pBtCoexist,
4613 IN u1Byte type
4614 )
4615 {
4616 if(type == BTC_PACKET_DHCP)
4617 {
4618 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n"));
4619 }
4620 }
4621
4622 VOID
EXhalbtc8723b2ant_BtInfoNotify(IN PBTC_COEXIST pBtCoexist,IN pu1Byte tmpBuf,IN u1Byte length)4623 EXhalbtc8723b2ant_BtInfoNotify(
4624 IN PBTC_COEXIST pBtCoexist,
4625 IN pu1Byte tmpBuf,
4626 IN u1Byte length
4627 )
4628 {
4629 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
4630 u1Byte btInfo=0;
4631 u1Byte i, rspSource=0;
4632 BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE;
4633 BOOLEAN bWifiConnected=FALSE;
4634 static BOOLEAN bPreScoExist=FALSE;
4635 u4Byte raMask=0x0;
4636
4637 pCoexSta->bC2hBtInfoReqSent = FALSE;
4638
4639 rspSource = tmpBuf[0]&0xf;
4640 if(rspSource >= BT_INFO_SRC_8723B_2ANT_MAX)
4641 rspSource = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
4642 pCoexSta->btInfoC2hCnt[rspSource]++;
4643
4644 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length));
4645 for(i=0; i<length; i++)
4646 {
4647 pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
4648 if(i == 1)
4649 btInfo = tmpBuf[i];
4650 if(i == length-1)
4651 {
4652 RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x]\n", tmpBuf[i]));
4653 }
4654 else
4655 {
4656 RT_TRACE(COMP_COEX, DBG_LOUD, ("0x%02x, ", tmpBuf[i]));
4657 }
4658 }
4659
4660 if(pBtCoexist->bManualControl)
4661 {
4662 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n"));
4663 return;
4664 }
4665
4666 // if 0xff, it means BT is under WHCK test
4667 if (btInfo == 0xff)
4668 pCoexSta->bBtWhckTest = TRUE;
4669 else
4670 pCoexSta->bBtWhckTest = FALSE;
4671
4672 if(BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource)
4673 {
4674 pCoexSta->btRetryCnt = // [3:0]
4675 pCoexSta->btInfoC2h[rspSource][2]&0xf;
4676
4677 if (pCoexSta->btRetryCnt >= 1)
4678 pCoexSta->popEventCnt++;
4679
4680 pCoexSta->btRssi =
4681 pCoexSta->btInfoC2h[rspSource][3]*2+10;
4682
4683 pCoexSta->btInfoExt =
4684 pCoexSta->btInfoC2h[rspSource][4];
4685
4686 if (pCoexSta->btInfoC2h[rspSource][2]&0x20)
4687 pCoexSta->bC2hBtRemoteNameReq = TRUE;
4688 else
4689 pCoexSta->bC2hBtRemoteNameReq = FALSE;
4690
4691 if (pCoexSta->btInfoC2h[rspSource][1] == 0x49)
4692 {
4693 pCoexSta->nA2DPBitPool =
4694 pCoexSta->btInfoC2h[rspSource][6];
4695 }
4696 else
4697 pCoexSta->nA2DPBitPool = 0;
4698
4699 pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40);
4700 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask);
4701 if (pCoexSta->bBtTxRxMask)
4702 {
4703 /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
4704 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n"));
4705 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01);
4706 }
4707
4708 // Here we need to resend some wifi info to BT
4709 // because bt is reset and loss of the info.
4710 if( (pCoexSta->btInfoExt & BIT1) )
4711 {
4712 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"));
4713 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
4714 if(bWifiConnected)
4715 {
4716 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
4717 }
4718 else
4719 {
4720 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
4721 }
4722 }
4723
4724 if( (pCoexSta->btInfoExt & BIT3) )
4725 {
4726 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"));
4727 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE);
4728 }
4729 else
4730 {
4731 // BT already NOT ignore Wlan active, do nothing here.
4732 }
4733 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
4734 if( (pCoexSta->btInfoExt & BIT4) )
4735 {
4736 // BT auto report already enabled, do nothing
4737 }
4738 else
4739 {
4740 halbtc8723b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE);
4741 }
4742 #endif
4743 }
4744
4745 // check BIT2 first ==> check if bt is under inquiry or page scan
4746 if(btInfo & BT_INFO_8723B_2ANT_B_INQ_PAGE)
4747 pCoexSta->bC2hBtInquiryPage = TRUE;
4748 else
4749 pCoexSta->bC2hBtInquiryPage = FALSE;
4750
4751 // set link exist status
4752 if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION))
4753 {
4754 pCoexSta->bBtLinkExist = FALSE;
4755 pCoexSta->bPanExist = FALSE;
4756 pCoexSta->bA2dpExist = FALSE;
4757 pCoexSta->bHidExist = FALSE;
4758 pCoexSta->bScoExist = FALSE;
4759 }
4760 else // connection exists
4761 {
4762 pCoexSta->bBtLinkExist = TRUE;
4763 if(btInfo & BT_INFO_8723B_2ANT_B_FTP)
4764 pCoexSta->bPanExist = TRUE;
4765 else
4766 pCoexSta->bPanExist = FALSE;
4767 if(btInfo & BT_INFO_8723B_2ANT_B_A2DP)
4768 pCoexSta->bA2dpExist = TRUE;
4769 else
4770 pCoexSta->bA2dpExist = FALSE;
4771 if(btInfo & BT_INFO_8723B_2ANT_B_HID)
4772 pCoexSta->bHidExist = TRUE;
4773 else
4774 pCoexSta->bHidExist = FALSE;
4775 if(btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO)
4776 pCoexSta->bScoExist = TRUE;
4777 else
4778 pCoexSta->bScoExist = FALSE;
4779
4780 if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) && (pCoexSta->bScoExist == FALSE))
4781 {
4782 if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160)
4783 {
4784 pCoexSta->bHidExist = TRUE;
4785 btInfo = btInfo | 0x28;
4786 }
4787 }
4788 }
4789
4790 halbtc8723b2ant_UpdateBtLinkInfo(pBtCoexist);
4791
4792 if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION))
4793 {
4794 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4795 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"));
4796 }
4797 else if(btInfo == BT_INFO_8723B_2ANT_B_CONNECTION) // connection exists but no busy
4798 {
4799 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
4800 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"));
4801 }
4802 else if((btInfo&BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
4803 (btInfo&BT_INFO_8723B_2ANT_B_SCO_BUSY))
4804 {
4805 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
4806 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"));
4807 }
4808 else if(btInfo&BT_INFO_8723B_2ANT_B_ACL_BUSY)
4809 {
4810 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
4811 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"));
4812 }
4813 else
4814 {
4815 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_MAX;
4816 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"));
4817 }
4818
4819 if( (BT_8723B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
4820 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) ||
4821 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) )
4822 {
4823 bBtBusy = TRUE;
4824 bLimitedDig = TRUE;
4825 }
4826 else
4827 {
4828 bBtBusy = FALSE;
4829 bLimitedDig = FALSE;
4830 }
4831
4832 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
4833
4834 pCoexDm->bLimitedDig = bLimitedDig;
4835 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
4836
4837 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
4838 }
4839
4840 VOID
EXhalbtc8723b2ant_HaltNotify(IN PBTC_COEXIST pBtCoexist)4841 EXhalbtc8723b2ant_HaltNotify(
4842 IN PBTC_COEXIST pBtCoexist
4843 )
4844 {
4845 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n"));
4846
4847 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
4848 //remove due to interrupt is disabled that polling c2h will fail and delay 100ms.
4849 //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0
4850 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
4851
4852 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
4853 }
4854
4855 VOID
EXhalbtc8723b2ant_PnpNotify(IN PBTC_COEXIST pBtCoexist,IN u1Byte pnpState)4856 EXhalbtc8723b2ant_PnpNotify(
4857 IN PBTC_COEXIST pBtCoexist,
4858 IN u1Byte pnpState
4859 )
4860 {
4861 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify\n"));
4862
4863 if(BTC_WIFI_PNP_SLEEP == pnpState)
4864 {
4865 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to SLEEP\n"));
4866 }
4867 else if(BTC_WIFI_PNP_WAKE_UP == pnpState)
4868 {
4869 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Pnp notify to WAKE UP\n"));
4870 halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE);
4871 halbtc8723b2ant_InitCoexDm(pBtCoexist);
4872 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
4873 }
4874 }
4875
4876 VOID
EXhalbtc8723b2ant_Periodical(IN PBTC_COEXIST pBtCoexist)4877 EXhalbtc8723b2ant_Periodical(
4878 IN PBTC_COEXIST pBtCoexist
4879 )
4880 {
4881 //static u1Byte disVerInfoCnt=0;
4882 u4Byte fwVer=0, btPatchVer=0;
4883 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
4884 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
4885 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
4886
4887 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ==========================Periodical===========================\n"));
4888
4889 if(pCoexSta->disVerInfoCnt <= 5)
4890 {
4891 pCoexSta->disVerInfoCnt += 1;
4892 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n"));
4893 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
4894 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos));
4895 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n",
4896 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion));
4897 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
4898 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
4899 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
4900 GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer));
4901 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], ****************************************************************\n"));
4902
4903 if (pCoexSta->disVerInfoCnt == 3)
4904 {
4905 //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial
4906 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Set GNT_BT control by PTA\n"));
4907 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
4908 }
4909 }
4910
4911 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
4912 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
4913 halbtc8723b2ant_MonitorBtEnableDisable(pBtCoexist);
4914 #else
4915 halbtc8723b2ant_MonitorBtCtr(pBtCoexist);
4916 halbtc8723b2ant_MonitorWiFiCtr(pBtCoexist);
4917
4918 //for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist
4919 if ( (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx < 50) && (pBtLinkInfo->bHidExist == TRUE))
4920 {
4921 pBtLinkInfo->bHidExist = FALSE;
4922 }
4923
4924 if( halbtc8723b2ant_IsWifiStatusChanged(pBtCoexist) ||
4925 pCoexDm->bAutoTdmaAdjust)
4926 {
4927 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
4928 }
4929 #endif
4930 }
4931
4932
4933 #endif
4934
4935