1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2*4882a593Smuzhiyun /* Copyright(c) 2018-2019 Realtek Corporation 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifndef __RTW_TX_H_ 6*4882a593Smuzhiyun #define __RTW_TX_H_ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define RTK_TX_MAX_AGG_NUM_MASK 0x1f 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define RTW_TX_PROBE_TIMEOUT msecs_to_jiffies(500) 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define SET_TX_DESC_TXPKTSIZE(txdesc, value) \ 13*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(15, 0)) 14*4882a593Smuzhiyun #define SET_TX_DESC_OFFSET(txdesc, value) \ 15*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(23, 16)) 16*4882a593Smuzhiyun #define SET_TX_DESC_PKT_OFFSET(txdesc, value) \ 17*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(28, 24)) 18*4882a593Smuzhiyun #define SET_TX_DESC_QSEL(txdesc, value) \ 19*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(12, 8)) 20*4882a593Smuzhiyun #define SET_TX_DESC_BMC(txdesc, value) \ 21*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(24)) 22*4882a593Smuzhiyun #define SET_TX_DESC_RATE_ID(txdesc, value) \ 23*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(20, 16)) 24*4882a593Smuzhiyun #define SET_TX_DESC_DATARATE(txdesc, value) \ 25*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x04, value, GENMASK(6, 0)) 26*4882a593Smuzhiyun #define SET_TX_DESC_DISDATAFB(txdesc, value) \ 27*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(10)) 28*4882a593Smuzhiyun #define SET_TX_DESC_USE_RATE(txdesc, value) \ 29*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(8)) 30*4882a593Smuzhiyun #define SET_TX_DESC_SEC_TYPE(txdesc, value) \ 31*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(23, 22)) 32*4882a593Smuzhiyun #define SET_TX_DESC_DATA_BW(txdesc, value) \ 33*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(6, 5)) 34*4882a593Smuzhiyun #define SET_TX_DESC_SW_SEQ(txdesc, value) \ 35*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, GENMASK(23, 12)) 36*4882a593Smuzhiyun #define SET_TX_DESC_MAX_AGG_NUM(txdesc, value) \ 37*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(21, 17)) 38*4882a593Smuzhiyun #define SET_TX_DESC_USE_RTS(tx_desc, value) \ 39*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(12)) 40*4882a593Smuzhiyun #define SET_TX_DESC_AMPDU_DENSITY(txdesc, value) \ 41*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, GENMASK(22, 20)) 42*4882a593Smuzhiyun #define SET_TX_DESC_DATA_STBC(txdesc, value) \ 43*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(9, 8)) 44*4882a593Smuzhiyun #define SET_TX_DESC_DATA_LDPC(txdesc, value) \ 45*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(7)) 46*4882a593Smuzhiyun #define SET_TX_DESC_AGG_EN(txdesc, value) \ 47*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(12)) 48*4882a593Smuzhiyun #define SET_TX_DESC_LS(txdesc, value) \ 49*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(26)) 50*4882a593Smuzhiyun #define SET_TX_DESC_DATA_SHORT(txdesc, value) \ 51*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(4)) 52*4882a593Smuzhiyun #define SET_TX_DESC_SPE_RPT(tx_desc, value) \ 53*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(19)) 54*4882a593Smuzhiyun #define SET_TX_DESC_SW_DEFINE(tx_desc, value) \ 55*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x06, value, GENMASK(11, 0)) 56*4882a593Smuzhiyun #define SET_TX_DESC_DISQSELSEQ(txdesc, value) \ 57*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(31)) 58*4882a593Smuzhiyun #define SET_TX_DESC_EN_HWSEQ(txdesc, value) \ 59*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x08, value, BIT(15)) 60*4882a593Smuzhiyun #define SET_TX_DESC_HW_SSN_SEL(txdesc, value) \ 61*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(7, 6)) 62*4882a593Smuzhiyun #define SET_TX_DESC_NAVUSEHDR(txdesc, value) \ 63*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(15)) 64*4882a593Smuzhiyun #define SET_TX_DESC_BT_NULL(txdesc, value) \ 65*4882a593Smuzhiyun le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(23)) 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun enum rtw_tx_desc_queue_select { 68*4882a593Smuzhiyun TX_DESC_QSEL_TID0 = 0, 69*4882a593Smuzhiyun TX_DESC_QSEL_TID1 = 1, 70*4882a593Smuzhiyun TX_DESC_QSEL_TID2 = 2, 71*4882a593Smuzhiyun TX_DESC_QSEL_TID3 = 3, 72*4882a593Smuzhiyun TX_DESC_QSEL_TID4 = 4, 73*4882a593Smuzhiyun TX_DESC_QSEL_TID5 = 5, 74*4882a593Smuzhiyun TX_DESC_QSEL_TID6 = 6, 75*4882a593Smuzhiyun TX_DESC_QSEL_TID7 = 7, 76*4882a593Smuzhiyun TX_DESC_QSEL_TID8 = 8, 77*4882a593Smuzhiyun TX_DESC_QSEL_TID9 = 9, 78*4882a593Smuzhiyun TX_DESC_QSEL_TID10 = 10, 79*4882a593Smuzhiyun TX_DESC_QSEL_TID11 = 11, 80*4882a593Smuzhiyun TX_DESC_QSEL_TID12 = 12, 81*4882a593Smuzhiyun TX_DESC_QSEL_TID13 = 13, 82*4882a593Smuzhiyun TX_DESC_QSEL_TID14 = 14, 83*4882a593Smuzhiyun TX_DESC_QSEL_TID15 = 15, 84*4882a593Smuzhiyun TX_DESC_QSEL_BEACON = 16, 85*4882a593Smuzhiyun TX_DESC_QSEL_HIGH = 17, 86*4882a593Smuzhiyun TX_DESC_QSEL_MGMT = 18, 87*4882a593Smuzhiyun TX_DESC_QSEL_H2C = 19, 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun enum rtw_rsvd_packet_type; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun void rtw_tx(struct rtw_dev *rtwdev, 93*4882a593Smuzhiyun struct ieee80211_tx_control *control, 94*4882a593Smuzhiyun struct sk_buff *skb); 95*4882a593Smuzhiyun void rtw_txq_init(struct rtw_dev *rtwdev, struct ieee80211_txq *txq); 96*4882a593Smuzhiyun void rtw_txq_cleanup(struct rtw_dev *rtwdev, struct ieee80211_txq *txq); 97*4882a593Smuzhiyun void rtw_tx_tasklet(struct tasklet_struct *t); 98*4882a593Smuzhiyun void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev, 99*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info, 100*4882a593Smuzhiyun struct ieee80211_sta *sta, 101*4882a593Smuzhiyun struct sk_buff *skb); 102*4882a593Smuzhiyun void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb); 103*4882a593Smuzhiyun void rtw_tx_report_enqueue(struct rtw_dev *rtwdev, struct sk_buff *skb, u8 sn); 104*4882a593Smuzhiyun void rtw_tx_report_handle(struct rtw_dev *rtwdev, struct sk_buff *skb, int src); 105*4882a593Smuzhiyun void rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev, 106*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info, 107*4882a593Smuzhiyun struct sk_buff *skb, 108*4882a593Smuzhiyun enum rtw_rsvd_packet_type type); 109*4882a593Smuzhiyun struct sk_buff * 110*4882a593Smuzhiyun rtw_tx_write_data_rsvd_page_get(struct rtw_dev *rtwdev, 111*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info, 112*4882a593Smuzhiyun u8 *buf, u32 size); 113*4882a593Smuzhiyun struct sk_buff * 114*4882a593Smuzhiyun rtw_tx_write_data_h2c_get(struct rtw_dev *rtwdev, 115*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info, 116*4882a593Smuzhiyun u8 *buf, u32 size); 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #endif 119