1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2*4882a593Smuzhiyun /* Copyright(c) 2018-2019 Realtek Corporation
3*4882a593Smuzhiyun */
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include "main.h"
6*4882a593Smuzhiyun #include "tx.h"
7*4882a593Smuzhiyun #include "fw.h"
8*4882a593Smuzhiyun #include "ps.h"
9*4882a593Smuzhiyun #include "debug.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun static
rtw_tx_stats(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,struct sk_buff * skb)12*4882a593Smuzhiyun void rtw_tx_stats(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
13*4882a593Smuzhiyun struct sk_buff *skb)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
16*4882a593Smuzhiyun struct rtw_vif *rtwvif;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)skb->data;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun if (!ieee80211_is_data(hdr->frame_control))
21*4882a593Smuzhiyun return;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun if (!is_broadcast_ether_addr(hdr->addr1) &&
24*4882a593Smuzhiyun !is_multicast_ether_addr(hdr->addr1)) {
25*4882a593Smuzhiyun rtwdev->stats.tx_unicast += skb->len;
26*4882a593Smuzhiyun rtwdev->stats.tx_cnt++;
27*4882a593Smuzhiyun if (vif) {
28*4882a593Smuzhiyun rtwvif = (struct rtw_vif *)vif->drv_priv;
29*4882a593Smuzhiyun rtwvif->stats.tx_unicast += skb->len;
30*4882a593Smuzhiyun rtwvif->stats.tx_cnt++;
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info * pkt_info,struct sk_buff * skb)35*4882a593Smuzhiyun void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun __le32 *txdesc = (__le32 *)skb->data;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun SET_TX_DESC_TXPKTSIZE(txdesc, pkt_info->tx_pkt_size);
40*4882a593Smuzhiyun SET_TX_DESC_OFFSET(txdesc, pkt_info->offset);
41*4882a593Smuzhiyun SET_TX_DESC_PKT_OFFSET(txdesc, pkt_info->pkt_offset);
42*4882a593Smuzhiyun SET_TX_DESC_QSEL(txdesc, pkt_info->qsel);
43*4882a593Smuzhiyun SET_TX_DESC_BMC(txdesc, pkt_info->bmc);
44*4882a593Smuzhiyun SET_TX_DESC_RATE_ID(txdesc, pkt_info->rate_id);
45*4882a593Smuzhiyun SET_TX_DESC_DATARATE(txdesc, pkt_info->rate);
46*4882a593Smuzhiyun SET_TX_DESC_DISDATAFB(txdesc, pkt_info->dis_rate_fallback);
47*4882a593Smuzhiyun SET_TX_DESC_USE_RATE(txdesc, pkt_info->use_rate);
48*4882a593Smuzhiyun SET_TX_DESC_SEC_TYPE(txdesc, pkt_info->sec_type);
49*4882a593Smuzhiyun SET_TX_DESC_DATA_BW(txdesc, pkt_info->bw);
50*4882a593Smuzhiyun SET_TX_DESC_SW_SEQ(txdesc, pkt_info->seq);
51*4882a593Smuzhiyun SET_TX_DESC_MAX_AGG_NUM(txdesc, pkt_info->ampdu_factor);
52*4882a593Smuzhiyun SET_TX_DESC_AMPDU_DENSITY(txdesc, pkt_info->ampdu_density);
53*4882a593Smuzhiyun SET_TX_DESC_DATA_STBC(txdesc, pkt_info->stbc);
54*4882a593Smuzhiyun SET_TX_DESC_DATA_LDPC(txdesc, pkt_info->ldpc);
55*4882a593Smuzhiyun SET_TX_DESC_AGG_EN(txdesc, pkt_info->ampdu_en);
56*4882a593Smuzhiyun SET_TX_DESC_LS(txdesc, pkt_info->ls);
57*4882a593Smuzhiyun SET_TX_DESC_DATA_SHORT(txdesc, pkt_info->short_gi);
58*4882a593Smuzhiyun SET_TX_DESC_SPE_RPT(txdesc, pkt_info->report);
59*4882a593Smuzhiyun SET_TX_DESC_SW_DEFINE(txdesc, pkt_info->sn);
60*4882a593Smuzhiyun SET_TX_DESC_USE_RTS(txdesc, pkt_info->rts);
61*4882a593Smuzhiyun SET_TX_DESC_DISQSELSEQ(txdesc, pkt_info->dis_qselseq);
62*4882a593Smuzhiyun SET_TX_DESC_EN_HWSEQ(txdesc, pkt_info->en_hwseq);
63*4882a593Smuzhiyun SET_TX_DESC_HW_SSN_SEL(txdesc, pkt_info->hw_ssn_sel);
64*4882a593Smuzhiyun SET_TX_DESC_NAVUSEHDR(txdesc, pkt_info->nav_use_hdr);
65*4882a593Smuzhiyun SET_TX_DESC_BT_NULL(txdesc, pkt_info->bt_null);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun EXPORT_SYMBOL(rtw_tx_fill_tx_desc);
68*4882a593Smuzhiyun
get_tx_ampdu_factor(struct ieee80211_sta * sta)69*4882a593Smuzhiyun static u8 get_tx_ampdu_factor(struct ieee80211_sta *sta)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun u8 exp = sta->ht_cap.ampdu_factor;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* the least ampdu factor is 8K, and the value in the tx desc is the
74*4882a593Smuzhiyun * max aggregation num, which represents val * 2 packets can be
75*4882a593Smuzhiyun * aggregated in an AMPDU, so here we should use 8/2=4 as the base
76*4882a593Smuzhiyun */
77*4882a593Smuzhiyun return (BIT(2) << exp) - 1;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
get_tx_ampdu_density(struct ieee80211_sta * sta)80*4882a593Smuzhiyun static u8 get_tx_ampdu_density(struct ieee80211_sta *sta)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun return sta->ht_cap.ampdu_density;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
get_highest_ht_tx_rate(struct rtw_dev * rtwdev,struct ieee80211_sta * sta)85*4882a593Smuzhiyun static u8 get_highest_ht_tx_rate(struct rtw_dev *rtwdev,
86*4882a593Smuzhiyun struct ieee80211_sta *sta)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun u8 rate;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (rtwdev->hal.rf_type == RF_2T2R && sta->ht_cap.mcs.rx_mask[1] != 0)
91*4882a593Smuzhiyun rate = DESC_RATEMCS15;
92*4882a593Smuzhiyun else
93*4882a593Smuzhiyun rate = DESC_RATEMCS7;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return rate;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
get_highest_vht_tx_rate(struct rtw_dev * rtwdev,struct ieee80211_sta * sta)98*4882a593Smuzhiyun static u8 get_highest_vht_tx_rate(struct rtw_dev *rtwdev,
99*4882a593Smuzhiyun struct ieee80211_sta *sta)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun struct rtw_efuse *efuse = &rtwdev->efuse;
102*4882a593Smuzhiyun u8 rate;
103*4882a593Smuzhiyun u16 tx_mcs_map;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun tx_mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.tx_mcs_map);
106*4882a593Smuzhiyun if (efuse->hw_cap.nss == 1) {
107*4882a593Smuzhiyun switch (tx_mcs_map & 0x3) {
108*4882a593Smuzhiyun case IEEE80211_VHT_MCS_SUPPORT_0_7:
109*4882a593Smuzhiyun rate = DESC_RATEVHT1SS_MCS7;
110*4882a593Smuzhiyun break;
111*4882a593Smuzhiyun case IEEE80211_VHT_MCS_SUPPORT_0_8:
112*4882a593Smuzhiyun rate = DESC_RATEVHT1SS_MCS8;
113*4882a593Smuzhiyun break;
114*4882a593Smuzhiyun default:
115*4882a593Smuzhiyun case IEEE80211_VHT_MCS_SUPPORT_0_9:
116*4882a593Smuzhiyun rate = DESC_RATEVHT1SS_MCS9;
117*4882a593Smuzhiyun break;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun } else if (efuse->hw_cap.nss >= 2) {
120*4882a593Smuzhiyun switch ((tx_mcs_map & 0xc) >> 2) {
121*4882a593Smuzhiyun case IEEE80211_VHT_MCS_SUPPORT_0_7:
122*4882a593Smuzhiyun rate = DESC_RATEVHT2SS_MCS7;
123*4882a593Smuzhiyun break;
124*4882a593Smuzhiyun case IEEE80211_VHT_MCS_SUPPORT_0_8:
125*4882a593Smuzhiyun rate = DESC_RATEVHT2SS_MCS8;
126*4882a593Smuzhiyun break;
127*4882a593Smuzhiyun default:
128*4882a593Smuzhiyun case IEEE80211_VHT_MCS_SUPPORT_0_9:
129*4882a593Smuzhiyun rate = DESC_RATEVHT2SS_MCS9;
130*4882a593Smuzhiyun break;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun } else {
133*4882a593Smuzhiyun rate = DESC_RATEVHT1SS_MCS9;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return rate;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
rtw_tx_report_enable(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info)139*4882a593Smuzhiyun static void rtw_tx_report_enable(struct rtw_dev *rtwdev,
140*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun struct rtw_tx_report *tx_report = &rtwdev->tx_report;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* [11:8], reserved, fills with zero
145*4882a593Smuzhiyun * [7:2], tx report sequence number
146*4882a593Smuzhiyun * [1:0], firmware use, fills with zero
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun pkt_info->sn = (atomic_inc_return(&tx_report->sn) << 2) & 0xfc;
149*4882a593Smuzhiyun pkt_info->report = true;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
rtw_tx_report_purge_timer(struct timer_list * t)152*4882a593Smuzhiyun void rtw_tx_report_purge_timer(struct timer_list *t)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun struct rtw_dev *rtwdev = from_timer(rtwdev, t, tx_report.purge_timer);
155*4882a593Smuzhiyun struct rtw_tx_report *tx_report = &rtwdev->tx_report;
156*4882a593Smuzhiyun unsigned long flags;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (skb_queue_len(&tx_report->queue) == 0)
159*4882a593Smuzhiyun return;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun WARN(1, "purge skb(s) not reported by firmware\n");
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun spin_lock_irqsave(&tx_report->q_lock, flags);
164*4882a593Smuzhiyun skb_queue_purge(&tx_report->queue);
165*4882a593Smuzhiyun spin_unlock_irqrestore(&tx_report->q_lock, flags);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
rtw_tx_report_enqueue(struct rtw_dev * rtwdev,struct sk_buff * skb,u8 sn)168*4882a593Smuzhiyun void rtw_tx_report_enqueue(struct rtw_dev *rtwdev, struct sk_buff *skb, u8 sn)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct rtw_tx_report *tx_report = &rtwdev->tx_report;
171*4882a593Smuzhiyun unsigned long flags;
172*4882a593Smuzhiyun u8 *drv_data;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun /* pass sn to tx report handler through driver data */
175*4882a593Smuzhiyun drv_data = (u8 *)IEEE80211_SKB_CB(skb)->status.status_driver_data;
176*4882a593Smuzhiyun *drv_data = sn;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun spin_lock_irqsave(&tx_report->q_lock, flags);
179*4882a593Smuzhiyun __skb_queue_tail(&tx_report->queue, skb);
180*4882a593Smuzhiyun spin_unlock_irqrestore(&tx_report->q_lock, flags);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun mod_timer(&tx_report->purge_timer, jiffies + RTW_TX_PROBE_TIMEOUT);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun EXPORT_SYMBOL(rtw_tx_report_enqueue);
185*4882a593Smuzhiyun
rtw_tx_report_tx_status(struct rtw_dev * rtwdev,struct sk_buff * skb,bool acked)186*4882a593Smuzhiyun static void rtw_tx_report_tx_status(struct rtw_dev *rtwdev,
187*4882a593Smuzhiyun struct sk_buff *skb, bool acked)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun struct ieee80211_tx_info *info;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun info = IEEE80211_SKB_CB(skb);
192*4882a593Smuzhiyun ieee80211_tx_info_clear_status(info);
193*4882a593Smuzhiyun if (acked)
194*4882a593Smuzhiyun info->flags |= IEEE80211_TX_STAT_ACK;
195*4882a593Smuzhiyun else
196*4882a593Smuzhiyun info->flags &= ~IEEE80211_TX_STAT_ACK;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun ieee80211_tx_status_irqsafe(rtwdev->hw, skb);
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
rtw_tx_report_handle(struct rtw_dev * rtwdev,struct sk_buff * skb,int src)201*4882a593Smuzhiyun void rtw_tx_report_handle(struct rtw_dev *rtwdev, struct sk_buff *skb, int src)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun struct rtw_tx_report *tx_report = &rtwdev->tx_report;
204*4882a593Smuzhiyun struct rtw_c2h_cmd *c2h;
205*4882a593Smuzhiyun struct sk_buff *cur, *tmp;
206*4882a593Smuzhiyun unsigned long flags;
207*4882a593Smuzhiyun u8 sn, st;
208*4882a593Smuzhiyun u8 *n;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun c2h = get_c2h_from_skb(skb);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (src == C2H_CCX_TX_RPT) {
213*4882a593Smuzhiyun sn = GET_CCX_REPORT_SEQNUM_V0(c2h->payload);
214*4882a593Smuzhiyun st = GET_CCX_REPORT_STATUS_V0(c2h->payload);
215*4882a593Smuzhiyun } else {
216*4882a593Smuzhiyun sn = GET_CCX_REPORT_SEQNUM_V1(c2h->payload);
217*4882a593Smuzhiyun st = GET_CCX_REPORT_STATUS_V1(c2h->payload);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun spin_lock_irqsave(&tx_report->q_lock, flags);
221*4882a593Smuzhiyun skb_queue_walk_safe(&tx_report->queue, cur, tmp) {
222*4882a593Smuzhiyun n = (u8 *)IEEE80211_SKB_CB(cur)->status.status_driver_data;
223*4882a593Smuzhiyun if (*n == sn) {
224*4882a593Smuzhiyun __skb_unlink(cur, &tx_report->queue);
225*4882a593Smuzhiyun rtw_tx_report_tx_status(rtwdev, cur, st == 0);
226*4882a593Smuzhiyun break;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun spin_unlock_irqrestore(&tx_report->q_lock, flags);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
rtw_tx_pkt_info_update_rate(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,struct sk_buff * skb)232*4882a593Smuzhiyun static void rtw_tx_pkt_info_update_rate(struct rtw_dev *rtwdev,
233*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
234*4882a593Smuzhiyun struct sk_buff *skb)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun if (rtwdev->hal.current_band_type == RTW_BAND_2G) {
237*4882a593Smuzhiyun pkt_info->rate_id = RTW_RATEID_B_20M;
238*4882a593Smuzhiyun pkt_info->rate = DESC_RATE1M;
239*4882a593Smuzhiyun } else {
240*4882a593Smuzhiyun pkt_info->rate_id = RTW_RATEID_G;
241*4882a593Smuzhiyun pkt_info->rate = DESC_RATE6M;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun pkt_info->use_rate = true;
244*4882a593Smuzhiyun pkt_info->dis_rate_fallback = true;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
rtw_tx_pkt_info_update_sec(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,struct sk_buff * skb)247*4882a593Smuzhiyun static void rtw_tx_pkt_info_update_sec(struct rtw_dev *rtwdev,
248*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
249*4882a593Smuzhiyun struct sk_buff *skb)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
252*4882a593Smuzhiyun u8 sec_type = 0;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun if (info && info->control.hw_key) {
255*4882a593Smuzhiyun struct ieee80211_key_conf *key = info->control.hw_key;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun switch (key->cipher) {
258*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP40:
259*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP104:
260*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_TKIP:
261*4882a593Smuzhiyun sec_type = 0x01;
262*4882a593Smuzhiyun break;
263*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_CCMP:
264*4882a593Smuzhiyun sec_type = 0x03;
265*4882a593Smuzhiyun break;
266*4882a593Smuzhiyun default:
267*4882a593Smuzhiyun break;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun pkt_info->sec_type = sec_type;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
rtw_tx_mgmt_pkt_info_update(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,struct ieee80211_sta * sta,struct sk_buff * skb)274*4882a593Smuzhiyun static void rtw_tx_mgmt_pkt_info_update(struct rtw_dev *rtwdev,
275*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
276*4882a593Smuzhiyun struct ieee80211_sta *sta,
277*4882a593Smuzhiyun struct sk_buff *skb)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun rtw_tx_pkt_info_update_rate(rtwdev, pkt_info, skb);
280*4882a593Smuzhiyun pkt_info->dis_qselseq = true;
281*4882a593Smuzhiyun pkt_info->en_hwseq = true;
282*4882a593Smuzhiyun pkt_info->hw_ssn_sel = 0;
283*4882a593Smuzhiyun /* TODO: need to change hw port and hw ssn sel for multiple vifs */
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
rtw_tx_data_pkt_info_update(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,struct ieee80211_sta * sta,struct sk_buff * skb)286*4882a593Smuzhiyun static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev,
287*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
288*4882a593Smuzhiyun struct ieee80211_sta *sta,
289*4882a593Smuzhiyun struct sk_buff *skb)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
292*4882a593Smuzhiyun struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
293*4882a593Smuzhiyun struct rtw_sta_info *si;
294*4882a593Smuzhiyun u16 seq;
295*4882a593Smuzhiyun u8 ampdu_factor = 0;
296*4882a593Smuzhiyun u8 ampdu_density = 0;
297*4882a593Smuzhiyun bool ampdu_en = false;
298*4882a593Smuzhiyun u8 rate = DESC_RATE6M;
299*4882a593Smuzhiyun u8 rate_id = 6;
300*4882a593Smuzhiyun u8 bw = RTW_CHANNEL_WIDTH_20;
301*4882a593Smuzhiyun bool stbc = false;
302*4882a593Smuzhiyun bool ldpc = false;
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /* for broadcast/multicast, use default values */
307*4882a593Smuzhiyun if (!sta)
308*4882a593Smuzhiyun goto out;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun if (info->flags & IEEE80211_TX_CTL_AMPDU) {
311*4882a593Smuzhiyun ampdu_en = true;
312*4882a593Smuzhiyun ampdu_factor = get_tx_ampdu_factor(sta);
313*4882a593Smuzhiyun ampdu_density = get_tx_ampdu_density(sta);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun if (info->control.use_rts)
317*4882a593Smuzhiyun pkt_info->rts = true;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun if (sta->vht_cap.vht_supported)
320*4882a593Smuzhiyun rate = get_highest_vht_tx_rate(rtwdev, sta);
321*4882a593Smuzhiyun else if (sta->ht_cap.ht_supported)
322*4882a593Smuzhiyun rate = get_highest_ht_tx_rate(rtwdev, sta);
323*4882a593Smuzhiyun else if (sta->supp_rates[0] <= 0xf)
324*4882a593Smuzhiyun rate = DESC_RATE11M;
325*4882a593Smuzhiyun else
326*4882a593Smuzhiyun rate = DESC_RATE54M;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun si = (struct rtw_sta_info *)sta->drv_priv;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun bw = si->bw_mode;
331*4882a593Smuzhiyun rate_id = si->rate_id;
332*4882a593Smuzhiyun stbc = si->stbc_en;
333*4882a593Smuzhiyun ldpc = si->ldpc_en;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun out:
336*4882a593Smuzhiyun pkt_info->seq = seq;
337*4882a593Smuzhiyun pkt_info->ampdu_factor = ampdu_factor;
338*4882a593Smuzhiyun pkt_info->ampdu_density = ampdu_density;
339*4882a593Smuzhiyun pkt_info->ampdu_en = ampdu_en;
340*4882a593Smuzhiyun pkt_info->rate = rate;
341*4882a593Smuzhiyun pkt_info->rate_id = rate_id;
342*4882a593Smuzhiyun pkt_info->bw = bw;
343*4882a593Smuzhiyun pkt_info->stbc = stbc;
344*4882a593Smuzhiyun pkt_info->ldpc = ldpc;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
rtw_tx_pkt_info_update(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,struct ieee80211_sta * sta,struct sk_buff * skb)347*4882a593Smuzhiyun void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev,
348*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
349*4882a593Smuzhiyun struct ieee80211_sta *sta,
350*4882a593Smuzhiyun struct sk_buff *skb)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun struct rtw_chip_info *chip = rtwdev->chip;
353*4882a593Smuzhiyun struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
354*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
355*4882a593Smuzhiyun struct rtw_sta_info *si;
356*4882a593Smuzhiyun struct ieee80211_vif *vif = NULL;
357*4882a593Smuzhiyun __le16 fc = hdr->frame_control;
358*4882a593Smuzhiyun bool bmc;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun if (sta) {
361*4882a593Smuzhiyun si = (struct rtw_sta_info *)sta->drv_priv;
362*4882a593Smuzhiyun vif = si->vif;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
366*4882a593Smuzhiyun rtw_tx_mgmt_pkt_info_update(rtwdev, pkt_info, sta, skb);
367*4882a593Smuzhiyun else if (ieee80211_is_data(fc))
368*4882a593Smuzhiyun rtw_tx_data_pkt_info_update(rtwdev, pkt_info, sta, skb);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun bmc = is_broadcast_ether_addr(hdr->addr1) ||
371*4882a593Smuzhiyun is_multicast_ether_addr(hdr->addr1);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS)
374*4882a593Smuzhiyun rtw_tx_report_enable(rtwdev, pkt_info);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun pkt_info->bmc = bmc;
377*4882a593Smuzhiyun rtw_tx_pkt_info_update_sec(rtwdev, pkt_info, skb);
378*4882a593Smuzhiyun pkt_info->tx_pkt_size = skb->len;
379*4882a593Smuzhiyun pkt_info->offset = chip->tx_pkt_desc_sz;
380*4882a593Smuzhiyun pkt_info->qsel = skb->priority;
381*4882a593Smuzhiyun pkt_info->ls = true;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun /* maybe merge with tx status ? */
384*4882a593Smuzhiyun rtw_tx_stats(rtwdev, vif, skb);
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,struct sk_buff * skb,enum rtw_rsvd_packet_type type)387*4882a593Smuzhiyun void rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev,
388*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
389*4882a593Smuzhiyun struct sk_buff *skb,
390*4882a593Smuzhiyun enum rtw_rsvd_packet_type type)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun struct rtw_chip_info *chip = rtwdev->chip;
393*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
394*4882a593Smuzhiyun bool bmc;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun /* A beacon or dummy reserved page packet indicates that it is the first
397*4882a593Smuzhiyun * reserved page, and the qsel of it will be set in each hci.
398*4882a593Smuzhiyun */
399*4882a593Smuzhiyun if (type != RSVD_BEACON && type != RSVD_DUMMY)
400*4882a593Smuzhiyun pkt_info->qsel = TX_DESC_QSEL_MGMT;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun rtw_tx_pkt_info_update_rate(rtwdev, pkt_info, skb);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun bmc = is_broadcast_ether_addr(hdr->addr1) ||
405*4882a593Smuzhiyun is_multicast_ether_addr(hdr->addr1);
406*4882a593Smuzhiyun pkt_info->bmc = bmc;
407*4882a593Smuzhiyun pkt_info->tx_pkt_size = skb->len;
408*4882a593Smuzhiyun pkt_info->offset = chip->tx_pkt_desc_sz;
409*4882a593Smuzhiyun pkt_info->ls = true;
410*4882a593Smuzhiyun if (type == RSVD_PS_POLL) {
411*4882a593Smuzhiyun pkt_info->nav_use_hdr = true;
412*4882a593Smuzhiyun } else {
413*4882a593Smuzhiyun pkt_info->dis_qselseq = true;
414*4882a593Smuzhiyun pkt_info->en_hwseq = true;
415*4882a593Smuzhiyun pkt_info->hw_ssn_sel = 0;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun if (type == RSVD_QOS_NULL)
418*4882a593Smuzhiyun pkt_info->bt_null = true;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun rtw_tx_pkt_info_update_sec(rtwdev, pkt_info, skb);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun /* TODO: need to change hw port and hw ssn sel for multiple vifs */
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun struct sk_buff *
rtw_tx_write_data_rsvd_page_get(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,u8 * buf,u32 size)426*4882a593Smuzhiyun rtw_tx_write_data_rsvd_page_get(struct rtw_dev *rtwdev,
427*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
428*4882a593Smuzhiyun u8 *buf, u32 size)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun struct rtw_chip_info *chip = rtwdev->chip;
431*4882a593Smuzhiyun struct sk_buff *skb;
432*4882a593Smuzhiyun u32 tx_pkt_desc_sz;
433*4882a593Smuzhiyun u32 length;
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun tx_pkt_desc_sz = chip->tx_pkt_desc_sz;
436*4882a593Smuzhiyun length = size + tx_pkt_desc_sz;
437*4882a593Smuzhiyun skb = dev_alloc_skb(length);
438*4882a593Smuzhiyun if (!skb) {
439*4882a593Smuzhiyun rtw_err(rtwdev, "failed to alloc write data rsvd page skb\n");
440*4882a593Smuzhiyun return NULL;
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun skb_reserve(skb, tx_pkt_desc_sz);
444*4882a593Smuzhiyun skb_put_data(skb, buf, size);
445*4882a593Smuzhiyun rtw_tx_rsvd_page_pkt_info_update(rtwdev, pkt_info, skb, RSVD_BEACON);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun return skb;
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun EXPORT_SYMBOL(rtw_tx_write_data_rsvd_page_get);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun struct sk_buff *
rtw_tx_write_data_h2c_get(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,u8 * buf,u32 size)452*4882a593Smuzhiyun rtw_tx_write_data_h2c_get(struct rtw_dev *rtwdev,
453*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
454*4882a593Smuzhiyun u8 *buf, u32 size)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun struct rtw_chip_info *chip = rtwdev->chip;
457*4882a593Smuzhiyun struct sk_buff *skb;
458*4882a593Smuzhiyun u32 tx_pkt_desc_sz;
459*4882a593Smuzhiyun u32 length;
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun tx_pkt_desc_sz = chip->tx_pkt_desc_sz;
462*4882a593Smuzhiyun length = size + tx_pkt_desc_sz;
463*4882a593Smuzhiyun skb = dev_alloc_skb(length);
464*4882a593Smuzhiyun if (!skb) {
465*4882a593Smuzhiyun rtw_err(rtwdev, "failed to alloc write data h2c skb\n");
466*4882a593Smuzhiyun return NULL;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun skb_reserve(skb, tx_pkt_desc_sz);
470*4882a593Smuzhiyun skb_put_data(skb, buf, size);
471*4882a593Smuzhiyun pkt_info->tx_pkt_size = size;
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun return skb;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun EXPORT_SYMBOL(rtw_tx_write_data_h2c_get);
476*4882a593Smuzhiyun
rtw_tx(struct rtw_dev * rtwdev,struct ieee80211_tx_control * control,struct sk_buff * skb)477*4882a593Smuzhiyun void rtw_tx(struct rtw_dev *rtwdev,
478*4882a593Smuzhiyun struct ieee80211_tx_control *control,
479*4882a593Smuzhiyun struct sk_buff *skb)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun struct rtw_tx_pkt_info pkt_info = {0};
482*4882a593Smuzhiyun int ret;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun rtw_tx_pkt_info_update(rtwdev, &pkt_info, control->sta, skb);
485*4882a593Smuzhiyun ret = rtw_hci_tx_write(rtwdev, &pkt_info, skb);
486*4882a593Smuzhiyun if (ret) {
487*4882a593Smuzhiyun rtw_err(rtwdev, "failed to write TX skb to HCI\n");
488*4882a593Smuzhiyun goto out;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun rtw_hci_tx_kick_off(rtwdev);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun return;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun out:
496*4882a593Smuzhiyun ieee80211_free_txskb(rtwdev->hw, skb);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
rtw_txq_check_agg(struct rtw_dev * rtwdev,struct rtw_txq * rtwtxq,struct sk_buff * skb)499*4882a593Smuzhiyun static void rtw_txq_check_agg(struct rtw_dev *rtwdev,
500*4882a593Smuzhiyun struct rtw_txq *rtwtxq,
501*4882a593Smuzhiyun struct sk_buff *skb)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun struct ieee80211_txq *txq = rtwtxq_to_txq(rtwtxq);
504*4882a593Smuzhiyun struct ieee80211_tx_info *info;
505*4882a593Smuzhiyun struct rtw_sta_info *si;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun if (test_bit(RTW_TXQ_AMPDU, &rtwtxq->flags)) {
508*4882a593Smuzhiyun info = IEEE80211_SKB_CB(skb);
509*4882a593Smuzhiyun info->flags |= IEEE80211_TX_CTL_AMPDU;
510*4882a593Smuzhiyun return;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
514*4882a593Smuzhiyun return;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun if (test_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags))
517*4882a593Smuzhiyun return;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
520*4882a593Smuzhiyun return;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun if (!txq->sta)
523*4882a593Smuzhiyun return;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun si = (struct rtw_sta_info *)txq->sta->drv_priv;
526*4882a593Smuzhiyun set_bit(txq->tid, si->tid_ba);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun ieee80211_queue_work(rtwdev->hw, &rtwdev->ba_work);
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun
rtw_txq_push_skb(struct rtw_dev * rtwdev,struct rtw_txq * rtwtxq,struct sk_buff * skb)531*4882a593Smuzhiyun static int rtw_txq_push_skb(struct rtw_dev *rtwdev,
532*4882a593Smuzhiyun struct rtw_txq *rtwtxq,
533*4882a593Smuzhiyun struct sk_buff *skb)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun struct ieee80211_txq *txq = rtwtxq_to_txq(rtwtxq);
536*4882a593Smuzhiyun struct rtw_tx_pkt_info pkt_info = {0};
537*4882a593Smuzhiyun int ret;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun rtw_txq_check_agg(rtwdev, rtwtxq, skb);
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun rtw_tx_pkt_info_update(rtwdev, &pkt_info, txq->sta, skb);
542*4882a593Smuzhiyun ret = rtw_hci_tx_write(rtwdev, &pkt_info, skb);
543*4882a593Smuzhiyun if (ret) {
544*4882a593Smuzhiyun rtw_err(rtwdev, "failed to write TX skb to HCI\n");
545*4882a593Smuzhiyun return ret;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun rtwtxq->last_push = jiffies;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun return 0;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun
rtw_txq_dequeue(struct rtw_dev * rtwdev,struct rtw_txq * rtwtxq)552*4882a593Smuzhiyun static struct sk_buff *rtw_txq_dequeue(struct rtw_dev *rtwdev,
553*4882a593Smuzhiyun struct rtw_txq *rtwtxq)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun struct ieee80211_txq *txq = rtwtxq_to_txq(rtwtxq);
556*4882a593Smuzhiyun struct sk_buff *skb;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun skb = ieee80211_tx_dequeue(rtwdev->hw, txq);
559*4882a593Smuzhiyun if (!skb)
560*4882a593Smuzhiyun return NULL;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun return skb;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
rtw_txq_push(struct rtw_dev * rtwdev,struct rtw_txq * rtwtxq,unsigned long frames)565*4882a593Smuzhiyun static void rtw_txq_push(struct rtw_dev *rtwdev,
566*4882a593Smuzhiyun struct rtw_txq *rtwtxq,
567*4882a593Smuzhiyun unsigned long frames)
568*4882a593Smuzhiyun {
569*4882a593Smuzhiyun struct sk_buff *skb;
570*4882a593Smuzhiyun int ret;
571*4882a593Smuzhiyun int i;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun rcu_read_lock();
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun for (i = 0; i < frames; i++) {
576*4882a593Smuzhiyun skb = rtw_txq_dequeue(rtwdev, rtwtxq);
577*4882a593Smuzhiyun if (!skb)
578*4882a593Smuzhiyun break;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun ret = rtw_txq_push_skb(rtwdev, rtwtxq, skb);
581*4882a593Smuzhiyun if (ret) {
582*4882a593Smuzhiyun rtw_err(rtwdev, "failed to pusk skb, ret %d\n", ret);
583*4882a593Smuzhiyun break;
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun rcu_read_unlock();
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun
rtw_tx_tasklet(struct tasklet_struct * t)590*4882a593Smuzhiyun void rtw_tx_tasklet(struct tasklet_struct *t)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun struct rtw_dev *rtwdev = from_tasklet(rtwdev, t, tx_tasklet);
593*4882a593Smuzhiyun struct rtw_txq *rtwtxq, *tmp;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun spin_lock_bh(&rtwdev->txq_lock);
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->txqs, list) {
598*4882a593Smuzhiyun struct ieee80211_txq *txq = rtwtxq_to_txq(rtwtxq);
599*4882a593Smuzhiyun unsigned long frame_cnt;
600*4882a593Smuzhiyun unsigned long byte_cnt;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt);
603*4882a593Smuzhiyun rtw_txq_push(rtwdev, rtwtxq, frame_cnt);
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun list_del_init(&rtwtxq->list);
606*4882a593Smuzhiyun }
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun rtw_hci_tx_kick_off(rtwdev);
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun spin_unlock_bh(&rtwdev->txq_lock);
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun
rtw_txq_init(struct rtw_dev * rtwdev,struct ieee80211_txq * txq)613*4882a593Smuzhiyun void rtw_txq_init(struct rtw_dev *rtwdev, struct ieee80211_txq *txq)
614*4882a593Smuzhiyun {
615*4882a593Smuzhiyun struct rtw_txq *rtwtxq;
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun if (!txq)
618*4882a593Smuzhiyun return;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun rtwtxq = (struct rtw_txq *)txq->drv_priv;
621*4882a593Smuzhiyun INIT_LIST_HEAD(&rtwtxq->list);
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun
rtw_txq_cleanup(struct rtw_dev * rtwdev,struct ieee80211_txq * txq)624*4882a593Smuzhiyun void rtw_txq_cleanup(struct rtw_dev *rtwdev, struct ieee80211_txq *txq)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun struct rtw_txq *rtwtxq;
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun if (!txq)
629*4882a593Smuzhiyun return;
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun rtwtxq = (struct rtw_txq *)txq->drv_priv;
632*4882a593Smuzhiyun spin_lock_bh(&rtwdev->txq_lock);
633*4882a593Smuzhiyun if (!list_empty(&rtwtxq->list))
634*4882a593Smuzhiyun list_del_init(&rtwtxq->list);
635*4882a593Smuzhiyun spin_unlock_bh(&rtwdev->txq_lock);
636*4882a593Smuzhiyun }
637