1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2*4882a593Smuzhiyun /* Copyright(c) 2018-2019 Realtek Corporation
3*4882a593Smuzhiyun */
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include "main.h"
6*4882a593Smuzhiyun #include "rx.h"
7*4882a593Smuzhiyun #include "ps.h"
8*4882a593Smuzhiyun #include "debug.h"
9*4882a593Smuzhiyun
rtw_rx_stats(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,struct sk_buff * skb)10*4882a593Smuzhiyun void rtw_rx_stats(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
11*4882a593Smuzhiyun struct sk_buff *skb)
12*4882a593Smuzhiyun {
13*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
14*4882a593Smuzhiyun struct rtw_vif *rtwvif;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)skb->data;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun if (!ieee80211_is_data(hdr->frame_control))
19*4882a593Smuzhiyun return;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun if (!is_broadcast_ether_addr(hdr->addr1) &&
22*4882a593Smuzhiyun !is_multicast_ether_addr(hdr->addr1)) {
23*4882a593Smuzhiyun rtwdev->stats.rx_unicast += skb->len;
24*4882a593Smuzhiyun rtwdev->stats.rx_cnt++;
25*4882a593Smuzhiyun if (vif) {
26*4882a593Smuzhiyun rtwvif = (struct rtw_vif *)vif->drv_priv;
27*4882a593Smuzhiyun rtwvif->stats.rx_unicast += skb->len;
28*4882a593Smuzhiyun rtwvif->stats.rx_cnt++;
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun EXPORT_SYMBOL(rtw_rx_stats);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct rtw_rx_addr_match_data {
35*4882a593Smuzhiyun struct rtw_dev *rtwdev;
36*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
37*4882a593Smuzhiyun struct rtw_rx_pkt_stat *pkt_stat;
38*4882a593Smuzhiyun u8 *bssid;
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
rtw_rx_phy_stat(struct rtw_dev * rtwdev,struct rtw_rx_pkt_stat * pkt_stat,struct ieee80211_hdr * hdr)41*4882a593Smuzhiyun static void rtw_rx_phy_stat(struct rtw_dev *rtwdev,
42*4882a593Smuzhiyun struct rtw_rx_pkt_stat *pkt_stat,
43*4882a593Smuzhiyun struct ieee80211_hdr *hdr)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun struct rtw_dm_info *dm_info = &rtwdev->dm_info;
46*4882a593Smuzhiyun struct rtw_pkt_count *cur_pkt_cnt = &dm_info->cur_pkt_count;
47*4882a593Smuzhiyun u8 rate_ss, rate_ss_evm, evm_id;
48*4882a593Smuzhiyun u8 i, idx;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun dm_info->curr_rx_rate = pkt_stat->rate;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun if (ieee80211_is_beacon(hdr->frame_control))
53*4882a593Smuzhiyun cur_pkt_cnt->num_bcn_pkt++;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun switch (pkt_stat->rate) {
56*4882a593Smuzhiyun case DESC_RATE1M...DESC_RATE11M:
57*4882a593Smuzhiyun goto pkt_num;
58*4882a593Smuzhiyun case DESC_RATE6M...DESC_RATE54M:
59*4882a593Smuzhiyun rate_ss = 0;
60*4882a593Smuzhiyun rate_ss_evm = 1;
61*4882a593Smuzhiyun evm_id = RTW_EVM_OFDM;
62*4882a593Smuzhiyun break;
63*4882a593Smuzhiyun case DESC_RATEMCS0...DESC_RATEMCS7:
64*4882a593Smuzhiyun case DESC_RATEVHT1SS_MCS0...DESC_RATEVHT1SS_MCS9:
65*4882a593Smuzhiyun rate_ss = 1;
66*4882a593Smuzhiyun rate_ss_evm = 1;
67*4882a593Smuzhiyun evm_id = RTW_EVM_1SS;
68*4882a593Smuzhiyun break;
69*4882a593Smuzhiyun case DESC_RATEMCS8...DESC_RATEMCS15:
70*4882a593Smuzhiyun case DESC_RATEVHT2SS_MCS0...DESC_RATEVHT2SS_MCS9:
71*4882a593Smuzhiyun rate_ss = 2;
72*4882a593Smuzhiyun rate_ss_evm = 2;
73*4882a593Smuzhiyun evm_id = RTW_EVM_2SS_A;
74*4882a593Smuzhiyun break;
75*4882a593Smuzhiyun default:
76*4882a593Smuzhiyun rtw_warn(rtwdev, "unknown pkt rate = %d\n", pkt_stat->rate);
77*4882a593Smuzhiyun return;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun for (i = 0; i < rate_ss_evm; i++) {
81*4882a593Smuzhiyun idx = evm_id + i;
82*4882a593Smuzhiyun ewma_evm_add(&dm_info->ewma_evm[idx],
83*4882a593Smuzhiyun dm_info->rx_evm_dbm[i]);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun for (i = 0; i < rtwdev->hal.rf_path_num; i++) {
87*4882a593Smuzhiyun idx = RTW_SNR_OFDM_A + 4 * rate_ss + i;
88*4882a593Smuzhiyun ewma_snr_add(&dm_info->ewma_snr[idx],
89*4882a593Smuzhiyun dm_info->rx_snr[i]);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun pkt_num:
92*4882a593Smuzhiyun cur_pkt_cnt->num_qry_pkt[pkt_stat->rate]++;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
rtw_rx_addr_match_iter(void * data,u8 * mac,struct ieee80211_vif * vif)95*4882a593Smuzhiyun static void rtw_rx_addr_match_iter(void *data, u8 *mac,
96*4882a593Smuzhiyun struct ieee80211_vif *vif)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct rtw_rx_addr_match_data *iter_data = data;
99*4882a593Smuzhiyun struct ieee80211_sta *sta;
100*4882a593Smuzhiyun struct ieee80211_hdr *hdr = iter_data->hdr;
101*4882a593Smuzhiyun struct rtw_dev *rtwdev = iter_data->rtwdev;
102*4882a593Smuzhiyun struct rtw_sta_info *si;
103*4882a593Smuzhiyun struct rtw_rx_pkt_stat *pkt_stat = iter_data->pkt_stat;
104*4882a593Smuzhiyun u8 *bssid = iter_data->bssid;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
107*4882a593Smuzhiyun return;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (!(ether_addr_equal(vif->addr, hdr->addr1) ||
110*4882a593Smuzhiyun ieee80211_is_beacon(hdr->frame_control)))
111*4882a593Smuzhiyun return;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun rtw_rx_phy_stat(rtwdev, pkt_stat, hdr);
114*4882a593Smuzhiyun sta = ieee80211_find_sta_by_ifaddr(rtwdev->hw, hdr->addr2,
115*4882a593Smuzhiyun vif->addr);
116*4882a593Smuzhiyun if (!sta)
117*4882a593Smuzhiyun return;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun si = (struct rtw_sta_info *)sta->drv_priv;
120*4882a593Smuzhiyun ewma_rssi_add(&si->avg_rssi, pkt_stat->rssi);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
rtw_rx_addr_match(struct rtw_dev * rtwdev,struct rtw_rx_pkt_stat * pkt_stat,struct ieee80211_hdr * hdr)123*4882a593Smuzhiyun static void rtw_rx_addr_match(struct rtw_dev *rtwdev,
124*4882a593Smuzhiyun struct rtw_rx_pkt_stat *pkt_stat,
125*4882a593Smuzhiyun struct ieee80211_hdr *hdr)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct rtw_rx_addr_match_data data = {};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun if (pkt_stat->crc_err || pkt_stat->icv_err || !pkt_stat->phy_status ||
130*4882a593Smuzhiyun ieee80211_is_ctl(hdr->frame_control))
131*4882a593Smuzhiyun return;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun data.rtwdev = rtwdev;
134*4882a593Smuzhiyun data.hdr = hdr;
135*4882a593Smuzhiyun data.pkt_stat = pkt_stat;
136*4882a593Smuzhiyun data.bssid = get_hdr_bssid(hdr);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun rtw_iterate_vifs_atomic(rtwdev, rtw_rx_addr_match_iter, &data);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
rtw_rx_fill_rx_status(struct rtw_dev * rtwdev,struct rtw_rx_pkt_stat * pkt_stat,struct ieee80211_hdr * hdr,struct ieee80211_rx_status * rx_status,u8 * phy_status)141*4882a593Smuzhiyun void rtw_rx_fill_rx_status(struct rtw_dev *rtwdev,
142*4882a593Smuzhiyun struct rtw_rx_pkt_stat *pkt_stat,
143*4882a593Smuzhiyun struct ieee80211_hdr *hdr,
144*4882a593Smuzhiyun struct ieee80211_rx_status *rx_status,
145*4882a593Smuzhiyun u8 *phy_status)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct ieee80211_hw *hw = rtwdev->hw;
148*4882a593Smuzhiyun u8 path;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun memset(rx_status, 0, sizeof(*rx_status));
151*4882a593Smuzhiyun rx_status->freq = hw->conf.chandef.chan->center_freq;
152*4882a593Smuzhiyun rx_status->band = hw->conf.chandef.chan->band;
153*4882a593Smuzhiyun if (pkt_stat->crc_err)
154*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
155*4882a593Smuzhiyun if (pkt_stat->decrypted)
156*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_DECRYPTED;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (pkt_stat->rate >= DESC_RATEVHT1SS_MCS0)
159*4882a593Smuzhiyun rx_status->encoding = RX_ENC_VHT;
160*4882a593Smuzhiyun else if (pkt_stat->rate >= DESC_RATEMCS0)
161*4882a593Smuzhiyun rx_status->encoding = RX_ENC_HT;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun if (rx_status->band == NL80211_BAND_5GHZ &&
164*4882a593Smuzhiyun pkt_stat->rate >= DESC_RATE6M &&
165*4882a593Smuzhiyun pkt_stat->rate <= DESC_RATE54M) {
166*4882a593Smuzhiyun rx_status->rate_idx = pkt_stat->rate - DESC_RATE6M;
167*4882a593Smuzhiyun } else if (rx_status->band == NL80211_BAND_2GHZ &&
168*4882a593Smuzhiyun pkt_stat->rate >= DESC_RATE1M &&
169*4882a593Smuzhiyun pkt_stat->rate <= DESC_RATE54M) {
170*4882a593Smuzhiyun rx_status->rate_idx = pkt_stat->rate - DESC_RATE1M;
171*4882a593Smuzhiyun } else if (pkt_stat->rate >= DESC_RATEMCS0) {
172*4882a593Smuzhiyun rtw_desc_to_mcsrate(pkt_stat->rate, &rx_status->rate_idx,
173*4882a593Smuzhiyun &rx_status->nss);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_MACTIME_START;
177*4882a593Smuzhiyun rx_status->mactime = pkt_stat->tsf_low;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun if (pkt_stat->bw == RTW_CHANNEL_WIDTH_80)
180*4882a593Smuzhiyun rx_status->bw = RATE_INFO_BW_80;
181*4882a593Smuzhiyun else if (pkt_stat->bw == RTW_CHANNEL_WIDTH_40)
182*4882a593Smuzhiyun rx_status->bw = RATE_INFO_BW_40;
183*4882a593Smuzhiyun else
184*4882a593Smuzhiyun rx_status->bw = RATE_INFO_BW_20;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun rx_status->signal = pkt_stat->signal_power;
187*4882a593Smuzhiyun for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
188*4882a593Smuzhiyun rx_status->chains |= BIT(path);
189*4882a593Smuzhiyun rx_status->chain_signal[path] = pkt_stat->rx_power[path];
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun rtw_rx_addr_match(rtwdev, pkt_stat, hdr);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun EXPORT_SYMBOL(rtw_rx_fill_rx_status);
195