1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2*4882a593Smuzhiyun /* Copyright(c) 2018-2019 Realtek Corporation
3*4882a593Smuzhiyun */
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include "main.h"
6*4882a593Smuzhiyun #include "sec.h"
7*4882a593Smuzhiyun #include "tx.h"
8*4882a593Smuzhiyun #include "fw.h"
9*4882a593Smuzhiyun #include "mac.h"
10*4882a593Smuzhiyun #include "coex.h"
11*4882a593Smuzhiyun #include "ps.h"
12*4882a593Smuzhiyun #include "reg.h"
13*4882a593Smuzhiyun #include "bf.h"
14*4882a593Smuzhiyun #include "debug.h"
15*4882a593Smuzhiyun #include "wow.h"
16*4882a593Smuzhiyun
rtw_ops_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)17*4882a593Smuzhiyun static void rtw_ops_tx(struct ieee80211_hw *hw,
18*4882a593Smuzhiyun struct ieee80211_tx_control *control,
19*4882a593Smuzhiyun struct sk_buff *skb)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags)) {
24*4882a593Smuzhiyun ieee80211_free_txskb(hw, skb);
25*4882a593Smuzhiyun return;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun rtw_tx(rtwdev, control, skb);
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
rtw_ops_wake_tx_queue(struct ieee80211_hw * hw,struct ieee80211_txq * txq)31*4882a593Smuzhiyun static void rtw_ops_wake_tx_queue(struct ieee80211_hw *hw,
32*4882a593Smuzhiyun struct ieee80211_txq *txq)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
35*4882a593Smuzhiyun struct rtw_txq *rtwtxq = (struct rtw_txq *)txq->drv_priv;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
38*4882a593Smuzhiyun return;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun spin_lock_bh(&rtwdev->txq_lock);
41*4882a593Smuzhiyun if (list_empty(&rtwtxq->list))
42*4882a593Smuzhiyun list_add_tail(&rtwtxq->list, &rtwdev->txqs);
43*4882a593Smuzhiyun spin_unlock_bh(&rtwdev->txq_lock);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun tasklet_schedule(&rtwdev->tx_tasklet);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
rtw_ops_start(struct ieee80211_hw * hw)48*4882a593Smuzhiyun static int rtw_ops_start(struct ieee80211_hw *hw)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
51*4882a593Smuzhiyun int ret;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
54*4882a593Smuzhiyun ret = rtw_core_start(rtwdev);
55*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return ret;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
rtw_ops_stop(struct ieee80211_hw * hw)60*4882a593Smuzhiyun static void rtw_ops_stop(struct ieee80211_hw *hw)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
65*4882a593Smuzhiyun rtw_core_stop(rtwdev);
66*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
rtw_ops_config(struct ieee80211_hw * hw,u32 changed)69*4882a593Smuzhiyun static int rtw_ops_config(struct ieee80211_hw *hw, u32 changed)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
72*4882a593Smuzhiyun int ret = 0;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if ((changed & IEEE80211_CONF_CHANGE_IDLE) &&
79*4882a593Smuzhiyun !(hw->conf.flags & IEEE80211_CONF_IDLE)) {
80*4882a593Smuzhiyun ret = rtw_leave_ips(rtwdev);
81*4882a593Smuzhiyun if (ret) {
82*4882a593Smuzhiyun rtw_err(rtwdev, "failed to leave idle state\n");
83*4882a593Smuzhiyun goto out;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (changed & IEEE80211_CONF_CHANGE_PS) {
88*4882a593Smuzhiyun if (hw->conf.flags & IEEE80211_CONF_PS) {
89*4882a593Smuzhiyun rtwdev->ps_enabled = true;
90*4882a593Smuzhiyun } else {
91*4882a593Smuzhiyun rtwdev->ps_enabled = false;
92*4882a593Smuzhiyun rtw_leave_lps(rtwdev);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (changed & IEEE80211_CONF_CHANGE_CHANNEL)
97*4882a593Smuzhiyun rtw_set_channel(rtwdev);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if ((changed & IEEE80211_CONF_CHANGE_IDLE) &&
100*4882a593Smuzhiyun (hw->conf.flags & IEEE80211_CONF_IDLE))
101*4882a593Smuzhiyun rtw_enter_ips(rtwdev);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun out:
104*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
105*4882a593Smuzhiyun return ret;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun static const struct rtw_vif_port rtw_vif_port[] = {
109*4882a593Smuzhiyun [0] = {
110*4882a593Smuzhiyun .mac_addr = {.addr = 0x0610},
111*4882a593Smuzhiyun .bssid = {.addr = 0x0618},
112*4882a593Smuzhiyun .net_type = {.addr = 0x0100, .mask = 0x30000},
113*4882a593Smuzhiyun .aid = {.addr = 0x06a8, .mask = 0x7ff},
114*4882a593Smuzhiyun .bcn_ctrl = {.addr = 0x0550, .mask = 0xff},
115*4882a593Smuzhiyun },
116*4882a593Smuzhiyun [1] = {
117*4882a593Smuzhiyun .mac_addr = {.addr = 0x0700},
118*4882a593Smuzhiyun .bssid = {.addr = 0x0708},
119*4882a593Smuzhiyun .net_type = {.addr = 0x0100, .mask = 0xc0000},
120*4882a593Smuzhiyun .aid = {.addr = 0x0710, .mask = 0x7ff},
121*4882a593Smuzhiyun .bcn_ctrl = {.addr = 0x0551, .mask = 0xff},
122*4882a593Smuzhiyun },
123*4882a593Smuzhiyun [2] = {
124*4882a593Smuzhiyun .mac_addr = {.addr = 0x1620},
125*4882a593Smuzhiyun .bssid = {.addr = 0x1628},
126*4882a593Smuzhiyun .net_type = {.addr = 0x1100, .mask = 0x3},
127*4882a593Smuzhiyun .aid = {.addr = 0x1600, .mask = 0x7ff},
128*4882a593Smuzhiyun .bcn_ctrl = {.addr = 0x0578, .mask = 0xff},
129*4882a593Smuzhiyun },
130*4882a593Smuzhiyun [3] = {
131*4882a593Smuzhiyun .mac_addr = {.addr = 0x1630},
132*4882a593Smuzhiyun .bssid = {.addr = 0x1638},
133*4882a593Smuzhiyun .net_type = {.addr = 0x1100, .mask = 0xc},
134*4882a593Smuzhiyun .aid = {.addr = 0x1604, .mask = 0x7ff},
135*4882a593Smuzhiyun .bcn_ctrl = {.addr = 0x0579, .mask = 0xff},
136*4882a593Smuzhiyun },
137*4882a593Smuzhiyun [4] = {
138*4882a593Smuzhiyun .mac_addr = {.addr = 0x1640},
139*4882a593Smuzhiyun .bssid = {.addr = 0x1648},
140*4882a593Smuzhiyun .net_type = {.addr = 0x1100, .mask = 0x30},
141*4882a593Smuzhiyun .aid = {.addr = 0x1608, .mask = 0x7ff},
142*4882a593Smuzhiyun .bcn_ctrl = {.addr = 0x057a, .mask = 0xff},
143*4882a593Smuzhiyun },
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun
rtw_ops_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)146*4882a593Smuzhiyun static int rtw_ops_add_interface(struct ieee80211_hw *hw,
147*4882a593Smuzhiyun struct ieee80211_vif *vif)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
150*4882a593Smuzhiyun struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
151*4882a593Smuzhiyun enum rtw_net_type net_type;
152*4882a593Smuzhiyun u32 config = 0;
153*4882a593Smuzhiyun u8 port = 0;
154*4882a593Smuzhiyun u8 bcn_ctrl = 0;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun rtwvif->port = port;
157*4882a593Smuzhiyun rtwvif->stats.tx_unicast = 0;
158*4882a593Smuzhiyun rtwvif->stats.rx_unicast = 0;
159*4882a593Smuzhiyun rtwvif->stats.tx_cnt = 0;
160*4882a593Smuzhiyun rtwvif->stats.rx_cnt = 0;
161*4882a593Smuzhiyun memset(&rtwvif->bfee, 0, sizeof(struct rtw_bfee));
162*4882a593Smuzhiyun rtwvif->conf = &rtw_vif_port[port];
163*4882a593Smuzhiyun rtw_txq_init(rtwdev, vif->txq);
164*4882a593Smuzhiyun INIT_LIST_HEAD(&rtwvif->rsvd_page_list);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun switch (vif->type) {
171*4882a593Smuzhiyun case NL80211_IFTYPE_AP:
172*4882a593Smuzhiyun case NL80211_IFTYPE_MESH_POINT:
173*4882a593Smuzhiyun rtw_add_rsvd_page_bcn(rtwdev, rtwvif);
174*4882a593Smuzhiyun net_type = RTW_NET_AP_MODE;
175*4882a593Smuzhiyun bcn_ctrl = BIT_EN_BCN_FUNCTION | BIT_DIS_TSF_UDT;
176*4882a593Smuzhiyun break;
177*4882a593Smuzhiyun case NL80211_IFTYPE_ADHOC:
178*4882a593Smuzhiyun rtw_add_rsvd_page_bcn(rtwdev, rtwvif);
179*4882a593Smuzhiyun net_type = RTW_NET_AD_HOC;
180*4882a593Smuzhiyun bcn_ctrl = BIT_EN_BCN_FUNCTION | BIT_DIS_TSF_UDT;
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun case NL80211_IFTYPE_STATION:
183*4882a593Smuzhiyun rtw_add_rsvd_page_sta(rtwdev, rtwvif);
184*4882a593Smuzhiyun net_type = RTW_NET_NO_LINK;
185*4882a593Smuzhiyun bcn_ctrl = BIT_EN_BCN_FUNCTION;
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun default:
188*4882a593Smuzhiyun WARN_ON(1);
189*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
190*4882a593Smuzhiyun return -EINVAL;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun ether_addr_copy(rtwvif->mac_addr, vif->addr);
194*4882a593Smuzhiyun config |= PORT_SET_MAC_ADDR;
195*4882a593Smuzhiyun rtwvif->net_type = net_type;
196*4882a593Smuzhiyun config |= PORT_SET_NET_TYPE;
197*4882a593Smuzhiyun rtwvif->bcn_ctrl = bcn_ctrl;
198*4882a593Smuzhiyun config |= PORT_SET_BCN_CTRL;
199*4882a593Smuzhiyun rtw_vif_port_config(rtwdev, rtwvif, config);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun rtw_info(rtwdev, "start vif %pM on port %d\n", vif->addr, rtwvif->port);
204*4882a593Smuzhiyun return 0;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
rtw_ops_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)207*4882a593Smuzhiyun static void rtw_ops_remove_interface(struct ieee80211_hw *hw,
208*4882a593Smuzhiyun struct ieee80211_vif *vif)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
211*4882a593Smuzhiyun struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
212*4882a593Smuzhiyun u32 config = 0;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun rtw_info(rtwdev, "stop vif %pM on port %d\n", vif->addr, rtwvif->port);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun rtw_txq_cleanup(rtwdev, vif->txq);
221*4882a593Smuzhiyun rtw_remove_rsvd_page(rtwdev, rtwvif);
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun eth_zero_addr(rtwvif->mac_addr);
224*4882a593Smuzhiyun config |= PORT_SET_MAC_ADDR;
225*4882a593Smuzhiyun rtwvif->net_type = RTW_NET_NO_LINK;
226*4882a593Smuzhiyun config |= PORT_SET_NET_TYPE;
227*4882a593Smuzhiyun rtwvif->bcn_ctrl = 0;
228*4882a593Smuzhiyun config |= PORT_SET_BCN_CTRL;
229*4882a593Smuzhiyun rtw_vif_port_config(rtwdev, rtwvif, config);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
rtw_ops_change_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif,enum nl80211_iftype type,bool p2p)234*4882a593Smuzhiyun static int rtw_ops_change_interface(struct ieee80211_hw *hw,
235*4882a593Smuzhiyun struct ieee80211_vif *vif,
236*4882a593Smuzhiyun enum nl80211_iftype type, bool p2p)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun rtw_info(rtwdev, "change vif %pM (%d)->(%d), p2p (%d)->(%d)\n",
241*4882a593Smuzhiyun vif->addr, vif->type, type, vif->p2p, p2p);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun rtw_ops_remove_interface(hw, vif);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun vif->type = type;
246*4882a593Smuzhiyun vif->p2p = p2p;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun return rtw_ops_add_interface(hw, vif);
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
rtw_ops_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * new_flags,u64 multicast)251*4882a593Smuzhiyun static void rtw_ops_configure_filter(struct ieee80211_hw *hw,
252*4882a593Smuzhiyun unsigned int changed_flags,
253*4882a593Smuzhiyun unsigned int *new_flags,
254*4882a593Smuzhiyun u64 multicast)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun *new_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_FCSFAIL |
259*4882a593Smuzhiyun FIF_BCN_PRBRESP_PROMISC;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun if (changed_flags & FIF_ALLMULTI) {
266*4882a593Smuzhiyun if (*new_flags & FIF_ALLMULTI)
267*4882a593Smuzhiyun rtwdev->hal.rcr |= BIT_AM | BIT_AB;
268*4882a593Smuzhiyun else
269*4882a593Smuzhiyun rtwdev->hal.rcr &= ~(BIT_AM | BIT_AB);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun if (changed_flags & FIF_FCSFAIL) {
272*4882a593Smuzhiyun if (*new_flags & FIF_FCSFAIL)
273*4882a593Smuzhiyun rtwdev->hal.rcr |= BIT_ACRC32;
274*4882a593Smuzhiyun else
275*4882a593Smuzhiyun rtwdev->hal.rcr &= ~(BIT_ACRC32);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun if (changed_flags & FIF_OTHER_BSS) {
278*4882a593Smuzhiyun if (*new_flags & FIF_OTHER_BSS)
279*4882a593Smuzhiyun rtwdev->hal.rcr |= BIT_AAP;
280*4882a593Smuzhiyun else
281*4882a593Smuzhiyun rtwdev->hal.rcr &= ~(BIT_AAP);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
284*4882a593Smuzhiyun if (*new_flags & FIF_BCN_PRBRESP_PROMISC)
285*4882a593Smuzhiyun rtwdev->hal.rcr &= ~(BIT_CBSSID_BCN | BIT_CBSSID_DATA);
286*4882a593Smuzhiyun else
287*4882a593Smuzhiyun rtwdev->hal.rcr |= BIT_CBSSID_BCN;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun rtw_dbg(rtwdev, RTW_DBG_RX,
291*4882a593Smuzhiyun "config rx filter, changed=0x%08x, new=0x%08x, rcr=0x%08x\n",
292*4882a593Smuzhiyun changed_flags, *new_flags, rtwdev->hal.rcr);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* Only have one group of EDCA parameters now */
300*4882a593Smuzhiyun static const u32 ac_to_edca_param[IEEE80211_NUM_ACS] = {
301*4882a593Smuzhiyun [IEEE80211_AC_VO] = REG_EDCA_VO_PARAM,
302*4882a593Smuzhiyun [IEEE80211_AC_VI] = REG_EDCA_VI_PARAM,
303*4882a593Smuzhiyun [IEEE80211_AC_BE] = REG_EDCA_BE_PARAM,
304*4882a593Smuzhiyun [IEEE80211_AC_BK] = REG_EDCA_BK_PARAM,
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun
rtw_aifsn_to_aifs(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,u8 aifsn)307*4882a593Smuzhiyun static u8 rtw_aifsn_to_aifs(struct rtw_dev *rtwdev,
308*4882a593Smuzhiyun struct rtw_vif *rtwvif, u8 aifsn)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
311*4882a593Smuzhiyun u8 slot_time;
312*4882a593Smuzhiyun u8 sifs;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun slot_time = vif->bss_conf.use_short_slot ? 9 : 20;
315*4882a593Smuzhiyun sifs = rtwdev->hal.current_band_type == RTW_BAND_5G ? 16 : 10;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun return aifsn * slot_time + sifs;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
__rtw_conf_tx(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,u16 ac)320*4882a593Smuzhiyun static void __rtw_conf_tx(struct rtw_dev *rtwdev,
321*4882a593Smuzhiyun struct rtw_vif *rtwvif, u16 ac)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun struct ieee80211_tx_queue_params *params = &rtwvif->tx_params[ac];
324*4882a593Smuzhiyun u32 edca_param = ac_to_edca_param[ac];
325*4882a593Smuzhiyun u8 ecw_max, ecw_min;
326*4882a593Smuzhiyun u8 aifs;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun /* 2^ecw - 1 = cw; ecw = log2(cw + 1) */
329*4882a593Smuzhiyun ecw_max = ilog2(params->cw_max + 1);
330*4882a593Smuzhiyun ecw_min = ilog2(params->cw_min + 1);
331*4882a593Smuzhiyun aifs = rtw_aifsn_to_aifs(rtwdev, rtwvif, params->aifs);
332*4882a593Smuzhiyun rtw_write32_mask(rtwdev, edca_param, BIT_MASK_TXOP_LMT, params->txop);
333*4882a593Smuzhiyun rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMAX, ecw_max);
334*4882a593Smuzhiyun rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMIN, ecw_min);
335*4882a593Smuzhiyun rtw_write32_mask(rtwdev, edca_param, BIT_MASK_AIFS, aifs);
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
rtw_conf_tx(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif)338*4882a593Smuzhiyun static void rtw_conf_tx(struct rtw_dev *rtwdev,
339*4882a593Smuzhiyun struct rtw_vif *rtwvif)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun u16 ac;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
344*4882a593Smuzhiyun __rtw_conf_tx(rtwdev, rtwvif, ac);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
rtw_ops_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * conf,u32 changed)347*4882a593Smuzhiyun static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw,
348*4882a593Smuzhiyun struct ieee80211_vif *vif,
349*4882a593Smuzhiyun struct ieee80211_bss_conf *conf,
350*4882a593Smuzhiyun u32 changed)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
353*4882a593Smuzhiyun struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
354*4882a593Smuzhiyun u32 config = 0;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun if (changed & BSS_CHANGED_ASSOC) {
361*4882a593Smuzhiyun rtw_vif_assoc_changed(rtwvif, conf);
362*4882a593Smuzhiyun if (conf->assoc) {
363*4882a593Smuzhiyun rtw_coex_connect_notify(rtwdev, COEX_ASSOCIATE_FINISH);
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun rtw_fw_download_rsvd_page(rtwdev);
366*4882a593Smuzhiyun rtw_send_rsvd_page_h2c(rtwdev);
367*4882a593Smuzhiyun rtw_coex_media_status_notify(rtwdev, conf->assoc);
368*4882a593Smuzhiyun if (rtw_bf_support)
369*4882a593Smuzhiyun rtw_bf_assoc(rtwdev, vif, conf);
370*4882a593Smuzhiyun } else {
371*4882a593Smuzhiyun rtw_leave_lps(rtwdev);
372*4882a593Smuzhiyun rtw_bf_disassoc(rtwdev, vif, conf);
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun config |= PORT_SET_NET_TYPE;
376*4882a593Smuzhiyun config |= PORT_SET_AID;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun if (changed & BSS_CHANGED_BSSID) {
380*4882a593Smuzhiyun ether_addr_copy(rtwvif->bssid, conf->bssid);
381*4882a593Smuzhiyun config |= PORT_SET_BSSID;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun if (changed & BSS_CHANGED_BEACON)
385*4882a593Smuzhiyun rtw_fw_download_rsvd_page(rtwdev);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun if (changed & BSS_CHANGED_BEACON_ENABLED) {
388*4882a593Smuzhiyun if (conf->enable_beacon)
389*4882a593Smuzhiyun rtw_write32_set(rtwdev, REG_FWHW_TXQ_CTRL,
390*4882a593Smuzhiyun BIT_EN_BCNQ_DL);
391*4882a593Smuzhiyun else
392*4882a593Smuzhiyun rtw_write32_clr(rtwdev, REG_FWHW_TXQ_CTRL,
393*4882a593Smuzhiyun BIT_EN_BCNQ_DL);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun if (changed & BSS_CHANGED_MU_GROUPS)
397*4882a593Smuzhiyun rtw_chip_set_gid_table(rtwdev, vif, conf);
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun if (changed & BSS_CHANGED_ERP_SLOT)
400*4882a593Smuzhiyun rtw_conf_tx(rtwdev, rtwvif);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun rtw_vif_port_config(rtwdev, rtwvif, config);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
rtw_ops_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 ac,const struct ieee80211_tx_queue_params * params)407*4882a593Smuzhiyun static int rtw_ops_conf_tx(struct ieee80211_hw *hw,
408*4882a593Smuzhiyun struct ieee80211_vif *vif, u16 ac,
409*4882a593Smuzhiyun const struct ieee80211_tx_queue_params *params)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
412*4882a593Smuzhiyun struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun rtwvif->tx_params[ac] = *params;
419*4882a593Smuzhiyun __rtw_conf_tx(rtwdev, rtwvif, ac);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun return 0;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
rtw_ops_sta_add(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)426*4882a593Smuzhiyun static int rtw_ops_sta_add(struct ieee80211_hw *hw,
427*4882a593Smuzhiyun struct ieee80211_vif *vif,
428*4882a593Smuzhiyun struct ieee80211_sta *sta)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
431*4882a593Smuzhiyun int ret = 0;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
434*4882a593Smuzhiyun ret = rtw_sta_add(rtwdev, sta, vif);
435*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun return ret;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
rtw_ops_sta_remove(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)440*4882a593Smuzhiyun static int rtw_ops_sta_remove(struct ieee80211_hw *hw,
441*4882a593Smuzhiyun struct ieee80211_vif *vif,
442*4882a593Smuzhiyun struct ieee80211_sta *sta)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
447*4882a593Smuzhiyun rtw_sta_remove(rtwdev, sta, true);
448*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun return 0;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
rtw_ops_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)453*4882a593Smuzhiyun static int rtw_ops_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
454*4882a593Smuzhiyun struct ieee80211_vif *vif, struct ieee80211_sta *sta,
455*4882a593Smuzhiyun struct ieee80211_key_conf *key)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
458*4882a593Smuzhiyun struct rtw_sec_desc *sec = &rtwdev->sec;
459*4882a593Smuzhiyun u8 hw_key_type;
460*4882a593Smuzhiyun u8 hw_key_idx;
461*4882a593Smuzhiyun int ret = 0;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun switch (key->cipher) {
464*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP40:
465*4882a593Smuzhiyun hw_key_type = RTW_CAM_WEP40;
466*4882a593Smuzhiyun break;
467*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP104:
468*4882a593Smuzhiyun hw_key_type = RTW_CAM_WEP104;
469*4882a593Smuzhiyun break;
470*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_TKIP:
471*4882a593Smuzhiyun hw_key_type = RTW_CAM_TKIP;
472*4882a593Smuzhiyun key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
473*4882a593Smuzhiyun break;
474*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_CCMP:
475*4882a593Smuzhiyun hw_key_type = RTW_CAM_AES;
476*4882a593Smuzhiyun key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
477*4882a593Smuzhiyun break;
478*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_AES_CMAC:
479*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_BIP_CMAC_256:
480*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_BIP_GMAC_128:
481*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_BIP_GMAC_256:
482*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_CCMP_256:
483*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_GCMP:
484*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_GCMP_256:
485*4882a593Smuzhiyun /* suppress error messages */
486*4882a593Smuzhiyun return -EOPNOTSUPP;
487*4882a593Smuzhiyun default:
488*4882a593Smuzhiyun return -ENOTSUPP;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
496*4882a593Smuzhiyun hw_key_idx = rtw_sec_get_free_cam(sec);
497*4882a593Smuzhiyun } else {
498*4882a593Smuzhiyun /* multiple interfaces? */
499*4882a593Smuzhiyun hw_key_idx = key->keyidx;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun if (hw_key_idx > sec->total_cam_num) {
503*4882a593Smuzhiyun ret = -ENOSPC;
504*4882a593Smuzhiyun goto out;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun switch (cmd) {
508*4882a593Smuzhiyun case SET_KEY:
509*4882a593Smuzhiyun /* need sw generated IV */
510*4882a593Smuzhiyun key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
511*4882a593Smuzhiyun key->hw_key_idx = hw_key_idx;
512*4882a593Smuzhiyun rtw_sec_write_cam(rtwdev, sec, sta, key,
513*4882a593Smuzhiyun hw_key_type, hw_key_idx);
514*4882a593Smuzhiyun break;
515*4882a593Smuzhiyun case DISABLE_KEY:
516*4882a593Smuzhiyun rtw_mac_flush_all_queues(rtwdev, false);
517*4882a593Smuzhiyun rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);
518*4882a593Smuzhiyun break;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun /* download new cam settings for PG to backup */
522*4882a593Smuzhiyun if (rtw_fw_lps_deep_mode == LPS_DEEP_MODE_PG)
523*4882a593Smuzhiyun rtw_fw_download_rsvd_page(rtwdev);
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun out:
526*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun return ret;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun
rtw_ops_ampdu_action(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_ampdu_params * params)531*4882a593Smuzhiyun static int rtw_ops_ampdu_action(struct ieee80211_hw *hw,
532*4882a593Smuzhiyun struct ieee80211_vif *vif,
533*4882a593Smuzhiyun struct ieee80211_ampdu_params *params)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun struct ieee80211_sta *sta = params->sta;
536*4882a593Smuzhiyun u16 tid = params->tid;
537*4882a593Smuzhiyun struct ieee80211_txq *txq = sta->txq[tid];
538*4882a593Smuzhiyun struct rtw_txq *rtwtxq = (struct rtw_txq *)txq->drv_priv;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun switch (params->action) {
541*4882a593Smuzhiyun case IEEE80211_AMPDU_TX_START:
542*4882a593Smuzhiyun return IEEE80211_AMPDU_TX_START_IMMEDIATE;
543*4882a593Smuzhiyun case IEEE80211_AMPDU_TX_STOP_CONT:
544*4882a593Smuzhiyun case IEEE80211_AMPDU_TX_STOP_FLUSH:
545*4882a593Smuzhiyun case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
546*4882a593Smuzhiyun clear_bit(RTW_TXQ_AMPDU, &rtwtxq->flags);
547*4882a593Smuzhiyun ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
548*4882a593Smuzhiyun break;
549*4882a593Smuzhiyun case IEEE80211_AMPDU_TX_OPERATIONAL:
550*4882a593Smuzhiyun set_bit(RTW_TXQ_AMPDU, &rtwtxq->flags);
551*4882a593Smuzhiyun break;
552*4882a593Smuzhiyun case IEEE80211_AMPDU_RX_START:
553*4882a593Smuzhiyun case IEEE80211_AMPDU_RX_STOP:
554*4882a593Smuzhiyun break;
555*4882a593Smuzhiyun default:
556*4882a593Smuzhiyun WARN_ON(1);
557*4882a593Smuzhiyun return -ENOTSUPP;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun return 0;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
rtw_ops_can_aggregate_in_amsdu(struct ieee80211_hw * hw,struct sk_buff * head,struct sk_buff * skb)563*4882a593Smuzhiyun static bool rtw_ops_can_aggregate_in_amsdu(struct ieee80211_hw *hw,
564*4882a593Smuzhiyun struct sk_buff *head,
565*4882a593Smuzhiyun struct sk_buff *skb)
566*4882a593Smuzhiyun {
567*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
568*4882a593Smuzhiyun struct rtw_hal *hal = &rtwdev->hal;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /* we don't want to enable TX AMSDU on 2.4G */
571*4882a593Smuzhiyun if (hal->current_band_type == RTW_BAND_2G)
572*4882a593Smuzhiyun return false;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun return true;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
rtw_ops_sw_scan_start(struct ieee80211_hw * hw,struct ieee80211_vif * vif,const u8 * mac_addr)577*4882a593Smuzhiyun static void rtw_ops_sw_scan_start(struct ieee80211_hw *hw,
578*4882a593Smuzhiyun struct ieee80211_vif *vif,
579*4882a593Smuzhiyun const u8 *mac_addr)
580*4882a593Smuzhiyun {
581*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
582*4882a593Smuzhiyun struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
583*4882a593Smuzhiyun u32 config = 0;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun rtw_leave_lps(rtwdev);
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun ether_addr_copy(rtwvif->mac_addr, mac_addr);
590*4882a593Smuzhiyun config |= PORT_SET_MAC_ADDR;
591*4882a593Smuzhiyun rtw_vif_port_config(rtwdev, rtwvif, config);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
596*4882a593Smuzhiyun set_bit(RTW_FLAG_SCANNING, rtwdev->flags);
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
rtw_ops_sw_scan_complete(struct ieee80211_hw * hw,struct ieee80211_vif * vif)601*4882a593Smuzhiyun static void rtw_ops_sw_scan_complete(struct ieee80211_hw *hw,
602*4882a593Smuzhiyun struct ieee80211_vif *vif)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
605*4882a593Smuzhiyun struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
606*4882a593Smuzhiyun u32 config = 0;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);
611*4882a593Smuzhiyun clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun ether_addr_copy(rtwvif->mac_addr, vif->addr);
614*4882a593Smuzhiyun config |= PORT_SET_MAC_ADDR;
615*4882a593Smuzhiyun rtw_vif_port_config(rtwdev, rtwvif, config);
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
rtw_ops_mgd_prepare_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 duration)622*4882a593Smuzhiyun static void rtw_ops_mgd_prepare_tx(struct ieee80211_hw *hw,
623*4882a593Smuzhiyun struct ieee80211_vif *vif,
624*4882a593Smuzhiyun u16 duration)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
629*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
630*4882a593Smuzhiyun rtw_coex_connect_notify(rtwdev, COEX_ASSOCIATE_START);
631*4882a593Smuzhiyun rtw_chip_prepare_tx(rtwdev);
632*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
rtw_ops_set_rts_threshold(struct ieee80211_hw * hw,u32 value)635*4882a593Smuzhiyun static int rtw_ops_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
636*4882a593Smuzhiyun {
637*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
640*4882a593Smuzhiyun rtwdev->rts_threshold = value;
641*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun return 0;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
rtw_ops_sta_statistics(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct station_info * sinfo)646*4882a593Smuzhiyun static void rtw_ops_sta_statistics(struct ieee80211_hw *hw,
647*4882a593Smuzhiyun struct ieee80211_vif *vif,
648*4882a593Smuzhiyun struct ieee80211_sta *sta,
649*4882a593Smuzhiyun struct station_info *sinfo)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun sinfo->txrate = si->ra_report.txrate;
654*4882a593Smuzhiyun sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
rtw_ops_flush(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u32 queues,bool drop)657*4882a593Smuzhiyun static void rtw_ops_flush(struct ieee80211_hw *hw,
658*4882a593Smuzhiyun struct ieee80211_vif *vif,
659*4882a593Smuzhiyun u32 queues, bool drop)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
664*4882a593Smuzhiyun rtw_leave_lps_deep(rtwdev);
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun rtw_mac_flush_queues(rtwdev, queues, drop);
667*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun struct rtw_iter_bitrate_mask_data {
671*4882a593Smuzhiyun struct rtw_dev *rtwdev;
672*4882a593Smuzhiyun struct ieee80211_vif *vif;
673*4882a593Smuzhiyun const struct cfg80211_bitrate_mask *mask;
674*4882a593Smuzhiyun };
675*4882a593Smuzhiyun
rtw_ra_mask_info_update_iter(void * data,struct ieee80211_sta * sta)676*4882a593Smuzhiyun static void rtw_ra_mask_info_update_iter(void *data, struct ieee80211_sta *sta)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun struct rtw_iter_bitrate_mask_data *br_data = data;
679*4882a593Smuzhiyun struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun if (si->vif != br_data->vif)
682*4882a593Smuzhiyun return;
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun /* free previous mask setting */
685*4882a593Smuzhiyun kfree(si->mask);
686*4882a593Smuzhiyun si->mask = kmemdup(br_data->mask, sizeof(struct cfg80211_bitrate_mask),
687*4882a593Smuzhiyun GFP_ATOMIC);
688*4882a593Smuzhiyun if (!si->mask) {
689*4882a593Smuzhiyun si->use_cfg_mask = false;
690*4882a593Smuzhiyun return;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun si->use_cfg_mask = true;
694*4882a593Smuzhiyun rtw_update_sta_info(br_data->rtwdev, si);
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun
rtw_ra_mask_info_update(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,const struct cfg80211_bitrate_mask * mask)697*4882a593Smuzhiyun static void rtw_ra_mask_info_update(struct rtw_dev *rtwdev,
698*4882a593Smuzhiyun struct ieee80211_vif *vif,
699*4882a593Smuzhiyun const struct cfg80211_bitrate_mask *mask)
700*4882a593Smuzhiyun {
701*4882a593Smuzhiyun struct rtw_iter_bitrate_mask_data br_data;
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun br_data.rtwdev = rtwdev;
704*4882a593Smuzhiyun br_data.vif = vif;
705*4882a593Smuzhiyun br_data.mask = mask;
706*4882a593Smuzhiyun rtw_iterate_stas_atomic(rtwdev, rtw_ra_mask_info_update_iter, &br_data);
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun
rtw_ops_set_bitrate_mask(struct ieee80211_hw * hw,struct ieee80211_vif * vif,const struct cfg80211_bitrate_mask * mask)709*4882a593Smuzhiyun static int rtw_ops_set_bitrate_mask(struct ieee80211_hw *hw,
710*4882a593Smuzhiyun struct ieee80211_vif *vif,
711*4882a593Smuzhiyun const struct cfg80211_bitrate_mask *mask)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun rtw_ra_mask_info_update(rtwdev, vif, mask);
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun return 0;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
rtw_ops_set_antenna(struct ieee80211_hw * hw,u32 tx_antenna,u32 rx_antenna)720*4882a593Smuzhiyun static int rtw_ops_set_antenna(struct ieee80211_hw *hw,
721*4882a593Smuzhiyun u32 tx_antenna,
722*4882a593Smuzhiyun u32 rx_antenna)
723*4882a593Smuzhiyun {
724*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
725*4882a593Smuzhiyun struct rtw_chip_info *chip = rtwdev->chip;
726*4882a593Smuzhiyun int ret;
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun if (!chip->ops->set_antenna)
729*4882a593Smuzhiyun return -EOPNOTSUPP;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
732*4882a593Smuzhiyun ret = chip->ops->set_antenna(rtwdev, tx_antenna, rx_antenna);
733*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun return ret;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
rtw_ops_get_antenna(struct ieee80211_hw * hw,u32 * tx_antenna,u32 * rx_antenna)738*4882a593Smuzhiyun static int rtw_ops_get_antenna(struct ieee80211_hw *hw,
739*4882a593Smuzhiyun u32 *tx_antenna,
740*4882a593Smuzhiyun u32 *rx_antenna)
741*4882a593Smuzhiyun {
742*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
743*4882a593Smuzhiyun struct rtw_hal *hal = &rtwdev->hal;
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun *tx_antenna = hal->antenna_tx;
746*4882a593Smuzhiyun *rx_antenna = hal->antenna_rx;
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun return 0;
749*4882a593Smuzhiyun }
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun #ifdef CONFIG_PM
rtw_ops_suspend(struct ieee80211_hw * hw,struct cfg80211_wowlan * wowlan)752*4882a593Smuzhiyun static int rtw_ops_suspend(struct ieee80211_hw *hw,
753*4882a593Smuzhiyun struct cfg80211_wowlan *wowlan)
754*4882a593Smuzhiyun {
755*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
756*4882a593Smuzhiyun int ret;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
759*4882a593Smuzhiyun ret = rtw_wow_suspend(rtwdev, wowlan);
760*4882a593Smuzhiyun if (ret)
761*4882a593Smuzhiyun rtw_err(rtwdev, "failed to suspend for wow %d\n", ret);
762*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun return ret ? 1 : 0;
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun
rtw_ops_resume(struct ieee80211_hw * hw)767*4882a593Smuzhiyun static int rtw_ops_resume(struct ieee80211_hw *hw)
768*4882a593Smuzhiyun {
769*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
770*4882a593Smuzhiyun int ret;
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
773*4882a593Smuzhiyun ret = rtw_wow_resume(rtwdev);
774*4882a593Smuzhiyun if (ret)
775*4882a593Smuzhiyun rtw_err(rtwdev, "failed to resume for wow %d\n", ret);
776*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun return ret ? 1 : 0;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
rtw_ops_set_wakeup(struct ieee80211_hw * hw,bool enabled)781*4882a593Smuzhiyun static void rtw_ops_set_wakeup(struct ieee80211_hw *hw, bool enabled)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun device_set_wakeup_enable(rtwdev->dev, enabled);
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun #endif
788*4882a593Smuzhiyun
rtw_reconfig_complete(struct ieee80211_hw * hw,enum ieee80211_reconfig_type reconfig_type)789*4882a593Smuzhiyun static void rtw_reconfig_complete(struct ieee80211_hw *hw,
790*4882a593Smuzhiyun enum ieee80211_reconfig_type reconfig_type)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun struct rtw_dev *rtwdev = hw->priv;
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun mutex_lock(&rtwdev->mutex);
795*4882a593Smuzhiyun if (reconfig_type == IEEE80211_RECONFIG_TYPE_RESTART)
796*4882a593Smuzhiyun clear_bit(RTW_FLAG_RESTARTING, rtwdev->flags);
797*4882a593Smuzhiyun mutex_unlock(&rtwdev->mutex);
798*4882a593Smuzhiyun }
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun const struct ieee80211_ops rtw_ops = {
801*4882a593Smuzhiyun .tx = rtw_ops_tx,
802*4882a593Smuzhiyun .wake_tx_queue = rtw_ops_wake_tx_queue,
803*4882a593Smuzhiyun .start = rtw_ops_start,
804*4882a593Smuzhiyun .stop = rtw_ops_stop,
805*4882a593Smuzhiyun .config = rtw_ops_config,
806*4882a593Smuzhiyun .add_interface = rtw_ops_add_interface,
807*4882a593Smuzhiyun .remove_interface = rtw_ops_remove_interface,
808*4882a593Smuzhiyun .change_interface = rtw_ops_change_interface,
809*4882a593Smuzhiyun .configure_filter = rtw_ops_configure_filter,
810*4882a593Smuzhiyun .bss_info_changed = rtw_ops_bss_info_changed,
811*4882a593Smuzhiyun .conf_tx = rtw_ops_conf_tx,
812*4882a593Smuzhiyun .sta_add = rtw_ops_sta_add,
813*4882a593Smuzhiyun .sta_remove = rtw_ops_sta_remove,
814*4882a593Smuzhiyun .set_key = rtw_ops_set_key,
815*4882a593Smuzhiyun .ampdu_action = rtw_ops_ampdu_action,
816*4882a593Smuzhiyun .can_aggregate_in_amsdu = rtw_ops_can_aggregate_in_amsdu,
817*4882a593Smuzhiyun .sw_scan_start = rtw_ops_sw_scan_start,
818*4882a593Smuzhiyun .sw_scan_complete = rtw_ops_sw_scan_complete,
819*4882a593Smuzhiyun .mgd_prepare_tx = rtw_ops_mgd_prepare_tx,
820*4882a593Smuzhiyun .set_rts_threshold = rtw_ops_set_rts_threshold,
821*4882a593Smuzhiyun .sta_statistics = rtw_ops_sta_statistics,
822*4882a593Smuzhiyun .flush = rtw_ops_flush,
823*4882a593Smuzhiyun .set_bitrate_mask = rtw_ops_set_bitrate_mask,
824*4882a593Smuzhiyun .set_antenna = rtw_ops_set_antenna,
825*4882a593Smuzhiyun .get_antenna = rtw_ops_get_antenna,
826*4882a593Smuzhiyun .reconfig_complete = rtw_reconfig_complete,
827*4882a593Smuzhiyun #ifdef CONFIG_PM
828*4882a593Smuzhiyun .suspend = rtw_ops_suspend,
829*4882a593Smuzhiyun .resume = rtw_ops_resume,
830*4882a593Smuzhiyun .set_wakeup = rtw_ops_set_wakeup,
831*4882a593Smuzhiyun #endif
832*4882a593Smuzhiyun };
833*4882a593Smuzhiyun EXPORT_SYMBOL(rtw_ops);
834