1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2*4882a593Smuzhiyun /* Copyright(c) 2018-2019 Realtek Corporation
3*4882a593Smuzhiyun */
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #ifndef __RTW_HCI_H__
6*4882a593Smuzhiyun #define __RTW_HCI_H__
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /* ops for PCI, USB and SDIO */
9*4882a593Smuzhiyun struct rtw_hci_ops {
10*4882a593Smuzhiyun int (*tx_write)(struct rtw_dev *rtwdev,
11*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
12*4882a593Smuzhiyun struct sk_buff *skb);
13*4882a593Smuzhiyun void (*tx_kick_off)(struct rtw_dev *rtwdev);
14*4882a593Smuzhiyun int (*setup)(struct rtw_dev *rtwdev);
15*4882a593Smuzhiyun int (*start)(struct rtw_dev *rtwdev);
16*4882a593Smuzhiyun void (*stop)(struct rtw_dev *rtwdev);
17*4882a593Smuzhiyun void (*deep_ps)(struct rtw_dev *rtwdev, bool enter);
18*4882a593Smuzhiyun void (*link_ps)(struct rtw_dev *rtwdev, bool enter);
19*4882a593Smuzhiyun void (*interface_cfg)(struct rtw_dev *rtwdev);
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun int (*write_data_rsvd_page)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
22*4882a593Smuzhiyun int (*write_data_h2c)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun u8 (*read8)(struct rtw_dev *rtwdev, u32 addr);
25*4882a593Smuzhiyun u16 (*read16)(struct rtw_dev *rtwdev, u32 addr);
26*4882a593Smuzhiyun u32 (*read32)(struct rtw_dev *rtwdev, u32 addr);
27*4882a593Smuzhiyun void (*write8)(struct rtw_dev *rtwdev, u32 addr, u8 val);
28*4882a593Smuzhiyun void (*write16)(struct rtw_dev *rtwdev, u32 addr, u16 val);
29*4882a593Smuzhiyun void (*write32)(struct rtw_dev *rtwdev, u32 addr, u32 val);
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
rtw_hci_tx_write(struct rtw_dev * rtwdev,struct rtw_tx_pkt_info * pkt_info,struct sk_buff * skb)32*4882a593Smuzhiyun static inline int rtw_hci_tx_write(struct rtw_dev *rtwdev,
33*4882a593Smuzhiyun struct rtw_tx_pkt_info *pkt_info,
34*4882a593Smuzhiyun struct sk_buff *skb)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun return rtwdev->hci.ops->tx_write(rtwdev, pkt_info, skb);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
rtw_hci_tx_kick_off(struct rtw_dev * rtwdev)39*4882a593Smuzhiyun static inline void rtw_hci_tx_kick_off(struct rtw_dev *rtwdev)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun return rtwdev->hci.ops->tx_kick_off(rtwdev);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
rtw_hci_setup(struct rtw_dev * rtwdev)44*4882a593Smuzhiyun static inline int rtw_hci_setup(struct rtw_dev *rtwdev)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun return rtwdev->hci.ops->setup(rtwdev);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
rtw_hci_start(struct rtw_dev * rtwdev)49*4882a593Smuzhiyun static inline int rtw_hci_start(struct rtw_dev *rtwdev)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun return rtwdev->hci.ops->start(rtwdev);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
rtw_hci_stop(struct rtw_dev * rtwdev)54*4882a593Smuzhiyun static inline void rtw_hci_stop(struct rtw_dev *rtwdev)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun rtwdev->hci.ops->stop(rtwdev);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
rtw_hci_deep_ps(struct rtw_dev * rtwdev,bool enter)59*4882a593Smuzhiyun static inline void rtw_hci_deep_ps(struct rtw_dev *rtwdev, bool enter)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun rtwdev->hci.ops->deep_ps(rtwdev, enter);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
rtw_hci_link_ps(struct rtw_dev * rtwdev,bool enter)64*4882a593Smuzhiyun static inline void rtw_hci_link_ps(struct rtw_dev *rtwdev, bool enter)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun rtwdev->hci.ops->link_ps(rtwdev, enter);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
rtw_hci_interface_cfg(struct rtw_dev * rtwdev)69*4882a593Smuzhiyun static inline void rtw_hci_interface_cfg(struct rtw_dev *rtwdev)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun rtwdev->hci.ops->interface_cfg(rtwdev);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static inline int
rtw_hci_write_data_rsvd_page(struct rtw_dev * rtwdev,u8 * buf,u32 size)75*4882a593Smuzhiyun rtw_hci_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun return rtwdev->hci.ops->write_data_rsvd_page(rtwdev, buf, size);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun static inline int
rtw_hci_write_data_h2c(struct rtw_dev * rtwdev,u8 * buf,u32 size)81*4882a593Smuzhiyun rtw_hci_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun return rtwdev->hci.ops->write_data_h2c(rtwdev, buf, size);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
rtw_read8(struct rtw_dev * rtwdev,u32 addr)86*4882a593Smuzhiyun static inline u8 rtw_read8(struct rtw_dev *rtwdev, u32 addr)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun return rtwdev->hci.ops->read8(rtwdev, addr);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
rtw_read16(struct rtw_dev * rtwdev,u32 addr)91*4882a593Smuzhiyun static inline u16 rtw_read16(struct rtw_dev *rtwdev, u32 addr)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun return rtwdev->hci.ops->read16(rtwdev, addr);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
rtw_read32(struct rtw_dev * rtwdev,u32 addr)96*4882a593Smuzhiyun static inline u32 rtw_read32(struct rtw_dev *rtwdev, u32 addr)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun return rtwdev->hci.ops->read32(rtwdev, addr);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
rtw_write8(struct rtw_dev * rtwdev,u32 addr,u8 val)101*4882a593Smuzhiyun static inline void rtw_write8(struct rtw_dev *rtwdev, u32 addr, u8 val)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun rtwdev->hci.ops->write8(rtwdev, addr, val);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
rtw_write16(struct rtw_dev * rtwdev,u32 addr,u16 val)106*4882a593Smuzhiyun static inline void rtw_write16(struct rtw_dev *rtwdev, u32 addr, u16 val)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun rtwdev->hci.ops->write16(rtwdev, addr, val);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
rtw_write32(struct rtw_dev * rtwdev,u32 addr,u32 val)111*4882a593Smuzhiyun static inline void rtw_write32(struct rtw_dev *rtwdev, u32 addr, u32 val)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun rtwdev->hci.ops->write32(rtwdev, addr, val);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
rtw_write8_set(struct rtw_dev * rtwdev,u32 addr,u8 bit)116*4882a593Smuzhiyun static inline void rtw_write8_set(struct rtw_dev *rtwdev, u32 addr, u8 bit)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun u8 val;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun val = rtw_read8(rtwdev, addr);
121*4882a593Smuzhiyun rtw_write8(rtwdev, addr, val | bit);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
rtw_write16_set(struct rtw_dev * rtwdev,u32 addr,u16 bit)124*4882a593Smuzhiyun static inline void rtw_write16_set(struct rtw_dev *rtwdev, u32 addr, u16 bit)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun u16 val;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun val = rtw_read16(rtwdev, addr);
129*4882a593Smuzhiyun rtw_write16(rtwdev, addr, val | bit);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
rtw_write32_set(struct rtw_dev * rtwdev,u32 addr,u32 bit)132*4882a593Smuzhiyun static inline void rtw_write32_set(struct rtw_dev *rtwdev, u32 addr, u32 bit)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun u32 val;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun val = rtw_read32(rtwdev, addr);
137*4882a593Smuzhiyun rtw_write32(rtwdev, addr, val | bit);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
rtw_write8_clr(struct rtw_dev * rtwdev,u32 addr,u8 bit)140*4882a593Smuzhiyun static inline void rtw_write8_clr(struct rtw_dev *rtwdev, u32 addr, u8 bit)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun u8 val;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun val = rtw_read8(rtwdev, addr);
145*4882a593Smuzhiyun rtw_write8(rtwdev, addr, val & ~bit);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
rtw_write16_clr(struct rtw_dev * rtwdev,u32 addr,u16 bit)148*4882a593Smuzhiyun static inline void rtw_write16_clr(struct rtw_dev *rtwdev, u32 addr, u16 bit)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun u16 val;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun val = rtw_read16(rtwdev, addr);
153*4882a593Smuzhiyun rtw_write16(rtwdev, addr, val & ~bit);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
rtw_write32_clr(struct rtw_dev * rtwdev,u32 addr,u32 bit)156*4882a593Smuzhiyun static inline void rtw_write32_clr(struct rtw_dev *rtwdev, u32 addr, u32 bit)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun u32 val;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun val = rtw_read32(rtwdev, addr);
161*4882a593Smuzhiyun rtw_write32(rtwdev, addr, val & ~bit);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun static inline u32
rtw_read_rf(struct rtw_dev * rtwdev,enum rtw_rf_path rf_path,u32 addr,u32 mask)165*4882a593Smuzhiyun rtw_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
166*4882a593Smuzhiyun u32 addr, u32 mask)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun unsigned long flags;
169*4882a593Smuzhiyun u32 val;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun spin_lock_irqsave(&rtwdev->rf_lock, flags);
172*4882a593Smuzhiyun val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask);
173*4882a593Smuzhiyun spin_unlock_irqrestore(&rtwdev->rf_lock, flags);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return val;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun static inline void
rtw_write_rf(struct rtw_dev * rtwdev,enum rtw_rf_path rf_path,u32 addr,u32 mask,u32 data)179*4882a593Smuzhiyun rtw_write_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
180*4882a593Smuzhiyun u32 addr, u32 mask, u32 data)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun unsigned long flags;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun spin_lock_irqsave(&rtwdev->rf_lock, flags);
185*4882a593Smuzhiyun rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data);
186*4882a593Smuzhiyun spin_unlock_irqrestore(&rtwdev->rf_lock, flags);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun static inline u32
rtw_read32_mask(struct rtw_dev * rtwdev,u32 addr,u32 mask)190*4882a593Smuzhiyun rtw_read32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun u32 shift = __ffs(mask);
193*4882a593Smuzhiyun u32 orig;
194*4882a593Smuzhiyun u32 ret;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun orig = rtw_read32(rtwdev, addr);
197*4882a593Smuzhiyun ret = (orig & mask) >> shift;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun return ret;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static inline u16
rtw_read16_mask(struct rtw_dev * rtwdev,u32 addr,u32 mask)203*4882a593Smuzhiyun rtw_read16_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun u32 shift = __ffs(mask);
206*4882a593Smuzhiyun u32 orig;
207*4882a593Smuzhiyun u32 ret;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun orig = rtw_read16(rtwdev, addr);
210*4882a593Smuzhiyun ret = (orig & mask) >> shift;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun return ret;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun static inline u8
rtw_read8_mask(struct rtw_dev * rtwdev,u32 addr,u32 mask)216*4882a593Smuzhiyun rtw_read8_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun u32 shift = __ffs(mask);
219*4882a593Smuzhiyun u32 orig;
220*4882a593Smuzhiyun u32 ret;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun orig = rtw_read8(rtwdev, addr);
223*4882a593Smuzhiyun ret = (orig & mask) >> shift;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun return ret;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun static inline void
rtw_write32_mask(struct rtw_dev * rtwdev,u32 addr,u32 mask,u32 data)229*4882a593Smuzhiyun rtw_write32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun u32 shift = __ffs(mask);
232*4882a593Smuzhiyun u32 orig;
233*4882a593Smuzhiyun u32 set;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun WARN(addr & 0x3, "should be 4-byte aligned, addr = 0x%08x\n", addr);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun orig = rtw_read32(rtwdev, addr);
238*4882a593Smuzhiyun set = (orig & ~mask) | ((data << shift) & mask);
239*4882a593Smuzhiyun rtw_write32(rtwdev, addr, set);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static inline void
rtw_write8_mask(struct rtw_dev * rtwdev,u32 addr,u32 mask,u8 data)243*4882a593Smuzhiyun rtw_write8_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u8 data)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun u32 shift;
246*4882a593Smuzhiyun u8 orig, set;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun mask &= 0xff;
249*4882a593Smuzhiyun shift = __ffs(mask);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun orig = rtw_read8(rtwdev, addr);
252*4882a593Smuzhiyun set = (orig & ~mask) | ((data << shift) & mask);
253*4882a593Smuzhiyun rtw_write8(rtwdev, addr, set);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
rtw_hci_type(struct rtw_dev * rtwdev)256*4882a593Smuzhiyun static inline enum rtw_hci_type rtw_hci_type(struct rtw_dev *rtwdev)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun return rtwdev->hci.type;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun #endif
262