xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 2009-2010  Realtek Corporation.*/
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #include "../wifi.h"
5*4882a593Smuzhiyun #include "../base.h"
6*4882a593Smuzhiyun #include "../pci.h"
7*4882a593Smuzhiyun #include "../core.h"
8*4882a593Smuzhiyun #include "reg.h"
9*4882a593Smuzhiyun #include "def.h"
10*4882a593Smuzhiyun #include "phy.h"
11*4882a593Smuzhiyun #include "dm.h"
12*4882a593Smuzhiyun #include "fw.h"
13*4882a593Smuzhiyun #include "trx.h"
14*4882a593Smuzhiyun #include "../btcoexist/rtl_btc.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun static const u32 txscaling_tbl[TXSCALE_TABLE_SIZE] = {
17*4882a593Smuzhiyun 	0x081, /* 0, -12.0dB */
18*4882a593Smuzhiyun 	0x088, /* 1, -11.5dB */
19*4882a593Smuzhiyun 	0x090, /* 2, -11.0dB */
20*4882a593Smuzhiyun 	0x099, /* 3, -10.5dB */
21*4882a593Smuzhiyun 	0x0A2, /* 4, -10.0dB */
22*4882a593Smuzhiyun 	0x0AC, /* 5, -9.5dB */
23*4882a593Smuzhiyun 	0x0B6, /* 6, -9.0dB */
24*4882a593Smuzhiyun 	0x0C0, /* 7, -8.5dB */
25*4882a593Smuzhiyun 	0x0CC, /* 8, -8.0dB */
26*4882a593Smuzhiyun 	0x0D8, /* 9, -7.5dB */
27*4882a593Smuzhiyun 	0x0E5, /* 10, -7.0dB */
28*4882a593Smuzhiyun 	0x0F2, /* 11, -6.5dB */
29*4882a593Smuzhiyun 	0x101, /* 12, -6.0dB */
30*4882a593Smuzhiyun 	0x110, /* 13, -5.5dB */
31*4882a593Smuzhiyun 	0x120, /* 14, -5.0dB */
32*4882a593Smuzhiyun 	0x131, /* 15, -4.5dB */
33*4882a593Smuzhiyun 	0x143, /* 16, -4.0dB */
34*4882a593Smuzhiyun 	0x156, /* 17, -3.5dB */
35*4882a593Smuzhiyun 	0x16A, /* 18, -3.0dB */
36*4882a593Smuzhiyun 	0x180, /* 19, -2.5dB */
37*4882a593Smuzhiyun 	0x197, /* 20, -2.0dB */
38*4882a593Smuzhiyun 	0x1AF, /* 21, -1.5dB */
39*4882a593Smuzhiyun 	0x1C8, /* 22, -1.0dB */
40*4882a593Smuzhiyun 	0x1E3, /* 23, -0.5dB */
41*4882a593Smuzhiyun 	0x200, /* 24, +0  dB */
42*4882a593Smuzhiyun 	0x21E, /* 25, +0.5dB */
43*4882a593Smuzhiyun 	0x23E, /* 26, +1.0dB */
44*4882a593Smuzhiyun 	0x261, /* 27, +1.5dB */
45*4882a593Smuzhiyun 	0x285, /* 28, +2.0dB */
46*4882a593Smuzhiyun 	0x2AB, /* 29, +2.5dB */
47*4882a593Smuzhiyun 	0x2D3, /* 30, +3.0dB */
48*4882a593Smuzhiyun 	0x2FE, /* 31, +3.5dB */
49*4882a593Smuzhiyun 	0x32B, /* 32, +4.0dB */
50*4882a593Smuzhiyun 	0x35C, /* 33, +4.5dB */
51*4882a593Smuzhiyun 	0x38E, /* 34, +5.0dB */
52*4882a593Smuzhiyun 	0x3C4, /* 35, +5.5dB */
53*4882a593Smuzhiyun 	0x3FE  /* 36, +6.0dB */
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun static const u32 rtl8821ae_txscaling_table[TXSCALE_TABLE_SIZE] = {
57*4882a593Smuzhiyun 	0x081, /* 0, -12.0dB */
58*4882a593Smuzhiyun 	0x088, /* 1, -11.5dB */
59*4882a593Smuzhiyun 	0x090, /* 2, -11.0dB */
60*4882a593Smuzhiyun 	0x099, /* 3, -10.5dB */
61*4882a593Smuzhiyun 	0x0A2, /* 4, -10.0dB */
62*4882a593Smuzhiyun 	0x0AC, /* 5, -9.5dB */
63*4882a593Smuzhiyun 	0x0B6, /* 6, -9.0dB */
64*4882a593Smuzhiyun 	0x0C0, /* 7, -8.5dB */
65*4882a593Smuzhiyun 	0x0CC, /* 8, -8.0dB */
66*4882a593Smuzhiyun 	0x0D8, /* 9, -7.5dB */
67*4882a593Smuzhiyun 	0x0E5, /* 10, -7.0dB */
68*4882a593Smuzhiyun 	0x0F2, /* 11, -6.5dB */
69*4882a593Smuzhiyun 	0x101, /* 12, -6.0dB */
70*4882a593Smuzhiyun 	0x110, /* 13, -5.5dB */
71*4882a593Smuzhiyun 	0x120, /* 14, -5.0dB */
72*4882a593Smuzhiyun 	0x131, /* 15, -4.5dB */
73*4882a593Smuzhiyun 	0x143, /* 16, -4.0dB */
74*4882a593Smuzhiyun 	0x156, /* 17, -3.5dB */
75*4882a593Smuzhiyun 	0x16A, /* 18, -3.0dB */
76*4882a593Smuzhiyun 	0x180, /* 19, -2.5dB */
77*4882a593Smuzhiyun 	0x197, /* 20, -2.0dB */
78*4882a593Smuzhiyun 	0x1AF, /* 21, -1.5dB */
79*4882a593Smuzhiyun 	0x1C8, /* 22, -1.0dB */
80*4882a593Smuzhiyun 	0x1E3, /* 23, -0.5dB */
81*4882a593Smuzhiyun 	0x200, /* 24, +0  dB */
82*4882a593Smuzhiyun 	0x21E, /* 25, +0.5dB */
83*4882a593Smuzhiyun 	0x23E, /* 26, +1.0dB */
84*4882a593Smuzhiyun 	0x261, /* 27, +1.5dB */
85*4882a593Smuzhiyun 	0x285, /* 28, +2.0dB */
86*4882a593Smuzhiyun 	0x2AB, /* 29, +2.5dB */
87*4882a593Smuzhiyun 	0x2D3, /* 30, +3.0dB */
88*4882a593Smuzhiyun 	0x2FE, /* 31, +3.5dB */
89*4882a593Smuzhiyun 	0x32B, /* 32, +4.0dB */
90*4882a593Smuzhiyun 	0x35C, /* 33, +4.5dB */
91*4882a593Smuzhiyun 	0x38E, /* 34, +5.0dB */
92*4882a593Smuzhiyun 	0x3C4, /* 35, +5.5dB */
93*4882a593Smuzhiyun 	0x3FE  /* 36, +6.0dB */
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun static const u32 edca_setting_dl[PEER_MAX] = {
97*4882a593Smuzhiyun 	0xa44f,		/* 0 UNKNOWN */
98*4882a593Smuzhiyun 	0x5ea44f,	/* 1 REALTEK_90 */
99*4882a593Smuzhiyun 	0x5e4322,	/* 2 REALTEK_92SE */
100*4882a593Smuzhiyun 	0x5ea42b,		/* 3 BROAD	*/
101*4882a593Smuzhiyun 	0xa44f,		/* 4 RAL */
102*4882a593Smuzhiyun 	0xa630,		/* 5 ATH */
103*4882a593Smuzhiyun 	0x5ea630,		/* 6 CISCO */
104*4882a593Smuzhiyun 	0x5ea42b,		/* 7 MARVELL */
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun static const u32 edca_setting_ul[PEER_MAX] = {
108*4882a593Smuzhiyun 	0x5e4322,	/* 0 UNKNOWN */
109*4882a593Smuzhiyun 	0xa44f,		/* 1 REALTEK_90 */
110*4882a593Smuzhiyun 	0x5ea44f,	/* 2 REALTEK_92SE */
111*4882a593Smuzhiyun 	0x5ea32b,	/* 3 BROAD */
112*4882a593Smuzhiyun 	0x5ea422,	/* 4 RAL */
113*4882a593Smuzhiyun 	0x5ea322,	/* 5 ATH */
114*4882a593Smuzhiyun 	0x3ea430,	/* 6 CISCO */
115*4882a593Smuzhiyun 	0x5ea44f,	/* 7 MARV */
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun static const u8 rtl8818e_delta_swing_table_idx_24gb_p[] = {
119*4882a593Smuzhiyun 	0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4,
120*4882a593Smuzhiyun 	4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun static const u8 rtl8818e_delta_swing_table_idx_24gb_n[] = {
123*4882a593Smuzhiyun 	0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6,
124*4882a593Smuzhiyun 	7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24gb_n[]  = {
127*4882a593Smuzhiyun 	0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6,
128*4882a593Smuzhiyun 	6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11};
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24gb_p[] = {
131*4882a593Smuzhiyun 	0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6,
132*4882a593Smuzhiyun 	6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24ga_n[] = {
135*4882a593Smuzhiyun 	0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6,
136*4882a593Smuzhiyun 	6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11};
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24ga_p[] = {
139*4882a593Smuzhiyun 	0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6,
140*4882a593Smuzhiyun 	6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24gcckb_n[] = {
143*4882a593Smuzhiyun 	0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6,
144*4882a593Smuzhiyun 	6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11};
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24gcckb_p[] = {
147*4882a593Smuzhiyun 	0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6,
148*4882a593Smuzhiyun 	6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24gccka_n[] = {
151*4882a593Smuzhiyun 	0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6,
152*4882a593Smuzhiyun 	6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11};
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_24gccka_p[] = {
155*4882a593Smuzhiyun 	0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6,
156*4882a593Smuzhiyun 	6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_5gb_n[][DEL_SW_IDX_SZ] = {
159*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7,
160*4882a593Smuzhiyun 	7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13},
161*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
162*4882a593Smuzhiyun 	7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13},
163*4882a593Smuzhiyun 	{0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 8, 9, 10, 11,
164*4882a593Smuzhiyun 	12, 12, 13, 14, 14, 14, 15, 16, 17, 17, 17, 18, 18, 18},
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_5gb_p[][DEL_SW_IDX_SZ] = {
168*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 8,
169*4882a593Smuzhiyun 	8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11},
170*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8,
171*4882a593Smuzhiyun 	8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11},
172*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9,
173*4882a593Smuzhiyun 	9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11},
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_5ga_n[][DEL_SW_IDX_SZ] = {
177*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8,
178*4882a593Smuzhiyun 	8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13, 13},
179*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 8, 9,
180*4882a593Smuzhiyun 	9, 10, 10, 11, 11, 11, 12, 12, 12, 12, 12, 13, 13},
181*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 3, 3, 4, 5, 6, 7, 8, 8, 9, 10, 11,
182*4882a593Smuzhiyun 	12, 13, 14, 14, 15, 15, 15, 16, 16, 16, 17, 17, 18, 18},
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static const u8 rtl8812ae_delta_swing_table_idx_5ga_p[][DEL_SW_IDX_SZ] = {
186*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 7, 7, 8,
187*4882a593Smuzhiyun 	8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11},
188*4882a593Smuzhiyun 	{0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8,
189*4882a593Smuzhiyun 	9, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11},
190*4882a593Smuzhiyun 	{0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 9,
191*4882a593Smuzhiyun 	10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11},
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun static const u8 rtl8821ae_delta_swing_table_idx_24ga_n[]  = {
195*4882a593Smuzhiyun 	0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6,
196*4882a593Smuzhiyun 	6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10};
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun static const u8 rtl8821ae_delta_swing_table_idx_24ga_p[] = {
199*4882a593Smuzhiyun 	0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8,
200*4882a593Smuzhiyun 	8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12};
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun static const u8 rtl8821ae_delta_swing_table_idx_24gccka_n[] = {
203*4882a593Smuzhiyun 	0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6,
204*4882a593Smuzhiyun 	6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10};
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun static const u8 rtl8821ae_delta_swing_table_idx_24gccka_p[] = {
207*4882a593Smuzhiyun 	0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8,
208*4882a593Smuzhiyun 	8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12};
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static const u8 rtl8821ae_delta_swing_table_idx_5ga_n[][DEL_SW_IDX_SZ] = {
211*4882a593Smuzhiyun 	{0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11,
212*4882a593Smuzhiyun 	12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16},
213*4882a593Smuzhiyun 	{0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11,
214*4882a593Smuzhiyun 	12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16},
215*4882a593Smuzhiyun 	{0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11,
216*4882a593Smuzhiyun 	12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16},
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun static const u8 rtl8821ae_delta_swing_table_idx_5ga_p[][DEL_SW_IDX_SZ] = {
220*4882a593Smuzhiyun 	{0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11,
221*4882a593Smuzhiyun 	12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16},
222*4882a593Smuzhiyun 	{0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11,
223*4882a593Smuzhiyun 	12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16},
224*4882a593Smuzhiyun 	{0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11,
225*4882a593Smuzhiyun 	12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16},
226*4882a593Smuzhiyun };
227*4882a593Smuzhiyun 
rtl8821ae_dm_txpower_track_adjust(struct ieee80211_hw * hw,u8 type,u8 * pdirection,u32 * poutwrite_val)228*4882a593Smuzhiyun void rtl8821ae_dm_txpower_track_adjust(struct ieee80211_hw *hw,
229*4882a593Smuzhiyun 				       u8 type, u8 *pdirection,
230*4882a593Smuzhiyun 				       u32 *poutwrite_val)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
233*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
234*4882a593Smuzhiyun 	u8 pwr_val = 0;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	if (type == 0) {
237*4882a593Smuzhiyun 		if (rtlpriv->dm.swing_idx_ofdm[RF90_PATH_A] <=
238*4882a593Smuzhiyun 			rtlpriv->dm.swing_idx_ofdm_base[RF90_PATH_A]) {
239*4882a593Smuzhiyun 			*pdirection = 1;
240*4882a593Smuzhiyun 			pwr_val = rtldm->swing_idx_ofdm_base[RF90_PATH_A] -
241*4882a593Smuzhiyun 					rtldm->swing_idx_ofdm[RF90_PATH_A];
242*4882a593Smuzhiyun 		} else {
243*4882a593Smuzhiyun 			*pdirection = 2;
244*4882a593Smuzhiyun 			pwr_val = rtldm->swing_idx_ofdm[RF90_PATH_A] -
245*4882a593Smuzhiyun 				rtldm->swing_idx_ofdm_base[RF90_PATH_A];
246*4882a593Smuzhiyun 		}
247*4882a593Smuzhiyun 	} else if (type == 1) {
248*4882a593Smuzhiyun 		if (rtldm->swing_idx_cck <= rtldm->swing_idx_cck_base) {
249*4882a593Smuzhiyun 			*pdirection = 1;
250*4882a593Smuzhiyun 			pwr_val = rtldm->swing_idx_cck_base -
251*4882a593Smuzhiyun 					rtldm->swing_idx_cck;
252*4882a593Smuzhiyun 		} else {
253*4882a593Smuzhiyun 			*pdirection = 2;
254*4882a593Smuzhiyun 			pwr_val = rtldm->swing_idx_cck -
255*4882a593Smuzhiyun 				rtldm->swing_idx_cck_base;
256*4882a593Smuzhiyun 		}
257*4882a593Smuzhiyun 	}
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	if (pwr_val >= TXPWRTRACK_MAX_IDX && (*pdirection == 1))
260*4882a593Smuzhiyun 		pwr_val = TXPWRTRACK_MAX_IDX;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	*poutwrite_val = pwr_val | (pwr_val << 8)|
263*4882a593Smuzhiyun 				(pwr_val << 16)|
264*4882a593Smuzhiyun 				(pwr_val << 24);
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun 
rtl8821ae_dm_clear_txpower_tracking_state(struct ieee80211_hw * hw)267*4882a593Smuzhiyun void rtl8821ae_dm_clear_txpower_tracking_state(struct ieee80211_hw *hw)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
270*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtlpriv);
271*4882a593Smuzhiyun 	struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
272*4882a593Smuzhiyun 	u8 p = 0;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	rtldm->swing_idx_cck_base = rtldm->default_cck_index;
275*4882a593Smuzhiyun 	rtldm->swing_idx_cck = rtldm->default_cck_index;
276*4882a593Smuzhiyun 	rtldm->cck_index = 0;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	for (p = RF90_PATH_A; p <= RF90_PATH_B; ++p) {
279*4882a593Smuzhiyun 		rtldm->swing_idx_ofdm_base[p] = rtldm->default_ofdm_index;
280*4882a593Smuzhiyun 		rtldm->swing_idx_ofdm[p] = rtldm->default_ofdm_index;
281*4882a593Smuzhiyun 		rtldm->ofdm_index[p] = rtldm->default_ofdm_index;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 		rtldm->power_index_offset[p] = 0;
284*4882a593Smuzhiyun 		rtldm->delta_power_index[p] = 0;
285*4882a593Smuzhiyun 		rtldm->delta_power_index_last[p] = 0;
286*4882a593Smuzhiyun 		/*Initial Mix mode power tracking*/
287*4882a593Smuzhiyun 		rtldm->absolute_ofdm_swing_idx[p] = 0;
288*4882a593Smuzhiyun 		rtldm->remnant_ofdm_swing_idx[p] = 0;
289*4882a593Smuzhiyun 	}
290*4882a593Smuzhiyun 	/*Initial at Modify Tx Scaling Mode*/
291*4882a593Smuzhiyun 	rtldm->modify_txagc_flag_path_a = false;
292*4882a593Smuzhiyun 	/*Initial at Modify Tx Scaling Mode*/
293*4882a593Smuzhiyun 	rtldm->modify_txagc_flag_path_b = false;
294*4882a593Smuzhiyun 	rtldm->remnant_cck_idx = 0;
295*4882a593Smuzhiyun 	rtldm->thermalvalue = rtlefuse->eeprom_thermalmeter;
296*4882a593Smuzhiyun 	rtldm->thermalvalue_iqk = rtlefuse->eeprom_thermalmeter;
297*4882a593Smuzhiyun 	rtldm->thermalvalue_lck = rtlefuse->eeprom_thermalmeter;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
rtl8821ae_dm_get_swing_index(struct ieee80211_hw * hw)300*4882a593Smuzhiyun static u8  rtl8821ae_dm_get_swing_index(struct ieee80211_hw *hw)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
303*4882a593Smuzhiyun 	u8 i = 0;
304*4882a593Smuzhiyun 	u32  bb_swing;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	bb_swing = phy_get_tx_swing_8812A(hw, rtlhal->current_bandtype,
307*4882a593Smuzhiyun 					  RF90_PATH_A);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	for (i = 0; i < TXSCALE_TABLE_SIZE; ++i)
310*4882a593Smuzhiyun 		if (bb_swing == rtl8821ae_txscaling_table[i])
311*4882a593Smuzhiyun 			break;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	return i;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
rtl8821ae_dm_initialize_txpower_tracking_thermalmeter(struct ieee80211_hw * hw)316*4882a593Smuzhiyun void rtl8821ae_dm_initialize_txpower_tracking_thermalmeter(
317*4882a593Smuzhiyun 				struct ieee80211_hw *hw)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
320*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtlpriv);
321*4882a593Smuzhiyun 	struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
322*4882a593Smuzhiyun 	u8 default_swing_index  = 0;
323*4882a593Smuzhiyun 	u8 p = 0;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	rtlpriv->dm.txpower_track_control = true;
326*4882a593Smuzhiyun 	rtldm->thermalvalue = rtlefuse->eeprom_thermalmeter;
327*4882a593Smuzhiyun 	rtldm->thermalvalue_iqk = rtlefuse->eeprom_thermalmeter;
328*4882a593Smuzhiyun 	rtldm->thermalvalue_lck = rtlefuse->eeprom_thermalmeter;
329*4882a593Smuzhiyun 	default_swing_index = rtl8821ae_dm_get_swing_index(hw);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	rtldm->default_ofdm_index =
332*4882a593Smuzhiyun 		(default_swing_index == TXSCALE_TABLE_SIZE) ?
333*4882a593Smuzhiyun 		24 : default_swing_index;
334*4882a593Smuzhiyun 	rtldm->default_cck_index = 24;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	rtldm->swing_idx_cck_base = rtldm->default_cck_index;
337*4882a593Smuzhiyun 	rtldm->cck_index = rtldm->default_cck_index;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	for (p = RF90_PATH_A; p < MAX_RF_PATH; ++p) {
340*4882a593Smuzhiyun 		rtldm->swing_idx_ofdm_base[p] =
341*4882a593Smuzhiyun 			rtldm->default_ofdm_index;
342*4882a593Smuzhiyun 		rtldm->ofdm_index[p] = rtldm->default_ofdm_index;
343*4882a593Smuzhiyun 		rtldm->delta_power_index[p] = 0;
344*4882a593Smuzhiyun 		rtldm->power_index_offset[p] = 0;
345*4882a593Smuzhiyun 		rtldm->delta_power_index_last[p] = 0;
346*4882a593Smuzhiyun 	}
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun 
rtl8821ae_dm_init_edca_turbo(struct ieee80211_hw * hw)349*4882a593Smuzhiyun void rtl8821ae_dm_init_edca_turbo(struct ieee80211_hw *hw)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	rtlpriv->dm.current_turbo_edca = false;
354*4882a593Smuzhiyun 	rtlpriv->dm.is_any_nonbepkts = false;
355*4882a593Smuzhiyun 	rtlpriv->dm.is_cur_rdlstate = false;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun 
rtl8821ae_dm_init_rate_adaptive_mask(struct ieee80211_hw * hw)358*4882a593Smuzhiyun void rtl8821ae_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
361*4882a593Smuzhiyun 	struct rate_adaptive *p_ra = &rtlpriv->ra;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	p_ra->ratr_state = DM_RATR_STA_INIT;
364*4882a593Smuzhiyun 	p_ra->pre_ratr_state = DM_RATR_STA_INIT;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
367*4882a593Smuzhiyun 	if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
368*4882a593Smuzhiyun 		rtlpriv->dm.useramask = true;
369*4882a593Smuzhiyun 	else
370*4882a593Smuzhiyun 		rtlpriv->dm.useramask = false;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	p_ra->high_rssi_thresh_for_ra = 50;
373*4882a593Smuzhiyun 	p_ra->low_rssi_thresh_for_ra40m = 20;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
rtl8821ae_dm_init_dynamic_atc_switch(struct ieee80211_hw * hw)376*4882a593Smuzhiyun static void rtl8821ae_dm_init_dynamic_atc_switch(struct ieee80211_hw *hw)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	rtlpriv->dm.crystal_cap = rtlpriv->efuse.crystalcap;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	rtlpriv->dm.atc_status = rtl_get_bbreg(hw, ROFDM1_CFOTRACKING, BIT(11));
383*4882a593Smuzhiyun 	rtlpriv->dm.cfo_threshold = CFO_THRESHOLD_XTAL;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun 
rtl8821ae_dm_common_info_self_init(struct ieee80211_hw * hw)386*4882a593Smuzhiyun static void rtl8821ae_dm_common_info_self_init(struct ieee80211_hw *hw)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
389*4882a593Smuzhiyun 	struct rtl_phy *rtlphy = &rtlpriv->phy;
390*4882a593Smuzhiyun 	u8 tmp;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	rtlphy->cck_high_power =
393*4882a593Smuzhiyun 		(bool)rtl_get_bbreg(hw, ODM_REG_CCK_RPT_FORMAT_11AC,
394*4882a593Smuzhiyun 				    ODM_BIT_CCK_RPT_FORMAT_11AC);
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	tmp = (u8)rtl_get_bbreg(hw, ODM_REG_BB_RX_PATH_11AC,
397*4882a593Smuzhiyun 				ODM_BIT_BB_RX_PATH_11AC);
398*4882a593Smuzhiyun 	if (tmp & BIT(0))
399*4882a593Smuzhiyun 		rtlpriv->dm.rfpath_rxenable[0] = true;
400*4882a593Smuzhiyun 	if (tmp & BIT(1))
401*4882a593Smuzhiyun 		rtlpriv->dm.rfpath_rxenable[1] = true;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun 
rtl8821ae_dm_init(struct ieee80211_hw * hw)404*4882a593Smuzhiyun void rtl8821ae_dm_init(struct ieee80211_hw *hw)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
407*4882a593Smuzhiyun 	struct rtl_phy *rtlphy = &rtlpriv->phy;
408*4882a593Smuzhiyun 	u32 cur_igvalue = rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f);
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	spin_lock(&rtlpriv->locks.iqk_lock);
411*4882a593Smuzhiyun 	rtlphy->lck_inprogress = false;
412*4882a593Smuzhiyun 	spin_unlock(&rtlpriv->locks.iqk_lock);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
415*4882a593Smuzhiyun 	rtl8821ae_dm_common_info_self_init(hw);
416*4882a593Smuzhiyun 	rtl_dm_diginit(hw, cur_igvalue);
417*4882a593Smuzhiyun 	rtl8821ae_dm_init_rate_adaptive_mask(hw);
418*4882a593Smuzhiyun 	rtl8821ae_dm_init_edca_turbo(hw);
419*4882a593Smuzhiyun 	rtl8821ae_dm_initialize_txpower_tracking_thermalmeter(hw);
420*4882a593Smuzhiyun 	rtl8821ae_dm_init_dynamic_atc_switch(hw);
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun 
rtl8821ae_dm_find_minimum_rssi(struct ieee80211_hw * hw)423*4882a593Smuzhiyun static void rtl8821ae_dm_find_minimum_rssi(struct ieee80211_hw *hw)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
426*4882a593Smuzhiyun 	struct dig_t *rtl_dm_dig = &rtlpriv->dm_digtable;
427*4882a593Smuzhiyun 	struct rtl_mac *mac = rtl_mac(rtlpriv);
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	/* Determine the minimum RSSI  */
430*4882a593Smuzhiyun 	if ((mac->link_state < MAC80211_LINKED) &&
431*4882a593Smuzhiyun 	    (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) {
432*4882a593Smuzhiyun 		rtl_dm_dig->min_undec_pwdb_for_dm = 0;
433*4882a593Smuzhiyun 		pr_debug("rtl8821ae: Not connected to any AP\n");
434*4882a593Smuzhiyun 	}
435*4882a593Smuzhiyun 	if (mac->link_state >= MAC80211_LINKED) {
436*4882a593Smuzhiyun 		if (mac->opmode == NL80211_IFTYPE_AP ||
437*4882a593Smuzhiyun 		    mac->opmode == NL80211_IFTYPE_ADHOC) {
438*4882a593Smuzhiyun 			rtl_dm_dig->min_undec_pwdb_for_dm =
439*4882a593Smuzhiyun 			    rtlpriv->dm.entry_min_undec_sm_pwdb;
440*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
441*4882a593Smuzhiyun 				"AP Client PWDB = 0x%lx\n",
442*4882a593Smuzhiyun 				rtlpriv->dm.entry_min_undec_sm_pwdb);
443*4882a593Smuzhiyun 		} else {
444*4882a593Smuzhiyun 			rtl_dm_dig->min_undec_pwdb_for_dm =
445*4882a593Smuzhiyun 			    rtlpriv->dm.undec_sm_pwdb;
446*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
447*4882a593Smuzhiyun 				"STA Default Port PWDB = 0x%x\n",
448*4882a593Smuzhiyun 				rtl_dm_dig->min_undec_pwdb_for_dm);
449*4882a593Smuzhiyun 		}
450*4882a593Smuzhiyun 	} else {
451*4882a593Smuzhiyun 		rtl_dm_dig->min_undec_pwdb_for_dm =
452*4882a593Smuzhiyun 		    rtlpriv->dm.entry_min_undec_sm_pwdb;
453*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
454*4882a593Smuzhiyun 			"AP Ext Port or disconnect PWDB = 0x%x\n",
455*4882a593Smuzhiyun 			rtl_dm_dig->min_undec_pwdb_for_dm);
456*4882a593Smuzhiyun 	}
457*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
458*4882a593Smuzhiyun 		"MinUndecoratedPWDBForDM =%d\n",
459*4882a593Smuzhiyun 		rtl_dm_dig->min_undec_pwdb_for_dm);
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun 
rtl8812ae_dm_rssi_dump_to_register(struct ieee80211_hw * hw)462*4882a593Smuzhiyun static void  rtl8812ae_dm_rssi_dump_to_register(struct ieee80211_hw *hw)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	rtl_write_byte(rtlpriv, RA_RSSI_DUMP,
467*4882a593Smuzhiyun 		       rtlpriv->stats.rx_rssi_percentage[0]);
468*4882a593Smuzhiyun 	rtl_write_byte(rtlpriv, RB_RSSI_DUMP,
469*4882a593Smuzhiyun 		       rtlpriv->stats.rx_rssi_percentage[1]);
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	/* Rx EVM*/
472*4882a593Smuzhiyun 	rtl_write_byte(rtlpriv, RS1_RX_EVM_DUMP,
473*4882a593Smuzhiyun 		       rtlpriv->stats.rx_evm_dbm[0]);
474*4882a593Smuzhiyun 	rtl_write_byte(rtlpriv, RS2_RX_EVM_DUMP,
475*4882a593Smuzhiyun 		       rtlpriv->stats.rx_evm_dbm[1]);
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	/*Rx SNR*/
478*4882a593Smuzhiyun 	rtl_write_byte(rtlpriv, RA_RX_SNR_DUMP,
479*4882a593Smuzhiyun 		       (u8)(rtlpriv->stats.rx_snr_db[0]));
480*4882a593Smuzhiyun 	rtl_write_byte(rtlpriv, RB_RX_SNR_DUMP,
481*4882a593Smuzhiyun 		       (u8)(rtlpriv->stats.rx_snr_db[1]));
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	/*Rx Cfo_Short*/
484*4882a593Smuzhiyun 	rtl_write_word(rtlpriv, RA_CFO_SHORT_DUMP,
485*4882a593Smuzhiyun 		       rtlpriv->stats.rx_cfo_short[0]);
486*4882a593Smuzhiyun 	rtl_write_word(rtlpriv, RB_CFO_SHORT_DUMP,
487*4882a593Smuzhiyun 		       rtlpriv->stats.rx_cfo_short[1]);
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	/*Rx Cfo_Tail*/
490*4882a593Smuzhiyun 	rtl_write_word(rtlpriv, RA_CFO_LONG_DUMP,
491*4882a593Smuzhiyun 		       rtlpriv->stats.rx_cfo_tail[0]);
492*4882a593Smuzhiyun 	rtl_write_word(rtlpriv, RB_CFO_LONG_DUMP,
493*4882a593Smuzhiyun 		       rtlpriv->stats.rx_cfo_tail[1]);
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun 
rtl8821ae_dm_check_rssi_monitor(struct ieee80211_hw * hw)496*4882a593Smuzhiyun static void rtl8821ae_dm_check_rssi_monitor(struct ieee80211_hw *hw)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
499*4882a593Smuzhiyun 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
500*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
501*4882a593Smuzhiyun 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
502*4882a593Smuzhiyun 	struct rtl_sta_info *drv_priv;
503*4882a593Smuzhiyun 	u8 h2c_parameter[4] = { 0 };
504*4882a593Smuzhiyun 	long tmp_entry_max_pwdb = 0, tmp_entry_min_pwdb = 0xff;
505*4882a593Smuzhiyun 	u8 stbc_tx = 0;
506*4882a593Smuzhiyun 	u64 cur_rxokcnt = 0;
507*4882a593Smuzhiyun 	static u64 last_txokcnt = 0, last_rxokcnt;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	cur_rxokcnt = rtlpriv->stats.rxbytesunicast - last_rxokcnt;
510*4882a593Smuzhiyun 	last_txokcnt = rtlpriv->stats.txbytesunicast;
511*4882a593Smuzhiyun 	last_rxokcnt = rtlpriv->stats.rxbytesunicast;
512*4882a593Smuzhiyun 	if (cur_rxokcnt > (last_txokcnt * 6))
513*4882a593Smuzhiyun 		h2c_parameter[3] = 0x01;
514*4882a593Smuzhiyun 	else
515*4882a593Smuzhiyun 		h2c_parameter[3] = 0x00;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	/* AP & ADHOC & MESH */
518*4882a593Smuzhiyun 	if (mac->opmode == NL80211_IFTYPE_AP ||
519*4882a593Smuzhiyun 	    mac->opmode == NL80211_IFTYPE_ADHOC ||
520*4882a593Smuzhiyun 	    mac->opmode == NL80211_IFTYPE_MESH_POINT) {
521*4882a593Smuzhiyun 		spin_lock_bh(&rtlpriv->locks.entry_list_lock);
522*4882a593Smuzhiyun 		list_for_each_entry(drv_priv, &rtlpriv->entry_list, list) {
523*4882a593Smuzhiyun 			if (drv_priv->rssi_stat.undec_sm_pwdb <
524*4882a593Smuzhiyun 					tmp_entry_min_pwdb)
525*4882a593Smuzhiyun 				tmp_entry_min_pwdb =
526*4882a593Smuzhiyun 					drv_priv->rssi_stat.undec_sm_pwdb;
527*4882a593Smuzhiyun 			if (drv_priv->rssi_stat.undec_sm_pwdb >
528*4882a593Smuzhiyun 					tmp_entry_max_pwdb)
529*4882a593Smuzhiyun 				tmp_entry_max_pwdb =
530*4882a593Smuzhiyun 					drv_priv->rssi_stat.undec_sm_pwdb;
531*4882a593Smuzhiyun 		}
532*4882a593Smuzhiyun 		spin_unlock_bh(&rtlpriv->locks.entry_list_lock);
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 		/* If associated entry is found */
535*4882a593Smuzhiyun 		if (tmp_entry_max_pwdb != 0) {
536*4882a593Smuzhiyun 			rtlpriv->dm.entry_max_undec_sm_pwdb =
537*4882a593Smuzhiyun 				tmp_entry_max_pwdb;
538*4882a593Smuzhiyun 			RTPRINT(rtlpriv, FDM, DM_PWDB,
539*4882a593Smuzhiyun 				"EntryMaxPWDB = 0x%lx(%ld)\n",
540*4882a593Smuzhiyun 				tmp_entry_max_pwdb, tmp_entry_max_pwdb);
541*4882a593Smuzhiyun 		} else {
542*4882a593Smuzhiyun 			rtlpriv->dm.entry_max_undec_sm_pwdb = 0;
543*4882a593Smuzhiyun 		}
544*4882a593Smuzhiyun 		/* If associated entry is found */
545*4882a593Smuzhiyun 		if (tmp_entry_min_pwdb != 0xff) {
546*4882a593Smuzhiyun 			rtlpriv->dm.entry_min_undec_sm_pwdb =
547*4882a593Smuzhiyun 				tmp_entry_min_pwdb;
548*4882a593Smuzhiyun 			RTPRINT(rtlpriv, FDM, DM_PWDB,
549*4882a593Smuzhiyun 				"EntryMinPWDB = 0x%lx(%ld)\n",
550*4882a593Smuzhiyun 				tmp_entry_min_pwdb, tmp_entry_min_pwdb);
551*4882a593Smuzhiyun 		} else {
552*4882a593Smuzhiyun 			rtlpriv->dm.entry_min_undec_sm_pwdb = 0;
553*4882a593Smuzhiyun 		}
554*4882a593Smuzhiyun 	}
555*4882a593Smuzhiyun 	/* Indicate Rx signal strength to FW. */
556*4882a593Smuzhiyun 	if (rtlpriv->dm.useramask) {
557*4882a593Smuzhiyun 		if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) {
558*4882a593Smuzhiyun 			if (mac->mode == WIRELESS_MODE_AC_24G ||
559*4882a593Smuzhiyun 			    mac->mode == WIRELESS_MODE_AC_5G ||
560*4882a593Smuzhiyun 			    mac->mode == WIRELESS_MODE_AC_ONLY)
561*4882a593Smuzhiyun 				stbc_tx = (mac->vht_cur_stbc &
562*4882a593Smuzhiyun 					   STBC_VHT_ENABLE_TX) ? 1 : 0;
563*4882a593Smuzhiyun 			else
564*4882a593Smuzhiyun 				stbc_tx = (mac->ht_cur_stbc &
565*4882a593Smuzhiyun 					   STBC_HT_ENABLE_TX) ? 1 : 0;
566*4882a593Smuzhiyun 			h2c_parameter[3] |= stbc_tx << 1;
567*4882a593Smuzhiyun 		}
568*4882a593Smuzhiyun 		h2c_parameter[2] =
569*4882a593Smuzhiyun 			(u8)(rtlpriv->dm.undec_sm_pwdb & 0xFF);
570*4882a593Smuzhiyun 		h2c_parameter[1] = 0x20;
571*4882a593Smuzhiyun 		h2c_parameter[0] = 0;
572*4882a593Smuzhiyun 		if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE)
573*4882a593Smuzhiyun 			rtl8821ae_fill_h2c_cmd(hw, H2C_RSSI_21AE_REPORT, 4,
574*4882a593Smuzhiyun 					       h2c_parameter);
575*4882a593Smuzhiyun 		else
576*4882a593Smuzhiyun 			rtl8821ae_fill_h2c_cmd(hw, H2C_RSSI_21AE_REPORT, 3,
577*4882a593Smuzhiyun 					       h2c_parameter);
578*4882a593Smuzhiyun 	} else {
579*4882a593Smuzhiyun 		rtl_write_byte(rtlpriv, 0x4fe, rtlpriv->dm.undec_sm_pwdb);
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 	if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE)
582*4882a593Smuzhiyun 		rtl8812ae_dm_rssi_dump_to_register(hw);
583*4882a593Smuzhiyun 	rtl8821ae_dm_find_minimum_rssi(hw);
584*4882a593Smuzhiyun 	dm_digtable->rssi_val_min = rtlpriv->dm_digtable.min_undec_pwdb_for_dm;
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun 
rtl8821ae_dm_write_cck_cca_thres(struct ieee80211_hw * hw,u8 current_cca)587*4882a593Smuzhiyun void rtl8821ae_dm_write_cck_cca_thres(struct ieee80211_hw *hw, u8 current_cca)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
590*4882a593Smuzhiyun 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	if (dm_digtable->cur_cck_cca_thres != current_cca)
593*4882a593Smuzhiyun 		rtl_write_byte(rtlpriv, DM_REG_CCK_CCA_11AC, current_cca);
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	dm_digtable->pre_cck_cca_thres = dm_digtable->cur_cck_cca_thres;
596*4882a593Smuzhiyun 	dm_digtable->cur_cck_cca_thres = current_cca;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun 
rtl8821ae_dm_write_dig(struct ieee80211_hw * hw,u8 current_igi)599*4882a593Smuzhiyun void rtl8821ae_dm_write_dig(struct ieee80211_hw *hw, u8 current_igi)
600*4882a593Smuzhiyun {
601*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
602*4882a593Smuzhiyun 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	if (dm_digtable->stop_dig)
605*4882a593Smuzhiyun 		return;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	if (dm_digtable->cur_igvalue != current_igi) {
608*4882a593Smuzhiyun 		rtl_set_bbreg(hw, DM_REG_IGI_A_11AC,
609*4882a593Smuzhiyun 			      DM_BIT_IGI_11AC, current_igi);
610*4882a593Smuzhiyun 		if (rtlpriv->phy.rf_type != RF_1T1R)
611*4882a593Smuzhiyun 			rtl_set_bbreg(hw, DM_REG_IGI_B_11AC,
612*4882a593Smuzhiyun 				      DM_BIT_IGI_11AC, current_igi);
613*4882a593Smuzhiyun 	}
614*4882a593Smuzhiyun 	dm_digtable->cur_igvalue = current_igi;
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun 
rtl8821ae_dm_dig(struct ieee80211_hw * hw)617*4882a593Smuzhiyun static void rtl8821ae_dm_dig(struct ieee80211_hw *hw)
618*4882a593Smuzhiyun {
619*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
620*4882a593Smuzhiyun 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
621*4882a593Smuzhiyun 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
622*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
623*4882a593Smuzhiyun 	u8 dig_min_0;
624*4882a593Smuzhiyun 	u8 dig_max_of_min;
625*4882a593Smuzhiyun 	bool first_connect, first_disconnect;
626*4882a593Smuzhiyun 	u8 dm_dig_max, dm_dig_min, offset;
627*4882a593Smuzhiyun 	u8 current_igi = dm_digtable->cur_igvalue;
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "\n");
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	if (mac->act_scanning) {
632*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
633*4882a593Smuzhiyun 			"Return: In Scan Progress\n");
634*4882a593Smuzhiyun 		return;
635*4882a593Smuzhiyun 	}
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	/*add by Neil Chen to avoid PSD is processing*/
638*4882a593Smuzhiyun 	dig_min_0 = dm_digtable->dig_min_0;
639*4882a593Smuzhiyun 	first_connect = (mac->link_state >= MAC80211_LINKED) &&
640*4882a593Smuzhiyun 			(!dm_digtable->media_connect_0);
641*4882a593Smuzhiyun 	first_disconnect = (mac->link_state < MAC80211_LINKED) &&
642*4882a593Smuzhiyun 			(dm_digtable->media_connect_0);
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	/*1 Boundary Decision*/
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	dm_dig_max = 0x5A;
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	if (rtlhal->hw_type != HARDWARE_TYPE_RTL8821AE)
649*4882a593Smuzhiyun 		dm_dig_min = DM_DIG_MIN;
650*4882a593Smuzhiyun 	else
651*4882a593Smuzhiyun 		dm_dig_min = 0x1C;
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 	dig_max_of_min = DM_DIG_MAX_AP;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	if (mac->link_state >= MAC80211_LINKED) {
656*4882a593Smuzhiyun 		if (rtlhal->hw_type != HARDWARE_TYPE_RTL8821AE)
657*4882a593Smuzhiyun 			offset = 20;
658*4882a593Smuzhiyun 		else
659*4882a593Smuzhiyun 			offset = 10;
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 		if ((dm_digtable->rssi_val_min + offset) > dm_dig_max)
662*4882a593Smuzhiyun 			dm_digtable->rx_gain_max = dm_dig_max;
663*4882a593Smuzhiyun 		else if ((dm_digtable->rssi_val_min + offset) < dm_dig_min)
664*4882a593Smuzhiyun 			dm_digtable->rx_gain_max = dm_dig_min;
665*4882a593Smuzhiyun 		else
666*4882a593Smuzhiyun 			dm_digtable->rx_gain_max =
667*4882a593Smuzhiyun 				dm_digtable->rssi_val_min + offset;
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
670*4882a593Smuzhiyun 			"dm_digtable->rssi_val_min=0x%x,dm_digtable->rx_gain_max = 0x%x\n",
671*4882a593Smuzhiyun 			dm_digtable->rssi_val_min,
672*4882a593Smuzhiyun 			dm_digtable->rx_gain_max);
673*4882a593Smuzhiyun 		if (rtlpriv->dm.one_entry_only) {
674*4882a593Smuzhiyun 			offset = 0;
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 			if (dm_digtable->rssi_val_min - offset < dm_dig_min)
677*4882a593Smuzhiyun 				dig_min_0 = dm_dig_min;
678*4882a593Smuzhiyun 			else if (dm_digtable->rssi_val_min -
679*4882a593Smuzhiyun 				offset > dig_max_of_min)
680*4882a593Smuzhiyun 				dig_min_0 = dig_max_of_min;
681*4882a593Smuzhiyun 			else
682*4882a593Smuzhiyun 				dig_min_0 =
683*4882a593Smuzhiyun 					dm_digtable->rssi_val_min - offset;
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
686*4882a593Smuzhiyun 				"bOneEntryOnly=TRUE, dig_min_0=0x%x\n",
687*4882a593Smuzhiyun 				dig_min_0);
688*4882a593Smuzhiyun 		} else {
689*4882a593Smuzhiyun 			dig_min_0 = dm_dig_min;
690*4882a593Smuzhiyun 		}
691*4882a593Smuzhiyun 	} else {
692*4882a593Smuzhiyun 		dm_digtable->rx_gain_max = dm_dig_max;
693*4882a593Smuzhiyun 		dig_min_0 = dm_dig_min;
694*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "No Link\n");
695*4882a593Smuzhiyun 	}
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	if (rtlpriv->falsealm_cnt.cnt_all > 10000) {
698*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
699*4882a593Smuzhiyun 			"Abnormally false alarm case.\n");
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 		if (dm_digtable->large_fa_hit != 3)
702*4882a593Smuzhiyun 			dm_digtable->large_fa_hit++;
703*4882a593Smuzhiyun 		if (dm_digtable->forbidden_igi < current_igi) {
704*4882a593Smuzhiyun 			dm_digtable->forbidden_igi = current_igi;
705*4882a593Smuzhiyun 			dm_digtable->large_fa_hit = 1;
706*4882a593Smuzhiyun 		}
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 		if (dm_digtable->large_fa_hit >= 3) {
709*4882a593Smuzhiyun 			if ((dm_digtable->forbidden_igi + 1) >
710*4882a593Smuzhiyun 				dm_digtable->rx_gain_max)
711*4882a593Smuzhiyun 				dm_digtable->rx_gain_min =
712*4882a593Smuzhiyun 					dm_digtable->rx_gain_max;
713*4882a593Smuzhiyun 			else
714*4882a593Smuzhiyun 				dm_digtable->rx_gain_min =
715*4882a593Smuzhiyun 					(dm_digtable->forbidden_igi + 1);
716*4882a593Smuzhiyun 			dm_digtable->recover_cnt = 3600;
717*4882a593Smuzhiyun 		}
718*4882a593Smuzhiyun 	} else {
719*4882a593Smuzhiyun 		/*Recovery mechanism for IGI lower bound*/
720*4882a593Smuzhiyun 		if (dm_digtable->recover_cnt != 0) {
721*4882a593Smuzhiyun 			dm_digtable->recover_cnt--;
722*4882a593Smuzhiyun 		} else {
723*4882a593Smuzhiyun 			if (dm_digtable->large_fa_hit < 3) {
724*4882a593Smuzhiyun 				if ((dm_digtable->forbidden_igi - 1) <
725*4882a593Smuzhiyun 				    dig_min_0) {
726*4882a593Smuzhiyun 					dm_digtable->forbidden_igi =
727*4882a593Smuzhiyun 						dig_min_0;
728*4882a593Smuzhiyun 					dm_digtable->rx_gain_min =
729*4882a593Smuzhiyun 						dig_min_0;
730*4882a593Smuzhiyun 					rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
731*4882a593Smuzhiyun 						"Normal Case: At Lower Bound\n");
732*4882a593Smuzhiyun 				} else {
733*4882a593Smuzhiyun 					dm_digtable->forbidden_igi--;
734*4882a593Smuzhiyun 					dm_digtable->rx_gain_min =
735*4882a593Smuzhiyun 					  (dm_digtable->forbidden_igi + 1);
736*4882a593Smuzhiyun 					rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
737*4882a593Smuzhiyun 						"Normal Case: Approach Lower Bound\n");
738*4882a593Smuzhiyun 				}
739*4882a593Smuzhiyun 			} else {
740*4882a593Smuzhiyun 				dm_digtable->large_fa_hit = 0;
741*4882a593Smuzhiyun 			}
742*4882a593Smuzhiyun 		}
743*4882a593Smuzhiyun 	}
744*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
745*4882a593Smuzhiyun 		"pDM_DigTable->LargeFAHit=%d\n",
746*4882a593Smuzhiyun 		dm_digtable->large_fa_hit);
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	if (rtlpriv->dm.dbginfo.num_qry_beacon_pkt < 10)
749*4882a593Smuzhiyun 		dm_digtable->rx_gain_min = dm_dig_min;
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	if (dm_digtable->rx_gain_min > dm_digtable->rx_gain_max)
752*4882a593Smuzhiyun 		dm_digtable->rx_gain_min = dm_digtable->rx_gain_max;
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	/*Adjust initial gain by false alarm*/
755*4882a593Smuzhiyun 	if (mac->link_state >= MAC80211_LINKED) {
756*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
757*4882a593Smuzhiyun 			"DIG AfterLink\n");
758*4882a593Smuzhiyun 		if (first_connect) {
759*4882a593Smuzhiyun 			if (dm_digtable->rssi_val_min <= dig_max_of_min)
760*4882a593Smuzhiyun 				current_igi = dm_digtable->rssi_val_min;
761*4882a593Smuzhiyun 			else
762*4882a593Smuzhiyun 				current_igi = dig_max_of_min;
763*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
764*4882a593Smuzhiyun 				"First Connect\n");
765*4882a593Smuzhiyun 		} else {
766*4882a593Smuzhiyun 			if (rtlpriv->falsealm_cnt.cnt_all > DM_DIG_FA_TH2)
767*4882a593Smuzhiyun 				current_igi = current_igi + 4;
768*4882a593Smuzhiyun 			else if (rtlpriv->falsealm_cnt.cnt_all > DM_DIG_FA_TH1)
769*4882a593Smuzhiyun 				current_igi = current_igi + 2;
770*4882a593Smuzhiyun 			else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
771*4882a593Smuzhiyun 				current_igi = current_igi - 2;
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 			if ((rtlpriv->dm.dbginfo.num_qry_beacon_pkt < 10) &&
774*4882a593Smuzhiyun 			    (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)) {
775*4882a593Smuzhiyun 				current_igi = dm_digtable->rx_gain_min;
776*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
777*4882a593Smuzhiyun 					"Beacon is less than 10 and FA is less than 768, IGI GOES TO 0x1E!!!!!!!!!!!!\n");
778*4882a593Smuzhiyun 			}
779*4882a593Smuzhiyun 		}
780*4882a593Smuzhiyun 	} else {
781*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
782*4882a593Smuzhiyun 			"DIG BeforeLink\n");
783*4882a593Smuzhiyun 		if (first_disconnect) {
784*4882a593Smuzhiyun 			current_igi = dm_digtable->rx_gain_min;
785*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
786*4882a593Smuzhiyun 				"First DisConnect\n");
787*4882a593Smuzhiyun 		} else {
788*4882a593Smuzhiyun 			/* 2012.03.30 LukeLee: enable DIG before
789*4882a593Smuzhiyun 			 * link but with very high thresholds
790*4882a593Smuzhiyun 			 */
791*4882a593Smuzhiyun 			if (rtlpriv->falsealm_cnt.cnt_all > 2000)
792*4882a593Smuzhiyun 				current_igi = current_igi + 4;
793*4882a593Smuzhiyun 			else if (rtlpriv->falsealm_cnt.cnt_all > 600)
794*4882a593Smuzhiyun 				current_igi = current_igi + 2;
795*4882a593Smuzhiyun 			else if (rtlpriv->falsealm_cnt.cnt_all < 300)
796*4882a593Smuzhiyun 				current_igi = current_igi - 2;
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 			if (current_igi >= 0x3e)
799*4882a593Smuzhiyun 				current_igi = 0x3e;
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "England DIG\n");
802*4882a593Smuzhiyun 		}
803*4882a593Smuzhiyun 	}
804*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
805*4882a593Smuzhiyun 		"DIG End Adjust IGI\n");
806*4882a593Smuzhiyun 	/* Check initial gain by upper/lower bound*/
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	if (current_igi > dm_digtable->rx_gain_max)
809*4882a593Smuzhiyun 		current_igi = dm_digtable->rx_gain_max;
810*4882a593Smuzhiyun 	if (current_igi < dm_digtable->rx_gain_min)
811*4882a593Smuzhiyun 		current_igi = dm_digtable->rx_gain_min;
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
814*4882a593Smuzhiyun 		"rx_gain_max=0x%x, rx_gain_min=0x%x\n",
815*4882a593Smuzhiyun 		dm_digtable->rx_gain_max, dm_digtable->rx_gain_min);
816*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
817*4882a593Smuzhiyun 		"TotalFA=%d\n", rtlpriv->falsealm_cnt.cnt_all);
818*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
819*4882a593Smuzhiyun 		"CurIGValue=0x%x\n", current_igi);
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	rtl8821ae_dm_write_dig(hw, current_igi);
822*4882a593Smuzhiyun 	dm_digtable->media_connect_0 =
823*4882a593Smuzhiyun 		((mac->link_state >= MAC80211_LINKED) ? true : false);
824*4882a593Smuzhiyun 	dm_digtable->dig_min_0 = dig_min_0;
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun 
rtl8821ae_dm_common_info_self_update(struct ieee80211_hw * hw)827*4882a593Smuzhiyun static void rtl8821ae_dm_common_info_self_update(struct ieee80211_hw *hw)
828*4882a593Smuzhiyun {
829*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
830*4882a593Smuzhiyun 	u8 cnt = 0;
831*4882a593Smuzhiyun 	struct rtl_sta_info *drv_priv;
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	rtlpriv->dm.tx_rate = 0xff;
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 	rtlpriv->dm.one_entry_only = false;
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	if (rtlpriv->mac80211.opmode == NL80211_IFTYPE_STATION &&
838*4882a593Smuzhiyun 	    rtlpriv->mac80211.link_state >= MAC80211_LINKED) {
839*4882a593Smuzhiyun 		rtlpriv->dm.one_entry_only = true;
840*4882a593Smuzhiyun 		return;
841*4882a593Smuzhiyun 	}
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 	if (rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP ||
844*4882a593Smuzhiyun 	    rtlpriv->mac80211.opmode == NL80211_IFTYPE_ADHOC ||
845*4882a593Smuzhiyun 	    rtlpriv->mac80211.opmode == NL80211_IFTYPE_MESH_POINT) {
846*4882a593Smuzhiyun 		spin_lock_bh(&rtlpriv->locks.entry_list_lock);
847*4882a593Smuzhiyun 		list_for_each_entry(drv_priv, &rtlpriv->entry_list, list)
848*4882a593Smuzhiyun 			cnt++;
849*4882a593Smuzhiyun 		spin_unlock_bh(&rtlpriv->locks.entry_list_lock);
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 		if (cnt == 1)
852*4882a593Smuzhiyun 			rtlpriv->dm.one_entry_only = true;
853*4882a593Smuzhiyun 	}
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun 
rtl8821ae_dm_false_alarm_counter_statistics(struct ieee80211_hw * hw)856*4882a593Smuzhiyun static void rtl8821ae_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
857*4882a593Smuzhiyun {
858*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
859*4882a593Smuzhiyun 	struct false_alarm_statistics *falsealm_cnt = &rtlpriv->falsealm_cnt;
860*4882a593Smuzhiyun 	u32 cck_enable = 0;
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun 	/*read OFDM FA counter*/
863*4882a593Smuzhiyun 	falsealm_cnt->cnt_ofdm_fail =
864*4882a593Smuzhiyun 		rtl_get_bbreg(hw, ODM_REG_OFDM_FA_11AC, BMASKLWORD);
865*4882a593Smuzhiyun 	falsealm_cnt->cnt_cck_fail =
866*4882a593Smuzhiyun 		rtl_get_bbreg(hw, ODM_REG_CCK_FA_11AC, BMASKLWORD);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	cck_enable =  rtl_get_bbreg(hw, ODM_REG_BB_RX_PATH_11AC, BIT(28));
869*4882a593Smuzhiyun 	if (cck_enable)  /*if(pDM_Odm->pBandType == ODM_BAND_2_4G)*/
870*4882a593Smuzhiyun 		falsealm_cnt->cnt_all = falsealm_cnt->cnt_ofdm_fail +
871*4882a593Smuzhiyun 					falsealm_cnt->cnt_cck_fail;
872*4882a593Smuzhiyun 	else
873*4882a593Smuzhiyun 		falsealm_cnt->cnt_all = falsealm_cnt->cnt_ofdm_fail;
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun 	/*reset OFDM FA coutner*/
876*4882a593Smuzhiyun 	rtl_set_bbreg(hw, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 1);
877*4882a593Smuzhiyun 	rtl_set_bbreg(hw, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 0);
878*4882a593Smuzhiyun 	/* reset CCK FA counter*/
879*4882a593Smuzhiyun 	rtl_set_bbreg(hw, ODM_REG_CCK_FA_RST_11AC, BIT(15), 0);
880*4882a593Smuzhiyun 	rtl_set_bbreg(hw, ODM_REG_CCK_FA_RST_11AC, BIT(15), 1);
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "Cnt_Cck_fail=%d\n",
883*4882a593Smuzhiyun 		falsealm_cnt->cnt_cck_fail);
884*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "cnt_ofdm_fail=%d\n",
885*4882a593Smuzhiyun 		falsealm_cnt->cnt_ofdm_fail);
886*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "Total False Alarm=%d\n",
887*4882a593Smuzhiyun 		falsealm_cnt->cnt_all);
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun 
rtl8812ae_dm_check_txpower_tracking_thermalmeter(struct ieee80211_hw * hw)890*4882a593Smuzhiyun static void rtl8812ae_dm_check_txpower_tracking_thermalmeter(
891*4882a593Smuzhiyun 		struct ieee80211_hw *hw)
892*4882a593Smuzhiyun {
893*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
894*4882a593Smuzhiyun 
895*4882a593Smuzhiyun 	if (!rtlpriv->dm.tm_trigger) {
896*4882a593Smuzhiyun 		rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER_88E,
897*4882a593Smuzhiyun 			      BIT(17) | BIT(16), 0x03);
898*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
899*4882a593Smuzhiyun 			"Trigger 8812 Thermal Meter!!\n");
900*4882a593Smuzhiyun 		rtlpriv->dm.tm_trigger = 1;
901*4882a593Smuzhiyun 		return;
902*4882a593Smuzhiyun 	}
903*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
904*4882a593Smuzhiyun 		"Schedule TxPowerTracking direct call!!\n");
905*4882a593Smuzhiyun 	rtl8812ae_dm_txpower_tracking_callback_thermalmeter(hw);
906*4882a593Smuzhiyun }
907*4882a593Smuzhiyun 
rtl8821ae_dm_iq_calibrate(struct ieee80211_hw * hw)908*4882a593Smuzhiyun static void rtl8821ae_dm_iq_calibrate(struct ieee80211_hw *hw)
909*4882a593Smuzhiyun {
910*4882a593Smuzhiyun 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
911*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
912*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	if (mac->link_state >= MAC80211_LINKED) {
915*4882a593Smuzhiyun 		if (rtldm->linked_interval < 3)
916*4882a593Smuzhiyun 			rtldm->linked_interval++;
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 		if (rtldm->linked_interval == 2) {
919*4882a593Smuzhiyun 			if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE)
920*4882a593Smuzhiyun 				rtl8812ae_phy_iq_calibrate(hw, false);
921*4882a593Smuzhiyun 			else
922*4882a593Smuzhiyun 				rtl8821ae_phy_iq_calibrate(hw, false);
923*4882a593Smuzhiyun 		}
924*4882a593Smuzhiyun 	} else {
925*4882a593Smuzhiyun 		rtldm->linked_interval = 0;
926*4882a593Smuzhiyun 	}
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun 
rtl8812ae_get_delta_swing_table(struct ieee80211_hw * hw,const u8 ** up_a,const u8 ** down_a,const u8 ** up_b,const u8 ** down_b)929*4882a593Smuzhiyun static void rtl8812ae_get_delta_swing_table(struct ieee80211_hw *hw,
930*4882a593Smuzhiyun 					    const u8 **up_a,
931*4882a593Smuzhiyun 					    const u8 **down_a,
932*4882a593Smuzhiyun 					    const u8 **up_b,
933*4882a593Smuzhiyun 					    const u8 **down_b)
934*4882a593Smuzhiyun {
935*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
936*4882a593Smuzhiyun 	struct rtl_phy *rtlphy = &rtlpriv->phy;
937*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
938*4882a593Smuzhiyun 	u8 channel = rtlphy->current_channel;
939*4882a593Smuzhiyun 	u8 rate = rtldm->tx_rate;
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun 	if (1 <= channel && channel <= 14) {
942*4882a593Smuzhiyun 		if (RTL8821AE_RX_HAL_IS_CCK_RATE(rate)) {
943*4882a593Smuzhiyun 			*up_a = rtl8812ae_delta_swing_table_idx_24gccka_p;
944*4882a593Smuzhiyun 			*down_a = rtl8812ae_delta_swing_table_idx_24gccka_n;
945*4882a593Smuzhiyun 			*up_b = rtl8812ae_delta_swing_table_idx_24gcckb_p;
946*4882a593Smuzhiyun 			*down_b = rtl8812ae_delta_swing_table_idx_24gcckb_n;
947*4882a593Smuzhiyun 		} else {
948*4882a593Smuzhiyun 			*up_a = rtl8812ae_delta_swing_table_idx_24ga_p;
949*4882a593Smuzhiyun 			*down_a = rtl8812ae_delta_swing_table_idx_24ga_n;
950*4882a593Smuzhiyun 			*up_b = rtl8812ae_delta_swing_table_idx_24gb_p;
951*4882a593Smuzhiyun 			*down_b = rtl8812ae_delta_swing_table_idx_24gb_n;
952*4882a593Smuzhiyun 		}
953*4882a593Smuzhiyun 	} else if (36 <= channel && channel <= 64) {
954*4882a593Smuzhiyun 		*up_a = rtl8812ae_delta_swing_table_idx_5ga_p[0];
955*4882a593Smuzhiyun 		*down_a = rtl8812ae_delta_swing_table_idx_5ga_n[0];
956*4882a593Smuzhiyun 		*up_b = rtl8812ae_delta_swing_table_idx_5gb_p[0];
957*4882a593Smuzhiyun 		*down_b = rtl8812ae_delta_swing_table_idx_5gb_n[0];
958*4882a593Smuzhiyun 	} else if (100 <= channel && channel <= 140) {
959*4882a593Smuzhiyun 		*up_a = rtl8812ae_delta_swing_table_idx_5ga_p[1];
960*4882a593Smuzhiyun 		*down_a = rtl8812ae_delta_swing_table_idx_5ga_n[1];
961*4882a593Smuzhiyun 		*up_b = rtl8812ae_delta_swing_table_idx_5gb_p[1];
962*4882a593Smuzhiyun 		*down_b = rtl8812ae_delta_swing_table_idx_5gb_n[1];
963*4882a593Smuzhiyun 	} else if (149 <= channel && channel <= 173) {
964*4882a593Smuzhiyun 		*up_a = rtl8812ae_delta_swing_table_idx_5ga_p[2];
965*4882a593Smuzhiyun 		*down_a = rtl8812ae_delta_swing_table_idx_5ga_n[2];
966*4882a593Smuzhiyun 		*up_b = rtl8812ae_delta_swing_table_idx_5gb_p[2];
967*4882a593Smuzhiyun 		*down_b = rtl8812ae_delta_swing_table_idx_5gb_n[2];
968*4882a593Smuzhiyun 	} else {
969*4882a593Smuzhiyun 		*up_a = rtl8818e_delta_swing_table_idx_24gb_p;
970*4882a593Smuzhiyun 		*down_a = rtl8818e_delta_swing_table_idx_24gb_n;
971*4882a593Smuzhiyun 		*up_b = rtl8818e_delta_swing_table_idx_24gb_p;
972*4882a593Smuzhiyun 		*down_b = rtl8818e_delta_swing_table_idx_24gb_n;
973*4882a593Smuzhiyun 	}
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun 
rtl8821ae_dm_update_init_rate(struct ieee80211_hw * hw,u8 rate)976*4882a593Smuzhiyun void rtl8821ae_dm_update_init_rate(struct ieee80211_hw *hw, u8 rate)
977*4882a593Smuzhiyun {
978*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
979*4882a593Smuzhiyun 	struct rtl_dm	*rtldm = rtl_dm(rtl_priv(hw));
980*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
981*4882a593Smuzhiyun 	u8 p = 0;
982*4882a593Smuzhiyun 
983*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
984*4882a593Smuzhiyun 		"Get C2H Command! Rate=0x%x\n", rate);
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	rtldm->tx_rate = rate;
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	if (rtlhal->hw_type == HARDWARE_TYPE_RTL8821AE) {
989*4882a593Smuzhiyun 		rtl8821ae_dm_txpwr_track_set_pwr(hw, MIX_MODE, RF90_PATH_A, 0);
990*4882a593Smuzhiyun 	} else {
991*4882a593Smuzhiyun 		for (p = RF90_PATH_A; p < MAX_PATH_NUM_8812A; p++)
992*4882a593Smuzhiyun 			rtl8812ae_dm_txpwr_track_set_pwr(hw, MIX_MODE, p, 0);
993*4882a593Smuzhiyun 	}
994*4882a593Smuzhiyun }
995*4882a593Smuzhiyun 
rtl8821ae_hw_rate_to_mrate(struct ieee80211_hw * hw,u8 rate)996*4882a593Smuzhiyun u8 rtl8821ae_hw_rate_to_mrate(struct ieee80211_hw *hw, u8 rate)
997*4882a593Smuzhiyun {
998*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
999*4882a593Smuzhiyun 	u8 ret_rate = MGN_1M;
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 	switch (rate) {
1002*4882a593Smuzhiyun 	case DESC_RATE1M:
1003*4882a593Smuzhiyun 		ret_rate = MGN_1M;
1004*4882a593Smuzhiyun 		break;
1005*4882a593Smuzhiyun 	case DESC_RATE2M:
1006*4882a593Smuzhiyun 		ret_rate = MGN_2M;
1007*4882a593Smuzhiyun 		break;
1008*4882a593Smuzhiyun 	case DESC_RATE5_5M:
1009*4882a593Smuzhiyun 		ret_rate = MGN_5_5M;
1010*4882a593Smuzhiyun 		break;
1011*4882a593Smuzhiyun 	case DESC_RATE11M:
1012*4882a593Smuzhiyun 		ret_rate = MGN_11M;
1013*4882a593Smuzhiyun 		break;
1014*4882a593Smuzhiyun 	case DESC_RATE6M:
1015*4882a593Smuzhiyun 		ret_rate = MGN_6M;
1016*4882a593Smuzhiyun 		break;
1017*4882a593Smuzhiyun 	case DESC_RATE9M:
1018*4882a593Smuzhiyun 		ret_rate = MGN_9M;
1019*4882a593Smuzhiyun 		break;
1020*4882a593Smuzhiyun 	case DESC_RATE12M:
1021*4882a593Smuzhiyun 		ret_rate = MGN_12M;
1022*4882a593Smuzhiyun 		break;
1023*4882a593Smuzhiyun 	case DESC_RATE18M:
1024*4882a593Smuzhiyun 		ret_rate = MGN_18M;
1025*4882a593Smuzhiyun 		break;
1026*4882a593Smuzhiyun 	case DESC_RATE24M:
1027*4882a593Smuzhiyun 		ret_rate = MGN_24M;
1028*4882a593Smuzhiyun 		break;
1029*4882a593Smuzhiyun 	case DESC_RATE36M:
1030*4882a593Smuzhiyun 		ret_rate = MGN_36M;
1031*4882a593Smuzhiyun 		break;
1032*4882a593Smuzhiyun 	case DESC_RATE48M:
1033*4882a593Smuzhiyun 		ret_rate = MGN_48M;
1034*4882a593Smuzhiyun 		break;
1035*4882a593Smuzhiyun 	case DESC_RATE54M:
1036*4882a593Smuzhiyun 		ret_rate = MGN_54M;
1037*4882a593Smuzhiyun 		break;
1038*4882a593Smuzhiyun 	case DESC_RATEMCS0:
1039*4882a593Smuzhiyun 		ret_rate = MGN_MCS0;
1040*4882a593Smuzhiyun 		break;
1041*4882a593Smuzhiyun 	case DESC_RATEMCS1:
1042*4882a593Smuzhiyun 		ret_rate = MGN_MCS1;
1043*4882a593Smuzhiyun 		break;
1044*4882a593Smuzhiyun 	case DESC_RATEMCS2:
1045*4882a593Smuzhiyun 		ret_rate = MGN_MCS2;
1046*4882a593Smuzhiyun 		break;
1047*4882a593Smuzhiyun 	case DESC_RATEMCS3:
1048*4882a593Smuzhiyun 		ret_rate = MGN_MCS3;
1049*4882a593Smuzhiyun 		break;
1050*4882a593Smuzhiyun 	case DESC_RATEMCS4:
1051*4882a593Smuzhiyun 		ret_rate = MGN_MCS4;
1052*4882a593Smuzhiyun 		break;
1053*4882a593Smuzhiyun 	case DESC_RATEMCS5:
1054*4882a593Smuzhiyun 		ret_rate = MGN_MCS5;
1055*4882a593Smuzhiyun 		break;
1056*4882a593Smuzhiyun 	case DESC_RATEMCS6:
1057*4882a593Smuzhiyun 		ret_rate = MGN_MCS6;
1058*4882a593Smuzhiyun 		break;
1059*4882a593Smuzhiyun 	case DESC_RATEMCS7:
1060*4882a593Smuzhiyun 		ret_rate = MGN_MCS7;
1061*4882a593Smuzhiyun 		break;
1062*4882a593Smuzhiyun 	case DESC_RATEMCS8:
1063*4882a593Smuzhiyun 		ret_rate = MGN_MCS8;
1064*4882a593Smuzhiyun 		break;
1065*4882a593Smuzhiyun 	case DESC_RATEMCS9:
1066*4882a593Smuzhiyun 		ret_rate = MGN_MCS9;
1067*4882a593Smuzhiyun 		break;
1068*4882a593Smuzhiyun 	case DESC_RATEMCS10:
1069*4882a593Smuzhiyun 		ret_rate = MGN_MCS10;
1070*4882a593Smuzhiyun 		break;
1071*4882a593Smuzhiyun 	case DESC_RATEMCS11:
1072*4882a593Smuzhiyun 		ret_rate = MGN_MCS11;
1073*4882a593Smuzhiyun 		break;
1074*4882a593Smuzhiyun 	case DESC_RATEMCS12:
1075*4882a593Smuzhiyun 		ret_rate = MGN_MCS12;
1076*4882a593Smuzhiyun 		break;
1077*4882a593Smuzhiyun 	case DESC_RATEMCS13:
1078*4882a593Smuzhiyun 		ret_rate = MGN_MCS13;
1079*4882a593Smuzhiyun 		break;
1080*4882a593Smuzhiyun 	case DESC_RATEMCS14:
1081*4882a593Smuzhiyun 		ret_rate = MGN_MCS14;
1082*4882a593Smuzhiyun 		break;
1083*4882a593Smuzhiyun 	case DESC_RATEMCS15:
1084*4882a593Smuzhiyun 		ret_rate = MGN_MCS15;
1085*4882a593Smuzhiyun 		break;
1086*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS0:
1087*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS0;
1088*4882a593Smuzhiyun 		break;
1089*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS1:
1090*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS1;
1091*4882a593Smuzhiyun 		break;
1092*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS2:
1093*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS2;
1094*4882a593Smuzhiyun 		break;
1095*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS3:
1096*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS3;
1097*4882a593Smuzhiyun 		break;
1098*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS4:
1099*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS4;
1100*4882a593Smuzhiyun 		break;
1101*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS5:
1102*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS5;
1103*4882a593Smuzhiyun 		break;
1104*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS6:
1105*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS6;
1106*4882a593Smuzhiyun 		break;
1107*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS7:
1108*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS7;
1109*4882a593Smuzhiyun 		break;
1110*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS8:
1111*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS8;
1112*4882a593Smuzhiyun 		break;
1113*4882a593Smuzhiyun 	case DESC_RATEVHT1SS_MCS9:
1114*4882a593Smuzhiyun 		ret_rate = MGN_VHT1SS_MCS9;
1115*4882a593Smuzhiyun 		break;
1116*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS0:
1117*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS0;
1118*4882a593Smuzhiyun 		break;
1119*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS1:
1120*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS1;
1121*4882a593Smuzhiyun 		break;
1122*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS2:
1123*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS2;
1124*4882a593Smuzhiyun 		break;
1125*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS3:
1126*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS3;
1127*4882a593Smuzhiyun 		break;
1128*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS4:
1129*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS4;
1130*4882a593Smuzhiyun 		break;
1131*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS5:
1132*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS5;
1133*4882a593Smuzhiyun 		break;
1134*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS6:
1135*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS6;
1136*4882a593Smuzhiyun 		break;
1137*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS7:
1138*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS7;
1139*4882a593Smuzhiyun 		break;
1140*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS8:
1141*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS8;
1142*4882a593Smuzhiyun 		break;
1143*4882a593Smuzhiyun 	case DESC_RATEVHT2SS_MCS9:
1144*4882a593Smuzhiyun 		ret_rate = MGN_VHT2SS_MCS9;
1145*4882a593Smuzhiyun 		break;
1146*4882a593Smuzhiyun 	default:
1147*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1148*4882a593Smuzhiyun 			"HwRateToMRate8812(): Non supported Rate [%x]!!!\n",
1149*4882a593Smuzhiyun 			rate);
1150*4882a593Smuzhiyun 		break;
1151*4882a593Smuzhiyun 	}
1152*4882a593Smuzhiyun 	return ret_rate;
1153*4882a593Smuzhiyun }
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
1156*4882a593Smuzhiyun  * Function:	odm_TxPwrTrackSetPwr88E()
1157*4882a593Smuzhiyun  *
1158*4882a593Smuzhiyun  * Overview:	88E change all channel tx power accordign to flag.
1159*4882a593Smuzhiyun  *				OFDM & CCK are all different.
1160*4882a593Smuzhiyun  *
1161*4882a593Smuzhiyun  * Input:		NONE
1162*4882a593Smuzhiyun  *
1163*4882a593Smuzhiyun  * Output:		NONE
1164*4882a593Smuzhiyun  *
1165*4882a593Smuzhiyun  * Return:		NONE
1166*4882a593Smuzhiyun  *
1167*4882a593Smuzhiyun  * Revised History:
1168*4882a593Smuzhiyun  *	When		Who		Remark
1169*4882a593Smuzhiyun  *	04/23/2012	MHC		Create Version 0.
1170*4882a593Smuzhiyun  *
1171*4882a593Smuzhiyun  *---------------------------------------------------------------------------
1172*4882a593Smuzhiyun  */
rtl8812ae_dm_txpwr_track_set_pwr(struct ieee80211_hw * hw,enum pwr_track_control_method method,u8 rf_path,u8 channel_mapped_index)1173*4882a593Smuzhiyun void rtl8812ae_dm_txpwr_track_set_pwr(struct ieee80211_hw *hw,
1174*4882a593Smuzhiyun 				      enum pwr_track_control_method method,
1175*4882a593Smuzhiyun 				      u8 rf_path, u8 channel_mapped_index)
1176*4882a593Smuzhiyun {
1177*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1178*4882a593Smuzhiyun 	struct rtl_dm	*rtldm = rtl_dm(rtl_priv(hw));
1179*4882a593Smuzhiyun 	struct rtl_phy *rtlphy = &rtlpriv->phy;
1180*4882a593Smuzhiyun 	u32 final_swing_idx[2];
1181*4882a593Smuzhiyun 	u8 pwr_tracking_limit = 26; /*+1.0dB*/
1182*4882a593Smuzhiyun 	u8 tx_rate = 0xFF;
1183*4882a593Smuzhiyun 	s8 final_ofdm_swing_index = 0;
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun 	if (rtldm->tx_rate != 0xFF)
1186*4882a593Smuzhiyun 		tx_rate =
1187*4882a593Smuzhiyun 			rtl8821ae_hw_rate_to_mrate(hw, rtldm->tx_rate);
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1190*4882a593Smuzhiyun 		"===>%s\n", __func__);
1191*4882a593Smuzhiyun 	/*20130429 Mimic Modify High Rate BBSwing Limit.*/
1192*4882a593Smuzhiyun 	if (tx_rate != 0xFF) {
1193*4882a593Smuzhiyun 		/*CCK*/
1194*4882a593Smuzhiyun 		if ((tx_rate >= MGN_1M) && (tx_rate <= MGN_11M))
1195*4882a593Smuzhiyun 			pwr_tracking_limit = 32; /*+4dB*/
1196*4882a593Smuzhiyun 		/*OFDM*/
1197*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M))
1198*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1199*4882a593Smuzhiyun 		else if (tx_rate == MGN_54M)
1200*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1201*4882a593Smuzhiyun 		/*HT*/
1202*4882a593Smuzhiyun 		 /*QPSK/BPSK*/
1203*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS0) && (tx_rate <= MGN_MCS2))
1204*4882a593Smuzhiyun 			pwr_tracking_limit = 34; /*+5dB*/
1205*4882a593Smuzhiyun 		 /*16QAM*/
1206*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS3) && (tx_rate <= MGN_MCS4))
1207*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1208*4882a593Smuzhiyun 		 /*64QAM*/
1209*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS5) && (tx_rate <= MGN_MCS7))
1210*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1211*4882a593Smuzhiyun 		 /*QPSK/BPSK*/
1212*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS8) && (tx_rate <= MGN_MCS10))
1213*4882a593Smuzhiyun 			pwr_tracking_limit = 34; /*+5dB*/
1214*4882a593Smuzhiyun 		 /*16QAM*/
1215*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS11) && (tx_rate <= MGN_MCS12))
1216*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1217*4882a593Smuzhiyun 		 /*64QAM*/
1218*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS13) && (tx_rate <= MGN_MCS15))
1219*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun 		/*2 VHT*/
1222*4882a593Smuzhiyun 		 /*QPSK/BPSK*/
1223*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT1SS_MCS0) &&
1224*4882a593Smuzhiyun 			 (tx_rate <= MGN_VHT1SS_MCS2))
1225*4882a593Smuzhiyun 			pwr_tracking_limit = 34; /*+5dB*/
1226*4882a593Smuzhiyun 		 /*16QAM*/
1227*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT1SS_MCS3) &&
1228*4882a593Smuzhiyun 			 (tx_rate <= MGN_VHT1SS_MCS4))
1229*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1230*4882a593Smuzhiyun 		 /*64QAM*/
1231*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT1SS_MCS5) &&
1232*4882a593Smuzhiyun 			 (tx_rate <= MGN_VHT1SS_MCS6))
1233*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1234*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT1SS_MCS7) /*64QAM*/
1235*4882a593Smuzhiyun 			pwr_tracking_limit = 26; /*+1dB*/
1236*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT1SS_MCS8) /*256QAM*/
1237*4882a593Smuzhiyun 			pwr_tracking_limit = 24; /*+0dB*/
1238*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT1SS_MCS9) /*256QAM*/
1239*4882a593Smuzhiyun 			pwr_tracking_limit = 22; /*-1dB*/
1240*4882a593Smuzhiyun 		 /*QPSK/BPSK*/
1241*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT2SS_MCS0) &&
1242*4882a593Smuzhiyun 			 (tx_rate <= MGN_VHT2SS_MCS2))
1243*4882a593Smuzhiyun 			pwr_tracking_limit = 34; /*+5dB*/
1244*4882a593Smuzhiyun 		 /*16QAM*/
1245*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT2SS_MCS3) &&
1246*4882a593Smuzhiyun 			 (tx_rate <= MGN_VHT2SS_MCS4))
1247*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1248*4882a593Smuzhiyun 		 /*64QAM*/
1249*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT2SS_MCS5) &&
1250*4882a593Smuzhiyun 			 (tx_rate <= MGN_VHT2SS_MCS6))
1251*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1252*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT2SS_MCS7) /*64QAM*/
1253*4882a593Smuzhiyun 			pwr_tracking_limit = 26; /*+1dB*/
1254*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT2SS_MCS8) /*256QAM*/
1255*4882a593Smuzhiyun 			pwr_tracking_limit = 24; /*+0dB*/
1256*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT2SS_MCS9) /*256QAM*/
1257*4882a593Smuzhiyun 			pwr_tracking_limit = 22; /*-1dB*/
1258*4882a593Smuzhiyun 		else
1259*4882a593Smuzhiyun 			pwr_tracking_limit = 24;
1260*4882a593Smuzhiyun 	}
1261*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1262*4882a593Smuzhiyun 		"TxRate=0x%x, PwrTrackingLimit=%d\n",
1263*4882a593Smuzhiyun 		tx_rate, pwr_tracking_limit);
1264*4882a593Smuzhiyun 
1265*4882a593Smuzhiyun 	if (method == BBSWING) {
1266*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1267*4882a593Smuzhiyun 			"===>%s\n", __func__);
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun 		if (rf_path == RF90_PATH_A) {
1270*4882a593Smuzhiyun 			u32 tmp;
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 			final_swing_idx[RF90_PATH_A] =
1273*4882a593Smuzhiyun 				(rtldm->ofdm_index[RF90_PATH_A] >
1274*4882a593Smuzhiyun 				pwr_tracking_limit) ?
1275*4882a593Smuzhiyun 				pwr_tracking_limit :
1276*4882a593Smuzhiyun 				rtldm->ofdm_index[RF90_PATH_A];
1277*4882a593Smuzhiyun 			tmp = final_swing_idx[RF90_PATH_A];
1278*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1279*4882a593Smuzhiyun 				"pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_A]=%d,pDM_Odm->RealBbSwingIdx[ODM_RF_PATH_A]=%d\n",
1280*4882a593Smuzhiyun 				rtldm->ofdm_index[RF90_PATH_A],
1281*4882a593Smuzhiyun 				final_swing_idx[RF90_PATH_A]);
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun 			rtl_set_bbreg(hw, RA_TXSCALE, 0xFFE00000,
1284*4882a593Smuzhiyun 				      txscaling_tbl[tmp]);
1285*4882a593Smuzhiyun 		} else {
1286*4882a593Smuzhiyun 			u32 tmp;
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 			final_swing_idx[RF90_PATH_B] =
1289*4882a593Smuzhiyun 				rtldm->ofdm_index[RF90_PATH_B] >
1290*4882a593Smuzhiyun 				pwr_tracking_limit ?
1291*4882a593Smuzhiyun 				pwr_tracking_limit :
1292*4882a593Smuzhiyun 				rtldm->ofdm_index[RF90_PATH_B];
1293*4882a593Smuzhiyun 			tmp = final_swing_idx[RF90_PATH_B];
1294*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1295*4882a593Smuzhiyun 				"pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_B]=%d, pDM_Odm->RealBbSwingIdx[ODM_RF_PATH_B]=%d\n",
1296*4882a593Smuzhiyun 				rtldm->ofdm_index[RF90_PATH_B],
1297*4882a593Smuzhiyun 				final_swing_idx[RF90_PATH_B]);
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun 			rtl_set_bbreg(hw, RB_TXSCALE, 0xFFE00000,
1300*4882a593Smuzhiyun 				      txscaling_tbl[tmp]);
1301*4882a593Smuzhiyun 		}
1302*4882a593Smuzhiyun 	} else if (method == MIX_MODE) {
1303*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1304*4882a593Smuzhiyun 			"pDM_Odm->DefaultOfdmIndex=%d, pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n",
1305*4882a593Smuzhiyun 			rtldm->default_ofdm_index,
1306*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[rf_path],
1307*4882a593Smuzhiyun 			rf_path);
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun 		final_ofdm_swing_index = rtldm->default_ofdm_index +
1310*4882a593Smuzhiyun 				rtldm->absolute_ofdm_swing_idx[rf_path];
1311*4882a593Smuzhiyun 
1312*4882a593Smuzhiyun 		if (rf_path == RF90_PATH_A) {
1313*4882a593Smuzhiyun 			/*BBSwing higher then Limit*/
1314*4882a593Smuzhiyun 			if (final_ofdm_swing_index > pwr_tracking_limit) {
1315*4882a593Smuzhiyun 				rtldm->remnant_cck_idx =
1316*4882a593Smuzhiyun 					final_ofdm_swing_index -
1317*4882a593Smuzhiyun 					pwr_tracking_limit;
1318*4882a593Smuzhiyun 				/* CCK Follow the same compensation value
1319*4882a593Smuzhiyun 				 * as Path A
1320*4882a593Smuzhiyun 				 */
1321*4882a593Smuzhiyun 				rtldm->remnant_ofdm_swing_idx[rf_path] =
1322*4882a593Smuzhiyun 					final_ofdm_swing_index -
1323*4882a593Smuzhiyun 					pwr_tracking_limit;
1324*4882a593Smuzhiyun 
1325*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RA_TXSCALE, 0xFFE00000,
1326*4882a593Smuzhiyun 					      txscaling_tbl[pwr_tracking_limit]);
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 				rtldm->modify_txagc_flag_path_a = true;
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun 				/*Set TxAGC Page C{};*/
1331*4882a593Smuzhiyun 				rtl8821ae_phy_set_txpower_level_by_path(hw,
1332*4882a593Smuzhiyun 					rtlphy->current_channel,
1333*4882a593Smuzhiyun 					RF90_PATH_A);
1334*4882a593Smuzhiyun 
1335*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1336*4882a593Smuzhiyun 					"******Path_A Over BBSwing Limit ,PwrTrackingLimit = %d ,Remnant TxAGC Value = %d\n",
1337*4882a593Smuzhiyun 					pwr_tracking_limit,
1338*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path]);
1339*4882a593Smuzhiyun 			} else if (final_ofdm_swing_index < 0) {
1340*4882a593Smuzhiyun 				rtldm->remnant_cck_idx = final_ofdm_swing_index;
1341*4882a593Smuzhiyun 				/* CCK Follow the same compensate value as Path A*/
1342*4882a593Smuzhiyun 				rtldm->remnant_ofdm_swing_idx[rf_path] =
1343*4882a593Smuzhiyun 					final_ofdm_swing_index;
1344*4882a593Smuzhiyun 
1345*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RA_TXSCALE, 0xFFE00000,
1346*4882a593Smuzhiyun 					txscaling_tbl[0]);
1347*4882a593Smuzhiyun 
1348*4882a593Smuzhiyun 				rtldm->modify_txagc_flag_path_a = true;
1349*4882a593Smuzhiyun 
1350*4882a593Smuzhiyun 				/*Set TxAGC Page C{};*/
1351*4882a593Smuzhiyun 				rtl8821ae_phy_set_txpower_level_by_path(hw,
1352*4882a593Smuzhiyun 					rtlphy->current_channel, RF90_PATH_A);
1353*4882a593Smuzhiyun 
1354*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1355*4882a593Smuzhiyun 					"******Path_A Lower then BBSwing lower bound  0 , Remnant TxAGC Value = %d\n",
1356*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path]);
1357*4882a593Smuzhiyun 			} else {
1358*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RA_TXSCALE, 0xFFE00000,
1359*4882a593Smuzhiyun 					txscaling_tbl[(u8)final_ofdm_swing_index]);
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1362*4882a593Smuzhiyun 					"******Path_A Compensate with BBSwing, Final_OFDM_Swing_Index = %d\n",
1363*4882a593Smuzhiyun 					final_ofdm_swing_index);
1364*4882a593Smuzhiyun 				/*If TxAGC has changed, reset TxAGC again*/
1365*4882a593Smuzhiyun 				if (rtldm->modify_txagc_flag_path_a) {
1366*4882a593Smuzhiyun 					rtldm->remnant_cck_idx = 0;
1367*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path] = 0;
1368*4882a593Smuzhiyun 
1369*4882a593Smuzhiyun 					/*Set TxAGC Page C{};*/
1370*4882a593Smuzhiyun 					rtl8821ae_phy_set_txpower_level_by_path(hw,
1371*4882a593Smuzhiyun 						rtlphy->current_channel, RF90_PATH_A);
1372*4882a593Smuzhiyun 					rtldm->modify_txagc_flag_path_a = false;
1373*4882a593Smuzhiyun 
1374*4882a593Smuzhiyun 					rtl_dbg(rtlpriv, COMP_POWER_TRACKING,
1375*4882a593Smuzhiyun 						DBG_LOUD,
1376*4882a593Smuzhiyun 						"******Path_A pDM_Odm->Modify_TxAGC_Flag = FALSE\n");
1377*4882a593Smuzhiyun 				}
1378*4882a593Smuzhiyun 			}
1379*4882a593Smuzhiyun 		}
1380*4882a593Smuzhiyun 		/*BBSwing higher then Limit*/
1381*4882a593Smuzhiyun 		if (rf_path == RF90_PATH_B) {
1382*4882a593Smuzhiyun 			if (final_ofdm_swing_index > pwr_tracking_limit) {
1383*4882a593Smuzhiyun 				rtldm->remnant_ofdm_swing_idx[rf_path] =
1384*4882a593Smuzhiyun 					final_ofdm_swing_index -
1385*4882a593Smuzhiyun 					pwr_tracking_limit;
1386*4882a593Smuzhiyun 
1387*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RB_TXSCALE,
1388*4882a593Smuzhiyun 					0xFFE00000,
1389*4882a593Smuzhiyun 					txscaling_tbl[pwr_tracking_limit]);
1390*4882a593Smuzhiyun 
1391*4882a593Smuzhiyun 				rtldm->modify_txagc_flag_path_b = true;
1392*4882a593Smuzhiyun 
1393*4882a593Smuzhiyun 				/*Set TxAGC Page E{};*/
1394*4882a593Smuzhiyun 				rtl8821ae_phy_set_txpower_level_by_path(hw,
1395*4882a593Smuzhiyun 					rtlphy->current_channel, RF90_PATH_B);
1396*4882a593Smuzhiyun 
1397*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1398*4882a593Smuzhiyun 					"******Path_B Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d\n",
1399*4882a593Smuzhiyun 					pwr_tracking_limit,
1400*4882a593Smuzhiyun 					 rtldm->remnant_ofdm_swing_idx[rf_path]);
1401*4882a593Smuzhiyun 			} else if (final_ofdm_swing_index < 0) {
1402*4882a593Smuzhiyun 				rtldm->remnant_ofdm_swing_idx[rf_path] =
1403*4882a593Smuzhiyun 					final_ofdm_swing_index;
1404*4882a593Smuzhiyun 
1405*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RB_TXSCALE, 0xFFE00000,
1406*4882a593Smuzhiyun 					      txscaling_tbl[0]);
1407*4882a593Smuzhiyun 
1408*4882a593Smuzhiyun 				rtldm->modify_txagc_flag_path_b = true;
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun 				/*Set TxAGC Page E{};*/
1411*4882a593Smuzhiyun 				rtl8821ae_phy_set_txpower_level_by_path(hw,
1412*4882a593Smuzhiyun 					rtlphy->current_channel, RF90_PATH_B);
1413*4882a593Smuzhiyun 
1414*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1415*4882a593Smuzhiyun 					"******Path_B Lower then BBSwing lower bound  0 , Remnant TxAGC Value = %d\n",
1416*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path]);
1417*4882a593Smuzhiyun 			} else {
1418*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RB_TXSCALE, 0xFFE00000,
1419*4882a593Smuzhiyun 					txscaling_tbl[(u8)final_ofdm_swing_index]);
1420*4882a593Smuzhiyun 
1421*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1422*4882a593Smuzhiyun 					"******Path_B Compensate with BBSwing ,Final_OFDM_Swing_Index = %d\n",
1423*4882a593Smuzhiyun 					final_ofdm_swing_index);
1424*4882a593Smuzhiyun 				 /*If TxAGC has changed, reset TxAGC again*/
1425*4882a593Smuzhiyun 				if (rtldm->modify_txagc_flag_path_b) {
1426*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path] = 0;
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 					/*Set TxAGC Page E{};*/
1429*4882a593Smuzhiyun 					rtl8821ae_phy_set_txpower_level_by_path(hw,
1430*4882a593Smuzhiyun 					rtlphy->current_channel, RF90_PATH_B);
1431*4882a593Smuzhiyun 
1432*4882a593Smuzhiyun 					rtldm->modify_txagc_flag_path_b =
1433*4882a593Smuzhiyun 						false;
1434*4882a593Smuzhiyun 
1435*4882a593Smuzhiyun 					rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1436*4882a593Smuzhiyun 						"******Path_B pDM_Odm->Modify_TxAGC_Flag = FALSE\n");
1437*4882a593Smuzhiyun 				}
1438*4882a593Smuzhiyun 			}
1439*4882a593Smuzhiyun 		}
1440*4882a593Smuzhiyun 	} else {
1441*4882a593Smuzhiyun 		return;
1442*4882a593Smuzhiyun 	}
1443*4882a593Smuzhiyun }
1444*4882a593Smuzhiyun 
rtl8812ae_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw * hw)1445*4882a593Smuzhiyun void rtl8812ae_dm_txpower_tracking_callback_thermalmeter(
1446*4882a593Smuzhiyun 	struct ieee80211_hw *hw)
1447*4882a593Smuzhiyun {
1448*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1449*4882a593Smuzhiyun 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1450*4882a593Smuzhiyun 	struct rtl_dm	*rtldm = rtl_dm(rtl_priv(hw));
1451*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1452*4882a593Smuzhiyun 	u8 thermal_value = 0, delta, delta_lck, delta_iqk, p = 0, i = 0;
1453*4882a593Smuzhiyun 	u8 thermal_value_avg_count = 0;
1454*4882a593Smuzhiyun 	u32 thermal_value_avg = 0;
1455*4882a593Smuzhiyun 	/* OFDM BB Swing should be less than +3.0dB, */
1456*4882a593Smuzhiyun 	u8 ofdm_min_index = 6;
1457*4882a593Smuzhiyun 	 /* GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/
1458*4882a593Smuzhiyun 	u8 index_for_channel = 0;
1459*4882a593Smuzhiyun 	/* 1. The following TWO tables decide
1460*4882a593Smuzhiyun 	 * the final index of OFDM/CCK swing table.
1461*4882a593Smuzhiyun 	 */
1462*4882a593Smuzhiyun 	const u8 *delta_swing_table_idx_tup_a;
1463*4882a593Smuzhiyun 	const u8 *delta_swing_table_idx_tdown_a;
1464*4882a593Smuzhiyun 	const u8 *delta_swing_table_idx_tup_b;
1465*4882a593Smuzhiyun 	const u8 *delta_swing_table_idx_tdown_b;
1466*4882a593Smuzhiyun 
1467*4882a593Smuzhiyun 	/*2. Initilization ( 7 steps in total )*/
1468*4882a593Smuzhiyun 	rtl8812ae_get_delta_swing_table(hw,
1469*4882a593Smuzhiyun 		&delta_swing_table_idx_tup_a,
1470*4882a593Smuzhiyun 		&delta_swing_table_idx_tdown_a,
1471*4882a593Smuzhiyun 		&delta_swing_table_idx_tup_b,
1472*4882a593Smuzhiyun 		&delta_swing_table_idx_tdown_b);
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	rtldm->txpower_trackinginit = true;
1475*4882a593Smuzhiyun 
1476*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1477*4882a593Smuzhiyun 		"pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase[A]:%d, pDM_Odm->DefaultOfdmIndex: %d\n",
1478*4882a593Smuzhiyun 		rtldm->swing_idx_cck_base,
1479*4882a593Smuzhiyun 		rtldm->swing_idx_ofdm_base[RF90_PATH_A],
1480*4882a593Smuzhiyun 		rtldm->default_ofdm_index);
1481*4882a593Smuzhiyun 
1482*4882a593Smuzhiyun 	thermal_value = (u8)rtl_get_rfreg(hw, RF90_PATH_A,
1483*4882a593Smuzhiyun 		/*0x42: RF Reg[15:10] 88E*/
1484*4882a593Smuzhiyun 		RF_T_METER_8812A, 0xfc00);
1485*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1486*4882a593Smuzhiyun 		"Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n",
1487*4882a593Smuzhiyun 		thermal_value, rtlefuse->eeprom_thermalmeter);
1488*4882a593Smuzhiyun 	if (!rtldm->txpower_track_control ||
1489*4882a593Smuzhiyun 	    rtlefuse->eeprom_thermalmeter == 0 ||
1490*4882a593Smuzhiyun 	    rtlefuse->eeprom_thermalmeter == 0xFF)
1491*4882a593Smuzhiyun 		return;
1492*4882a593Smuzhiyun 
1493*4882a593Smuzhiyun 	/* 3. Initialize ThermalValues of RFCalibrateInfo*/
1494*4882a593Smuzhiyun 
1495*4882a593Smuzhiyun 	if (rtlhal->reloadtxpowerindex)
1496*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1497*4882a593Smuzhiyun 			"reload ofdm index for band switch\n");
1498*4882a593Smuzhiyun 
1499*4882a593Smuzhiyun 	/*4. Calculate average thermal meter*/
1500*4882a593Smuzhiyun 	rtldm->thermalvalue_avg[rtldm->thermalvalue_avg_index] = thermal_value;
1501*4882a593Smuzhiyun 	rtldm->thermalvalue_avg_index++;
1502*4882a593Smuzhiyun 	if (rtldm->thermalvalue_avg_index == AVG_THERMAL_NUM_8812A)
1503*4882a593Smuzhiyun 		/*Average times =  c.AverageThermalNum*/
1504*4882a593Smuzhiyun 		rtldm->thermalvalue_avg_index = 0;
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	for (i = 0; i < AVG_THERMAL_NUM_8812A; i++) {
1507*4882a593Smuzhiyun 		if (rtldm->thermalvalue_avg[i]) {
1508*4882a593Smuzhiyun 			thermal_value_avg += rtldm->thermalvalue_avg[i];
1509*4882a593Smuzhiyun 			thermal_value_avg_count++;
1510*4882a593Smuzhiyun 		}
1511*4882a593Smuzhiyun 	}
1512*4882a593Smuzhiyun 	/*Calculate Average ThermalValue after average enough times*/
1513*4882a593Smuzhiyun 	if (thermal_value_avg_count) {
1514*4882a593Smuzhiyun 		thermal_value = (u8)(thermal_value_avg /
1515*4882a593Smuzhiyun 				thermal_value_avg_count);
1516*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1517*4882a593Smuzhiyun 			"AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n",
1518*4882a593Smuzhiyun 			thermal_value, rtlefuse->eeprom_thermalmeter);
1519*4882a593Smuzhiyun 	}
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun 	/*5. Calculate delta, delta_LCK, delta_IQK.
1522*4882a593Smuzhiyun 	 *"delta" here is used to determine whether
1523*4882a593Smuzhiyun 	 *thermal value changes or not.
1524*4882a593Smuzhiyun 	 */
1525*4882a593Smuzhiyun 	delta = (thermal_value > rtldm->thermalvalue) ?
1526*4882a593Smuzhiyun 		(thermal_value - rtldm->thermalvalue) :
1527*4882a593Smuzhiyun 		(rtldm->thermalvalue - thermal_value);
1528*4882a593Smuzhiyun 	delta_lck = (thermal_value > rtldm->thermalvalue_lck) ?
1529*4882a593Smuzhiyun 		(thermal_value - rtldm->thermalvalue_lck) :
1530*4882a593Smuzhiyun 		(rtldm->thermalvalue_lck - thermal_value);
1531*4882a593Smuzhiyun 	delta_iqk = (thermal_value > rtldm->thermalvalue_iqk) ?
1532*4882a593Smuzhiyun 		(thermal_value - rtldm->thermalvalue_iqk) :
1533*4882a593Smuzhiyun 		(rtldm->thermalvalue_iqk - thermal_value);
1534*4882a593Smuzhiyun 
1535*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1536*4882a593Smuzhiyun 		"(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n",
1537*4882a593Smuzhiyun 		delta, delta_lck, delta_iqk);
1538*4882a593Smuzhiyun 
1539*4882a593Smuzhiyun 	/* 6. If necessary, do LCK.
1540*4882a593Smuzhiyun 	 * Delta temperature is equal to or larger than 20 centigrade.
1541*4882a593Smuzhiyun 	 */
1542*4882a593Smuzhiyun 	if (delta_lck >= IQK_THRESHOLD) {
1543*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1544*4882a593Smuzhiyun 			"delta_LCK(%d) >= Threshold_IQK(%d)\n",
1545*4882a593Smuzhiyun 			delta_lck, IQK_THRESHOLD);
1546*4882a593Smuzhiyun 		rtldm->thermalvalue_lck = thermal_value;
1547*4882a593Smuzhiyun 		rtl8821ae_phy_lc_calibrate(hw);
1548*4882a593Smuzhiyun 	}
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 	/*7. If necessary, move the index of swing table to adjust Tx power.*/
1551*4882a593Smuzhiyun 
1552*4882a593Smuzhiyun 	if (delta > 0 && rtldm->txpower_track_control) {
1553*4882a593Smuzhiyun 		/* "delta" here is used to record the
1554*4882a593Smuzhiyun 		 * absolute value of differrence.
1555*4882a593Smuzhiyun 		 */
1556*4882a593Smuzhiyun 		delta = thermal_value > rtlefuse->eeprom_thermalmeter ?
1557*4882a593Smuzhiyun 			(thermal_value - rtlefuse->eeprom_thermalmeter) :
1558*4882a593Smuzhiyun 			(rtlefuse->eeprom_thermalmeter - thermal_value);
1559*4882a593Smuzhiyun 
1560*4882a593Smuzhiyun 		if (delta >= TXPWR_TRACK_TABLE_SIZE)
1561*4882a593Smuzhiyun 			delta = TXPWR_TRACK_TABLE_SIZE - 1;
1562*4882a593Smuzhiyun 
1563*4882a593Smuzhiyun 		/*7.1 The Final Power Index = BaseIndex + PowerIndexOffset*/
1564*4882a593Smuzhiyun 
1565*4882a593Smuzhiyun 		if (thermal_value > rtlefuse->eeprom_thermalmeter) {
1566*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1567*4882a593Smuzhiyun 				"delta_swing_table_idx_tup_a[%d] = %d\n",
1568*4882a593Smuzhiyun 				delta, delta_swing_table_idx_tup_a[delta]);
1569*4882a593Smuzhiyun 			rtldm->delta_power_index_last[RF90_PATH_A] =
1570*4882a593Smuzhiyun 				rtldm->delta_power_index[RF90_PATH_A];
1571*4882a593Smuzhiyun 			rtldm->delta_power_index[RF90_PATH_A] =
1572*4882a593Smuzhiyun 				delta_swing_table_idx_tup_a[delta];
1573*4882a593Smuzhiyun 
1574*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[RF90_PATH_A] =
1575*4882a593Smuzhiyun 				delta_swing_table_idx_tup_a[delta];
1576*4882a593Smuzhiyun 			/*Record delta swing for mix mode power tracking*/
1577*4882a593Smuzhiyun 
1578*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1579*4882a593Smuzhiyun 				"******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n",
1580*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[RF90_PATH_A]);
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1583*4882a593Smuzhiyun 				"delta_swing_table_idx_tup_b[%d] = %d\n",
1584*4882a593Smuzhiyun 				delta, delta_swing_table_idx_tup_b[delta]);
1585*4882a593Smuzhiyun 			rtldm->delta_power_index_last[RF90_PATH_B] =
1586*4882a593Smuzhiyun 				rtldm->delta_power_index[RF90_PATH_B];
1587*4882a593Smuzhiyun 			rtldm->delta_power_index[RF90_PATH_B] =
1588*4882a593Smuzhiyun 				delta_swing_table_idx_tup_b[delta];
1589*4882a593Smuzhiyun 
1590*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[RF90_PATH_B] =
1591*4882a593Smuzhiyun 				delta_swing_table_idx_tup_b[delta];
1592*4882a593Smuzhiyun 			/*Record delta swing for mix mode power tracking*/
1593*4882a593Smuzhiyun 
1594*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1595*4882a593Smuzhiyun 				"******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n",
1596*4882a593Smuzhiyun 				rtldm->absolute_ofdm_swing_idx[RF90_PATH_B]);
1597*4882a593Smuzhiyun 		} else {
1598*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1599*4882a593Smuzhiyun 				"delta_swing_table_idx_tdown_a[%d] = %d\n",
1600*4882a593Smuzhiyun 				delta, delta_swing_table_idx_tdown_a[delta]);
1601*4882a593Smuzhiyun 
1602*4882a593Smuzhiyun 			rtldm->delta_power_index_last[RF90_PATH_A] =
1603*4882a593Smuzhiyun 				rtldm->delta_power_index[RF90_PATH_A];
1604*4882a593Smuzhiyun 			rtldm->delta_power_index[RF90_PATH_A] =
1605*4882a593Smuzhiyun 				-1 * delta_swing_table_idx_tdown_a[delta];
1606*4882a593Smuzhiyun 
1607*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[RF90_PATH_A] =
1608*4882a593Smuzhiyun 				-1 * delta_swing_table_idx_tdown_a[delta];
1609*4882a593Smuzhiyun 			/* Record delta swing for mix mode power tracking*/
1610*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1611*4882a593Smuzhiyun 				"******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n",
1612*4882a593Smuzhiyun 				rtldm->absolute_ofdm_swing_idx[RF90_PATH_A]);
1613*4882a593Smuzhiyun 
1614*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1615*4882a593Smuzhiyun 				"deltaSwingTableIdx_TDOWN_B[%d] = %d\n",
1616*4882a593Smuzhiyun 				delta, delta_swing_table_idx_tdown_b[delta]);
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun 			rtldm->delta_power_index_last[RF90_PATH_B] =
1619*4882a593Smuzhiyun 				rtldm->delta_power_index[RF90_PATH_B];
1620*4882a593Smuzhiyun 			rtldm->delta_power_index[RF90_PATH_B] =
1621*4882a593Smuzhiyun 				-1 * delta_swing_table_idx_tdown_b[delta];
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[RF90_PATH_B] =
1624*4882a593Smuzhiyun 				-1 * delta_swing_table_idx_tdown_b[delta];
1625*4882a593Smuzhiyun 			/*Record delta swing for mix mode power tracking*/
1626*4882a593Smuzhiyun 
1627*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1628*4882a593Smuzhiyun 				"******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n",
1629*4882a593Smuzhiyun 				rtldm->absolute_ofdm_swing_idx[RF90_PATH_B]);
1630*4882a593Smuzhiyun 		}
1631*4882a593Smuzhiyun 
1632*4882a593Smuzhiyun 		for (p = RF90_PATH_A; p < MAX_PATH_NUM_8812A; p++) {
1633*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1634*4882a593Smuzhiyun 				"============================= [Path-%c]Calculating PowerIndexOffset =============================\n",
1635*4882a593Smuzhiyun 				(p == RF90_PATH_A ? 'A' : 'B'));
1636*4882a593Smuzhiyun 
1637*4882a593Smuzhiyun 			if (rtldm->delta_power_index[p] ==
1638*4882a593Smuzhiyun 				rtldm->delta_power_index_last[p])
1639*4882a593Smuzhiyun 				/*If Thermal value changes but lookup
1640*4882a593Smuzhiyun 				table value still the same*/
1641*4882a593Smuzhiyun 				rtldm->power_index_offset[p] = 0;
1642*4882a593Smuzhiyun 			else
1643*4882a593Smuzhiyun 				rtldm->power_index_offset[p] =
1644*4882a593Smuzhiyun 					rtldm->delta_power_index[p] -
1645*4882a593Smuzhiyun 					rtldm->delta_power_index_last[p];
1646*4882a593Smuzhiyun 				/* Power Index Diff between 2
1647*4882a593Smuzhiyun 				 * times Power Tracking
1648*4882a593Smuzhiyun 				 */
1649*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1650*4882a593Smuzhiyun 				"[Path-%c] PowerIndexOffset(%d) =DeltaPowerIndex(%d) -DeltaPowerIndexLast(%d)\n",
1651*4882a593Smuzhiyun 				(p == RF90_PATH_A ? 'A' : 'B'),
1652*4882a593Smuzhiyun 				rtldm->power_index_offset[p],
1653*4882a593Smuzhiyun 				rtldm->delta_power_index[p],
1654*4882a593Smuzhiyun 				rtldm->delta_power_index_last[p]);
1655*4882a593Smuzhiyun 
1656*4882a593Smuzhiyun 			rtldm->ofdm_index[p] =
1657*4882a593Smuzhiyun 					rtldm->swing_idx_ofdm_base[p] +
1658*4882a593Smuzhiyun 					rtldm->power_index_offset[p];
1659*4882a593Smuzhiyun 			rtldm->cck_index =
1660*4882a593Smuzhiyun 					rtldm->swing_idx_cck_base +
1661*4882a593Smuzhiyun 					rtldm->power_index_offset[p];
1662*4882a593Smuzhiyun 
1663*4882a593Smuzhiyun 			rtldm->swing_idx_cck = rtldm->cck_index;
1664*4882a593Smuzhiyun 			rtldm->swing_idx_ofdm[p] = rtldm->ofdm_index[p];
1665*4882a593Smuzhiyun 
1666*4882a593Smuzhiyun 			/****Print BB Swing Base and Index Offset */
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1669*4882a593Smuzhiyun 				"The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n",
1670*4882a593Smuzhiyun 				rtldm->swing_idx_cck,
1671*4882a593Smuzhiyun 				rtldm->swing_idx_cck_base,
1672*4882a593Smuzhiyun 				rtldm->power_index_offset[p]);
1673*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1674*4882a593Smuzhiyun 				"The 'OFDM' final index(%d) = BaseIndex[%c](%d) + PowerIndexOffset(%d)\n",
1675*4882a593Smuzhiyun 				rtldm->swing_idx_ofdm[p],
1676*4882a593Smuzhiyun 				(p == RF90_PATH_A ? 'A' : 'B'),
1677*4882a593Smuzhiyun 				rtldm->swing_idx_ofdm_base[p],
1678*4882a593Smuzhiyun 				rtldm->power_index_offset[p]);
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 			/*7.1 Handle boundary conditions of index.*/
1681*4882a593Smuzhiyun 
1682*4882a593Smuzhiyun 			if (rtldm->ofdm_index[p] > TXSCALE_TABLE_SIZE - 1)
1683*4882a593Smuzhiyun 				rtldm->ofdm_index[p] = TXSCALE_TABLE_SIZE - 1;
1684*4882a593Smuzhiyun 			else if (rtldm->ofdm_index[p] < ofdm_min_index)
1685*4882a593Smuzhiyun 				rtldm->ofdm_index[p] = ofdm_min_index;
1686*4882a593Smuzhiyun 		}
1687*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1688*4882a593Smuzhiyun 			"\n\n====================================================================================\n");
1689*4882a593Smuzhiyun 		if (rtldm->cck_index > TXSCALE_TABLE_SIZE - 1)
1690*4882a593Smuzhiyun 			rtldm->cck_index = TXSCALE_TABLE_SIZE - 1;
1691*4882a593Smuzhiyun 		else if (rtldm->cck_index < 0)
1692*4882a593Smuzhiyun 			rtldm->cck_index = 0;
1693*4882a593Smuzhiyun 	} else {
1694*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1695*4882a593Smuzhiyun 			"The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d\n",
1696*4882a593Smuzhiyun 			rtldm->txpower_track_control,
1697*4882a593Smuzhiyun 			thermal_value,
1698*4882a593Smuzhiyun 			rtldm->thermalvalue);
1699*4882a593Smuzhiyun 
1700*4882a593Smuzhiyun 		for (p = RF90_PATH_A; p < MAX_PATH_NUM_8812A; p++)
1701*4882a593Smuzhiyun 			rtldm->power_index_offset[p] = 0;
1702*4882a593Smuzhiyun 	}
1703*4882a593Smuzhiyun 	/*Print Swing base & current*/
1704*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1705*4882a593Smuzhiyun 		"TxPowerTracking: [CCK] Swing Current Index: %d,Swing Base Index: %d\n",
1706*4882a593Smuzhiyun 		rtldm->cck_index, rtldm->swing_idx_cck_base);
1707*4882a593Smuzhiyun 	for (p = RF90_PATH_A; p < MAX_PATH_NUM_8812A; p++) {
1708*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1709*4882a593Smuzhiyun 			"TxPowerTracking: [OFDM] Swing Current Index: %d,Swing Base Index[%c]: %d\n",
1710*4882a593Smuzhiyun 			rtldm->ofdm_index[p],
1711*4882a593Smuzhiyun 			(p == RF90_PATH_A ? 'A' : 'B'),
1712*4882a593Smuzhiyun 			rtldm->swing_idx_ofdm_base[p]);
1713*4882a593Smuzhiyun 	}
1714*4882a593Smuzhiyun 
1715*4882a593Smuzhiyun 	if ((rtldm->power_index_offset[RF90_PATH_A] != 0 ||
1716*4882a593Smuzhiyun 		rtldm->power_index_offset[RF90_PATH_B] != 0) &&
1717*4882a593Smuzhiyun 		rtldm->txpower_track_control) {
1718*4882a593Smuzhiyun 		/*7.2 Configure the Swing Table to adjust Tx Power.
1719*4882a593Smuzhiyun 		 *Always TRUE after Tx Power is adjusted by power tracking.
1720*4882a593Smuzhiyun 		 *
1721*4882a593Smuzhiyun 		 *2012/04/23 MH According to Luke's suggestion,
1722*4882a593Smuzhiyun 		 *we can not write BB digital
1723*4882a593Smuzhiyun 		 *to increase TX power. Otherwise, EVM will be bad.
1724*4882a593Smuzhiyun 		 *
1725*4882a593Smuzhiyun 		 *2012/04/25 MH Add for tx power tracking to set
1726*4882a593Smuzhiyun 		 *tx power in tx agc for 88E.
1727*4882a593Smuzhiyun 		 */
1728*4882a593Smuzhiyun 		if (thermal_value > rtldm->thermalvalue) {
1729*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1730*4882a593Smuzhiyun 				"Temperature Increasing(A): delta_pi: %d , delta_t: %d, Now_t: %d,EFUSE_t: %d, Last_t: %d\n",
1731*4882a593Smuzhiyun 				rtldm->power_index_offset[RF90_PATH_A],
1732*4882a593Smuzhiyun 				delta, thermal_value,
1733*4882a593Smuzhiyun 				rtlefuse->eeprom_thermalmeter,
1734*4882a593Smuzhiyun 				rtldm->thermalvalue);
1735*4882a593Smuzhiyun 
1736*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1737*4882a593Smuzhiyun 				"Temperature Increasing(B): delta_pi: %d ,delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
1738*4882a593Smuzhiyun 				rtldm->power_index_offset[RF90_PATH_B],
1739*4882a593Smuzhiyun 				delta, thermal_value,
1740*4882a593Smuzhiyun 				rtlefuse->eeprom_thermalmeter,
1741*4882a593Smuzhiyun 				rtldm->thermalvalue);
1742*4882a593Smuzhiyun 		} else if (thermal_value < rtldm->thermalvalue) { /*Low temperature*/
1743*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1744*4882a593Smuzhiyun 				"Temperature Decreasing(A): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
1745*4882a593Smuzhiyun 				rtldm->power_index_offset[RF90_PATH_A],
1746*4882a593Smuzhiyun 				delta, thermal_value,
1747*4882a593Smuzhiyun 				rtlefuse->eeprom_thermalmeter,
1748*4882a593Smuzhiyun 				rtldm->thermalvalue);
1749*4882a593Smuzhiyun 
1750*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1751*4882a593Smuzhiyun 				"Temperature Decreasing(B): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
1752*4882a593Smuzhiyun 				rtldm->power_index_offset[RF90_PATH_B],
1753*4882a593Smuzhiyun 				delta, thermal_value,
1754*4882a593Smuzhiyun 				rtlefuse->eeprom_thermalmeter,
1755*4882a593Smuzhiyun 				rtldm->thermalvalue);
1756*4882a593Smuzhiyun 		}
1757*4882a593Smuzhiyun 
1758*4882a593Smuzhiyun 		if (thermal_value > rtlefuse->eeprom_thermalmeter) {
1759*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1760*4882a593Smuzhiyun 				"Temperature(%d) higher than PG value(%d)\n",
1761*4882a593Smuzhiyun 				thermal_value, rtlefuse->eeprom_thermalmeter);
1762*4882a593Smuzhiyun 
1763*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1764*4882a593Smuzhiyun 				"**********Enter POWER Tracking MIX_MODE**********\n");
1765*4882a593Smuzhiyun 			for (p = RF90_PATH_A; p < MAX_PATH_NUM_8812A; p++)
1766*4882a593Smuzhiyun 				rtl8812ae_dm_txpwr_track_set_pwr(hw, MIX_MODE,
1767*4882a593Smuzhiyun 								 p, 0);
1768*4882a593Smuzhiyun 		} else {
1769*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1770*4882a593Smuzhiyun 				"Temperature(%d) lower than PG value(%d)\n",
1771*4882a593Smuzhiyun 				thermal_value, rtlefuse->eeprom_thermalmeter);
1772*4882a593Smuzhiyun 
1773*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1774*4882a593Smuzhiyun 				"**********Enter POWER Tracking MIX_MODE**********\n");
1775*4882a593Smuzhiyun 			for (p = RF90_PATH_A; p < MAX_PATH_NUM_8812A; p++)
1776*4882a593Smuzhiyun 				rtl8812ae_dm_txpwr_track_set_pwr(hw, MIX_MODE,
1777*4882a593Smuzhiyun 								 p, index_for_channel);
1778*4882a593Smuzhiyun 		}
1779*4882a593Smuzhiyun 		/*Record last time Power Tracking result as base.*/
1780*4882a593Smuzhiyun 		rtldm->swing_idx_cck_base = rtldm->swing_idx_cck;
1781*4882a593Smuzhiyun 		for (p = RF90_PATH_A; p < MAX_PATH_NUM_8812A; p++)
1782*4882a593Smuzhiyun 				rtldm->swing_idx_ofdm_base[p] =
1783*4882a593Smuzhiyun 					rtldm->swing_idx_ofdm[p];
1784*4882a593Smuzhiyun 
1785*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1786*4882a593Smuzhiyun 			"pDM_Odm->RFCalibrateInfo.ThermalValue =%d ThermalValue= %d\n",
1787*4882a593Smuzhiyun 			rtldm->thermalvalue, thermal_value);
1788*4882a593Smuzhiyun 		/*Record last Power Tracking Thermal Value*/
1789*4882a593Smuzhiyun 		rtldm->thermalvalue = thermal_value;
1790*4882a593Smuzhiyun 	}
1791*4882a593Smuzhiyun 	/*Delta temperature is equal to or larger than
1792*4882a593Smuzhiyun 	20 centigrade (When threshold is 8).*/
1793*4882a593Smuzhiyun 	if (delta_iqk >= IQK_THRESHOLD)
1794*4882a593Smuzhiyun 		rtl8812ae_do_iqk(hw, delta_iqk, thermal_value, 8);
1795*4882a593Smuzhiyun 
1796*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1797*4882a593Smuzhiyun 		"<===%s\n", __func__);
1798*4882a593Smuzhiyun }
1799*4882a593Smuzhiyun 
rtl8821ae_get_delta_swing_table(struct ieee80211_hw * hw,const u8 ** up_a,const u8 ** down_a)1800*4882a593Smuzhiyun static void rtl8821ae_get_delta_swing_table(struct ieee80211_hw *hw,
1801*4882a593Smuzhiyun 					    const u8 **up_a,
1802*4882a593Smuzhiyun 					    const u8 **down_a)
1803*4882a593Smuzhiyun {
1804*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1805*4882a593Smuzhiyun 	struct rtl_phy *rtlphy = &rtlpriv->phy;
1806*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
1807*4882a593Smuzhiyun 	u8 channel = rtlphy->current_channel;
1808*4882a593Smuzhiyun 	u8 rate = rtldm->tx_rate;
1809*4882a593Smuzhiyun 
1810*4882a593Smuzhiyun 	if (1 <= channel && channel <= 14) {
1811*4882a593Smuzhiyun 		if (RTL8821AE_RX_HAL_IS_CCK_RATE(rate)) {
1812*4882a593Smuzhiyun 			*up_a = rtl8821ae_delta_swing_table_idx_24gccka_p;
1813*4882a593Smuzhiyun 			*down_a = rtl8821ae_delta_swing_table_idx_24gccka_n;
1814*4882a593Smuzhiyun 		} else {
1815*4882a593Smuzhiyun 			*up_a = rtl8821ae_delta_swing_table_idx_24ga_p;
1816*4882a593Smuzhiyun 			*down_a = rtl8821ae_delta_swing_table_idx_24ga_n;
1817*4882a593Smuzhiyun 		}
1818*4882a593Smuzhiyun 	} else if (36 <= channel && channel <= 64) {
1819*4882a593Smuzhiyun 		*up_a = rtl8821ae_delta_swing_table_idx_5ga_p[0];
1820*4882a593Smuzhiyun 		*down_a = rtl8821ae_delta_swing_table_idx_5ga_n[0];
1821*4882a593Smuzhiyun 	} else if (100 <= channel && channel <= 140) {
1822*4882a593Smuzhiyun 		*up_a = rtl8821ae_delta_swing_table_idx_5ga_p[1];
1823*4882a593Smuzhiyun 		*down_a = rtl8821ae_delta_swing_table_idx_5ga_n[1];
1824*4882a593Smuzhiyun 	} else if (149 <= channel && channel <= 173) {
1825*4882a593Smuzhiyun 		*up_a = rtl8821ae_delta_swing_table_idx_5ga_p[2];
1826*4882a593Smuzhiyun 		*down_a = rtl8821ae_delta_swing_table_idx_5ga_n[2];
1827*4882a593Smuzhiyun 	} else {
1828*4882a593Smuzhiyun 		*up_a = rtl8818e_delta_swing_table_idx_24gb_p;
1829*4882a593Smuzhiyun 		*down_a = rtl8818e_delta_swing_table_idx_24gb_n;
1830*4882a593Smuzhiyun 	}
1831*4882a593Smuzhiyun 	return;
1832*4882a593Smuzhiyun }
1833*4882a593Smuzhiyun 
1834*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
1835*4882a593Smuzhiyun  * Function:	odm_TxPwrTrackSetPwr88E()
1836*4882a593Smuzhiyun  *
1837*4882a593Smuzhiyun  * Overview:	88E change all channel tx power accordign to flag.
1838*4882a593Smuzhiyun  *				OFDM & CCK are all different.
1839*4882a593Smuzhiyun  *
1840*4882a593Smuzhiyun  * Input:		NONE
1841*4882a593Smuzhiyun  *
1842*4882a593Smuzhiyun  * Output:		NONE
1843*4882a593Smuzhiyun  *
1844*4882a593Smuzhiyun  * Return:		NONE
1845*4882a593Smuzhiyun  *
1846*4882a593Smuzhiyun  * Revised History:
1847*4882a593Smuzhiyun  *	When		Who		Remark
1848*4882a593Smuzhiyun  *	04/23/2012	MHC		Create Version 0.
1849*4882a593Smuzhiyun  *
1850*4882a593Smuzhiyun  *---------------------------------------------------------------------------
1851*4882a593Smuzhiyun  */
rtl8821ae_dm_txpwr_track_set_pwr(struct ieee80211_hw * hw,enum pwr_track_control_method method,u8 rf_path,u8 channel_mapped_index)1852*4882a593Smuzhiyun void rtl8821ae_dm_txpwr_track_set_pwr(struct ieee80211_hw *hw,
1853*4882a593Smuzhiyun 				      enum pwr_track_control_method method,
1854*4882a593Smuzhiyun 				      u8 rf_path, u8 channel_mapped_index)
1855*4882a593Smuzhiyun {
1856*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1857*4882a593Smuzhiyun 	struct rtl_dm	*rtldm = rtl_dm(rtl_priv(hw));
1858*4882a593Smuzhiyun 	struct rtl_phy *rtlphy = &rtlpriv->phy;
1859*4882a593Smuzhiyun 	u32 final_swing_idx[1];
1860*4882a593Smuzhiyun 	u8 pwr_tracking_limit = 26; /*+1.0dB*/
1861*4882a593Smuzhiyun 	u8 tx_rate = 0xFF;
1862*4882a593Smuzhiyun 	s8 final_ofdm_swing_index = 0;
1863*4882a593Smuzhiyun 
1864*4882a593Smuzhiyun 	if (rtldm->tx_rate != 0xFF)
1865*4882a593Smuzhiyun 		tx_rate = rtl8821ae_hw_rate_to_mrate(hw, rtldm->tx_rate);
1866*4882a593Smuzhiyun 
1867*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "===>%s\n", __func__);
1868*4882a593Smuzhiyun 
1869*4882a593Smuzhiyun 	if (tx_rate != 0xFF) { /* Mimic Modify High Rate BBSwing Limit.*/
1870*4882a593Smuzhiyun 		/*CCK*/
1871*4882a593Smuzhiyun 		if ((tx_rate >= MGN_1M) && (tx_rate <= MGN_11M))
1872*4882a593Smuzhiyun 			pwr_tracking_limit = 32; /*+4dB*/
1873*4882a593Smuzhiyun 		/*OFDM*/
1874*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M))
1875*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1876*4882a593Smuzhiyun 		else if (tx_rate == MGN_54M)
1877*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1878*4882a593Smuzhiyun 		/*HT*/
1879*4882a593Smuzhiyun 		/*QPSK/BPSK*/
1880*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS0) && (tx_rate <= MGN_MCS2))
1881*4882a593Smuzhiyun 			pwr_tracking_limit = 34; /*+5dB*/
1882*4882a593Smuzhiyun 		/*16QAM*/
1883*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS3) && (tx_rate <= MGN_MCS4))
1884*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1885*4882a593Smuzhiyun 		/*64QAM*/
1886*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_MCS5) && (tx_rate <= MGN_MCS7))
1887*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1888*4882a593Smuzhiyun 		/*2 VHT*/
1889*4882a593Smuzhiyun 		/*QPSK/BPSK*/
1890*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT1SS_MCS0) &&
1891*4882a593Smuzhiyun 			(tx_rate <= MGN_VHT1SS_MCS2))
1892*4882a593Smuzhiyun 			pwr_tracking_limit = 34; /*+5dB*/
1893*4882a593Smuzhiyun 		/*16QAM*/
1894*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT1SS_MCS3) &&
1895*4882a593Smuzhiyun 			(tx_rate <= MGN_VHT1SS_MCS4))
1896*4882a593Smuzhiyun 			pwr_tracking_limit = 30; /*+3dB*/
1897*4882a593Smuzhiyun 		/*64QAM*/
1898*4882a593Smuzhiyun 		else if ((tx_rate >= MGN_VHT1SS_MCS5) &&
1899*4882a593Smuzhiyun 			(tx_rate <= MGN_VHT1SS_MCS6))
1900*4882a593Smuzhiyun 			pwr_tracking_limit = 28; /*+2dB*/
1901*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT1SS_MCS7) /*64QAM*/
1902*4882a593Smuzhiyun 			pwr_tracking_limit = 26; /*+1dB*/
1903*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT1SS_MCS8) /*256QAM*/
1904*4882a593Smuzhiyun 			pwr_tracking_limit = 24; /*+0dB*/
1905*4882a593Smuzhiyun 		else if (tx_rate == MGN_VHT1SS_MCS9) /*256QAM*/
1906*4882a593Smuzhiyun 			pwr_tracking_limit = 22; /*-1dB*/
1907*4882a593Smuzhiyun 		else
1908*4882a593Smuzhiyun 			pwr_tracking_limit = 24;
1909*4882a593Smuzhiyun 	}
1910*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1911*4882a593Smuzhiyun 		"TxRate=0x%x, PwrTrackingLimit=%d\n",
1912*4882a593Smuzhiyun 		tx_rate, pwr_tracking_limit);
1913*4882a593Smuzhiyun 
1914*4882a593Smuzhiyun 	if (method == BBSWING) {
1915*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1916*4882a593Smuzhiyun 			"===>%s\n", __func__);
1917*4882a593Smuzhiyun 		if (rf_path == RF90_PATH_A) {
1918*4882a593Smuzhiyun 			final_swing_idx[RF90_PATH_A] =
1919*4882a593Smuzhiyun 				(rtldm->ofdm_index[RF90_PATH_A] >
1920*4882a593Smuzhiyun 				pwr_tracking_limit) ?
1921*4882a593Smuzhiyun 				pwr_tracking_limit :
1922*4882a593Smuzhiyun 				rtldm->ofdm_index[RF90_PATH_A];
1923*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1924*4882a593Smuzhiyun 				"pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_A]=%d,pDM_Odm->RealBbSwingIdx[ODM_RF_PATH_A]=%d\n",
1925*4882a593Smuzhiyun 				rtldm->ofdm_index[RF90_PATH_A],
1926*4882a593Smuzhiyun 				final_swing_idx[RF90_PATH_A]);
1927*4882a593Smuzhiyun 
1928*4882a593Smuzhiyun 			rtl_set_bbreg(hw, RA_TXSCALE, 0xFFE00000,
1929*4882a593Smuzhiyun 				txscaling_tbl[final_swing_idx[RF90_PATH_A]]);
1930*4882a593Smuzhiyun 		}
1931*4882a593Smuzhiyun 	} else if (method == MIX_MODE) {
1932*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1933*4882a593Smuzhiyun 			"pDM_Odm->DefaultOfdmIndex=%d,pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n",
1934*4882a593Smuzhiyun 			rtldm->default_ofdm_index,
1935*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[rf_path],
1936*4882a593Smuzhiyun 			rf_path);
1937*4882a593Smuzhiyun 
1938*4882a593Smuzhiyun 		final_ofdm_swing_index =
1939*4882a593Smuzhiyun 			rtldm->default_ofdm_index +
1940*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[rf_path];
1941*4882a593Smuzhiyun 		/*BBSwing higher then Limit*/
1942*4882a593Smuzhiyun 		if (rf_path == RF90_PATH_A) {
1943*4882a593Smuzhiyun 			if (final_ofdm_swing_index > pwr_tracking_limit) {
1944*4882a593Smuzhiyun 				rtldm->remnant_cck_idx =
1945*4882a593Smuzhiyun 					final_ofdm_swing_index -
1946*4882a593Smuzhiyun 					pwr_tracking_limit;
1947*4882a593Smuzhiyun 				/* CCK Follow the same compensate value as Path A*/
1948*4882a593Smuzhiyun 				rtldm->remnant_ofdm_swing_idx[rf_path] =
1949*4882a593Smuzhiyun 					final_ofdm_swing_index -
1950*4882a593Smuzhiyun 					pwr_tracking_limit;
1951*4882a593Smuzhiyun 
1952*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RA_TXSCALE,
1953*4882a593Smuzhiyun 					0xFFE00000,
1954*4882a593Smuzhiyun 					txscaling_tbl[pwr_tracking_limit]);
1955*4882a593Smuzhiyun 
1956*4882a593Smuzhiyun 				rtldm->modify_txagc_flag_path_a = true;
1957*4882a593Smuzhiyun 
1958*4882a593Smuzhiyun 				/*Set TxAGC Page C{};*/
1959*4882a593Smuzhiyun 				rtl8821ae_phy_set_txpower_level_by_path(hw,
1960*4882a593Smuzhiyun 					rtlphy->current_channel,
1961*4882a593Smuzhiyun 					RF90_PATH_A);
1962*4882a593Smuzhiyun 
1963*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1964*4882a593Smuzhiyun 					" ******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d\n",
1965*4882a593Smuzhiyun 					pwr_tracking_limit,
1966*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path]);
1967*4882a593Smuzhiyun 			} else if (final_ofdm_swing_index < 0) {
1968*4882a593Smuzhiyun 				rtldm->remnant_cck_idx = final_ofdm_swing_index;
1969*4882a593Smuzhiyun 				/* CCK Follow the same compensate value as Path A*/
1970*4882a593Smuzhiyun 				rtldm->remnant_ofdm_swing_idx[rf_path] =
1971*4882a593Smuzhiyun 					final_ofdm_swing_index;
1972*4882a593Smuzhiyun 
1973*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RA_TXSCALE, 0xFFE00000,
1974*4882a593Smuzhiyun 					txscaling_tbl[0]);
1975*4882a593Smuzhiyun 
1976*4882a593Smuzhiyun 				rtldm->modify_txagc_flag_path_a = true;
1977*4882a593Smuzhiyun 
1978*4882a593Smuzhiyun 				/*Set TxAGC Page C{};*/
1979*4882a593Smuzhiyun 				rtl8821ae_phy_set_txpower_level_by_path(hw,
1980*4882a593Smuzhiyun 					rtlphy->current_channel, RF90_PATH_A);
1981*4882a593Smuzhiyun 
1982*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1983*4882a593Smuzhiyun 					"******Path_A Lower then BBSwing lower bound  0 , Remnant TxAGC Value = %d\n",
1984*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path]);
1985*4882a593Smuzhiyun 			} else {
1986*4882a593Smuzhiyun 				rtl_set_bbreg(hw, RA_TXSCALE, 0xFFE00000,
1987*4882a593Smuzhiyun 					txscaling_tbl[(u8)final_ofdm_swing_index]);
1988*4882a593Smuzhiyun 
1989*4882a593Smuzhiyun 				rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1990*4882a593Smuzhiyun 					"******Path_A Compensate with BBSwing ,Final_OFDM_Swing_Index = %d\n",
1991*4882a593Smuzhiyun 					final_ofdm_swing_index);
1992*4882a593Smuzhiyun 				/*If TxAGC has changed, reset TxAGC again*/
1993*4882a593Smuzhiyun 				if (rtldm->modify_txagc_flag_path_a) {
1994*4882a593Smuzhiyun 					rtldm->remnant_cck_idx = 0;
1995*4882a593Smuzhiyun 					rtldm->remnant_ofdm_swing_idx[rf_path] = 0;
1996*4882a593Smuzhiyun 
1997*4882a593Smuzhiyun 					/*Set TxAGC Page C{};*/
1998*4882a593Smuzhiyun 					rtl8821ae_phy_set_txpower_level_by_path(hw,
1999*4882a593Smuzhiyun 						rtlphy->current_channel, RF90_PATH_A);
2000*4882a593Smuzhiyun 
2001*4882a593Smuzhiyun 					rtldm->modify_txagc_flag_path_a = false;
2002*4882a593Smuzhiyun 
2003*4882a593Smuzhiyun 					rtl_dbg(rtlpriv, COMP_POWER_TRACKING,
2004*4882a593Smuzhiyun 						DBG_LOUD,
2005*4882a593Smuzhiyun 						"******Path_A pDM_Odm->Modify_TxAGC_Flag= FALSE\n");
2006*4882a593Smuzhiyun 				}
2007*4882a593Smuzhiyun 			}
2008*4882a593Smuzhiyun 		}
2009*4882a593Smuzhiyun 	} else {
2010*4882a593Smuzhiyun 		return;
2011*4882a593Smuzhiyun 	}
2012*4882a593Smuzhiyun }
2013*4882a593Smuzhiyun 
rtl8821ae_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw * hw)2014*4882a593Smuzhiyun void rtl8821ae_dm_txpower_tracking_callback_thermalmeter(
2015*4882a593Smuzhiyun 	struct ieee80211_hw *hw)
2016*4882a593Smuzhiyun {
2017*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2018*4882a593Smuzhiyun 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
2019*4882a593Smuzhiyun 	struct rtl_dm	*rtldm = rtl_dm(rtl_priv(hw));
2020*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
2021*4882a593Smuzhiyun 	struct rtl_phy *rtlphy = &rtlpriv->phy;
2022*4882a593Smuzhiyun 
2023*4882a593Smuzhiyun 	u8 thermal_value = 0, delta, delta_lck, delta_iqk, p = 0, i = 0;
2024*4882a593Smuzhiyun 	u8 thermal_value_avg_count = 0;
2025*4882a593Smuzhiyun 	u32 thermal_value_avg = 0;
2026*4882a593Smuzhiyun 
2027*4882a593Smuzhiyun 	u8 ofdm_min_index = 6;  /*OFDM BB Swing should be less than +3.0dB */
2028*4882a593Smuzhiyun 	/* GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/
2029*4882a593Smuzhiyun 	u8 index_for_channel = 0;
2030*4882a593Smuzhiyun 
2031*4882a593Smuzhiyun 	/* 1. The following TWO tables decide the final
2032*4882a593Smuzhiyun 	 * index of OFDM/CCK swing table.
2033*4882a593Smuzhiyun 	 */
2034*4882a593Smuzhiyun 	const u8 *delta_swing_table_idx_tup_a;
2035*4882a593Smuzhiyun 	const u8 *delta_swing_table_idx_tdown_a;
2036*4882a593Smuzhiyun 
2037*4882a593Smuzhiyun 	/*2. Initilization ( 7 steps in total )*/
2038*4882a593Smuzhiyun 	rtl8821ae_get_delta_swing_table(hw,
2039*4882a593Smuzhiyun 					&delta_swing_table_idx_tup_a,
2040*4882a593Smuzhiyun 					&delta_swing_table_idx_tdown_a);
2041*4882a593Smuzhiyun 
2042*4882a593Smuzhiyun 	rtldm->txpower_trackinginit = true;
2043*4882a593Smuzhiyun 
2044*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2045*4882a593Smuzhiyun 		"===>%s,\n pDM_Odm->BbSwingIdxCckBase: %d,pDM_Odm->BbSwingIdxOfdmBase[A]:%d, pDM_Odm->DefaultOfdmIndex: %d\n",
2046*4882a593Smuzhiyun 		__func__,
2047*4882a593Smuzhiyun 		rtldm->swing_idx_cck_base,
2048*4882a593Smuzhiyun 		rtldm->swing_idx_ofdm_base[RF90_PATH_A],
2049*4882a593Smuzhiyun 		rtldm->default_ofdm_index);
2050*4882a593Smuzhiyun 	/*0x42: RF Reg[15:10] 88E*/
2051*4882a593Smuzhiyun 	thermal_value = (u8)rtl_get_rfreg(hw,
2052*4882a593Smuzhiyun 		RF90_PATH_A, RF_T_METER_8812A, 0xfc00);
2053*4882a593Smuzhiyun 	if (!rtldm->txpower_track_control ||
2054*4882a593Smuzhiyun 		rtlefuse->eeprom_thermalmeter == 0 ||
2055*4882a593Smuzhiyun 		rtlefuse->eeprom_thermalmeter == 0xFF)
2056*4882a593Smuzhiyun 		return;
2057*4882a593Smuzhiyun 
2058*4882a593Smuzhiyun 	/* 3. Initialize ThermalValues of RFCalibrateInfo*/
2059*4882a593Smuzhiyun 
2060*4882a593Smuzhiyun 	if (rtlhal->reloadtxpowerindex) {
2061*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2062*4882a593Smuzhiyun 			"reload ofdm index for band switch\n");
2063*4882a593Smuzhiyun 	}
2064*4882a593Smuzhiyun 
2065*4882a593Smuzhiyun 	/*4. Calculate average thermal meter*/
2066*4882a593Smuzhiyun 	rtldm->thermalvalue_avg[rtldm->thermalvalue_avg_index] = thermal_value;
2067*4882a593Smuzhiyun 	rtldm->thermalvalue_avg_index++;
2068*4882a593Smuzhiyun 	if (rtldm->thermalvalue_avg_index == AVG_THERMAL_NUM_8812A)
2069*4882a593Smuzhiyun 		/*Average times =  c.AverageThermalNum*/
2070*4882a593Smuzhiyun 		rtldm->thermalvalue_avg_index = 0;
2071*4882a593Smuzhiyun 
2072*4882a593Smuzhiyun 	for (i = 0; i < AVG_THERMAL_NUM_8812A; i++) {
2073*4882a593Smuzhiyun 		if (rtldm->thermalvalue_avg[i]) {
2074*4882a593Smuzhiyun 			thermal_value_avg += rtldm->thermalvalue_avg[i];
2075*4882a593Smuzhiyun 			thermal_value_avg_count++;
2076*4882a593Smuzhiyun 		}
2077*4882a593Smuzhiyun 	}
2078*4882a593Smuzhiyun 	/*Calculate Average ThermalValue after average enough times*/
2079*4882a593Smuzhiyun 	if (thermal_value_avg_count) {
2080*4882a593Smuzhiyun 		thermal_value = (u8)(thermal_value_avg /
2081*4882a593Smuzhiyun 				thermal_value_avg_count);
2082*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2083*4882a593Smuzhiyun 			"AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n",
2084*4882a593Smuzhiyun 			thermal_value, rtlefuse->eeprom_thermalmeter);
2085*4882a593Smuzhiyun 	}
2086*4882a593Smuzhiyun 
2087*4882a593Smuzhiyun 	/*5. Calculate delta, delta_LCK, delta_IQK.
2088*4882a593Smuzhiyun 	 *"delta" here is used to determine whether
2089*4882a593Smuzhiyun 	 * thermal value changes or not.
2090*4882a593Smuzhiyun 	 */
2091*4882a593Smuzhiyun 	delta = (thermal_value > rtldm->thermalvalue) ?
2092*4882a593Smuzhiyun 		(thermal_value - rtldm->thermalvalue) :
2093*4882a593Smuzhiyun 		(rtldm->thermalvalue - thermal_value);
2094*4882a593Smuzhiyun 	delta_lck = (thermal_value > rtldm->thermalvalue_lck) ?
2095*4882a593Smuzhiyun 		(thermal_value - rtldm->thermalvalue_lck) :
2096*4882a593Smuzhiyun 		(rtldm->thermalvalue_lck - thermal_value);
2097*4882a593Smuzhiyun 	delta_iqk = (thermal_value > rtldm->thermalvalue_iqk) ?
2098*4882a593Smuzhiyun 		(thermal_value - rtldm->thermalvalue_iqk) :
2099*4882a593Smuzhiyun 		(rtldm->thermalvalue_iqk - thermal_value);
2100*4882a593Smuzhiyun 
2101*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2102*4882a593Smuzhiyun 		"(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n",
2103*4882a593Smuzhiyun 		delta, delta_lck, delta_iqk);
2104*4882a593Smuzhiyun 
2105*4882a593Smuzhiyun 	/* 6. If necessary, do LCK.	*/
2106*4882a593Smuzhiyun 	/*Delta temperature is equal to or larger than 20 centigrade.*/
2107*4882a593Smuzhiyun 	if (delta_lck >= IQK_THRESHOLD) {
2108*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2109*4882a593Smuzhiyun 			"delta_LCK(%d) >= Threshold_IQK(%d)\n",
2110*4882a593Smuzhiyun 			delta_lck, IQK_THRESHOLD);
2111*4882a593Smuzhiyun 		rtldm->thermalvalue_lck = thermal_value;
2112*4882a593Smuzhiyun 		rtl8821ae_phy_lc_calibrate(hw);
2113*4882a593Smuzhiyun 	}
2114*4882a593Smuzhiyun 
2115*4882a593Smuzhiyun 	/*7. If necessary, move the index of swing table to adjust Tx power.*/
2116*4882a593Smuzhiyun 
2117*4882a593Smuzhiyun 	if (delta > 0 && rtldm->txpower_track_control) {
2118*4882a593Smuzhiyun 		/*"delta" here is used to record the
2119*4882a593Smuzhiyun 		 * absolute value of differrence.
2120*4882a593Smuzhiyun 		 */
2121*4882a593Smuzhiyun 		delta = thermal_value > rtlefuse->eeprom_thermalmeter ?
2122*4882a593Smuzhiyun 			(thermal_value - rtlefuse->eeprom_thermalmeter) :
2123*4882a593Smuzhiyun 			(rtlefuse->eeprom_thermalmeter - thermal_value);
2124*4882a593Smuzhiyun 
2125*4882a593Smuzhiyun 		if (delta >= TXSCALE_TABLE_SIZE)
2126*4882a593Smuzhiyun 			delta = TXSCALE_TABLE_SIZE - 1;
2127*4882a593Smuzhiyun 
2128*4882a593Smuzhiyun 		/*7.1 The Final Power Index = BaseIndex + PowerIndexOffset*/
2129*4882a593Smuzhiyun 
2130*4882a593Smuzhiyun 		if (thermal_value > rtlefuse->eeprom_thermalmeter) {
2131*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2132*4882a593Smuzhiyun 				"delta_swing_table_idx_tup_a[%d] = %d\n",
2133*4882a593Smuzhiyun 				delta, delta_swing_table_idx_tup_a[delta]);
2134*4882a593Smuzhiyun 			rtldm->delta_power_index_last[RF90_PATH_A] =
2135*4882a593Smuzhiyun 				rtldm->delta_power_index[RF90_PATH_A];
2136*4882a593Smuzhiyun 			rtldm->delta_power_index[RF90_PATH_A] =
2137*4882a593Smuzhiyun 				delta_swing_table_idx_tup_a[delta];
2138*4882a593Smuzhiyun 
2139*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[RF90_PATH_A] =
2140*4882a593Smuzhiyun 				delta_swing_table_idx_tup_a[delta];
2141*4882a593Smuzhiyun 			/*Record delta swing for mix mode power tracking*/
2142*4882a593Smuzhiyun 
2143*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2144*4882a593Smuzhiyun 				"******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n",
2145*4882a593Smuzhiyun 				rtldm->absolute_ofdm_swing_idx[RF90_PATH_A]);
2146*4882a593Smuzhiyun 		} else {
2147*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2148*4882a593Smuzhiyun 				"delta_swing_table_idx_tdown_a[%d] = %d\n",
2149*4882a593Smuzhiyun 				delta, delta_swing_table_idx_tdown_a[delta]);
2150*4882a593Smuzhiyun 
2151*4882a593Smuzhiyun 			rtldm->delta_power_index_last[RF90_PATH_A] =
2152*4882a593Smuzhiyun 				rtldm->delta_power_index[RF90_PATH_A];
2153*4882a593Smuzhiyun 			rtldm->delta_power_index[RF90_PATH_A] =
2154*4882a593Smuzhiyun 				-1 * delta_swing_table_idx_tdown_a[delta];
2155*4882a593Smuzhiyun 
2156*4882a593Smuzhiyun 			rtldm->absolute_ofdm_swing_idx[RF90_PATH_A] =
2157*4882a593Smuzhiyun 				-1 * delta_swing_table_idx_tdown_a[delta];
2158*4882a593Smuzhiyun 			/* Record delta swing for mix mode power tracking*/
2159*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2160*4882a593Smuzhiyun 				"******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n",
2161*4882a593Smuzhiyun 				rtldm->absolute_ofdm_swing_idx[RF90_PATH_A]);
2162*4882a593Smuzhiyun 		}
2163*4882a593Smuzhiyun 
2164*4882a593Smuzhiyun 		for (p = RF90_PATH_A; p < MAX_PATH_NUM_8821A; p++) {
2165*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2166*4882a593Smuzhiyun 				"\n\n================================ [Path-%c]Calculating PowerIndexOffset ================================\n",
2167*4882a593Smuzhiyun 				(p == RF90_PATH_A ? 'A' : 'B'));
2168*4882a593Smuzhiyun 			/*If Thermal value changes but lookup table value
2169*4882a593Smuzhiyun 			 * still the same
2170*4882a593Smuzhiyun 			 */
2171*4882a593Smuzhiyun 			if (rtldm->delta_power_index[p] ==
2172*4882a593Smuzhiyun 				rtldm->delta_power_index_last[p])
2173*4882a593Smuzhiyun 
2174*4882a593Smuzhiyun 				rtldm->power_index_offset[p] = 0;
2175*4882a593Smuzhiyun 			else
2176*4882a593Smuzhiyun 				rtldm->power_index_offset[p] =
2177*4882a593Smuzhiyun 					rtldm->delta_power_index[p] -
2178*4882a593Smuzhiyun 					rtldm->delta_power_index_last[p];
2179*4882a593Smuzhiyun 			/*Power Index Diff between 2 times Power Tracking*/
2180*4882a593Smuzhiyun 
2181*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2182*4882a593Smuzhiyun 				"[Path-%c] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n",
2183*4882a593Smuzhiyun 				(p == RF90_PATH_A ? 'A' : 'B'),
2184*4882a593Smuzhiyun 				rtldm->power_index_offset[p],
2185*4882a593Smuzhiyun 				rtldm->delta_power_index[p] ,
2186*4882a593Smuzhiyun 				rtldm->delta_power_index_last[p]);
2187*4882a593Smuzhiyun 
2188*4882a593Smuzhiyun 			rtldm->ofdm_index[p] =
2189*4882a593Smuzhiyun 					rtldm->swing_idx_ofdm_base[p] +
2190*4882a593Smuzhiyun 					rtldm->power_index_offset[p];
2191*4882a593Smuzhiyun 			rtldm->cck_index =
2192*4882a593Smuzhiyun 					rtldm->swing_idx_cck_base +
2193*4882a593Smuzhiyun 					rtldm->power_index_offset[p];
2194*4882a593Smuzhiyun 
2195*4882a593Smuzhiyun 			rtldm->swing_idx_cck = rtldm->cck_index;
2196*4882a593Smuzhiyun 			rtldm->swing_idx_ofdm[p] = rtldm->ofdm_index[p];
2197*4882a593Smuzhiyun 
2198*4882a593Smuzhiyun 			/*********Print BB Swing Base and Index Offset********/
2199*4882a593Smuzhiyun 
2200*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2201*4882a593Smuzhiyun 				"The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n",
2202*4882a593Smuzhiyun 				rtldm->swing_idx_cck,
2203*4882a593Smuzhiyun 				rtldm->swing_idx_cck_base,
2204*4882a593Smuzhiyun 				rtldm->power_index_offset[p]);
2205*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2206*4882a593Smuzhiyun 				"The 'OFDM' final index(%d) = BaseIndex[%c](%d) + PowerIndexOffset(%d)\n",
2207*4882a593Smuzhiyun 				rtldm->swing_idx_ofdm[p],
2208*4882a593Smuzhiyun 				(p == RF90_PATH_A ? 'A' : 'B'),
2209*4882a593Smuzhiyun 				rtldm->swing_idx_ofdm_base[p],
2210*4882a593Smuzhiyun 				rtldm->power_index_offset[p]);
2211*4882a593Smuzhiyun 
2212*4882a593Smuzhiyun 			/*7.1 Handle boundary conditions of index.*/
2213*4882a593Smuzhiyun 
2214*4882a593Smuzhiyun 			if (rtldm->ofdm_index[p] > TXSCALE_TABLE_SIZE - 1)
2215*4882a593Smuzhiyun 				rtldm->ofdm_index[p] = TXSCALE_TABLE_SIZE - 1;
2216*4882a593Smuzhiyun 			else if (rtldm->ofdm_index[p] < ofdm_min_index)
2217*4882a593Smuzhiyun 				rtldm->ofdm_index[p] = ofdm_min_index;
2218*4882a593Smuzhiyun 		}
2219*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2220*4882a593Smuzhiyun 			"\n\n========================================================================================================\n");
2221*4882a593Smuzhiyun 		if (rtldm->cck_index > TXSCALE_TABLE_SIZE - 1)
2222*4882a593Smuzhiyun 			rtldm->cck_index = TXSCALE_TABLE_SIZE - 1;
2223*4882a593Smuzhiyun 		else if (rtldm->cck_index < 0)
2224*4882a593Smuzhiyun 			rtldm->cck_index = 0;
2225*4882a593Smuzhiyun 	} else {
2226*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2227*4882a593Smuzhiyun 			"The thermal meter is unchanged or TxPowerTracking OFF(%d):ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d\n",
2228*4882a593Smuzhiyun 			rtldm->txpower_track_control,
2229*4882a593Smuzhiyun 			thermal_value,
2230*4882a593Smuzhiyun 			rtldm->thermalvalue);
2231*4882a593Smuzhiyun 
2232*4882a593Smuzhiyun 		for (p = RF90_PATH_A; p < MAX_PATH_NUM_8821A; p++)
2233*4882a593Smuzhiyun 			rtldm->power_index_offset[p] = 0;
2234*4882a593Smuzhiyun 	}
2235*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2236*4882a593Smuzhiyun 		"TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n",
2237*4882a593Smuzhiyun 		/*Print Swing base & current*/
2238*4882a593Smuzhiyun 		rtldm->cck_index, rtldm->swing_idx_cck_base);
2239*4882a593Smuzhiyun 	for (p = RF90_PATH_A; p < MAX_PATH_NUM_8821A; p++) {
2240*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2241*4882a593Smuzhiyun 			"TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%c]: %d\n",
2242*4882a593Smuzhiyun 			rtldm->ofdm_index[p],
2243*4882a593Smuzhiyun 			(p == RF90_PATH_A ? 'A' : 'B'),
2244*4882a593Smuzhiyun 			rtldm->swing_idx_ofdm_base[p]);
2245*4882a593Smuzhiyun 	}
2246*4882a593Smuzhiyun 
2247*4882a593Smuzhiyun 	if ((rtldm->power_index_offset[RF90_PATH_A] != 0 ||
2248*4882a593Smuzhiyun 		rtldm->power_index_offset[RF90_PATH_B] != 0) &&
2249*4882a593Smuzhiyun 		rtldm->txpower_track_control) {
2250*4882a593Smuzhiyun 		/*7.2 Configure the Swing Table to adjust Tx Power.*/
2251*4882a593Smuzhiyun 		/*Always TRUE after Tx Power is adjusted by power tracking.*/
2252*4882a593Smuzhiyun 		/*
2253*4882a593Smuzhiyun 		 *  2012/04/23 MH According to Luke's suggestion,
2254*4882a593Smuzhiyun 		 *  we can not write BB digital
2255*4882a593Smuzhiyun 		 *  to increase TX power. Otherwise, EVM will be bad.
2256*4882a593Smuzhiyun 		 *
2257*4882a593Smuzhiyun 		 *  2012/04/25 MH Add for tx power tracking to
2258*4882a593Smuzhiyun 		 *  set tx power in tx agc for 88E.
2259*4882a593Smuzhiyun 		 */
2260*4882a593Smuzhiyun 		if (thermal_value > rtldm->thermalvalue) {
2261*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2262*4882a593Smuzhiyun 				"Temperature Increasing(A): delta_pi: %d , delta_t: %d,Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
2263*4882a593Smuzhiyun 				rtldm->power_index_offset[RF90_PATH_A],
2264*4882a593Smuzhiyun 				delta, thermal_value,
2265*4882a593Smuzhiyun 				rtlefuse->eeprom_thermalmeter,
2266*4882a593Smuzhiyun 				rtldm->thermalvalue);
2267*4882a593Smuzhiyun 		} else if (thermal_value < rtldm->thermalvalue) { /*Low temperature*/
2268*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2269*4882a593Smuzhiyun 				"Temperature Decreasing(A): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
2270*4882a593Smuzhiyun 				rtldm->power_index_offset[RF90_PATH_A],
2271*4882a593Smuzhiyun 				delta, thermal_value,
2272*4882a593Smuzhiyun 				rtlefuse->eeprom_thermalmeter,
2273*4882a593Smuzhiyun 				rtldm->thermalvalue);
2274*4882a593Smuzhiyun 		}
2275*4882a593Smuzhiyun 
2276*4882a593Smuzhiyun 		if (thermal_value > rtlefuse->eeprom_thermalmeter) {
2277*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2278*4882a593Smuzhiyun 				"Temperature(%d) higher than PG value(%d)\n",
2279*4882a593Smuzhiyun 				thermal_value, rtlefuse->eeprom_thermalmeter);
2280*4882a593Smuzhiyun 
2281*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2282*4882a593Smuzhiyun 				"****Enter POWER Tracking MIX_MODE****\n");
2283*4882a593Smuzhiyun 			for (p = RF90_PATH_A; p < MAX_PATH_NUM_8821A; p++)
2284*4882a593Smuzhiyun 					rtl8821ae_dm_txpwr_track_set_pwr(hw,
2285*4882a593Smuzhiyun 						MIX_MODE, p, index_for_channel);
2286*4882a593Smuzhiyun 		} else {
2287*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2288*4882a593Smuzhiyun 				"Temperature(%d) lower than PG value(%d)\n",
2289*4882a593Smuzhiyun 				thermal_value, rtlefuse->eeprom_thermalmeter);
2290*4882a593Smuzhiyun 
2291*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2292*4882a593Smuzhiyun 				"*****Enter POWER Tracking MIX_MODE*****\n");
2293*4882a593Smuzhiyun 			for (p = RF90_PATH_A; p < MAX_PATH_NUM_8821A; p++)
2294*4882a593Smuzhiyun 				rtl8812ae_dm_txpwr_track_set_pwr(hw,
2295*4882a593Smuzhiyun 					MIX_MODE, p, index_for_channel);
2296*4882a593Smuzhiyun 		}
2297*4882a593Smuzhiyun 		/*Record last time Power Tracking result as base.*/
2298*4882a593Smuzhiyun 		rtldm->swing_idx_cck_base = rtldm->swing_idx_cck;
2299*4882a593Smuzhiyun 		for (p = RF90_PATH_A; p < MAX_PATH_NUM_8821A; p++)
2300*4882a593Smuzhiyun 			rtldm->swing_idx_ofdm_base[p] = rtldm->swing_idx_ofdm[p];
2301*4882a593Smuzhiyun 
2302*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2303*4882a593Smuzhiyun 			"pDM_Odm->RFCalibrateInfo.ThermalValue = %d ThermalValue= %d\n",
2304*4882a593Smuzhiyun 			rtldm->thermalvalue, thermal_value);
2305*4882a593Smuzhiyun 		/*Record last Power Tracking Thermal Value*/
2306*4882a593Smuzhiyun 		rtldm->thermalvalue = thermal_value;
2307*4882a593Smuzhiyun 	}
2308*4882a593Smuzhiyun 	/* Delta temperature is equal to or larger than
2309*4882a593Smuzhiyun 	 * 20 centigrade (When threshold is 8).
2310*4882a593Smuzhiyun 	 */
2311*4882a593Smuzhiyun 	if (delta_iqk >= IQK_THRESHOLD) {
2312*4882a593Smuzhiyun 		if (!rtlphy->lck_inprogress) {
2313*4882a593Smuzhiyun 			spin_lock(&rtlpriv->locks.iqk_lock);
2314*4882a593Smuzhiyun 			rtlphy->lck_inprogress = true;
2315*4882a593Smuzhiyun 			spin_unlock(&rtlpriv->locks.iqk_lock);
2316*4882a593Smuzhiyun 
2317*4882a593Smuzhiyun 			rtl8821ae_do_iqk(hw, delta_iqk, thermal_value, 8);
2318*4882a593Smuzhiyun 
2319*4882a593Smuzhiyun 			spin_lock(&rtlpriv->locks.iqk_lock);
2320*4882a593Smuzhiyun 			rtlphy->lck_inprogress = false;
2321*4882a593Smuzhiyun 			spin_unlock(&rtlpriv->locks.iqk_lock);
2322*4882a593Smuzhiyun 		}
2323*4882a593Smuzhiyun 	}
2324*4882a593Smuzhiyun 
2325*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===%s\n", __func__);
2326*4882a593Smuzhiyun }
2327*4882a593Smuzhiyun 
rtl8821ae_dm_check_txpower_tracking_thermalmeter(struct ieee80211_hw * hw)2328*4882a593Smuzhiyun void rtl8821ae_dm_check_txpower_tracking_thermalmeter(struct ieee80211_hw *hw)
2329*4882a593Smuzhiyun {
2330*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2331*4882a593Smuzhiyun 	if (!rtlpriv->dm.tm_trigger) {
2332*4882a593Smuzhiyun 		rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER_88E, BIT(17)|BIT(16),
2333*4882a593Smuzhiyun 			      0x03);
2334*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2335*4882a593Smuzhiyun 			"Trigger 8821ae Thermal Meter!!\n");
2336*4882a593Smuzhiyun 		rtlpriv->dm.tm_trigger = 1;
2337*4882a593Smuzhiyun 		return;
2338*4882a593Smuzhiyun 	} else {
2339*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
2340*4882a593Smuzhiyun 			"Schedule TxPowerTracking !!\n");
2341*4882a593Smuzhiyun 
2342*4882a593Smuzhiyun 		rtl8821ae_dm_txpower_tracking_callback_thermalmeter(hw);
2343*4882a593Smuzhiyun 		rtlpriv->dm.tm_trigger = 0;
2344*4882a593Smuzhiyun 	}
2345*4882a593Smuzhiyun }
2346*4882a593Smuzhiyun 
rtl8821ae_dm_refresh_rate_adaptive_mask(struct ieee80211_hw * hw)2347*4882a593Smuzhiyun static void rtl8821ae_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
2348*4882a593Smuzhiyun {
2349*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2350*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
2351*4882a593Smuzhiyun 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
2352*4882a593Smuzhiyun 	struct rate_adaptive *p_ra = &rtlpriv->ra;
2353*4882a593Smuzhiyun 	u32 low_rssithresh_for_ra = p_ra->low2high_rssi_thresh_for_ra40m;
2354*4882a593Smuzhiyun 	u32 high_rssithresh_for_ra = p_ra->high_rssi_thresh_for_ra;
2355*4882a593Smuzhiyun 	u8 go_up_gap = 5;
2356*4882a593Smuzhiyun 	struct ieee80211_sta *sta = NULL;
2357*4882a593Smuzhiyun 
2358*4882a593Smuzhiyun 	if (is_hal_stop(rtlhal)) {
2359*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_RATE, DBG_LOUD,
2360*4882a593Smuzhiyun 			"driver is going to unload\n");
2361*4882a593Smuzhiyun 		return;
2362*4882a593Smuzhiyun 	}
2363*4882a593Smuzhiyun 
2364*4882a593Smuzhiyun 	if (!rtlpriv->dm.useramask) {
2365*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_RATE, DBG_LOUD,
2366*4882a593Smuzhiyun 			"driver does not control rate adaptive mask\n");
2367*4882a593Smuzhiyun 		return;
2368*4882a593Smuzhiyun 	}
2369*4882a593Smuzhiyun 
2370*4882a593Smuzhiyun 	if (mac->link_state == MAC80211_LINKED &&
2371*4882a593Smuzhiyun 		mac->opmode == NL80211_IFTYPE_STATION) {
2372*4882a593Smuzhiyun 		switch (p_ra->pre_ratr_state) {
2373*4882a593Smuzhiyun 		case DM_RATR_STA_MIDDLE:
2374*4882a593Smuzhiyun 			high_rssithresh_for_ra += go_up_gap;
2375*4882a593Smuzhiyun 			break;
2376*4882a593Smuzhiyun 		case DM_RATR_STA_LOW:
2377*4882a593Smuzhiyun 			high_rssithresh_for_ra += go_up_gap;
2378*4882a593Smuzhiyun 			low_rssithresh_for_ra += go_up_gap;
2379*4882a593Smuzhiyun 			break;
2380*4882a593Smuzhiyun 		default:
2381*4882a593Smuzhiyun 			break;
2382*4882a593Smuzhiyun 		}
2383*4882a593Smuzhiyun 
2384*4882a593Smuzhiyun 		if (rtlpriv->dm.undec_sm_pwdb >
2385*4882a593Smuzhiyun 		    (long)high_rssithresh_for_ra)
2386*4882a593Smuzhiyun 			p_ra->ratr_state = DM_RATR_STA_HIGH;
2387*4882a593Smuzhiyun 		else if (rtlpriv->dm.undec_sm_pwdb >
2388*4882a593Smuzhiyun 			 (long)low_rssithresh_for_ra)
2389*4882a593Smuzhiyun 			p_ra->ratr_state = DM_RATR_STA_MIDDLE;
2390*4882a593Smuzhiyun 		else
2391*4882a593Smuzhiyun 			p_ra->ratr_state = DM_RATR_STA_LOW;
2392*4882a593Smuzhiyun 
2393*4882a593Smuzhiyun 		if (p_ra->pre_ratr_state != p_ra->ratr_state) {
2394*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_RATE, DBG_LOUD,
2395*4882a593Smuzhiyun 				"RSSI = %ld\n",
2396*4882a593Smuzhiyun 				rtlpriv->dm.undec_sm_pwdb);
2397*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_RATE, DBG_LOUD,
2398*4882a593Smuzhiyun 				"RSSI_LEVEL = %d\n", p_ra->ratr_state);
2399*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_RATE, DBG_LOUD,
2400*4882a593Smuzhiyun 				"PreState = %d, CurState = %d\n",
2401*4882a593Smuzhiyun 				p_ra->pre_ratr_state, p_ra->ratr_state);
2402*4882a593Smuzhiyun 
2403*4882a593Smuzhiyun 			rcu_read_lock();
2404*4882a593Smuzhiyun 			sta = rtl_find_sta(hw, mac->bssid);
2405*4882a593Smuzhiyun 			if (sta)
2406*4882a593Smuzhiyun 				rtlpriv->cfg->ops->update_rate_tbl(hw,
2407*4882a593Smuzhiyun 						sta, p_ra->ratr_state, true);
2408*4882a593Smuzhiyun 			rcu_read_unlock();
2409*4882a593Smuzhiyun 
2410*4882a593Smuzhiyun 			p_ra->pre_ratr_state = p_ra->ratr_state;
2411*4882a593Smuzhiyun 		}
2412*4882a593Smuzhiyun 	}
2413*4882a593Smuzhiyun }
2414*4882a593Smuzhiyun 
rtl8821ae_dm_refresh_basic_rate_mask(struct ieee80211_hw * hw)2415*4882a593Smuzhiyun static void rtl8821ae_dm_refresh_basic_rate_mask(struct ieee80211_hw *hw)
2416*4882a593Smuzhiyun {
2417*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2418*4882a593Smuzhiyun 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
2419*4882a593Smuzhiyun 	struct rtl_mac *mac = &rtlpriv->mac80211;
2420*4882a593Smuzhiyun 	static u8 stage;
2421*4882a593Smuzhiyun 	u8 cur_stage = 0;
2422*4882a593Smuzhiyun 	u16 basic_rate = RRSR_1M | RRSR_2M | RRSR_5_5M | RRSR_11M | RRSR_6M;
2423*4882a593Smuzhiyun 
2424*4882a593Smuzhiyun 	if (mac->link_state < MAC80211_LINKED)
2425*4882a593Smuzhiyun 		cur_stage = 0;
2426*4882a593Smuzhiyun 	else if (dm_digtable->rssi_val_min < 25)
2427*4882a593Smuzhiyun 		cur_stage = 1;
2428*4882a593Smuzhiyun 	else if (dm_digtable->rssi_val_min > 30)
2429*4882a593Smuzhiyun 		cur_stage = 3;
2430*4882a593Smuzhiyun 	else
2431*4882a593Smuzhiyun 		cur_stage = 2;
2432*4882a593Smuzhiyun 
2433*4882a593Smuzhiyun 	if (cur_stage != stage) {
2434*4882a593Smuzhiyun 		if (cur_stage == 1) {
2435*4882a593Smuzhiyun 			basic_rate &= (!(basic_rate ^ mac->basic_rates));
2436*4882a593Smuzhiyun 			rtlpriv->cfg->ops->set_hw_reg(hw,
2437*4882a593Smuzhiyun 				HW_VAR_BASIC_RATE, (u8 *)&basic_rate);
2438*4882a593Smuzhiyun 		} else if (cur_stage == 3 && (stage == 1 || stage == 2)) {
2439*4882a593Smuzhiyun 			rtlpriv->cfg->ops->set_hw_reg(hw,
2440*4882a593Smuzhiyun 				HW_VAR_BASIC_RATE, (u8 *)&mac->basic_rates);
2441*4882a593Smuzhiyun 		}
2442*4882a593Smuzhiyun 	}
2443*4882a593Smuzhiyun 	stage = cur_stage;
2444*4882a593Smuzhiyun }
2445*4882a593Smuzhiyun 
rtl8821ae_dm_edca_choose_traffic_idx(struct ieee80211_hw * hw,u64 cur_tx_bytes,u64 cur_rx_bytes,bool b_bias_on_rx,bool * pb_is_cur_rdl_state)2446*4882a593Smuzhiyun static void rtl8821ae_dm_edca_choose_traffic_idx(
2447*4882a593Smuzhiyun 	struct ieee80211_hw *hw, u64 cur_tx_bytes,
2448*4882a593Smuzhiyun 	u64 cur_rx_bytes, bool b_bias_on_rx,
2449*4882a593Smuzhiyun 	bool *pb_is_cur_rdl_state)
2450*4882a593Smuzhiyun {
2451*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2452*4882a593Smuzhiyun 
2453*4882a593Smuzhiyun 	if (b_bias_on_rx) {
2454*4882a593Smuzhiyun 		if (cur_tx_bytes > (cur_rx_bytes*4)) {
2455*4882a593Smuzhiyun 			*pb_is_cur_rdl_state = false;
2456*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2457*4882a593Smuzhiyun 				"Uplink Traffic\n");
2458*4882a593Smuzhiyun 		} else {
2459*4882a593Smuzhiyun 			*pb_is_cur_rdl_state = true;
2460*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2461*4882a593Smuzhiyun 				"Balance Traffic\n");
2462*4882a593Smuzhiyun 		}
2463*4882a593Smuzhiyun 	} else {
2464*4882a593Smuzhiyun 		if (cur_rx_bytes > (cur_tx_bytes*4)) {
2465*4882a593Smuzhiyun 			*pb_is_cur_rdl_state = true;
2466*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2467*4882a593Smuzhiyun 				"Downlink	Traffic\n");
2468*4882a593Smuzhiyun 		} else {
2469*4882a593Smuzhiyun 			*pb_is_cur_rdl_state = false;
2470*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2471*4882a593Smuzhiyun 				"Balance Traffic\n");
2472*4882a593Smuzhiyun 		}
2473*4882a593Smuzhiyun 	}
2474*4882a593Smuzhiyun 	return;
2475*4882a593Smuzhiyun }
2476*4882a593Smuzhiyun 
rtl8821ae_dm_check_edca_turbo(struct ieee80211_hw * hw)2477*4882a593Smuzhiyun static void rtl8821ae_dm_check_edca_turbo(struct ieee80211_hw *hw)
2478*4882a593Smuzhiyun {
2479*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2480*4882a593Smuzhiyun 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
2481*4882a593Smuzhiyun 	struct rtl_dm *rtldm =  rtl_dm(rtl_priv(hw));
2482*4882a593Smuzhiyun 
2483*4882a593Smuzhiyun 	/*Keep past Tx/Rx packet count for RT-to-RT EDCA turbo.*/
2484*4882a593Smuzhiyun 	u64 cur_tx_ok_cnt = 0;
2485*4882a593Smuzhiyun 	u64 cur_rx_ok_cnt = 0;
2486*4882a593Smuzhiyun 	u32 edca_be_ul = 0x5ea42b;
2487*4882a593Smuzhiyun 	u32 edca_be_dl = 0x5ea42b;
2488*4882a593Smuzhiyun 	u32 edca_be = 0x5ea42b;
2489*4882a593Smuzhiyun 	u8 iot_peer = 0;
2490*4882a593Smuzhiyun 	bool *pb_is_cur_rdl_state = NULL;
2491*4882a593Smuzhiyun 	bool b_bias_on_rx = false;
2492*4882a593Smuzhiyun 	bool b_edca_turbo_on = false;
2493*4882a593Smuzhiyun 
2494*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2495*4882a593Smuzhiyun 		"%s=====>\n", __func__);
2496*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2497*4882a593Smuzhiyun 		"Original BE PARAM: 0x%x\n",
2498*4882a593Smuzhiyun 		rtl_read_dword(rtlpriv, DM_REG_EDCA_BE_11N));
2499*4882a593Smuzhiyun 
2500*4882a593Smuzhiyun 	if (rtlpriv->dm.dbginfo.num_non_be_pkt > 0x100)
2501*4882a593Smuzhiyun 		rtlpriv->dm.is_any_nonbepkts = true;
2502*4882a593Smuzhiyun 	rtlpriv->dm.dbginfo.num_non_be_pkt = 0;
2503*4882a593Smuzhiyun 
2504*4882a593Smuzhiyun 	/*===============================
2505*4882a593Smuzhiyun 	 * list paramter for different platform
2506*4882a593Smuzhiyun 	 *===============================
2507*4882a593Smuzhiyun 	 */
2508*4882a593Smuzhiyun 	pb_is_cur_rdl_state = &rtlpriv->dm.is_cur_rdlstate;
2509*4882a593Smuzhiyun 
2510*4882a593Smuzhiyun 	cur_tx_ok_cnt = rtlpriv->stats.txbytesunicast - rtldm->last_tx_ok_cnt;
2511*4882a593Smuzhiyun 	cur_rx_ok_cnt = rtlpriv->stats.rxbytesunicast - rtldm->last_rx_ok_cnt;
2512*4882a593Smuzhiyun 
2513*4882a593Smuzhiyun 	rtldm->last_tx_ok_cnt = rtlpriv->stats.txbytesunicast;
2514*4882a593Smuzhiyun 	rtldm->last_rx_ok_cnt = rtlpriv->stats.rxbytesunicast;
2515*4882a593Smuzhiyun 
2516*4882a593Smuzhiyun 	iot_peer = rtlpriv->mac80211.vendor;
2517*4882a593Smuzhiyun 	b_bias_on_rx = false;
2518*4882a593Smuzhiyun 	b_edca_turbo_on = ((!rtlpriv->dm.is_any_nonbepkts) &&
2519*4882a593Smuzhiyun 			   (!rtlpriv->dm.disable_framebursting)) ?
2520*4882a593Smuzhiyun 			   true : false;
2521*4882a593Smuzhiyun 
2522*4882a593Smuzhiyun 	if (rtlpriv->rtlhal.hw_type != HARDWARE_TYPE_RTL8812AE) {
2523*4882a593Smuzhiyun 		if ((iot_peer == PEER_CISCO) &&
2524*4882a593Smuzhiyun 			(mac->mode == WIRELESS_MODE_N_24G)) {
2525*4882a593Smuzhiyun 			edca_be_dl = edca_setting_dl[iot_peer];
2526*4882a593Smuzhiyun 			edca_be_ul = edca_setting_ul[iot_peer];
2527*4882a593Smuzhiyun 		}
2528*4882a593Smuzhiyun 	}
2529*4882a593Smuzhiyun 
2530*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2531*4882a593Smuzhiyun 		"bIsAnyNonBEPkts : 0x%x  bDisableFrameBursting : 0x%x\n",
2532*4882a593Smuzhiyun 		rtlpriv->dm.is_any_nonbepkts,
2533*4882a593Smuzhiyun 		rtlpriv->dm.disable_framebursting);
2534*4882a593Smuzhiyun 
2535*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2536*4882a593Smuzhiyun 		"bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",
2537*4882a593Smuzhiyun 		b_edca_turbo_on, b_bias_on_rx);
2538*4882a593Smuzhiyun 
2539*4882a593Smuzhiyun 	if (b_edca_turbo_on) {
2540*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2541*4882a593Smuzhiyun 			"curTxOkCnt : 0x%llx\n", cur_tx_ok_cnt);
2542*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2543*4882a593Smuzhiyun 			"curRxOkCnt : 0x%llx\n", cur_rx_ok_cnt);
2544*4882a593Smuzhiyun 		if (b_bias_on_rx)
2545*4882a593Smuzhiyun 			rtl8821ae_dm_edca_choose_traffic_idx(hw, cur_tx_ok_cnt,
2546*4882a593Smuzhiyun 				cur_rx_ok_cnt, true, pb_is_cur_rdl_state);
2547*4882a593Smuzhiyun 		else
2548*4882a593Smuzhiyun 			rtl8821ae_dm_edca_choose_traffic_idx(hw, cur_tx_ok_cnt,
2549*4882a593Smuzhiyun 				cur_rx_ok_cnt, false, pb_is_cur_rdl_state);
2550*4882a593Smuzhiyun 
2551*4882a593Smuzhiyun 		edca_be = (*pb_is_cur_rdl_state) ?  edca_be_dl : edca_be_ul;
2552*4882a593Smuzhiyun 
2553*4882a593Smuzhiyun 		rtl_write_dword(rtlpriv, DM_REG_EDCA_BE_11N, edca_be);
2554*4882a593Smuzhiyun 
2555*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2556*4882a593Smuzhiyun 			"EDCA Turbo on: EDCA_BE:0x%x\n", edca_be);
2557*4882a593Smuzhiyun 
2558*4882a593Smuzhiyun 		rtlpriv->dm.current_turbo_edca = true;
2559*4882a593Smuzhiyun 
2560*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_TURBO, DBG_LOUD,
2561*4882a593Smuzhiyun 			"EDCA_BE_DL : 0x%x  EDCA_BE_UL : 0x%x  EDCA_BE : 0x%x\n",
2562*4882a593Smuzhiyun 			edca_be_dl, edca_be_ul, edca_be);
2563*4882a593Smuzhiyun 	} else {
2564*4882a593Smuzhiyun 		if (rtlpriv->dm.current_turbo_edca) {
2565*4882a593Smuzhiyun 			u8 tmp = AC0_BE;
2566*4882a593Smuzhiyun 			rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
2567*4882a593Smuzhiyun 						      (u8 *)(&tmp));
2568*4882a593Smuzhiyun 		}
2569*4882a593Smuzhiyun 		rtlpriv->dm.current_turbo_edca = false;
2570*4882a593Smuzhiyun 	}
2571*4882a593Smuzhiyun 
2572*4882a593Smuzhiyun 	rtlpriv->dm.is_any_nonbepkts = false;
2573*4882a593Smuzhiyun 	rtldm->last_tx_ok_cnt = rtlpriv->stats.txbytesunicast;
2574*4882a593Smuzhiyun 	rtldm->last_rx_ok_cnt = rtlpriv->stats.rxbytesunicast;
2575*4882a593Smuzhiyun }
2576*4882a593Smuzhiyun 
rtl8821ae_dm_cck_packet_detection_thresh(struct ieee80211_hw * hw)2577*4882a593Smuzhiyun static void rtl8821ae_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
2578*4882a593Smuzhiyun {
2579*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2580*4882a593Smuzhiyun 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
2581*4882a593Smuzhiyun 	u8 cur_cck_cca_thresh;
2582*4882a593Smuzhiyun 
2583*4882a593Smuzhiyun 	if (rtlpriv->mac80211.link_state >= MAC80211_LINKED) {
2584*4882a593Smuzhiyun 		if (dm_digtable->rssi_val_min > 25) {
2585*4882a593Smuzhiyun 			cur_cck_cca_thresh = 0xcd;
2586*4882a593Smuzhiyun 		} else if ((dm_digtable->rssi_val_min <= 25) &&
2587*4882a593Smuzhiyun 			   (dm_digtable->rssi_val_min > 10)) {
2588*4882a593Smuzhiyun 			cur_cck_cca_thresh = 0x83;
2589*4882a593Smuzhiyun 		} else {
2590*4882a593Smuzhiyun 			if (rtlpriv->falsealm_cnt.cnt_cck_fail > 1000)
2591*4882a593Smuzhiyun 				cur_cck_cca_thresh = 0x83;
2592*4882a593Smuzhiyun 			else
2593*4882a593Smuzhiyun 				cur_cck_cca_thresh = 0x40;
2594*4882a593Smuzhiyun 		}
2595*4882a593Smuzhiyun 	} else {
2596*4882a593Smuzhiyun 		if (rtlpriv->falsealm_cnt.cnt_cck_fail > 1000)
2597*4882a593Smuzhiyun 			cur_cck_cca_thresh = 0x83;
2598*4882a593Smuzhiyun 		else
2599*4882a593Smuzhiyun 			cur_cck_cca_thresh = 0x40;
2600*4882a593Smuzhiyun 	}
2601*4882a593Smuzhiyun 
2602*4882a593Smuzhiyun 	if (dm_digtable->cur_cck_cca_thres != cur_cck_cca_thresh)
2603*4882a593Smuzhiyun 		rtl_write_byte(rtlpriv, ODM_REG_CCK_CCA_11AC,
2604*4882a593Smuzhiyun 			       cur_cck_cca_thresh);
2605*4882a593Smuzhiyun 
2606*4882a593Smuzhiyun 	dm_digtable->pre_cck_cca_thres = dm_digtable->cur_cck_cca_thres;
2607*4882a593Smuzhiyun 	dm_digtable->cur_cck_cca_thres = cur_cck_cca_thresh;
2608*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_TRACE,
2609*4882a593Smuzhiyun 		"CCK cca thresh hold =%x\n", dm_digtable->cur_cck_cca_thres);
2610*4882a593Smuzhiyun }
2611*4882a593Smuzhiyun 
rtl8821ae_dm_dynamic_atc_switch(struct ieee80211_hw * hw)2612*4882a593Smuzhiyun static void rtl8821ae_dm_dynamic_atc_switch(struct ieee80211_hw *hw)
2613*4882a593Smuzhiyun {
2614*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2615*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
2616*4882a593Smuzhiyun 	u8 crystal_cap;
2617*4882a593Smuzhiyun 	u32 packet_count;
2618*4882a593Smuzhiyun 	int cfo_khz_a, cfo_khz_b, cfo_ave = 0, adjust_xtal = 0;
2619*4882a593Smuzhiyun 	int cfo_ave_diff;
2620*4882a593Smuzhiyun 
2621*4882a593Smuzhiyun 	if (rtlpriv->mac80211.link_state < MAC80211_LINKED) {
2622*4882a593Smuzhiyun 		/*1.Enable ATC*/
2623*4882a593Smuzhiyun 		if (rtldm->atc_status == ATC_STATUS_OFF) {
2624*4882a593Smuzhiyun 			rtl_set_bbreg(hw, RFC_AREA, BIT(14), ATC_STATUS_ON);
2625*4882a593Smuzhiyun 			rtldm->atc_status = ATC_STATUS_ON;
2626*4882a593Smuzhiyun 		}
2627*4882a593Smuzhiyun 
2628*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "No link!!\n");
2629*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2630*4882a593Smuzhiyun 			"atc_status = %d\n", rtldm->atc_status);
2631*4882a593Smuzhiyun 
2632*4882a593Smuzhiyun 		if (rtldm->crystal_cap != rtlpriv->efuse.crystalcap) {
2633*4882a593Smuzhiyun 			rtldm->crystal_cap = rtlpriv->efuse.crystalcap;
2634*4882a593Smuzhiyun 			crystal_cap = rtldm->crystal_cap & 0x3f;
2635*4882a593Smuzhiyun 			crystal_cap = crystal_cap & 0x3f;
2636*4882a593Smuzhiyun 			if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE)
2637*4882a593Smuzhiyun 				rtl_set_bbreg(hw, REG_MAC_PHY_CTRL,
2638*4882a593Smuzhiyun 					      0x7ff80000, (crystal_cap |
2639*4882a593Smuzhiyun 					      (crystal_cap << 6)));
2640*4882a593Smuzhiyun 			else
2641*4882a593Smuzhiyun 				rtl_set_bbreg(hw, REG_MAC_PHY_CTRL,
2642*4882a593Smuzhiyun 					      0xfff000, (crystal_cap |
2643*4882a593Smuzhiyun 					      (crystal_cap << 6)));
2644*4882a593Smuzhiyun 		}
2645*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD, "crystal_cap = 0x%x\n",
2646*4882a593Smuzhiyun 			rtldm->crystal_cap);
2647*4882a593Smuzhiyun 	} else{
2648*4882a593Smuzhiyun 		/*1. Calculate CFO for path-A & path-B*/
2649*4882a593Smuzhiyun 		cfo_khz_a = (int)(rtldm->cfo_tail[0] * 3125) / 1280;
2650*4882a593Smuzhiyun 		cfo_khz_b = (int)(rtldm->cfo_tail[1] * 3125) / 1280;
2651*4882a593Smuzhiyun 		packet_count = rtldm->packet_count;
2652*4882a593Smuzhiyun 
2653*4882a593Smuzhiyun 		/*2.No new packet*/
2654*4882a593Smuzhiyun 		if (packet_count == rtldm->packet_count_pre) {
2655*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2656*4882a593Smuzhiyun 				"packet counter doesn't change\n");
2657*4882a593Smuzhiyun 			return;
2658*4882a593Smuzhiyun 		}
2659*4882a593Smuzhiyun 
2660*4882a593Smuzhiyun 		rtldm->packet_count_pre = packet_count;
2661*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2662*4882a593Smuzhiyun 			"packet counter = %d\n",
2663*4882a593Smuzhiyun 			rtldm->packet_count);
2664*4882a593Smuzhiyun 
2665*4882a593Smuzhiyun 		/*3.Average CFO*/
2666*4882a593Smuzhiyun 		if (rtlpriv->phy.rf_type == RF_1T1R)
2667*4882a593Smuzhiyun 			cfo_ave = cfo_khz_a;
2668*4882a593Smuzhiyun 		else
2669*4882a593Smuzhiyun 			cfo_ave = (cfo_khz_a + cfo_khz_b) >> 1;
2670*4882a593Smuzhiyun 
2671*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2672*4882a593Smuzhiyun 			"cfo_khz_a = %dkHz, cfo_khz_b = %dkHz, cfo_ave = %dkHz\n",
2673*4882a593Smuzhiyun 			cfo_khz_a, cfo_khz_b, cfo_ave);
2674*4882a593Smuzhiyun 
2675*4882a593Smuzhiyun 		/*4.Avoid abnormal large CFO*/
2676*4882a593Smuzhiyun 		cfo_ave_diff = (rtldm->cfo_ave_pre >= cfo_ave) ?
2677*4882a593Smuzhiyun 						(rtldm->cfo_ave_pre - cfo_ave) :
2678*4882a593Smuzhiyun 						(cfo_ave - rtldm->cfo_ave_pre);
2679*4882a593Smuzhiyun 
2680*4882a593Smuzhiyun 		if (cfo_ave_diff > 20 && !rtldm->large_cfo_hit) {
2681*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2682*4882a593Smuzhiyun 				"first large CFO hit\n");
2683*4882a593Smuzhiyun 			rtldm->large_cfo_hit = true;
2684*4882a593Smuzhiyun 			return;
2685*4882a593Smuzhiyun 		} else
2686*4882a593Smuzhiyun 			rtldm->large_cfo_hit = false;
2687*4882a593Smuzhiyun 
2688*4882a593Smuzhiyun 		rtldm->cfo_ave_pre = cfo_ave;
2689*4882a593Smuzhiyun 
2690*4882a593Smuzhiyun 		/*CFO tracking by adjusting Xtal cap.*/
2691*4882a593Smuzhiyun 
2692*4882a593Smuzhiyun 		/*1.Dynamic Xtal threshold*/
2693*4882a593Smuzhiyun 		if (cfo_ave >= -rtldm->cfo_threshold &&
2694*4882a593Smuzhiyun 			cfo_ave <= rtldm->cfo_threshold &&
2695*4882a593Smuzhiyun 			rtldm->is_freeze == 0) {
2696*4882a593Smuzhiyun 			if (rtldm->cfo_threshold == CFO_THRESHOLD_XTAL) {
2697*4882a593Smuzhiyun 				rtldm->cfo_threshold = CFO_THRESHOLD_XTAL + 10;
2698*4882a593Smuzhiyun 				rtldm->is_freeze = 1;
2699*4882a593Smuzhiyun 			} else {
2700*4882a593Smuzhiyun 				rtldm->cfo_threshold = CFO_THRESHOLD_XTAL;
2701*4882a593Smuzhiyun 			}
2702*4882a593Smuzhiyun 		}
2703*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2704*4882a593Smuzhiyun 			"Dynamic threshold = %d\n",
2705*4882a593Smuzhiyun 			rtldm->cfo_threshold);
2706*4882a593Smuzhiyun 
2707*4882a593Smuzhiyun 		/* 2.Calculate Xtal offset*/
2708*4882a593Smuzhiyun 		if (cfo_ave > rtldm->cfo_threshold && rtldm->crystal_cap < 0x3f)
2709*4882a593Smuzhiyun 			adjust_xtal = ((cfo_ave - CFO_THRESHOLD_XTAL) >> 2) + 1;
2710*4882a593Smuzhiyun 		else if ((cfo_ave < -rtlpriv->dm.cfo_threshold) &&
2711*4882a593Smuzhiyun 			 rtlpriv->dm.crystal_cap > 0)
2712*4882a593Smuzhiyun 			adjust_xtal = ((cfo_ave + CFO_THRESHOLD_XTAL) >> 2) - 1;
2713*4882a593Smuzhiyun 		rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2714*4882a593Smuzhiyun 			"Crystal cap = 0x%x, Crystal cap offset = %d\n",
2715*4882a593Smuzhiyun 			rtldm->crystal_cap, adjust_xtal);
2716*4882a593Smuzhiyun 
2717*4882a593Smuzhiyun 		/*3.Adjudt Crystal Cap.*/
2718*4882a593Smuzhiyun 		if (adjust_xtal != 0) {
2719*4882a593Smuzhiyun 			rtldm->is_freeze = 0;
2720*4882a593Smuzhiyun 			rtldm->crystal_cap += adjust_xtal;
2721*4882a593Smuzhiyun 
2722*4882a593Smuzhiyun 			if (rtldm->crystal_cap > 0x3f)
2723*4882a593Smuzhiyun 				rtldm->crystal_cap = 0x3f;
2724*4882a593Smuzhiyun 			else if (rtldm->crystal_cap < 0)
2725*4882a593Smuzhiyun 				rtldm->crystal_cap = 0;
2726*4882a593Smuzhiyun 
2727*4882a593Smuzhiyun 			crystal_cap = rtldm->crystal_cap & 0x3f;
2728*4882a593Smuzhiyun 			crystal_cap = crystal_cap & 0x3f;
2729*4882a593Smuzhiyun 			if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE)
2730*4882a593Smuzhiyun 				rtl_set_bbreg(hw, REG_MAC_PHY_CTRL,
2731*4882a593Smuzhiyun 					      0x7ff80000, (crystal_cap |
2732*4882a593Smuzhiyun 					      (crystal_cap << 6)));
2733*4882a593Smuzhiyun 			else
2734*4882a593Smuzhiyun 				rtl_set_bbreg(hw, REG_MAC_PHY_CTRL,
2735*4882a593Smuzhiyun 					      0xfff000, (crystal_cap |
2736*4882a593Smuzhiyun 					      (crystal_cap << 6)));
2737*4882a593Smuzhiyun 			rtl_dbg(rtlpriv, COMP_DIG, DBG_LOUD,
2738*4882a593Smuzhiyun 				"New crystal cap = 0x%x\n",
2739*4882a593Smuzhiyun 				rtldm->crystal_cap);
2740*4882a593Smuzhiyun 		}
2741*4882a593Smuzhiyun 	}
2742*4882a593Smuzhiyun }
2743*4882a593Smuzhiyun 
rtl8821ae_dm_watchdog(struct ieee80211_hw * hw)2744*4882a593Smuzhiyun void rtl8821ae_dm_watchdog(struct ieee80211_hw *hw)
2745*4882a593Smuzhiyun {
2746*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
2747*4882a593Smuzhiyun 	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
2748*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
2749*4882a593Smuzhiyun 	bool fw_current_inpsmode = false;
2750*4882a593Smuzhiyun 	bool fw_ps_awake = true;
2751*4882a593Smuzhiyun 
2752*4882a593Smuzhiyun 	rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
2753*4882a593Smuzhiyun 				      (u8 *)(&fw_current_inpsmode));
2754*4882a593Smuzhiyun 
2755*4882a593Smuzhiyun 	rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
2756*4882a593Smuzhiyun 				      (u8 *)(&fw_ps_awake));
2757*4882a593Smuzhiyun 
2758*4882a593Smuzhiyun 	if (ppsc->p2p_ps_info.p2p_ps_mode)
2759*4882a593Smuzhiyun 		fw_ps_awake = false;
2760*4882a593Smuzhiyun 
2761*4882a593Smuzhiyun 	spin_lock(&rtlpriv->locks.rf_ps_lock);
2762*4882a593Smuzhiyun 	if ((ppsc->rfpwr_state == ERFON) &&
2763*4882a593Smuzhiyun 	    ((!fw_current_inpsmode) && fw_ps_awake) &&
2764*4882a593Smuzhiyun 	    (!ppsc->rfchange_inprogress)) {
2765*4882a593Smuzhiyun 		rtl8821ae_dm_common_info_self_update(hw);
2766*4882a593Smuzhiyun 		rtl8821ae_dm_false_alarm_counter_statistics(hw);
2767*4882a593Smuzhiyun 		rtl8821ae_dm_check_rssi_monitor(hw);
2768*4882a593Smuzhiyun 		rtl8821ae_dm_dig(hw);
2769*4882a593Smuzhiyun 		rtl8821ae_dm_cck_packet_detection_thresh(hw);
2770*4882a593Smuzhiyun 		rtl8821ae_dm_refresh_rate_adaptive_mask(hw);
2771*4882a593Smuzhiyun 		rtl8821ae_dm_refresh_basic_rate_mask(hw);
2772*4882a593Smuzhiyun 		rtl8821ae_dm_check_edca_turbo(hw);
2773*4882a593Smuzhiyun 		rtl8821ae_dm_dynamic_atc_switch(hw);
2774*4882a593Smuzhiyun 		if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE)
2775*4882a593Smuzhiyun 			rtl8812ae_dm_check_txpower_tracking_thermalmeter(hw);
2776*4882a593Smuzhiyun 		else
2777*4882a593Smuzhiyun 			rtl8821ae_dm_check_txpower_tracking_thermalmeter(hw);
2778*4882a593Smuzhiyun 		rtl8821ae_dm_iq_calibrate(hw);
2779*4882a593Smuzhiyun 	}
2780*4882a593Smuzhiyun 	spin_unlock(&rtlpriv->locks.rf_ps_lock);
2781*4882a593Smuzhiyun 
2782*4882a593Smuzhiyun 	rtlpriv->dm.dbginfo.num_qry_beacon_pkt = 0;
2783*4882a593Smuzhiyun 	rtl_dbg(rtlpriv, COMP_DIG, DBG_DMESG, "\n");
2784*4882a593Smuzhiyun }
2785*4882a593Smuzhiyun 
rtl8821ae_dm_set_tx_ant_by_tx_info(struct ieee80211_hw * hw,u8 * pdesc,u32 mac_id)2786*4882a593Smuzhiyun void rtl8821ae_dm_set_tx_ant_by_tx_info(struct ieee80211_hw *hw,
2787*4882a593Smuzhiyun 					u8 *pdesc, u32 mac_id)
2788*4882a593Smuzhiyun {
2789*4882a593Smuzhiyun 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
2790*4882a593Smuzhiyun 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
2791*4882a593Smuzhiyun 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
2792*4882a593Smuzhiyun 	struct fast_ant_training *pfat_table = &rtldm->fat_table;
2793*4882a593Smuzhiyun 	__le32 *pdesc32 = (__le32 *)pdesc;
2794*4882a593Smuzhiyun 
2795*4882a593Smuzhiyun 	if (rtlhal->hw_type != HARDWARE_TYPE_RTL8812AE)
2796*4882a593Smuzhiyun 		return;
2797*4882a593Smuzhiyun 
2798*4882a593Smuzhiyun 	if (rtlefuse->antenna_div_type == CG_TRX_HW_ANTDIV)
2799*4882a593Smuzhiyun 		set_tx_desc_tx_ant(pdesc32, pfat_table->antsel_a[mac_id]);
2800*4882a593Smuzhiyun }
2801