1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 2009-2014 Realtek Corporation.*/
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #include "../wifi.h"
5*4882a593Smuzhiyun #include "../pci.h"
6*4882a593Smuzhiyun #include "../base.h"
7*4882a593Smuzhiyun #include "../stats.h"
8*4882a593Smuzhiyun #include "reg.h"
9*4882a593Smuzhiyun #include "def.h"
10*4882a593Smuzhiyun #include "phy.h"
11*4882a593Smuzhiyun #include "trx.h"
12*4882a593Smuzhiyun #include "led.h"
13*4882a593Smuzhiyun #include "dm.h"
14*4882a593Smuzhiyun #include "fw.h"
15*4882a593Smuzhiyun
_rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff * skb,u8 hw_queue)16*4882a593Smuzhiyun static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun __le16 fc = rtl_get_fc(skb);
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun if (unlikely(ieee80211_is_beacon(fc)))
21*4882a593Smuzhiyun return QSLT_BEACON;
22*4882a593Smuzhiyun if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
23*4882a593Smuzhiyun return QSLT_MGNT;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun return skb->priority;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
_rtl8723be_query_rxphystatus(struct ieee80211_hw * hw,struct rtl_stats * pstatus,__le32 * pdesc,struct rx_fwinfo_8723be * p_drvinfo,bool bpacket_match_bssid,bool bpacket_toself,bool packet_beacon)28*4882a593Smuzhiyun static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
29*4882a593Smuzhiyun struct rtl_stats *pstatus,
30*4882a593Smuzhiyun __le32 *pdesc,
31*4882a593Smuzhiyun struct rx_fwinfo_8723be *p_drvinfo,
32*4882a593Smuzhiyun bool bpacket_match_bssid,
33*4882a593Smuzhiyun bool bpacket_toself,
34*4882a593Smuzhiyun bool packet_beacon)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
37*4882a593Smuzhiyun struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
38*4882a593Smuzhiyun s8 rx_pwr_all = 0, rx_pwr[4];
39*4882a593Smuzhiyun u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;
40*4882a593Smuzhiyun u8 i, max_spatial_stream;
41*4882a593Smuzhiyun u32 rssi, total_rssi = 0;
42*4882a593Smuzhiyun bool is_cck = pstatus->is_cck;
43*4882a593Smuzhiyun u8 lan_idx, vga_idx;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* Record it for next packet processing */
46*4882a593Smuzhiyun pstatus->packet_matchbssid = bpacket_match_bssid;
47*4882a593Smuzhiyun pstatus->packet_toself = bpacket_toself;
48*4882a593Smuzhiyun pstatus->packet_beacon = packet_beacon;
49*4882a593Smuzhiyun pstatus->rx_mimo_signalquality[0] = -1;
50*4882a593Smuzhiyun pstatus->rx_mimo_signalquality[1] = -1;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun if (is_cck) {
53*4882a593Smuzhiyun u8 cck_highpwr;
54*4882a593Smuzhiyun u8 cck_agc_rpt;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* (1)Hardware does not provide RSSI for CCK */
59*4882a593Smuzhiyun /* (2)PWDB, Average PWDB cacluated by
60*4882a593Smuzhiyun * hardware (for rate adaptive)
61*4882a593Smuzhiyun */
62*4882a593Smuzhiyun cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
63*4882a593Smuzhiyun BIT(9));
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
66*4882a593Smuzhiyun vga_idx = (cck_agc_rpt & 0x1f);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun switch (lan_idx) {
69*4882a593Smuzhiyun /* 46 53 73 95 201301231630 */
70*4882a593Smuzhiyun /* 46 53 77 99 201301241630 */
71*4882a593Smuzhiyun case 6:
72*4882a593Smuzhiyun rx_pwr_all = -34 - (2 * vga_idx);
73*4882a593Smuzhiyun break;
74*4882a593Smuzhiyun case 4:
75*4882a593Smuzhiyun rx_pwr_all = -14 - (2 * vga_idx);
76*4882a593Smuzhiyun break;
77*4882a593Smuzhiyun case 1:
78*4882a593Smuzhiyun rx_pwr_all = 6 - (2 * vga_idx);
79*4882a593Smuzhiyun break;
80*4882a593Smuzhiyun case 0:
81*4882a593Smuzhiyun rx_pwr_all = 16 - (2 * vga_idx);
82*4882a593Smuzhiyun break;
83*4882a593Smuzhiyun default:
84*4882a593Smuzhiyun break;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
88*4882a593Smuzhiyun if (pwdb_all > 100)
89*4882a593Smuzhiyun pwdb_all = 100;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun pstatus->rx_pwdb_all = pwdb_all;
92*4882a593Smuzhiyun pstatus->bt_rx_rssi_percentage = pwdb_all;
93*4882a593Smuzhiyun pstatus->recvsignalpower = rx_pwr_all;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /* (3) Get Signal Quality (EVM) */
96*4882a593Smuzhiyun if (bpacket_match_bssid) {
97*4882a593Smuzhiyun u8 sq, sq_rpt;
98*4882a593Smuzhiyun if (pstatus->rx_pwdb_all > 40) {
99*4882a593Smuzhiyun sq = 100;
100*4882a593Smuzhiyun } else {
101*4882a593Smuzhiyun sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
102*4882a593Smuzhiyun if (sq_rpt > 64)
103*4882a593Smuzhiyun sq = 0;
104*4882a593Smuzhiyun else if (sq_rpt < 20)
105*4882a593Smuzhiyun sq = 100;
106*4882a593Smuzhiyun else
107*4882a593Smuzhiyun sq = ((64 - sq_rpt) * 100) / 44;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun pstatus->signalquality = sq;
110*4882a593Smuzhiyun pstatus->rx_mimo_signalquality[0] = sq;
111*4882a593Smuzhiyun pstatus->rx_mimo_signalquality[1] = -1;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun } else {
114*4882a593Smuzhiyun /* (1)Get RSSI for HT rate */
115*4882a593Smuzhiyun for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
116*4882a593Smuzhiyun /* we will judge RF RX path now. */
117*4882a593Smuzhiyun if (rtlpriv->dm.rfpath_rxenable[i])
118*4882a593Smuzhiyun rf_rx_num++;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
121*4882a593Smuzhiyun - 110;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun pstatus->rx_pwr[i] = rx_pwr[i];
124*4882a593Smuzhiyun /* Translate DBM to percentage. */
125*4882a593Smuzhiyun rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
126*4882a593Smuzhiyun total_rssi += rssi;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /* (2)PWDB, Average PWDB cacluated by
132*4882a593Smuzhiyun * hardware (for rate adaptive)
133*4882a593Smuzhiyun */
134*4882a593Smuzhiyun rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
135*4882a593Smuzhiyun 0x7f) - 110;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
138*4882a593Smuzhiyun pwdb_all_bt = pwdb_all;
139*4882a593Smuzhiyun pstatus->rx_pwdb_all = pwdb_all;
140*4882a593Smuzhiyun pstatus->bt_rx_rssi_percentage = pwdb_all_bt;
141*4882a593Smuzhiyun pstatus->rxpower = rx_pwr_all;
142*4882a593Smuzhiyun pstatus->recvsignalpower = rx_pwr_all;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* (3)EVM of HT rate */
145*4882a593Smuzhiyun if (pstatus->rate >= DESC92C_RATEMCS8 &&
146*4882a593Smuzhiyun pstatus->rate <= DESC92C_RATEMCS15)
147*4882a593Smuzhiyun max_spatial_stream = 2;
148*4882a593Smuzhiyun else
149*4882a593Smuzhiyun max_spatial_stream = 1;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun for (i = 0; i < max_spatial_stream; i++) {
152*4882a593Smuzhiyun evm = rtl_evm_db_to_percentage(
153*4882a593Smuzhiyun p_phystrpt->stream_rxevm[i]);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if (bpacket_match_bssid) {
156*4882a593Smuzhiyun /* Fill value in RFD, Get the first
157*4882a593Smuzhiyun * spatial stream only
158*4882a593Smuzhiyun */
159*4882a593Smuzhiyun if (i == 0)
160*4882a593Smuzhiyun pstatus->signalquality =
161*4882a593Smuzhiyun (u8)(evm & 0xff);
162*4882a593Smuzhiyun pstatus->rx_mimo_signalquality[i] =
163*4882a593Smuzhiyun (u8)(evm & 0xff);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun if (bpacket_match_bssid) {
168*4882a593Smuzhiyun for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
169*4882a593Smuzhiyun rtl_priv(hw)->dm.cfo_tail[i] =
170*4882a593Smuzhiyun (int)p_phystrpt->path_cfotail[i];
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
173*4882a593Smuzhiyun rtl_priv(hw)->dm.packet_count = 0;
174*4882a593Smuzhiyun else
175*4882a593Smuzhiyun rtl_priv(hw)->dm.packet_count++;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* UI BSS List signal strength(in percentage),
180*4882a593Smuzhiyun * make it good looking, from 0~100.
181*4882a593Smuzhiyun */
182*4882a593Smuzhiyun if (is_cck)
183*4882a593Smuzhiyun pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
184*4882a593Smuzhiyun pwdb_all));
185*4882a593Smuzhiyun else if (rf_rx_num != 0)
186*4882a593Smuzhiyun pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
187*4882a593Smuzhiyun total_rssi /= rf_rx_num));
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
_rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw * hw,struct sk_buff * skb,struct rtl_stats * pstatus,__le32 * pdesc,struct rx_fwinfo_8723be * p_drvinfo)190*4882a593Smuzhiyun static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
191*4882a593Smuzhiyun struct sk_buff *skb,
192*4882a593Smuzhiyun struct rtl_stats *pstatus,
193*4882a593Smuzhiyun __le32 *pdesc,
194*4882a593Smuzhiyun struct rx_fwinfo_8723be *p_drvinfo)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
197*4882a593Smuzhiyun struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
198*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
199*4882a593Smuzhiyun u8 *tmp_buf;
200*4882a593Smuzhiyun u8 *praddr;
201*4882a593Smuzhiyun u8 *psaddr;
202*4882a593Smuzhiyun u16 fc, type;
203*4882a593Smuzhiyun bool packet_matchbssid, packet_toself, packet_beacon;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)tmp_buf;
208*4882a593Smuzhiyun fc = le16_to_cpu(hdr->frame_control);
209*4882a593Smuzhiyun type = WLAN_FC_GET_TYPE(hdr->frame_control);
210*4882a593Smuzhiyun praddr = hdr->addr1;
211*4882a593Smuzhiyun psaddr = ieee80211_get_SA(hdr);
212*4882a593Smuzhiyun memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
215*4882a593Smuzhiyun (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
216*4882a593Smuzhiyun hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
217*4882a593Smuzhiyun hdr->addr2 : hdr->addr3)) &&
218*4882a593Smuzhiyun (!pstatus->hwerror) &&
219*4882a593Smuzhiyun (!pstatus->crc) && (!pstatus->icv));
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun packet_toself = packet_matchbssid &&
222*4882a593Smuzhiyun (ether_addr_equal(praddr, rtlefuse->dev_addr));
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /* YP: packet_beacon is not initialized,
225*4882a593Smuzhiyun * this assignment is neccesary,
226*4882a593Smuzhiyun * otherwise it counld be true in this case
227*4882a593Smuzhiyun * the situation is much worse in Kernel 3.10
228*4882a593Smuzhiyun */
229*4882a593Smuzhiyun if (ieee80211_is_beacon(hdr->frame_control))
230*4882a593Smuzhiyun packet_beacon = true;
231*4882a593Smuzhiyun else
232*4882a593Smuzhiyun packet_beacon = false;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun if (packet_beacon && packet_matchbssid)
235*4882a593Smuzhiyun rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
238*4882a593Smuzhiyun packet_matchbssid,
239*4882a593Smuzhiyun packet_toself,
240*4882a593Smuzhiyun packet_beacon);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun rtl_process_phyinfo(hw, tmp_buf, pstatus);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
_rtl8723be_insert_emcontent(struct rtl_tcb_desc * ptcb_desc,__le32 * virtualaddress)245*4882a593Smuzhiyun static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
246*4882a593Smuzhiyun __le32 *virtualaddress)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun u32 dwtmp = 0;
249*4882a593Smuzhiyun memset(virtualaddress, 0, 8);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
252*4882a593Smuzhiyun if (ptcb_desc->empkt_num == 1) {
253*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[0];
254*4882a593Smuzhiyun } else {
255*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[0];
256*4882a593Smuzhiyun dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
257*4882a593Smuzhiyun dwtmp += ptcb_desc->empkt_len[1];
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun set_earlymode_len0(virtualaddress, dwtmp);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun if (ptcb_desc->empkt_num <= 3) {
262*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[2];
263*4882a593Smuzhiyun } else {
264*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[2];
265*4882a593Smuzhiyun dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
266*4882a593Smuzhiyun dwtmp += ptcb_desc->empkt_len[3];
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun set_earlymode_len1(virtualaddress, dwtmp);
269*4882a593Smuzhiyun if (ptcb_desc->empkt_num <= 5) {
270*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[4];
271*4882a593Smuzhiyun } else {
272*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[4];
273*4882a593Smuzhiyun dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
274*4882a593Smuzhiyun dwtmp += ptcb_desc->empkt_len[5];
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
277*4882a593Smuzhiyun set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
278*4882a593Smuzhiyun if (ptcb_desc->empkt_num <= 7) {
279*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[6];
280*4882a593Smuzhiyun } else {
281*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[6];
282*4882a593Smuzhiyun dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
283*4882a593Smuzhiyun dwtmp += ptcb_desc->empkt_len[7];
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun set_earlymode_len3(virtualaddress, dwtmp);
286*4882a593Smuzhiyun if (ptcb_desc->empkt_num <= 9) {
287*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[8];
288*4882a593Smuzhiyun } else {
289*4882a593Smuzhiyun dwtmp = ptcb_desc->empkt_len[8];
290*4882a593Smuzhiyun dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
291*4882a593Smuzhiyun dwtmp += ptcb_desc->empkt_len[9];
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun set_earlymode_len4(virtualaddress, dwtmp);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
rtl8723be_rx_query_desc(struct ieee80211_hw * hw,struct rtl_stats * status,struct ieee80211_rx_status * rx_status,u8 * pdesc8,struct sk_buff * skb)296*4882a593Smuzhiyun bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
297*4882a593Smuzhiyun struct rtl_stats *status,
298*4882a593Smuzhiyun struct ieee80211_rx_status *rx_status,
299*4882a593Smuzhiyun u8 *pdesc8, struct sk_buff *skb)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
302*4882a593Smuzhiyun struct rx_fwinfo_8723be *p_drvinfo;
303*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
304*4882a593Smuzhiyun u8 wake_match;
305*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
306*4882a593Smuzhiyun u32 phystatus = get_rx_desc_physt(pdesc);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun status->length = (u16)get_rx_desc_pkt_len(pdesc);
309*4882a593Smuzhiyun status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
310*4882a593Smuzhiyun RX_DRV_INFO_SIZE_UNIT;
311*4882a593Smuzhiyun status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
312*4882a593Smuzhiyun status->icv = (u16)get_rx_desc_icv(pdesc);
313*4882a593Smuzhiyun status->crc = (u16)get_rx_desc_crc32(pdesc);
314*4882a593Smuzhiyun status->hwerror = (status->crc | status->icv);
315*4882a593Smuzhiyun status->decrypted = !get_rx_desc_swdec(pdesc);
316*4882a593Smuzhiyun status->rate = (u8)get_rx_desc_rxmcs(pdesc);
317*4882a593Smuzhiyun status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
318*4882a593Smuzhiyun status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
319*4882a593Smuzhiyun status->isfirst_ampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
320*4882a593Smuzhiyun status->timestamp_low = get_rx_desc_tsfl(pdesc);
321*4882a593Smuzhiyun status->rx_is40mhzpacket = (bool)get_rx_desc_bw(pdesc);
322*4882a593Smuzhiyun status->bandwidth = (u8)get_rx_desc_bw(pdesc);
323*4882a593Smuzhiyun status->macid = get_rx_desc_macid(pdesc);
324*4882a593Smuzhiyun status->is_ht = (bool)get_rx_desc_rxht(pdesc);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun if (get_rx_status_desc_rpt_sel(pdesc))
329*4882a593Smuzhiyun status->packet_report_type = C2H_PACKET;
330*4882a593Smuzhiyun else
331*4882a593Smuzhiyun status->packet_report_type = NORMAL_RX;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun if (get_rx_status_desc_pattern_match(pdesc))
335*4882a593Smuzhiyun wake_match = BIT(2);
336*4882a593Smuzhiyun else if (get_rx_status_desc_magic_match(pdesc))
337*4882a593Smuzhiyun wake_match = BIT(1);
338*4882a593Smuzhiyun else if (get_rx_status_desc_unicast_match(pdesc))
339*4882a593Smuzhiyun wake_match = BIT(0);
340*4882a593Smuzhiyun else
341*4882a593Smuzhiyun wake_match = 0;
342*4882a593Smuzhiyun if (wake_match)
343*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
344*4882a593Smuzhiyun "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
345*4882a593Smuzhiyun wake_match);
346*4882a593Smuzhiyun rx_status->freq = hw->conf.chandef.chan->center_freq;
347*4882a593Smuzhiyun rx_status->band = hw->conf.chandef.chan->band;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
350*4882a593Smuzhiyun status->rx_bufshift);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun if (status->crc)
353*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun if (status->rx_is40mhzpacket)
356*4882a593Smuzhiyun rx_status->bw = RATE_INFO_BW_40;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun if (status->is_ht)
359*4882a593Smuzhiyun rx_status->encoding = RX_ENC_HT;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_MACTIME_START;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /* hw will set status->decrypted true, if it finds the
364*4882a593Smuzhiyun * frame is open data frame or mgmt frame.
365*4882a593Smuzhiyun * So hw will not decryption robust managment frame
366*4882a593Smuzhiyun * for IEEE80211w but still set status->decrypted
367*4882a593Smuzhiyun * true, so here we should set it back to undecrypted
368*4882a593Smuzhiyun * for IEEE80211w frame, and mac80211 sw will help
369*4882a593Smuzhiyun * to decrypt it
370*4882a593Smuzhiyun */
371*4882a593Smuzhiyun if (status->decrypted) {
372*4882a593Smuzhiyun if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
373*4882a593Smuzhiyun (ieee80211_has_protected(hdr->frame_control)))
374*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_DECRYPTED;
375*4882a593Smuzhiyun else
376*4882a593Smuzhiyun rx_status->flag &= ~RX_FLAG_DECRYPTED;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun /* rate_idx: index of data rate into band's
380*4882a593Smuzhiyun * supported rates or MCS index if HT rates
381*4882a593Smuzhiyun * are use (RX_FLAG_HT)
382*4882a593Smuzhiyun */
383*4882a593Smuzhiyun rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
384*4882a593Smuzhiyun false, status->rate);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun rx_status->mactime = status->timestamp_low;
387*4882a593Smuzhiyun if (phystatus) {
388*4882a593Smuzhiyun p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
389*4882a593Smuzhiyun status->rx_bufshift);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun _rtl8723be_translate_rx_signal_stuff(hw, skb, status,
392*4882a593Smuzhiyun pdesc, p_drvinfo);
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun rx_status->signal = status->recvsignalpower + 10;
395*4882a593Smuzhiyun if (status->packet_report_type == TX_REPORT2) {
396*4882a593Smuzhiyun status->macid_valid_entry[0] =
397*4882a593Smuzhiyun get_rx_rpt2_desc_macid_valid_1(pdesc);
398*4882a593Smuzhiyun status->macid_valid_entry[1] =
399*4882a593Smuzhiyun get_rx_rpt2_desc_macid_valid_2(pdesc);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun return true;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
rtl8723be_tx_fill_desc(struct ieee80211_hw * hw,struct ieee80211_hdr * hdr,u8 * pdesc8,u8 * txbd,struct ieee80211_tx_info * info,struct ieee80211_sta * sta,struct sk_buff * skb,u8 hw_queue,struct rtl_tcb_desc * ptcb_desc)404*4882a593Smuzhiyun void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
405*4882a593Smuzhiyun struct ieee80211_hdr *hdr, u8 *pdesc8,
406*4882a593Smuzhiyun u8 *txbd, struct ieee80211_tx_info *info,
407*4882a593Smuzhiyun struct ieee80211_sta *sta, struct sk_buff *skb,
408*4882a593Smuzhiyun u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
411*4882a593Smuzhiyun struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
412*4882a593Smuzhiyun struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
413*4882a593Smuzhiyun struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
414*4882a593Smuzhiyun struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
415*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
416*4882a593Smuzhiyun u16 seq_number;
417*4882a593Smuzhiyun __le16 fc = hdr->frame_control;
418*4882a593Smuzhiyun unsigned int buf_len = 0;
419*4882a593Smuzhiyun unsigned int skb_len = skb->len;
420*4882a593Smuzhiyun u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
421*4882a593Smuzhiyun bool firstseg = ((hdr->seq_ctrl &
422*4882a593Smuzhiyun cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
423*4882a593Smuzhiyun bool lastseg = ((hdr->frame_control &
424*4882a593Smuzhiyun cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
425*4882a593Smuzhiyun dma_addr_t mapping;
426*4882a593Smuzhiyun u8 bw_40 = 0;
427*4882a593Smuzhiyun u8 short_gi = 0;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun if (mac->opmode == NL80211_IFTYPE_STATION) {
430*4882a593Smuzhiyun bw_40 = mac->bw_40;
431*4882a593Smuzhiyun } else if (mac->opmode == NL80211_IFTYPE_AP ||
432*4882a593Smuzhiyun mac->opmode == NL80211_IFTYPE_ADHOC) {
433*4882a593Smuzhiyun if (sta)
434*4882a593Smuzhiyun bw_40 = sta->ht_cap.cap &
435*4882a593Smuzhiyun IEEE80211_HT_CAP_SUP_WIDTH_20_40;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
438*4882a593Smuzhiyun rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
439*4882a593Smuzhiyun /* reserve 8 byte for AMPDU early mode */
440*4882a593Smuzhiyun if (rtlhal->earlymode_enable) {
441*4882a593Smuzhiyun skb_push(skb, EM_HDR_LEN);
442*4882a593Smuzhiyun memset(skb->data, 0, EM_HDR_LEN);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun buf_len = skb->len;
445*4882a593Smuzhiyun mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,
446*4882a593Smuzhiyun DMA_TO_DEVICE);
447*4882a593Smuzhiyun if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
448*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error\n");
449*4882a593Smuzhiyun return;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_8723be));
452*4882a593Smuzhiyun if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
453*4882a593Smuzhiyun firstseg = true;
454*4882a593Smuzhiyun lastseg = true;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun if (firstseg) {
457*4882a593Smuzhiyun if (rtlhal->earlymode_enable) {
458*4882a593Smuzhiyun set_tx_desc_pkt_offset(pdesc, 1);
459*4882a593Smuzhiyun set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +
460*4882a593Smuzhiyun EM_HDR_LEN);
461*4882a593Smuzhiyun if (ptcb_desc->empkt_num) {
462*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
463*4882a593Smuzhiyun "Insert 8 byte.pTcb->EMPktNum:%d\n",
464*4882a593Smuzhiyun ptcb_desc->empkt_num);
465*4882a593Smuzhiyun _rtl8723be_insert_emcontent(ptcb_desc,
466*4882a593Smuzhiyun (__le32 *)(skb->data));
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun } else {
469*4882a593Smuzhiyun set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun /* ptcb_desc->use_driver_rate = true; */
474*4882a593Smuzhiyun set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
475*4882a593Smuzhiyun if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
476*4882a593Smuzhiyun short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
477*4882a593Smuzhiyun else
478*4882a593Smuzhiyun short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun set_tx_desc_data_shortgi(pdesc, short_gi);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun if (info->flags & IEEE80211_TX_CTL_AMPDU) {
483*4882a593Smuzhiyun set_tx_desc_agg_enable(pdesc, 1);
484*4882a593Smuzhiyun set_tx_desc_max_agg_num(pdesc, 0x14);
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun set_tx_desc_seq(pdesc, seq_number);
487*4882a593Smuzhiyun set_tx_desc_rts_enable(pdesc, ((ptcb_desc->rts_enable &&
488*4882a593Smuzhiyun !ptcb_desc->cts_enable) ?
489*4882a593Smuzhiyun 1 : 0));
490*4882a593Smuzhiyun set_tx_desc_hw_rts_enable(pdesc, 0);
491*4882a593Smuzhiyun set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ?
492*4882a593Smuzhiyun 1 : 0));
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
497*4882a593Smuzhiyun set_tx_desc_rts_short(pdesc,
498*4882a593Smuzhiyun ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
499*4882a593Smuzhiyun (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
500*4882a593Smuzhiyun (ptcb_desc->rts_use_shortgi ? 1 : 0)));
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun if (ptcb_desc->tx_enable_sw_calc_duration)
503*4882a593Smuzhiyun set_tx_desc_nav_use_hdr(pdesc, 1);
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun if (bw_40) {
506*4882a593Smuzhiyun if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
507*4882a593Smuzhiyun set_tx_desc_data_bw(pdesc, 1);
508*4882a593Smuzhiyun set_tx_desc_tx_sub_carrier(pdesc, 3);
509*4882a593Smuzhiyun } else {
510*4882a593Smuzhiyun set_tx_desc_data_bw(pdesc, 0);
511*4882a593Smuzhiyun set_tx_desc_tx_sub_carrier(pdesc, mac->cur_40_prime_sc);
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun } else {
514*4882a593Smuzhiyun set_tx_desc_data_bw(pdesc, 0);
515*4882a593Smuzhiyun set_tx_desc_tx_sub_carrier(pdesc, 0);
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun set_tx_desc_linip(pdesc, 0);
519*4882a593Smuzhiyun set_tx_desc_pkt_size(pdesc, (u16)skb_len);
520*4882a593Smuzhiyun if (sta) {
521*4882a593Smuzhiyun u8 ampdu_density = sta->ht_cap.ampdu_density;
522*4882a593Smuzhiyun set_tx_desc_ampdu_density(pdesc, ampdu_density);
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun if (info->control.hw_key) {
525*4882a593Smuzhiyun struct ieee80211_key_conf *keyconf =
526*4882a593Smuzhiyun info->control.hw_key;
527*4882a593Smuzhiyun switch (keyconf->cipher) {
528*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP40:
529*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP104:
530*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_TKIP:
531*4882a593Smuzhiyun set_tx_desc_sec_type(pdesc, 0x1);
532*4882a593Smuzhiyun break;
533*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_CCMP:
534*4882a593Smuzhiyun set_tx_desc_sec_type(pdesc, 0x3);
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun default:
537*4882a593Smuzhiyun set_tx_desc_sec_type(pdesc, 0x0);
538*4882a593Smuzhiyun break;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun set_tx_desc_queue_sel(pdesc, fw_qsel);
543*4882a593Smuzhiyun set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
544*4882a593Smuzhiyun set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
545*4882a593Smuzhiyun set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?
546*4882a593Smuzhiyun 1 : 0);
547*4882a593Smuzhiyun set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun /* Set TxRate and RTSRate in TxDesc */
550*4882a593Smuzhiyun /* This prevent Tx initial rate of new-coming packets */
551*4882a593Smuzhiyun /* from being overwritten by retried packet rate.*/
552*4882a593Smuzhiyun if (ieee80211_is_data_qos(fc)) {
553*4882a593Smuzhiyun if (mac->rdg_en) {
554*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
555*4882a593Smuzhiyun "Enable RDG function.\n");
556*4882a593Smuzhiyun set_tx_desc_rdg_enable(pdesc, 1);
557*4882a593Smuzhiyun set_tx_desc_htc(pdesc, 1);
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun /* tx report */
561*4882a593Smuzhiyun rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
565*4882a593Smuzhiyun set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
566*4882a593Smuzhiyun set_tx_desc_tx_buffer_size(pdesc, (u16)buf_len);
567*4882a593Smuzhiyun set_tx_desc_tx_buffer_address(pdesc, mapping);
568*4882a593Smuzhiyun /* if (rtlpriv->dm.useramask) { */
569*4882a593Smuzhiyun if (1) {
570*4882a593Smuzhiyun set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
571*4882a593Smuzhiyun set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
572*4882a593Smuzhiyun } else {
573*4882a593Smuzhiyun set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
574*4882a593Smuzhiyun set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun if (!ieee80211_is_data_qos(fc)) {
577*4882a593Smuzhiyun set_tx_desc_hwseq_en(pdesc, 1);
578*4882a593Smuzhiyun set_tx_desc_hwseq_sel(pdesc, 0);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
581*4882a593Smuzhiyun if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
582*4882a593Smuzhiyun is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
583*4882a593Smuzhiyun set_tx_desc_bmc(pdesc, 1);
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun
rtl8723be_tx_fill_cmddesc(struct ieee80211_hw * hw,u8 * pdesc8,bool firstseg,bool lastseg,struct sk_buff * skb)589*4882a593Smuzhiyun void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc8,
590*4882a593Smuzhiyun bool firstseg, bool lastseg,
591*4882a593Smuzhiyun struct sk_buff *skb)
592*4882a593Smuzhiyun {
593*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
594*4882a593Smuzhiyun struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
595*4882a593Smuzhiyun u8 fw_queue = QSLT_BEACON;
596*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
599*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
602*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
603*4882a593Smuzhiyun "DMA mapping error\n");
604*4882a593Smuzhiyun return;
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun set_tx_desc_tx_rate(pdesc, DESC92C_RATE1M);
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun set_tx_desc_seq(pdesc, 0);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun set_tx_desc_linip(pdesc, 0);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun set_tx_desc_queue_sel(pdesc, fw_queue);
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun set_tx_desc_first_seg(pdesc, 1);
619*4882a593Smuzhiyun set_tx_desc_last_seg(pdesc, 1);
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun set_tx_desc_tx_buffer_address(pdesc, mapping);
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun set_tx_desc_rate_id(pdesc, 0);
626*4882a593Smuzhiyun set_tx_desc_macid(pdesc, 0);
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun set_tx_desc_own(pdesc, 1);
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun set_tx_desc_first_seg(pdesc, 1);
633*4882a593Smuzhiyun set_tx_desc_last_seg(pdesc, 1);
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun set_tx_desc_use_rate(pdesc, 1);
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
638*4882a593Smuzhiyun "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
rtl8723be_set_desc(struct ieee80211_hw * hw,u8 * pdesc8,bool istx,u8 desc_name,u8 * val)641*4882a593Smuzhiyun void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
642*4882a593Smuzhiyun bool istx, u8 desc_name, u8 *val)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun if (istx) {
647*4882a593Smuzhiyun switch (desc_name) {
648*4882a593Smuzhiyun case HW_DESC_OWN:
649*4882a593Smuzhiyun set_tx_desc_own(pdesc, 1);
650*4882a593Smuzhiyun break;
651*4882a593Smuzhiyun case HW_DESC_TX_NEXTDESC_ADDR:
652*4882a593Smuzhiyun set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
653*4882a593Smuzhiyun break;
654*4882a593Smuzhiyun default:
655*4882a593Smuzhiyun WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not processed\n",
656*4882a593Smuzhiyun desc_name);
657*4882a593Smuzhiyun break;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun } else {
660*4882a593Smuzhiyun switch (desc_name) {
661*4882a593Smuzhiyun case HW_DESC_RXOWN:
662*4882a593Smuzhiyun set_rx_desc_own(pdesc, 1);
663*4882a593Smuzhiyun break;
664*4882a593Smuzhiyun case HW_DESC_RXBUFF_ADDR:
665*4882a593Smuzhiyun set_rx_desc_buff_addr(pdesc, *(u32 *)val);
666*4882a593Smuzhiyun break;
667*4882a593Smuzhiyun case HW_DESC_RXPKT_LEN:
668*4882a593Smuzhiyun set_rx_desc_pkt_len(pdesc, *(u32 *)val);
669*4882a593Smuzhiyun break;
670*4882a593Smuzhiyun case HW_DESC_RXERO:
671*4882a593Smuzhiyun set_rx_desc_eor(pdesc, 1);
672*4882a593Smuzhiyun break;
673*4882a593Smuzhiyun default:
674*4882a593Smuzhiyun WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not process\n",
675*4882a593Smuzhiyun desc_name);
676*4882a593Smuzhiyun break;
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun
rtl8723be_get_desc(struct ieee80211_hw * hw,u8 * pdesc8,bool istx,u8 desc_name)681*4882a593Smuzhiyun u64 rtl8723be_get_desc(struct ieee80211_hw *hw,
682*4882a593Smuzhiyun u8 *pdesc8, bool istx, u8 desc_name)
683*4882a593Smuzhiyun {
684*4882a593Smuzhiyun u32 ret = 0;
685*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun if (istx) {
688*4882a593Smuzhiyun switch (desc_name) {
689*4882a593Smuzhiyun case HW_DESC_OWN:
690*4882a593Smuzhiyun ret = get_tx_desc_own(pdesc);
691*4882a593Smuzhiyun break;
692*4882a593Smuzhiyun case HW_DESC_TXBUFF_ADDR:
693*4882a593Smuzhiyun ret = get_tx_desc_tx_buffer_address(pdesc);
694*4882a593Smuzhiyun break;
695*4882a593Smuzhiyun default:
696*4882a593Smuzhiyun WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not process\n",
697*4882a593Smuzhiyun desc_name);
698*4882a593Smuzhiyun break;
699*4882a593Smuzhiyun }
700*4882a593Smuzhiyun } else {
701*4882a593Smuzhiyun switch (desc_name) {
702*4882a593Smuzhiyun case HW_DESC_OWN:
703*4882a593Smuzhiyun ret = get_rx_desc_own(pdesc);
704*4882a593Smuzhiyun break;
705*4882a593Smuzhiyun case HW_DESC_RXPKT_LEN:
706*4882a593Smuzhiyun ret = get_rx_desc_pkt_len(pdesc);
707*4882a593Smuzhiyun break;
708*4882a593Smuzhiyun case HW_DESC_RXBUFF_ADDR:
709*4882a593Smuzhiyun ret = get_rx_desc_buff_addr(pdesc);
710*4882a593Smuzhiyun break;
711*4882a593Smuzhiyun default:
712*4882a593Smuzhiyun WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not processed\n",
713*4882a593Smuzhiyun desc_name);
714*4882a593Smuzhiyun break;
715*4882a593Smuzhiyun }
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun return ret;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
rtl8723be_is_tx_desc_closed(struct ieee80211_hw * hw,u8 hw_queue,u16 index)720*4882a593Smuzhiyun bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
721*4882a593Smuzhiyun u8 hw_queue, u16 index)
722*4882a593Smuzhiyun {
723*4882a593Smuzhiyun struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
724*4882a593Smuzhiyun struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
725*4882a593Smuzhiyun u8 *entry = (u8 *)(&ring->desc[ring->idx]);
726*4882a593Smuzhiyun u8 own = (u8)rtl8723be_get_desc(hw, entry, true, HW_DESC_OWN);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun /*beacon packet will only use the first
729*4882a593Smuzhiyun *descriptor defautly,and the own may not
730*4882a593Smuzhiyun *be cleared by the hardware
731*4882a593Smuzhiyun */
732*4882a593Smuzhiyun if (own)
733*4882a593Smuzhiyun return false;
734*4882a593Smuzhiyun return true;
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun
rtl8723be_tx_polling(struct ieee80211_hw * hw,u8 hw_queue)737*4882a593Smuzhiyun void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
738*4882a593Smuzhiyun {
739*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
740*4882a593Smuzhiyun if (hw_queue == BEACON_QUEUE) {
741*4882a593Smuzhiyun rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
742*4882a593Smuzhiyun } else {
743*4882a593Smuzhiyun rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
744*4882a593Smuzhiyun BIT(0) << (hw_queue));
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun }
747