xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 2009-2014  Realtek Corporation.*/
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #include "../wifi.h"
5*4882a593Smuzhiyun #include "../core.h"
6*4882a593Smuzhiyun #include "../pci.h"
7*4882a593Smuzhiyun #include "reg.h"
8*4882a593Smuzhiyun #include "def.h"
9*4882a593Smuzhiyun #include "phy.h"
10*4882a593Smuzhiyun #include "../rtl8723com/phy_common.h"
11*4882a593Smuzhiyun #include "dm.h"
12*4882a593Smuzhiyun #include "../rtl8723com/dm_common.h"
13*4882a593Smuzhiyun #include "hw.h"
14*4882a593Smuzhiyun #include "fw.h"
15*4882a593Smuzhiyun #include "../rtl8723com/fw_common.h"
16*4882a593Smuzhiyun #include "trx.h"
17*4882a593Smuzhiyun #include "led.h"
18*4882a593Smuzhiyun #include "table.h"
19*4882a593Smuzhiyun #include "../btcoexist/rtl_btc.h"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <linux/vmalloc.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun 
rtl8723be_init_aspm_vars(struct ieee80211_hw * hw)24*4882a593Smuzhiyun static void rtl8723be_init_aspm_vars(struct ieee80211_hw *hw)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
27*4882a593Smuzhiyun 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	/*close ASPM for AMD defaultly */
30*4882a593Smuzhiyun 	rtlpci->const_amdpci_aspm = 0;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	/* ASPM PS mode.
33*4882a593Smuzhiyun 	 * 0 - Disable ASPM,
34*4882a593Smuzhiyun 	 * 1 - Enable ASPM without Clock Req,
35*4882a593Smuzhiyun 	 * 2 - Enable ASPM with Clock Req,
36*4882a593Smuzhiyun 	 * 3 - Alwyas Enable ASPM with Clock Req,
37*4882a593Smuzhiyun 	 * 4 - Always Enable ASPM without Clock Req.
38*4882a593Smuzhiyun 	 * set defult to RTL8192CE:3 RTL8192E:2
39*4882a593Smuzhiyun 	 */
40*4882a593Smuzhiyun 	rtlpci->const_pci_aspm = 3;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	/*Setting for PCI-E device */
43*4882a593Smuzhiyun 	rtlpci->const_devicepci_aspm_setting = 0x03;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	/*Setting for PCI-E bridge */
46*4882a593Smuzhiyun 	rtlpci->const_hostpci_aspm_setting = 0x02;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	/* In Hw/Sw Radio Off situation.
49*4882a593Smuzhiyun 	 * 0 - Default,
50*4882a593Smuzhiyun 	 * 1 - From ASPM setting without low Mac Pwr,
51*4882a593Smuzhiyun 	 * 2 - From ASPM setting with low Mac Pwr,
52*4882a593Smuzhiyun 	 * 3 - Bus D3
53*4882a593Smuzhiyun 	 * set default to RTL8192CE:0 RTL8192SE:2
54*4882a593Smuzhiyun 	 */
55*4882a593Smuzhiyun 	rtlpci->const_hwsw_rfoff_d3 = 0;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	/* This setting works for those device with
58*4882a593Smuzhiyun 	 * backdoor ASPM setting such as EPHY setting.
59*4882a593Smuzhiyun 	 * 0 - Not support ASPM,
60*4882a593Smuzhiyun 	 * 1 - Support ASPM,
61*4882a593Smuzhiyun 	 * 2 - According to chipset.
62*4882a593Smuzhiyun 	 */
63*4882a593Smuzhiyun 	rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
rtl8723be_init_sw_vars(struct ieee80211_hw * hw)66*4882a593Smuzhiyun static int rtl8723be_init_sw_vars(struct ieee80211_hw *hw)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun 	int err = 0;
69*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
70*4882a593Smuzhiyun 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
71*4882a593Smuzhiyun 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
72*4882a593Smuzhiyun 	char *fw_name = "rtlwifi/rtl8723befw_36.bin";
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	rtl8723be_bt_reg_init(hw);
75*4882a593Smuzhiyun 	rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer();
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	rtlpriv->dm.dm_initialgain_enable = true;
78*4882a593Smuzhiyun 	rtlpriv->dm.dm_flag = 0;
79*4882a593Smuzhiyun 	rtlpriv->dm.disable_framebursting = false;
80*4882a593Smuzhiyun 	rtlpriv->dm.thermalvalue = 0;
81*4882a593Smuzhiyun 	rtlpci->transmit_config = CFENDFORM | BIT(15) | BIT(24) | BIT(25);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	rtlpriv->phy.lck_inprogress = false;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	mac->ht_enable = true;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	/* compatible 5G band 88ce just 2.4G band & smsp */
88*4882a593Smuzhiyun 	rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
89*4882a593Smuzhiyun 	rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
90*4882a593Smuzhiyun 	rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	rtlpci->receive_config = (RCR_APPFCS		|
93*4882a593Smuzhiyun 				  RCR_APP_MIC		|
94*4882a593Smuzhiyun 				  RCR_APP_ICV		|
95*4882a593Smuzhiyun 				  RCR_APP_PHYST_RXFF	|
96*4882a593Smuzhiyun 				  RCR_HTC_LOC_CTRL	|
97*4882a593Smuzhiyun 				  RCR_AMF		|
98*4882a593Smuzhiyun 				  RCR_ACF		|
99*4882a593Smuzhiyun 				  RCR_ADF		|
100*4882a593Smuzhiyun 				  RCR_AICV		|
101*4882a593Smuzhiyun 				  RCR_AB		|
102*4882a593Smuzhiyun 				  RCR_AM		|
103*4882a593Smuzhiyun 				  RCR_APM		|
104*4882a593Smuzhiyun 				  0);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	rtlpci->irq_mask[0] = (u32) (IMR_PSTIMEOUT	|
107*4882a593Smuzhiyun 				     IMR_HSISR_IND_ON_INT	|
108*4882a593Smuzhiyun 				     IMR_C2HCMD		|
109*4882a593Smuzhiyun 				     IMR_HIGHDOK	|
110*4882a593Smuzhiyun 				     IMR_MGNTDOK	|
111*4882a593Smuzhiyun 				     IMR_BKDOK		|
112*4882a593Smuzhiyun 				     IMR_BEDOK		|
113*4882a593Smuzhiyun 				     IMR_VIDOK		|
114*4882a593Smuzhiyun 				     IMR_VODOK		|
115*4882a593Smuzhiyun 				     IMR_RDU		|
116*4882a593Smuzhiyun 				     IMR_ROK		|
117*4882a593Smuzhiyun 				     0);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	rtlpci->irq_mask[1] = (u32)(IMR_RXFOVW | 0);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	rtlpci->sys_irq_mask = (u32)(HSIMR_PDN_INT_EN	|
122*4882a593Smuzhiyun 				     HSIMR_RON_INT_EN	|
123*4882a593Smuzhiyun 				     0);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	/* for LPS & IPS */
126*4882a593Smuzhiyun 	rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
127*4882a593Smuzhiyun 	rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
128*4882a593Smuzhiyun 	rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
129*4882a593Smuzhiyun 	rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
130*4882a593Smuzhiyun 	if (rtlpriv->cfg->mod_params->disable_watchdog)
131*4882a593Smuzhiyun 		pr_info("watchdog disabled\n");
132*4882a593Smuzhiyun 	rtlpriv->psc.reg_fwctrl_lps = 2;
133*4882a593Smuzhiyun 	rtlpriv->psc.reg_max_lps_awakeintvl = 2;
134*4882a593Smuzhiyun 	/* for ASPM, you can close aspm through
135*4882a593Smuzhiyun 	 * set const_support_pciaspm = 0
136*4882a593Smuzhiyun 	 */
137*4882a593Smuzhiyun 	rtl8723be_init_aspm_vars(hw);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	if (rtlpriv->psc.reg_fwctrl_lps == 1)
140*4882a593Smuzhiyun 		rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
141*4882a593Smuzhiyun 	else if (rtlpriv->psc.reg_fwctrl_lps == 2)
142*4882a593Smuzhiyun 		rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
143*4882a593Smuzhiyun 	else if (rtlpriv->psc.reg_fwctrl_lps == 3)
144*4882a593Smuzhiyun 		rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	/*low power: Disable 32k */
147*4882a593Smuzhiyun 	rtlpriv->psc.low_power_enable = false;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	rtlpriv->rtlhal.earlymode_enable = false;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	/* for firmware buf */
152*4882a593Smuzhiyun 	rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
153*4882a593Smuzhiyun 	if (!rtlpriv->rtlhal.pfirmware) {
154*4882a593Smuzhiyun 		pr_err("Can't alloc buffer for fw.\n");
155*4882a593Smuzhiyun 		return 1;
156*4882a593Smuzhiyun 	}
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	rtlpriv->max_fw_size = 0x8000;
159*4882a593Smuzhiyun 	pr_info("Using firmware %s\n", fw_name);
160*4882a593Smuzhiyun 	err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
161*4882a593Smuzhiyun 				      rtlpriv->io.dev, GFP_KERNEL, hw,
162*4882a593Smuzhiyun 				      rtl_fw_cb);
163*4882a593Smuzhiyun 	if (err) {
164*4882a593Smuzhiyun 		pr_err("Failed to request firmware!\n");
165*4882a593Smuzhiyun 		vfree(rtlpriv->rtlhal.pfirmware);
166*4882a593Smuzhiyun 		rtlpriv->rtlhal.pfirmware = NULL;
167*4882a593Smuzhiyun 		return 1;
168*4882a593Smuzhiyun 	}
169*4882a593Smuzhiyun 	return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
rtl8723be_deinit_sw_vars(struct ieee80211_hw * hw)172*4882a593Smuzhiyun static void rtl8723be_deinit_sw_vars(struct ieee80211_hw *hw)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	struct rtl_priv *rtlpriv = rtl_priv(hw);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	if (rtlpriv->rtlhal.pfirmware) {
177*4882a593Smuzhiyun 		vfree(rtlpriv->rtlhal.pfirmware);
178*4882a593Smuzhiyun 		rtlpriv->rtlhal.pfirmware = NULL;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun /* get bt coexist status */
rtl8723be_get_btc_status(void)183*4882a593Smuzhiyun static bool rtl8723be_get_btc_status(void)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	return true;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun 
is_fw_header(struct rtlwifi_firmware_header * hdr)188*4882a593Smuzhiyun static bool is_fw_header(struct rtlwifi_firmware_header *hdr)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	return (le16_to_cpu(hdr->signature) & 0xfff0) == 0x5300;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun static struct rtl_hal_ops rtl8723be_hal_ops = {
194*4882a593Smuzhiyun 	.init_sw_vars = rtl8723be_init_sw_vars,
195*4882a593Smuzhiyun 	.deinit_sw_vars = rtl8723be_deinit_sw_vars,
196*4882a593Smuzhiyun 	.read_eeprom_info = rtl8723be_read_eeprom_info,
197*4882a593Smuzhiyun 	.interrupt_recognized = rtl8723be_interrupt_recognized,
198*4882a593Smuzhiyun 	.hw_init = rtl8723be_hw_init,
199*4882a593Smuzhiyun 	.hw_disable = rtl8723be_card_disable,
200*4882a593Smuzhiyun 	.hw_suspend = rtl8723be_suspend,
201*4882a593Smuzhiyun 	.hw_resume = rtl8723be_resume,
202*4882a593Smuzhiyun 	.enable_interrupt = rtl8723be_enable_interrupt,
203*4882a593Smuzhiyun 	.disable_interrupt = rtl8723be_disable_interrupt,
204*4882a593Smuzhiyun 	.set_network_type = rtl8723be_set_network_type,
205*4882a593Smuzhiyun 	.set_chk_bssid = rtl8723be_set_check_bssid,
206*4882a593Smuzhiyun 	.set_qos = rtl8723be_set_qos,
207*4882a593Smuzhiyun 	.set_bcn_reg = rtl8723be_set_beacon_related_registers,
208*4882a593Smuzhiyun 	.set_bcn_intv = rtl8723be_set_beacon_interval,
209*4882a593Smuzhiyun 	.update_interrupt_mask = rtl8723be_update_interrupt_mask,
210*4882a593Smuzhiyun 	.get_hw_reg = rtl8723be_get_hw_reg,
211*4882a593Smuzhiyun 	.set_hw_reg = rtl8723be_set_hw_reg,
212*4882a593Smuzhiyun 	.update_rate_tbl = rtl8723be_update_hal_rate_tbl,
213*4882a593Smuzhiyun 	.fill_tx_desc = rtl8723be_tx_fill_desc,
214*4882a593Smuzhiyun 	.fill_tx_cmddesc = rtl8723be_tx_fill_cmddesc,
215*4882a593Smuzhiyun 	.query_rx_desc = rtl8723be_rx_query_desc,
216*4882a593Smuzhiyun 	.set_channel_access = rtl8723be_update_channel_access_setting,
217*4882a593Smuzhiyun 	.radio_onoff_checking = rtl8723be_gpio_radio_on_off_checking,
218*4882a593Smuzhiyun 	.set_bw_mode = rtl8723be_phy_set_bw_mode,
219*4882a593Smuzhiyun 	.switch_channel = rtl8723be_phy_sw_chnl,
220*4882a593Smuzhiyun 	.dm_watchdog = rtl8723be_dm_watchdog,
221*4882a593Smuzhiyun 	.scan_operation_backup = rtl8723be_phy_scan_operation_backup,
222*4882a593Smuzhiyun 	.set_rf_power_state = rtl8723be_phy_set_rf_power_state,
223*4882a593Smuzhiyun 	.led_control = rtl8723be_led_control,
224*4882a593Smuzhiyun 	.set_desc = rtl8723be_set_desc,
225*4882a593Smuzhiyun 	.get_desc = rtl8723be_get_desc,
226*4882a593Smuzhiyun 	.is_tx_desc_closed = rtl8723be_is_tx_desc_closed,
227*4882a593Smuzhiyun 	.tx_polling = rtl8723be_tx_polling,
228*4882a593Smuzhiyun 	.enable_hw_sec = rtl8723be_enable_hw_security_config,
229*4882a593Smuzhiyun 	.set_key = rtl8723be_set_key,
230*4882a593Smuzhiyun 	.init_sw_leds = rtl8723be_init_sw_leds,
231*4882a593Smuzhiyun 	.get_bbreg = rtl8723_phy_query_bb_reg,
232*4882a593Smuzhiyun 	.set_bbreg = rtl8723_phy_set_bb_reg,
233*4882a593Smuzhiyun 	.get_rfreg = rtl8723be_phy_query_rf_reg,
234*4882a593Smuzhiyun 	.set_rfreg = rtl8723be_phy_set_rf_reg,
235*4882a593Smuzhiyun 	.fill_h2c_cmd = rtl8723be_fill_h2c_cmd,
236*4882a593Smuzhiyun 	.get_btc_status = rtl8723be_get_btc_status,
237*4882a593Smuzhiyun 	.is_fw_header = is_fw_header,
238*4882a593Smuzhiyun };
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun static struct rtl_mod_params rtl8723be_mod_params = {
241*4882a593Smuzhiyun 	.sw_crypto = false,
242*4882a593Smuzhiyun 	.inactiveps = true,
243*4882a593Smuzhiyun 	.swctrl_lps = false,
244*4882a593Smuzhiyun 	.fwctrl_lps = true,
245*4882a593Smuzhiyun 	.msi_support = false,
246*4882a593Smuzhiyun 	.aspm_support = 1,
247*4882a593Smuzhiyun 	.disable_watchdog = false,
248*4882a593Smuzhiyun 	.debug_level = 0,
249*4882a593Smuzhiyun 	.debug_mask = 0,
250*4882a593Smuzhiyun 	.ant_sel = 0,
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun static const struct rtl_hal_cfg rtl8723be_hal_cfg = {
254*4882a593Smuzhiyun 	.bar_id = 2,
255*4882a593Smuzhiyun 	.write_readback = true,
256*4882a593Smuzhiyun 	.name = "rtl8723be_pci",
257*4882a593Smuzhiyun 	.alt_fw_name = "rtlwifi/rtl8723befw.bin",
258*4882a593Smuzhiyun 	.ops = &rtl8723be_hal_ops,
259*4882a593Smuzhiyun 	.mod_params = &rtl8723be_mod_params,
260*4882a593Smuzhiyun 	.maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
261*4882a593Smuzhiyun 	.maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
262*4882a593Smuzhiyun 	.maps[SYS_CLK] = REG_SYS_CLKR,
263*4882a593Smuzhiyun 	.maps[MAC_RCR_AM] = AM,
264*4882a593Smuzhiyun 	.maps[MAC_RCR_AB] = AB,
265*4882a593Smuzhiyun 	.maps[MAC_RCR_ACRC32] = ACRC32,
266*4882a593Smuzhiyun 	.maps[MAC_RCR_ACF] = ACF,
267*4882a593Smuzhiyun 	.maps[MAC_RCR_AAP] = AAP,
268*4882a593Smuzhiyun 	.maps[MAC_HIMR] = REG_HIMR,
269*4882a593Smuzhiyun 	.maps[MAC_HIMRE] = REG_HIMRE,
270*4882a593Smuzhiyun 	.maps[MAC_HSISR] = REG_HSISR,
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	.maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS,
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	.maps[EFUSE_TEST] = REG_EFUSE_TEST,
275*4882a593Smuzhiyun 	.maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
276*4882a593Smuzhiyun 	.maps[EFUSE_CLK] = 0,
277*4882a593Smuzhiyun 	.maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
278*4882a593Smuzhiyun 	.maps[EFUSE_PWC_EV12V] = PWC_EV12V,
279*4882a593Smuzhiyun 	.maps[EFUSE_FEN_ELDR] = FEN_ELDR,
280*4882a593Smuzhiyun 	.maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
281*4882a593Smuzhiyun 	.maps[EFUSE_ANA8M] = ANA8M,
282*4882a593Smuzhiyun 	.maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
283*4882a593Smuzhiyun 	.maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
284*4882a593Smuzhiyun 	.maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
285*4882a593Smuzhiyun 	.maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	.maps[RWCAM] = REG_CAMCMD,
288*4882a593Smuzhiyun 	.maps[WCAMI] = REG_CAMWRITE,
289*4882a593Smuzhiyun 	.maps[RCAMO] = REG_CAMREAD,
290*4882a593Smuzhiyun 	.maps[CAMDBG] = REG_CAMDBG,
291*4882a593Smuzhiyun 	.maps[SECR] = REG_SECCFG,
292*4882a593Smuzhiyun 	.maps[SEC_CAM_NONE] = CAM_NONE,
293*4882a593Smuzhiyun 	.maps[SEC_CAM_WEP40] = CAM_WEP40,
294*4882a593Smuzhiyun 	.maps[SEC_CAM_TKIP] = CAM_TKIP,
295*4882a593Smuzhiyun 	.maps[SEC_CAM_AES] = CAM_AES,
296*4882a593Smuzhiyun 	.maps[SEC_CAM_WEP104] = CAM_WEP104,
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
299*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
300*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
301*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
302*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
303*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
304*4882a593Smuzhiyun /*	.maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,     */   /*need check*/
305*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
306*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
307*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
308*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
309*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
310*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
311*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
312*4882a593Smuzhiyun /*	.maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/
313*4882a593Smuzhiyun /*	.maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	.maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
316*4882a593Smuzhiyun 	.maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
317*4882a593Smuzhiyun 	.maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0,
318*4882a593Smuzhiyun 	.maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
319*4882a593Smuzhiyun 	.maps[RTL_IMR_RDU] = IMR_RDU,
320*4882a593Smuzhiyun 	.maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
321*4882a593Smuzhiyun 	.maps[RTL_IMR_BDOK] = IMR_BCNDOK0,
322*4882a593Smuzhiyun 	.maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
323*4882a593Smuzhiyun 	.maps[RTL_IMR_TBDER] = IMR_TBDER,
324*4882a593Smuzhiyun 	.maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
325*4882a593Smuzhiyun 	.maps[RTL_IMR_TBDOK] = IMR_TBDOK,
326*4882a593Smuzhiyun 	.maps[RTL_IMR_BKDOK] = IMR_BKDOK,
327*4882a593Smuzhiyun 	.maps[RTL_IMR_BEDOK] = IMR_BEDOK,
328*4882a593Smuzhiyun 	.maps[RTL_IMR_VIDOK] = IMR_VIDOK,
329*4882a593Smuzhiyun 	.maps[RTL_IMR_VODOK] = IMR_VODOK,
330*4882a593Smuzhiyun 	.maps[RTL_IMR_ROK] = IMR_ROK,
331*4882a593Smuzhiyun 	.maps[RTL_IMR_HSISR_IND] = IMR_HSISR_IND_ON_INT,
332*4882a593Smuzhiyun 	.maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER),
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	.maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
335*4882a593Smuzhiyun 	.maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
336*4882a593Smuzhiyun 	.maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
337*4882a593Smuzhiyun 	.maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
338*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
339*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
340*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
341*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
342*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
343*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
344*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
345*4882a593Smuzhiyun 	.maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	.maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
348*4882a593Smuzhiyun 	.maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
349*4882a593Smuzhiyun };
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun static const struct pci_device_id rtl8723be_pci_ids[] = {
352*4882a593Smuzhiyun 	{RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xB723, rtl8723be_hal_cfg)},
353*4882a593Smuzhiyun 	{},
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, rtl8723be_pci_ids);
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun MODULE_AUTHOR("PageHe	<page_he@realsil.com.cn>");
359*4882a593Smuzhiyun MODULE_AUTHOR("Realtek WlanFAE	<wlanfae@realtek.com>");
360*4882a593Smuzhiyun MODULE_LICENSE("GPL");
361*4882a593Smuzhiyun MODULE_DESCRIPTION("Realtek 8723BE 802.11n PCI wireless");
362*4882a593Smuzhiyun MODULE_FIRMWARE("rtlwifi/rtl8723befw.bin");
363*4882a593Smuzhiyun MODULE_FIRMWARE("rtlwifi/rtl8723befw_36.bin");
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun module_param_named(swenc, rtl8723be_mod_params.sw_crypto, bool, 0444);
366*4882a593Smuzhiyun module_param_named(debug_level, rtl8723be_mod_params.debug_level, int, 0644);
367*4882a593Smuzhiyun module_param_named(debug_mask, rtl8723be_mod_params.debug_mask, ullong, 0644);
368*4882a593Smuzhiyun module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444);
369*4882a593Smuzhiyun module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444);
370*4882a593Smuzhiyun module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444);
371*4882a593Smuzhiyun module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444);
372*4882a593Smuzhiyun module_param_named(aspm, rtl8723be_mod_params.aspm_support, int, 0444);
373*4882a593Smuzhiyun module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog,
374*4882a593Smuzhiyun 		   bool, 0444);
375*4882a593Smuzhiyun module_param_named(ant_sel, rtl8723be_mod_params.ant_sel, int, 0444);
376*4882a593Smuzhiyun MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
377*4882a593Smuzhiyun MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
378*4882a593Smuzhiyun MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
379*4882a593Smuzhiyun MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
380*4882a593Smuzhiyun MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n");
381*4882a593Smuzhiyun MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n");
382*4882a593Smuzhiyun MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");
383*4882a593Smuzhiyun MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
384*4882a593Smuzhiyun MODULE_PARM_DESC(disable_watchdog,
385*4882a593Smuzhiyun 		 "Set to 1 to disable the watchdog (default 0)\n");
386*4882a593Smuzhiyun MODULE_PARM_DESC(ant_sel, "Set to 1 or 2 to force antenna number (default 0)\n");
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun static struct pci_driver rtl8723be_driver = {
391*4882a593Smuzhiyun 	.name = KBUILD_MODNAME,
392*4882a593Smuzhiyun 	.id_table = rtl8723be_pci_ids,
393*4882a593Smuzhiyun 	.probe = rtl_pci_probe,
394*4882a593Smuzhiyun 	.remove = rtl_pci_disconnect,
395*4882a593Smuzhiyun 	.driver.pm = &rtlwifi_pm_ops,
396*4882a593Smuzhiyun };
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun module_pci_driver(rtl8723be_driver);
399